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DESCRIPTION
The LTC1863/LTC1867 are pin-compatible, 8-channel 12-/16-bit A/D converters with serial I/O, and an internal reference. The ADCs typically draw only 1.3mA from a single 5V supply. The 8-channel input multiplexer can be congured for either single-ended or differential inputs and unipolar or bipolar conversions (or combinations thereof). The automatic nap and sleep modes benet power sensitive applications. The LTC1867s DC performance is outstanding with a 2LSB INL specication and no missing codes over temperature. The signal-to-noise ratio (SNR) for the LTC1867 is typically 89dB, with the internal reference. Housed in a compact, narrow 16-pin SSOP package, the LTC1863/LTC1867 can be used in space-sensitive as well as low-power applications.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
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Sample Rate: 200ksps 16-Bit No Missing Codes and 2LSB Max INL 8-Channel Multiplexer with: Single Ended or Differential Inputs and Unipolar or Bipolar Conversion Modes SPI/MICROWIRE Serial I/O Signal-to-Noise Ratio: 89dB Single 5V Operation On-Chip or External Reference Low Power: 1.3mA at 200ksps, 0.76mA at 100ksps Sleep Mode Automatic Nap Mode Between Conversions 16-Pin Narrow SSOP Package
APPLICATIONS
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Industrial Process Control High Speed Data Acquisition Battery Operated Systems Multiplexed Data Acquisition Systems Imaging Systems
BLOCK DIAGRAM
Integral Nonlinearity vs Output Code (LTC1867)
2.0
CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7/COM 1 2 3 4 5 6 7 8 LTC1863/LTC1867 16 V 15 DD GND 14 SDI 13 12-/16-BIT + SDO SERIAL 200ksps 12 PORT SCK ADC 11 CS/CONV 10 VREF INTERNAL 2.5V REF 9
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1.5 1.0
INL (LSB)
REFCOMP
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PIN CONFIGURATION
TOP VIEW CH0 1 CH1 2 CH2 3 CH3 4 CH4 5 CH5 6 CH6 7 CH7/COM 8 16 VDD 15 GND 14 SDI 13 SDO 12 SCK 11 CS/CONV 10 VREF 9 REFCOMP
Supply Voltage (VDD) ................................... 0.3V to 6V Analog Input Voltage CH0-CH7/COM (Note 3) ........... 0.3V to (VDD + 0.3V) VREF, REFCOMP (Note 4) ......... 0.3V to (VDD + 0.3V) Digital Input Voltage (SDI, SCK, CS/CONV) (Note 4) ................................................. 0.3V to 10V Digital Output Voltage (SDO) ....... 0.3V to (VDD + 0.3V) Power Dissipation .............................................. 500mW Operating Temperature Range LTC1863C/LTC1867C/LTC1867AC ............ 0C to 70C LTC1863I/LTC1867I/LTC1867AI ...........40C to 85C Storage Temperature Range .................. 65C to 150C Lead Temperature (Soldering, 10 sec)................... 300C
ORDER INFORMATION
LEAD FREE FINISH LTC1863CGN#PBF LTC1863IGN#PBF LTC1867CGN#PBF LTC1867IGN#PBF LTC1867ACGN#PBF LTC1867AIGN #PBF TAPE AND REEL LTC1863CGN#TRPBF LTC1863IGN#TRPBF LTC1867CGN#TRPBF LTC1867IN#TRPBF LTC1867ACGN#TRPBF LTC1867AIGN#TRPBF PART MARKING* 1863 1863 1867 1867 1867 1867 PACKAGE DESCRIPTION 16-Lead Narrow Plastic SSOP 16-Lead Narrow Plastic SSOP 16-Lead Narrow Plastic SSOP 16-Lead Narrow Plastic SSOP 16-Lead Narrow Plastic SSOP 16-Lead Narrow Plastic SSOP TEMPERATURE RANGE 0C to 70C 40C to 85C 0C to 70C 40C to 85C 0C to 70C 40C to 85C
Consult LTC Marketing for parts specied with wider operating temperature ranges. *The temperature grade is identied by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based nish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specications, go to: http://www.linear.com/tapeandreel/
CONVERTER CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25C. With external reference (Notes 5, 6)
LTC1863 PARAMETER Resolution No Missing Codes Integral Linearity Error Differential Linearity Error Transition Noise Offset Error Offset Error Match Offset Error Drift Gain Error Unipolar Bipolar Unipolar (Note 8) Bipolar Unipolar Bipolar 0.5 6 6
l l
LTC1867A TYP MAX UNITS Bits Bits 2 2.5 1.75 0.74 32 64 2 2 0.5 64 64 LSB LSB LSB LSBRMS LSB LSB LSB LSB ppm/C LSB LSB
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CONDITIONS
l l l l l
MIN 12 12
TYP
0.1
LTC1863/LTC1867 CONVERTER CHARACTERISTICS The l denotes the specications which apply over the full operating
temperature range, otherwise specications are at TA = 25C. With external reference (Notes 5, 6)
LTC1863 PARAMETER Gain Error Match Gain Error Tempco Power Supply Sensitivity Internal Reference External Reference VDD = 4.75V 5.25V 15 2.7 1 CONDITIONS MIN TYP MAX 1 15 2.7 5 MIN LTC1867 TYP MAX 4 15 2.7 5 MIN LTC1867A TYP MAX 2 UNITS LSB ppm/C ppm/C LSB
DYNAMIC ACCURACY
SYMBOL PARAMETER SNR S/(N+D) THD Signal-to-Noise Ratio Total Harmonic Distortion Peak Harmonic or Spurious Noise Channel-to-Channel Isolation Full Power Bandwidth
(Note 5)
LTC1863 CONDITIONS 1kHz Input Signal 1kHz Input Signal, Up to 5th Harmonic 1kHz Input Signal 100kHz Input Signal 3dB Point MIN TYP 73.6 73.5 94.5 94.5 100 1.25 MAX LTC1867/LTC1867A MIN TYP 89 88 95 95 117 1.25 MAX UNITS dB dB dB dB dB MHz
ANALOG INPUT
SYMBOL PARAMETER
The l denotes the specications which apply over the full operating temperature range, otherwise specications are at TA = 25C. (Note 5)
LTC1863/LTC1867/LTC1867A CONDITIONS Unipolar Mode (Note 9) Bipolar Mode Between Conversions (Sample Mode) During Conversions (Hold Mode)
l l l
MIN
MAX
UNITS V V pF pF s
Analog Input Range CIN t ACQ Analog Input Capacitance for CH0 to CH7/COM Sample-and-Hold Acquisition Time Input Leakage Current
1.5
1.1 1
(Note 5)
LTC1863/LTC1867/LTC1867A MIN 2.48 TYP 2.5 15 0.43 6 4.096 MAX 2.52 UNITS V ppm/C mV/V k V
The l denotes the specications which apply over the full operating temperature range, otherwise specications are at TA = 25C. (Note 5)
LTC1863/LTC1867/LTC1867A SYMBOL VIH VIL IIN PARAMETER High Level Input Voltage Low Level Input Voltage Digital Input Current CONDITIONS VDD = 5.25V VDD = 4.75V VIN = 0V to VDD
l l l
MIN 2.4
TYP
MAX 0.8 10
UNITS V V A
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LTC1863/LTC1867
The l denotes the specications which apply over the full operating temperature range, otherwise specications are at TA = 25C. (Note 5)
LTC1863/LTC1867/LTC1867A SYMBOL CIN VOH VOL ISOURCE ISINK PARAMETER Digital Input Capacitance High Level Output Voltage (SDO) Low Level Output Voltage (SDO) Output Source Current Output Sink Current Hi-Z Output Leakage Hi-Z Output Capacitance Data Format VDD = 4.75V, IO = 10A VDD = 4.75V, IO = 200A VDD = 4.75V, IO = 160A VDD = 4.75V, IO = 1.6mA SDO = 0V SDO = VDD CS/CONV = High, SDO = 0V or VDD CS/CONV = High (Note 10) Unipolar Bipolar
l l l l
MIN
MAX
UNITS pF V V
0.4
V V mA mA
A pF
The l denotes the specications which apply over the full operating temperature range, otherwise specications are at TA = 25C. (Note 5)
LTC1863/LTC1867/LTC1867A SYMBOL VDD IDD PARAMETER Supply Voltage Supply Current CONDITIONS (Note 9) fSAMPLE = 200ksps NAP Mode SLEEP Mode
l l l
POWER REQUIREMENTS
MIN 4.75
UNITS V mA A A mW
PDISS
Power Dissipation
TIMING CHARACTERISTICS
SYMBOL fSAMPLE tCONV t ACQ fSCK t1 t2 t3 t4 t5 t6 t7 t8 PARAMETER Maximum Sampling Frequency Conversion Time Acquisition Time SCK Frequency CS/CONV High Time SDO Valid After SCK SDO Valid Hold Time After SCK SDO Valid After CS/CONV SDI Setup Time Before SCK SDI Hold Time After SCK SLEEP Mode Wake-Up Time Bus Relinquish Time After CS/CONV
The l denotes the specications which apply over the full operating temperature range, otherwise specications are at TA = 25C. (Note 5)
LTC1863/LTC1867/LTC1867A CONDITIONS
l l l
MIN 200
TYP 3
MAX 3.5 40
1.5 40 5 15 10
1.1 100 13 11 10 6 4 60 20 40 30 22
l l l l l l
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime
Note 2: All voltage values are with respect to GND (unless otherwise noted). Note 3: When these pin voltages are taken below GND or above VDD, they will be clamped by internal diodes. This product can handle input currents of greater than 100mA without latchup.
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1500
1000
26 2 1 0 CODE 1
122 2
5 3
0 4
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4 3
AMPLITUDE (dB)
AMPLITUDE (dB)
ADJACENT PAIR
75
100
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1.5
1.4
1.3
1.3
1.0
1.2
1.2
0.5
1.1
1.1
1000
18637 G10
1.0 4.5
5.5
18637 G11
1.0 50
25
0 25 50 TEMPERATURE (C)
75
100
18637 G12
0.2 0 0.2 0.4 0.6 0.8 1.0 0 512 1024 1536 2048 2560 3072 3584 4096 OUTPUT CODE
18637 G13
512 1024 1536 2048 2560 3072 3584 4096 OUTPUT CODE
18637 G14
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VDD GND SDI LTC1863/ SDO LTC1867 SCK CS/CONV VREF REFCOMP
5V
DIGITAL I/O
TEST CIRCUITS
Load Circuits for Access Timing
5V 3k DN 3k CL DN CL DN 3k CL DN CL
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t2 (SDO Valid Before SCK), t3 (SDO Valid Hold Time After SCK)
t2 SCK 0.4V t3 2.4V 0.4V
SDO
t5 (SDI Setup Time Before SCK), t6 (SDI Hold Time After SCK)
t5 2.4V t6
0.4V
SDO
Hi-Z
2.4V 0.4V
SDI
2.4V 0.4V
2.4V 0.4V
90% 10%
Hi-Z
1867 TD
APPLICATIONS INFORMATION
Overview The LTC1863/LTC1867 are complete, low power multiplexed ADCs. They consist of a 12-/16-bit, 200ksps capacitive successive approximation A/D converter, a precision internal reference, a congurable 8-channel analog input multiplexer (MUX) and a serial port for data transfer. Conversions are started by a rising edge on the CS/CONV input. Once a conversion cycle has begun, it cannot be restarted. Between conversions, the ADCs receive an input word for channel selection and output the conversion result, and the analog input is acquired in preparation for the next conversion. In the acquire phase, a minimum time of 1.5s will provide enough time for the sample-and-hold capacitors to acquire the analog signal. During the conversion, the internal differential 16-bit capacitive DAC output is sequenced by the SAR from the most signicant bit (MSB) to the least signicant bit (LSB). The input is sucessively compared with the binary weighted charges supplied by the differential capacitive DAC. Bit decisions are made by a low-power, differential comparator. At the end of a conversion, the DAC output balances the analog input. The SAR contents (a 12-/16-bit data word) that represent the analog input are loaded into the 12-/16-bit output latches.
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+ { + {
+ + +
{ {
+ + + + + + + +
7 Single-Ended to CH7/COM
+ + + + + + +
+ { +{ + + + +
CH7/COM ()
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Dynamic Performance FFT (Fast Fourier Transform) test techniques are used to test the ADCs frequency response, distortion and noise at the rated throughput. By applying a low distortion sine wave and analyzing the digital output using an FFT algorithm, the ADCs spectral content can be examined for frequencies outside the fundamental. Signal-to-Noise Ratio The Signal-to-Noise and Distortion Ratio (SINAD) is the ratio between the RMS amplitude of the fundamental input frequency to the RMS amplitude of all other frequency components at the A/D output. The output is band limited to frequencies from above DC and below half the sampling frequency. Figure 3 shows a typical SINAD of 87.9dB with a 200kHz sampling rate and a 1kHz input. When an external 5V is applied to REFCOMP (tie VREF to GND), a signal-to-noise ratio of 90dB can be achieved.
0 SNR = 88.8dB SINAD = 87.9dB THD = 95dB fSAMPLE = 200ksps INTERNAL REFERENCE
REFCOMP 10F
1867 F01a
1000pF 50 DIFFERENTIAL ANALOG INPUTS CH0 1000pF 50 CH1 1000pF REFCOMP 10F
1867 F01b
LTC1863/ LTC1867
DC Performance One way of measuring the transition noise associated with a high resolution ADC is to use a technique where a DC signal is applied to the input of the ADC and the resulting output codes are collected over a large number of conversions. For example, in Figure 2 the distribution of output codes is shown for a DC input that had been digitized 4096 times. The distribution is Gaussian and the RMS code transition noise is about 0.74LSB.
2500 2152 2000
AMPLITUDE (dB)
20 40 60 80
75
100
COUNTS
1500
1000
122 1 2
5 3
0 4
Total Harmonic Distortion (THD) is the ratio of the RMS sum of all harmonics of the input signal to the fundamental itself. The out-of-band harmonics alias into the frequency band between DC and half the sampling frequency. THD is expressed as: THD = 20 log V22 + V32 + V42 ... + VN2 V1
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Digital Interface The LTC1863/LTC1867 have very simple digital interface that is enabled by the control input, CS/CONV. A logic rising edge applied to the CS/CONV input will initiate a conversion. After the conversion, taking CS/CONV low will enable the serial port and the ADC will present digital data in twos complement format in bipolar mode or straight binary format in unipolar mode, through the SCK/SDO serial port. Internal Clock The internal clock is factory trimmed to achieve a typical conversion time of 3s and a maximum conversion time, 3.5s, over the full operating temperature range. The typical acquisition time is 1.1s, and a throughput sampling rate of 200ksps is tested and guaranteed. Automatic Nap Mode
2.5V
BANDGAP REFERENCE
4.096V
10F
R2 R3 LTC1863/LTC1867
1867 F04a
15 GND
The LTC1863/LTC1867 go into automatic nap mode when CS/CONV is held high after the conversion is complete. With a typical operating current of 1.3mA and automatic 150A nap mode between conversions, the power dissipation drops with reduced sample rate. The ADC only keeps the VREF and REFCOMP voltages active when the part is in the automatic nap mode. The slower the sample rate allows the power dissipation to be lower (see Figure 5).
2.0 VDD = 5V
1.5
1.0
VREF
+
10F
0.5
0.1F 15
GND
1867 F04b
1000
18637 G10
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tACQ 1/fSCK CS/CONV tCONV DON'T CARE NAP MODE NOT NEEDED FOR LTC1863 SCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DON'T CARE
SDI Hi-Z
DON'T CARE
SD
0S
S1
S0
COM UNI
SLP
DON'T CARE
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Hi-Z
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
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Figure 6. Example 1, CS/CONV Starts a Conversion and Remains HIGH Until Next Data Transfer. With CS/CONV Remaining HIGH After the Conversion, Automatic Nap Modes Provides Power Reduction at Reduced Sample Rate.
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SDI
SD
0S
S1
S0
COM UNI
SLP
DON'T CARE
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
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Figure 7. Example 2, CS/CONV Starts a Conversion With Short Active HIGH Pulse. With CS/CONV Returning LOW Before the Conversion, the ADC Remains Powered Up.
111...111 111...110
000...001 000...000 111...111 111...110 FS = 4.096 1LSB = FS/2n 1LSB = (LTC1863) = 1mV 1LSB = (LTC1867) = 62.5V FS/2 1 0V 1 LSB LSB INPUT VOLTAGE (V) FS/2 1LSB
1867 F08
100...001 100...000 011...111 UNIPOLAR ZERO 011...110 FS = 4.096 1LSB = FS/2n 1LSB = (LTC1863) = 1mV 1LSB = (LTC1867) = 62.5V 0V INPUT VOLTAGE (V)
1867 F09
100...001 100...000
000...001 000...000
FS 1LSB
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.045 .005
.254 MIN
.150 .165
.0165 .0015
.0250 BSC
1 .015 .004 45 (0.38 0.10) .007 .0098 (0.178 0.249) .016 .050 (0.406 1.270)
NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0 8 TYP
2 3
5 6
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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Single/Dual 90MHz, 22V/s, 16-Bit Accurate Op Amps Low Input Offset: 75V/125V
LTC1860L/LTC1861L 3V, 12-Bit, 1-/2-Channel 150ksps ADC LTC1864L/LTC1865L 3V, 16-Bit, 1-/2-Channel 150ksps ADC in MSOP
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