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Q1) Design and implement a DE2/DE1 project that demonstrates a binary to BCD converter. Use
the switches SW [15:0] to define the input binary value and the seven-segment displays to show
the resulting decimal equivalent. For example, if the first five switches are on: 0x1F, the sevensegment display should read 31.
VHDL CODE FOR Q1:
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity binary2bcd is
port ( clk : in std_logic;
sw: in std_logic_vector(15 downto 0);
--7SEGMENT PIN ASSIGNMENT
hex0:out std_logic_vector(6 downto 0);
hex1:out std_logic_vector(6 downto 0);
hex2:out std_logic_vector(6 downto 0);
hex3:out std_logic_vector(6 downto 0);
hex4:out std_logic_vector(6 downto 0));
end binary2bcd;
architecture behavior of binary2bcd is
begin
my_proc: process (clk)
end if;
if (one >= "0101") then
one := std_logic_vector (unsigned(one) +3);
end if;
-- THIS IS SHIFTING WORK
tthou := tthou(2 downto 0)& thou(3);
thou := thou (2 downto 0)& hund(3);
hund := hund (2 downto 0)& ten(3);
ten := ten (2 downto 0)& one(3);
one := one (2 downto 0)& random(15);
random := std_logic_vector(unsigned(random) sll 1);
end loop;
--DISPLAYING THE VALUE ON THE SEVEN SEGMENT
case one is
when "0000" => hex0 <= "1000000" ; -- 0
when "0001" => hex0 <= "1111001" ; -- 1
when "0010" => hex0 <= "0100100" ; -- 2
when "0011" => hex0 <= "0110000" ; -- 3
when "0100" => hex0 <= "0011001" ; -- 4
when "0101" => hex0 <= "0010010" ; -- 5
when "0110" => hex0 <= "0000010" ; -- 6
one := "0000";
ten := "0000";
hund := "0000";
thou := "0000";
tthou:= "0000";
end if;
end process ;
end behavior;
2- Modify the binary to BCD converter project so that it handles and displays signed values.
VHDL CODE FOR Q2:
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
entity binary2bcdsigned is
port ( CLK : in std_logic;
input: in signed(17 downto 0);
segment0:out signed(6 downto 0);
segment1:out signed(6 downto 0);
segment2:out signed(6 downto 0);
segment3:out signed(6 downto 0);
segment4:out signed(6 downto 0);
segment5:out signed(6 downto 0));
end binary2bcdsigned;
architecture behavior of binary2bcdsigned is
begin
my_proc: process (CLK)
--Variable assignment
variable random: signed(17 downto 0) := "000000000000000000";
variable one: std_logic_vector(3 downto 0) := "0000";
one := "0000";
ten:= "0000";
hund := "0000";
thou := "0000";
tthou:= "0000";
end if;
end if;
random := input;
if input(17)>='0' then
for i in 0 to 15 loop
segment5<="0111111";
if (tthou >= "0101") then
tthou := std_logic_vector (unsigned(tthou) +3);
end if;
if (thou >= "0101") then
thou := std_logic_vector (unsigned(thou) +3);
end if;
if (hund >= "0101") then
hund := std_logic_vector (unsigned(hund) +3);
end if;
if (ten >= "0101") then
ten := std_logic_vector (unsigned(ten) +3);
end if;
if (one >= "0101") then
one := std_logic_vector (unsigned(one) +3);
end if;
tthou := tthou(2 downto 0) & thou(3);
thou := thou(2 downto 0)& hund(3);
hund := hund(2 downto 0)& ten(3);
ten := ten(2 downto 0)& one(3);
one := one(2 downto 0)& random(15);
random := signed(unsigned(random) sll 1);
end loop;
CASE one IS
when "0000" => segment0 <= "1000000" ; -- 0
when "0001" => segment0 <= "1111001" ; -- 1
when "0010" => segment0 <= "0100100" ; -- 2
CASE thou IS
when "0000" => segment3 <= "1000000" ;
when "0001" => segment3 <= "1111001" ;
when "0010" => segment3 <= "0100100" ;
when "0011" => segment3 <= "0110000" ;
when "0100" => segment3 <= "0011001" ;
when "0101" => segment3 <= "0010010" ;
when "0110" => segment3 <= "0000010" ;
when "0111" => segment3 <= "1111000" ;
end loop;
CASE one IS
when "0000" => segment0 <= "1000000" ;
when "1111" => segment0 <= "1111001" ;
when "1110" => segment0 <= "0100100" ;
when "1101" => segment0 <= "0110000" ;
when "1100" => segment0 <= "0011001" ;
when "1011" => segment0 <= "0010010" ;
when "1010" => segment0 <= "0000010" ;
when "1001" => segment0 <= "1111000" ;
when "1000" => segment0 <= "0000000" ;
when "0111" => segment0 <= "0010000" ;
when "0110" => segment0 <= "0001000" ;
when "0101" => segment0 <= "0000011" ;
when "0100" => segment0 <= "1000110" ;
when "0011" => segment0 <= "0100001" ;
when "0010" => segment0 <= "0000110" ;
when "0001" => segment0 <= "0001110" ;
when others => segment0 <= "1111111" ; -- TURN ON ALL LIGHTS
end case;
CASE ten IS
end behavior;