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Diodes, Transistors and Operational Amplifiers Bruce G. Thompson Ithaca College Spring 2008
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1.0 Diodes
1.1 What are Diodes
Diodes are electronic devices which are made by joining n type and p type semiconductor material (figure 1). The physics of the junction allows current to flow easily if the n side is more positive than the p side (figure 2a). Very little current flows if the voltages are reversed (figure 2b). So if current is thought of as a flow of a fluid, then the diode is a one way valve.
I D = I 0 (eVD I 0 = 10nA
VT
1)
VT 40mV @ roomT
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Diodes
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Comments old technology low power, fast high power, slow high power, fast
Like resistors, diodes will burn up (overheat) if you put more power through them than they are designed to handle. Since the forward voltage drop is determined by the current via the diode equation and since Power = VI, specifying the maximum current is the same as specifying the maximum power dissipation. The maximum forward voltage is the voltage across the diode at the maximum average current so multiply the two to get the power rating. All diodes will begin to conduct in the reverse direction if a high enough voltage is applied (Figure 5). This is called reverse breakdown. It's like the fluid valve having so much pressure in the reverse direction that it breaks down and lets the fluid flow in the opposite direction. The maximum reverse breakdown voltage is the specification of this point for a diode. To exceed this voltage without limiting the current will cause a large current to flow and probably blow the diode. Zener diodes are designed to breakdown at a specified voltage. The voltage across the terminals is fairly constant over a wide range of currents (0.1 mA to 100 mA). They come with voltage specifications from 2.7 to 47 V and are used as voltage references. It takes a certain amount of time for a diode to turn off when the voltage is reversed. This is called the recovery time. It is used when designing high frequency circuits such as the switching power supplies found in computers.
dQ dV =I =C . dT dT
Therefore this circuit produces a DC voltage with an AC ripple voltage superimposed on it as shown. To design a power supply you need to specify the desired output voltage, output current (or equivalent load impedance) and the maximum ripple voltage tolerated. Then choose a transformer to give you the right average voltage, choose a rectifier which can handle the average current and the reverse voltage from the input voltage on the negative cycle and
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Diodes
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choose a capacitor which gives you the tolerated ripple. A variation of this circuit uses a bridge rectifier as shown in figure 7. This is called a full-wave rectifier as opposed to the half-wave rectifier in figure 6 where one-half of the input signal is thrown away.
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Diodes
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dI ). As soon dt
as the voltage gets more than about 1 volt above V, the diode begins to conduct. This limits the voltage at the collector to about V+1 so the transistor is happy. If the diode were not there the inductor could easily increase the voltage at the collector to 1000 V which would destroy it immediately!
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Transistor Theory
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Transistors
What are Transistors
Transistors are electronic devices which are made by joining three pieces of semiconductor material (Figure 1). They come in two types (polarities), npn and pnp, which describe the manner in which the p and n type semiconductor material is connected. A transistor has three wires connected to the three semiconductors. The base is the center material and the terminals which are designated the emitter and collector are determined by the geometry of the semiconductor during manufacturing. At the most basic level, a transistor is just two pn junctions: one from the base to the collector and one from the base to the emitter. To find out if a transistor is blown out, you can test it to see if the two diode junctions are intact but transistor operation is much different than just having two diodes. The operation of the transistor con be stated as follows: the amount of current flowing in the baseemitter junction determines the current from the emitter to the collector. The direction of the current flow is determined by the polarity of transistor used. We will be using npn transistors exclusively.
Transistor as a Switch
By knowing just a little about transistors we can begin to use them as switches to control DC loads such as LEDs and relays (see Figure 2). The little bit we need to know is that:
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Transistor Theory
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Since item 3 above is satisfied for this circuit, the transistor allows a large current to flow from the collector to the emitter. It does this by lowering Vce to almost zero (about 0.2 V). So the current in the lamp is Ic = (V across the lamp)/(R of the lamp) Ic = (12-0.2)/100 120 mA. This on state of the transistor is called saturation. The current gain, Ai, is defined as the amount of load current divided by the amount of control current. In this case, Ai = Ic/Ib = 11. Unless you use special switching transistors, you should design for a maximum current gain of about 20 when the transistor is in saturation. For example, a headlight for a car needs about 10 A of current. To control this with a transistor with a current gain of 20, you will need to provide 10 A/20 = 0.5 A of base current. With a 12 volt system, your base resistor will need to be less than R = V/I = (12-0.6)/0.5 = 223 ohms. When the manual switch S is opened, the current no longer flows into the base and so the collector current stops also. Many times a circuit design will include a resistor from the base to the ground (about 10K in this circuit) so that the transistor shuts off quickly and completely. This state of the transistor is called cutoff. Remember the caution described in the section on diodes: if the load being switched is inductive, be sure to use a protective diode to limit the voltage on the collector when the current is turned off.
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Current Source
Lets look at the circuit in figure 3 in a different way. Since Ie = [hfe/(hfe+1)] Ic and Vout = Vb-0.6 = IeRE then Ic is a function of Vb,
Ic =
That is, the collector current Ic can be set by setting Vin = Vb. This is called transconductance because a current is being set by a voltage. Current sources are useful in their own right but we want to change this current into a voltage so that we have a voltage amplifier. We do this by hooking the current source to a resistor (figure 8). If we establish a current Ic with a voltage at the base Vb, this current flows through the resistor Rc. The voltage at Vout is then
h fe + 1 Vb 0.6 RC h fe RE
To find the gain we vary Vb by a little and look at what happens to Vout.
Vout =
h fe 1 h fe
Vb
RC RE
AV =
Vout R = C Vb RE
Now if we add the input bias circuit we used before (figure 9) we can put a signal on the input and get an amplified signal on the output. Notice that now we will want to set the DC operating point so that the output at Vc will have the widest range. More on that later. We finally have a voltage amplifier! We even have one in which the gain is not dependant upon the hfe of the transistor as long as it is large.
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Input impedance
Lets take a quick look at the input impedance of the circuit in figure 9. If C1 is large then its impedance can be ignored. Then the impedances seen when looking into the capacitor are R1 in parallel with R2 in parallel with R looking into the base, which we calculated to be (hfe+1)RE. So,
1 1 1 1 + + rin R1 R2 h fe RE
Output impedance
Lets also look at the output impedance. We do this by imagining a load attached to Vout and determine what happens when that load is varied. When we look into Vout, we see RL in parallel with the resistance looking into the collector. But the transistor is a good current source so as we vary the load on vout the current Ic doesnt change, only the current in RL changes to provide the load current. Therefore, rout = RL.
Model Limitations
Now lets try to get more gain from the amplifier. If we make RE smaller the gain will increase. In fact, if we ground the emitter, we expect an infinite gain! This doesnt happen so our model is not useful at this extreme. Some other effects appear when RE goes to zero. The output is no longer linear, that is, the gain is not constant. It changes depending on the voltage at the input. The input impedance is also not zero and not constant contrary to expectations. Also, temperature begins to have a large effect on the operation of the circuit.
Ic = I s (e
V be V T
1)
where VT = 25 mV @ 20C and Is is the reverse leakage current. Ib is now determined from Ic by using Ib = Ic/hfe. This is the Ebers-Moll Equation It looks familiar because it also describes the operation of a diode except that for a diode VT 40 mV @ 20C. When the transistor is in the active region of operation, Ic >> Is so the -1 can be ignored:
Ic = I se
V be V T
The most important effect of this model change is that we can calculate the small signal impedance
re =
dV e dIe
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I V be = V T ln c Is
Now if we hold the base voltage constant and change the emitter voltage by a small amount the baseemitter voltage will change by the same amount. So,
dV e = dV be =
Since dIe dIc,
VT dI Ic c
re
VT Ic
This is a small resistance which is in series with the emitter. Lets see how it changes the results we have gotten so far.
V out = Ve
and
RE RE = (V b 0.6) RE + re RE + re
Vout =
RE V in RE + r e
So, the gain is less than one. In the circuit of figure 4 re=25 so the gain is 0.995. Not much less than 1! The input impedance before we changed the model was RE(hfe+1) but now there is another resistance in series so
rin = (RE + re )( h fe + 1)
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AV =
RL RE + re
AV =
RL re
For example if RL=5.6K and re25, then the gain is Av = -220. Figure 11 shows a circuit which maximizes the AC gain while maintaining the DC operating point. By shunting RE with a capacitor, C2, we provide a easy path to ground for the AC current. If the impedance of the capacitor is much smaller than RE, the AC current ie will flow through the capacitor to ground. The effective emitter resistor becomes just re. So the gain of the amplifier of figure 11 for an AC input vin is, as above, Av = -RL/re.
AV =
h fe RL hie
Non-Linearity
As noted above, the gain of a high gain amplifier is not constant while vin varies over the input range. This will distort the shape of the wave form and is best seen using a triangle wave input (figure 12). The reason for this behavior can be seen from the gain equation:
AV = RL
Ic VT
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The gain depends on the collector current. When vin goes high, the collector current increases according to the Ebers-Moll Equation. This decreases the vout but it also increases the gain so that the gain when vout is low is greater than when vout is higher. Since the slope of the triangle wave is the gain, the slope is larger when vout is lower, and vice versa.
More Gain
If more gain is desired from the amplifier then bypass RE with another capacitor whose impedance at 20 Hz is much less than RE. So, C2>>18uF.
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2N3904
MMBT3904
C
PZT3904
C
E C B
E C
TO-92
E
SOT-23
Mark: 1A
SOT-223
Parameter
Value
40 60 6.0 200 -55 to +150
Units
V V V mA C
*These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
NOTES: 1) These ratings are based on a maximum junction temperature of 150 degrees C. 2) These are steady state limits. The factory should be consulted on applications involving pulsed or low duty cycle operations.
Thermal Characteristics
Symbol
PD RJC RJA
Characteristic
Total Device Dissipation Derate above 25C Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient 2N3904 625 5.0 83.3 200
Max
*MMBT3904 350 2.8 357 **PZT3904 1,000 8.0 125
Units
mW mW/C C/W C/W
*Device mounted on FR-4 PCB 1.6" X 1.6" X 0.06." **Device mounted on FR-4 PCB 36 mm X 18 mm X 1.5 mm; mounting pad for the collector lead min. 6 cm2.
2N3904/MMBT3904/PZT3904, Rev A
Electrical Characteristics
Symbol Parameter
Test Conditions
Min
Max
Units
OFF CHARACTERISTICS
V(BR)CEO V(BR)CBO V(BR)EBO IBL ICEX Collector-Emitter Breakdown Voltage Collector-Base Breakdown Voltage Emitter-Base Breakdown Voltage Base Cutoff Current Collector Cutoff Current IC = 1.0 mA, IB = 0 IC = 10 A, IE = 0 IE = 10 A, IC = 0 VCE = 30 V, VEB = 3V VCE = 30 V, VEB = 3V 40 60 6.0 50 50 V V V nA nA
ON CHARACTERISTICS*
hFE DC Current Gain IC = 0.1 mA, VCE = 1.0 V IC = 1.0 mA, VCE = 1.0 V IC = 10 mA, VCE = 1.0 V IC = 50 mA, VCE = 1.0 V IC = 100 mA, VCE = 1.0 V IC = 10 mA, IB = 1.0 mA IC = 50 mA, IB = 5.0 mA IC = 10 mA, IB = 1.0 mA IC = 50 mA, IB = 5.0 mA 40 70 100 60 30 300
VCE(sat) VBE(sat)
0.65
V V V V
SWITCHING CHARACTERISTICS
td tr ts tf Delay Time Rise Time Storage Time Fall Time VCC = 3.0 V, VBE = 0.5 V, IC = 10 mA, IB1 = 1.0 mA VCC = 3.0 V, IC = 10mA IB1 = IB2 = 1.0 mA 35 35 200 50 ns ns ns ns
Spice Model
NPN (Is=6.734f Xti=3 Eg=1.11 Vaf=74.03 Bf=416.4 Ne=1.259 Ise=6.734 Ikf=66.78m Xtb=1.5 Br=.7371 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=3.638p Mjc=.3085 Vjc=.75 Fc=.5 Cje=4.493p Mje=.2593 Vje=.75 Tr=239.5n Tf=301.2p Itf=.4 Vtf=4 Xtf=2 Rb=10)
Typical Characteristics
500 400
125 C
V CE = 5V
300
25 C
0.1
25 C
0.05
- 40 C
100
0.1
100
0.8
- 40 C 25 C
0.6
125 C
0.6
125 C
0.4
0.2 0.1
100
100 10 1 0.1
VCB = 30V
5 4 3 2
C obo C ibo
25
150
1 0.1
100
Typical Characteristics
(continued)
V CE = 5.0V 10
I C = 5.0 mA
8 6 4 2 0 0.1
I C = 50 A
I C = 100 A
1 10 f - FREQUENCY (kHz)
100
1 10 R S - SOURCE RESISTANCE ( k )
100
SOT-223
0.75
- DEGREES
TO-92
0.5
SOT-23
0.25
fe
25
50 75 100 TEMPERATURE (o C)
125
150
100
T J = 125C
T J = 25C
Typical Characteristics
(continued)
I B1 = I B2 =
Ic 10
VCC = 40V
100
T J = 125C
100
T J = 25C
Current Gain
V CE = 10 V f = 1.0 kHz T A = 25oC h oe - OUTPUT ADMITTANCE ( mhos) 500 100
Output Admittance
V CE = 10 V f = 1.0 kHz T A = 25oC
h fe - CURRENT GAIN
100
10
10 0.1
10
1 0.1
10
_4
Input Impedance
V CE = 10 V f = 1.0 kHz T A = 25oC
10
0.1 0.1
10
1 0.1
10
Test Circuits
3.0 V
275
C1 < 4.0 pF
t1 10.9 V 275
February 1995
Features
Y Y Y Y Y Y Y Y Y
Y Y
Internally trimmed offset voltage 0 5 mV(max) Input offset voltage drift 10 mV C(max) Low input bias current 50 pA Low input noise current 0 01 pA 0Hz Wide gain bandwidth 3 MHz(min) High slew rate 10V ms(min) Low supply current 1 8 mA High input impedance 1012X k 0 02% Low total harmonic distortion AV e 10 RL e 10k VO e 20 Vp-p BW e 20 Hzb20 kHz Low 1 f noise corner 50 Hz Fast settling time to 0 01% 2 ms
Typical Connection
Ordering Information
X Y LF411XYZ indicates electrical grade indicates temperature range M for military C for commercial indicates package type H or N
Connection Diagrams
Metal Can Package
TL H 5655 5
Top View
Note Pin 4 connected to case
TL H 56551
Simplified Schematic
Order Number LF411ACH or LF411MH 883 See NS Package Number H08A Dual-In-Line Package
TL H 5655 7
TL H 5655 6
BI-FET IITM is a trademark of National Semiconductor Corporation
Top View Order Number LF411ACN LF411CN or LF411MJ 883 See NS Package Number N08E or J08A
Available per JM38510 11904
TL H 5655
RRD-B30M115 Printed in U S A
(Note 3)
b 65 C s TA s 150 C
260 C
Units mV mV C pA nA nA pA nA nA X V mV V mV V V V dB dB 34 mA
200 200
g 13 5
a 19 5 b 16 5
a 14 5 b 11 5
CMRR PSRR IS
80 80
100 100 18 28
70 70
100 100 18
S0Hz S0Hz
Note 1 Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage Note 2 For operating at elevated temperature these devices must be derated based on a thermal resistance of ijA Note 3 These devices are available in both the commercial temperature range 0 C s TA s 70 C and the military temperature range b 55 C s TA s 125 C The temperature range is designated by the position just before the package type in the device number A C indicates the commercial temperature range and an M indicates the military temperature range The military temperature range is available in H package only Note 4 Unless otherwise specified the specifications apply over the full temperature range and for VS e g 20V for the LF411A and for VS e g 15V for the LF411 VOS IB and IOS are measured at VCM e 0 Note 5 The LF411A is 100% tested to this specification The LF411 is sample tested to insure at least 90% of the units meet this specification Note 6 The input bias currents are junction leakage currents which approximately double for every 10 C increase in the junction temperature Tj Due to limited production test time the input bias currents measured are correlated to junction temperature In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation PD Tj e TA a ijA PD where ijA is the thermal resistance from junction to ambient Use of a heat sink is recommended if input bias current is to be kept to a minimum Note 7 Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from g 15V to g 5V for the LF411 and from g 20V to g 5V for the LF411A Note 8 RETS 411X for LF411MH and LF411MJ military specifications Note 9 Max Power Dissipation is defined by the package characteristics Operating the part near the Max Power Dissipation may cause the part to operate outside guaranteed limits
TL H 5655 2
Bode Plot
Distortion vs Frequency
Output Impedance
TL H 5655 3
Pulse Response RL e 2 kX
CL10 pF
TL H 5655 4
Application Hints
The LF411 series of internally trimmed JFET input op amps (BI-FET IITM ) provide very low input offset voltage and guaranteed input offset voltage drift These JFETs have large reverse breakdown voltages from gate to source and drain eliminating the need for clamps across the inputs Therefore large differential input voltages can easily be accommodated without a large increase in input current The maximum differential input voltage is independent of the supply voltages However neither of the input voltages should be allowed to exceed the negative supply as this will cause large currents to flow which can result in a destroyed unit Exceeding the negative common-mode limit on either input will force the output to a high state potentially causing a reversal of phase to the output Exceeding the negative common-mode limit on both inputs will force the amplifier output to a high state In neither case does a latch occur since raising the input back within the common-mode range again puts the input stage and thus the amplifier in a normal operating mode Exceeding the positive common-mode limit on a single input will not change the phase of the output however if both inputs exceed the limit the output of the amplifier may be forced to a high state 5
Typical Applications
High Speed Current Booster
PNP e 2N2905 NPN e 2N2219 unless noted TO-5 heat sinks for Q6-Q7
TL H 5655 9
VOUT e b VREF
2
A1
A2 A3 a a 4 8
A10 1024
0 s VOUT s b
Detailed Schematic
TL H 5655 10
a
FEATURES Low Noise: 80 nV p-p (0.1 Hz to 10 Hz), 3 nV/Hz Low Drift: 0.2 V/ C High Speed: 2.8 V/ s Slew Rate, 8 MHz Gain Bandwidth Low VOS: 10 V Excellent CMRR: 126 dB at VCM of 11 V High Open-Loop Gain: 1.8 Million Fits 725, OP07, 5534A Sockets Available in Die Form GENERAL DESCRIPTION
OP27
The OP27 precision operational amplifier combines the low offset and drift of the OP07 with both high speed and low noise. Offsets down to 25 mV and maximum drift of 0.6 mV/C, makes the OP27 ideal for precision instrumentation applications. Exceptionally low noise, en = 3.5 nV/Hz, at 10 Hz, a low 1/f noise corner frequency of 2.7 Hz, and high gain (1.8 million), allow accurate high-gain amplification of low-level signals. A gain-bandwidth product of 8 MHz and a 2.8 V/msec slew rate provides excellent dynamic accuracy in high-speed, dataacquisition systems. A low input bias current of 10 nA is achieved by use of a bias-current-cancellation circuit. Over the military temperature range, this circuit typically holds IB and IOS to 20 nA and 15 nA, respectively. The output stage has good load driving capability. A guaranteed swing of 10 V into 600 W and low output distortion make the OP27 an excellent choice for professional audio applications.
(Continued on page 7)
4V (CASE) NC = NO CONNECT
OP27
NC = NO CONNECT
SIMPLIFIED SCHEMATIC
V+ R3 Q6 R1* 1 8 R4 R2* C2 Q22 Q21 R23 Q23 R24 Q24 R9 Q20 Q1A NONINVERTING INPUT (+) Q3 INVERTING INPUT () *R1 AND R2 ARE PERMANENTLY ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE. V Q11 Q12 Q27 Q28 Q26 Q45 Q1B Q2B Q2A R5 C3 R12 C4 Q19 OUTPUT C1 Q46
VOS ADJ.
REV. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 2003 Analog Devices, Inc. All rights reserved.
OP27SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V = 15 V, T = 25C, unless otherwise noted.)
S A
Parameter INPUT OFFSET VOLTAGE1 LONG-TERM VOS STABILITY2, 3 INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT NOISE VOLTAGE3, 4 INPUT NOISE Voltage Density3 INPUT NOISE Current Density3, 5 INPUT RESISTANCE Differential-Mode6 Common-Mode INPUT VOLTAGE RANGE
Conditions
Min
OP27A/E Typ Max 10 0.2 7 10 25 1.0 35 40 0.18 5.5 4.5 3.8 4.0 2.3 0.6
Min
OP27F Typ Max 20 0.3 9 12 0.08 3.5 3.1 3.0 1.7 1.0 0.4 60 1.5 50 55 0.18 5.5 4.5 3.8 4.0 2.3 0.6
Min
OP27C/G Typ Max 30 0.4 12 15 0.09 3.8 3.3 3.2 1.7 1.0 0.4 100 2.0 75 80 0.25 8.0 5.6 4.5
in
0.6
1.3
6 3
0.94
5 2.5
0.7
4 2
COMMON-MODE REJECTION RATIO CMRR POWER SUPPLY PSRR REJECTION RATIO LARGE-SIGNAL VOLTAGE GAIN AVO
OUTPUT VOLTAGE SWING SLEW RATE7 GAIN BANDWIDTH PRODUCT7 OPEN-LOOP OUTPUT RESISTANCE POWER CONSUMPTION OFFSET ADJUSTMENT RANGE
VO SR
GBW
5.0
8.0
5.0
8.0
5.0
8.0
MHz
RO Pd
VO = 0, IO = 0 VO RP = 10 kW
70 90 140
70 90 140
70 100 170
W mW
4.0
4.0
4.0
mV
NOTES 1 Input offset voltage measurements are performed ~ 0.5 seconds after application of power. A/E grades guaranteed fully warmed up. 2 Long-term input offset voltage stability refers to the average trend line of V OS versus. Time over extended periods after the first 30 days of operation. Excluding the initial hour of operation, changes in V OS during the first 30 days are typically 2.5 mV. Refer to typical performance curve. 3 Sample tested. 4 See test circuit and frequency response curve for 0.1 Hz to 10 Hz tester. 5 See test circuit for current noise measurement. 6 Guaranteed by input bias current. 7 Guaranteed by design.
REV. C
Conditions
mV/C nA nA V dB
COMMON-MODE REJECTION RATIO CMRR POWER SUPPLY REJECTION RATIO PSRR LARGE-SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING AVO VO
51
mV/V V/mV V
NOTES 1 Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power. A/E grades guaranteed fully warmed up. 2 The TCVOS performance is within the specifications unnulled or when nulled with R P = 8 kW to 20 kW. TCVOS is 100% tested for A/E grades, sample tested for C/F/G grades. 3 Guaranteed by design.
REV. C
OP27
ELECTRICAL CHARACTERISTICS
Parameter INPUT ONSET VOLTAGE AVERAGE INPUT OFFSET DRIFT INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT VOLTAGE RANGE Symbol VOS TCVOS1 TCVOSn2 IOS IB IVR VCM = 10 V VS = 4.5 V to 18 V RL 2 kW, VO = 10 V RL 2 kW 10.5 110 Conditions
(@ VS = 15 V, 25C TA 85C for OP27J, OP27Z, 0C TA 70C for OP27EP, OP27FP, and 40C TA 85C for OP27GP, OP27GS, unless otherwise noted.)
Min OP27E Typ 20 0.2 0.2 10 14 11.8 124 2 15 Max 50 0.6 0.6 50 60 Min OP27F Typ Max 40 0.3 0.3 14 18 10.5 11.8 102 121 2 16 140 1.3 1.3 85 95 Min OP27G Typ Max 55 04 04 20 25 10.5 11.8 96 118 2 32 220 1.8 1.8 135 150 Unit mV mV/C mV/C nA nA V dB mV/V
COMMON-MODE REJECTION RATIO CMRR POWER SUPPLY REJECTION RATIO PSRR LARGE-SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING
AVO
750 11.7
1500 13.6
700
1300
450
1000
V/mV V
VO
11.4 13.5
11.0 13.3
NOTES 1 The TCVOS performance is within the specifications unnulled or when nulled with R P = 8 kW to 20 kW. TCVOS is 100% tested for A/E grades, sample tested for C/F/G grades. 2 Guaranteed by design.
REV. C
OP27
DIE CHARACTERISTICS
1. 2. 3. 4. 6. 7. 8. NULL () INPUT (+) INPUT V OUTPUT V+ NULL
1
1990
1427U
7 4 6
INPUT OFFSET VOLTAGE* INPUT OFFSET CURRENT INPUT BIAS CURRENT INPUT VOLTAGE RANGE COMMON-MODE REJECTION RATIO POWER SUPPLY LARGE-SIGNAL VOLTAGE GAIN OUTPUT VOLTAGE SWING POWER CONSUMPTION
NOTE *Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
REV. C
OP27
TYPICAL ELECTRICAL CHARACTERISTICS (@ V = 15 V, T = 25C unless otherwise noted.)
S A
Parameter AVERAGE INPUT OFFSET VOLTAGE DRIFT* AVERAGE INPUT OFFSET CURRENT DRIFT AVERAGE INPUT BIAS CURRENT DRIFT INPUT NOISE VOLTAGE DENSITY
Unit mV/C pA/C pA/C nV/Hz nV/Hz nV/Hz pA/Hz pA/Hz pA/Hz mV p-p V/ms MHz
80 100 fO = 10 Hz fO = 30 Hz fO = 1000 Hz fO = 10 Hz fO = 30 Hz fO = 1000 Hz 0.1 Hz to 10 Hz RL 2 kW 3.5 3.1 3.0 1.7 1.0 0.4 0.08 2.8 8
130 160 3.5 3.1 3.0 1.7 1.0 0.4 0.08 2.8 8
180 200 3.8 3.3 3.2 1.7 1.0 0.4 0.09 2.8 8
NOTE *Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
REV. C
OP27
(Continued from page 1)
PSRR and CMRR exceed 120 dB. These characteristics, coupled with long-term drift of 0.2 mV/month, allow the circuit designer to achieve performance levels previously attained only by discrete designs. Low-cost, high-volume production of OP27 is achieved by using an on-chip Zener zap-trimming network. This reliable and stable offset trimming scheme has proved its effectiveness over many years of production history.
The OP27 provides excellent performance in low-noise, highaccuracy amplification of low-level signals. Applications include stable integrators, precision summing amplifiers, precision voltagethreshold detectors, comparators, and professional audio circuits such as tape-head and microphone preamplifiers. The OP27 is a direct replacement for 725, OP06, OP07, and OP45 amplifiers; 741 types may be directly replaced by removing the 741s nulling potentiometer.
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 V Input Voltage1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 V Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite Differential Input Voltage2 . . . . . . . . . . . . . . . . . . . . . . 0.7 V Differential Input Current2 . . . . . . . . . . . . . . . . . . . . 25 mA Storage Temperature Range . . . . . . . . . . . . 65C to +150C Operating Temperature Range OP27A, OP27C (J, Z) . . . . . . . . . . . . . . . . 55C to +125C OP27E, OP27F (J, Z) . . . . . . . . . . . . . . . . . 25C to +85C OP27E, OP27F (P) . . . . . . . . . . . . . . . . . . . . . . 0C to 70C OP27G (P, S, J, Z) . . . . . . . . . . . . . . . . . . 40C to +85C Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300C Junction Temperature . . . . . . . . . . . . . . . . . 65C to +150C
Package Type TO 99 (J) 8-Lead Hermetic DlP (Z) 8-Lead Plastic DIP (P) 20-Contact LCC (RC) 8-Lead SO (S)
JC 18 16 43 38 43
NOTES 1 For supply voltages less than 22 V, the absolute maximum input voltage is equal to the supply voltage. 2 The OP27s inputs are protected by back-to-back diodes. Current limiting resistors are not used in order to achieve low noise. If differential input voltage exceeds 0.7 V, the input current should be limited to 25 mA. 3 JA is specified for worst-case mounting conditions, i.e., JA is specified for device in socket for TO, CERDIP, and P-DIP packages; JA is specified for device soldered to printed circuit board for SO package. 4 Absolute Maximum Ratings apply to both DICE and packaged parts, unless otherwise noted.
ORDERING INFORMATION 1
Package TA = 25C VOS Max (mV) 25 25 60 100 100 100 CERDIP 8-Lead OP27AZ2 OP27EZ OP27CZ3 OP27GZ Plastic 8-Lead OP27EP OP27FP3 OP27GP OP27GS4 Operating Temperature Range MIL IND/COM IND/COM MIL XIND XIND
OP27GJ
NOTES 1 Burn-in is available on commercial and industrial temperature range parts in CERDIP, plastic DIP, and TO-can packages. 2 For devices processed in total compliance to MIL-STD-883, add /883 after part number. Consult factory for 883 data sheet. 3 Not for new design; obsolete April 2002. 4 For availability and burn-in information on SO and PLCC packages, contact your local sales office.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the OP27 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. C
80
GAIN dB
70 60 50 40 30 0.01 TEST TIME OF 10sec FURTHER LIMITS LOW FREQUENCY (<0.1Hz) GAIN
10 9 8 7 6
TA = 25C VS = 15V
100 741
I/F CORNER 10 I/F CORNER = LOW NOISE 2.7Hz AUDIO OP AMP OP27 I/F CORNER INSTRUMENTATION AUDIO RANGE RANGE TO DC TO 20kHz
1
1 10 100 FREQUENCY Hz 1k
0.1
1 10 FREQUENCY Hz
100
10 100 FREQUENCY Hz
1k
10 TA = 25C VS = 15V
100
TA = 25C VS = 15V
R1 R2 RS 2R1
5 VS = 15V
4 AT 10Hz
10
3 AT 1kHz
0.1
0.01 100
1k 10k BANDWIDTH Hz
100k
1 100
1k SOURCE RESISTANCE
10k
1 50
25
0 25 50 75 TEMPERATURE C
100
125
TPC 4. Input Wideband Voltage Noise vs. Bandwidth (0.1 Hz to Frequency Indicated)
TA = 25C
10.0
5.0
4 AT 10Hz AT 1kHz 3
SUPPLY CURRENT mA
1.0
10
20
30
40
100 1k FREQUENCY Hz
10k
1.0
45
REV. C
OP27
CHANGE IN INPUT OFFSET VOLTAGE V
60 50 40
OFFSET VOLTAGE V
OP27C
CHANGE IN OFFSET VOLTAGE V
6 4 2 0 2 4 6 6 4 2 0 2 4 6 0 1 2 3 4 5 6 7 TIME Months
TA = 25C VS = 15V
OP27A
10
OP27 C/G
OP27 F
OP27A OP27A
OP27 A/E
70 75 50 25
OP27C
TPC 10. Offset Voltage Drift of Five Representative Units vs. Temperature
30 VS = 15V TA = 70C
INPUT BIAS CURRENT nA
50 VS = 15V
INPUT OFFSET CURRENT nA
50 VS = 15V 40
25
OPEN-LOOP GAIN dB
20
TA = 25C
40
30
30
15
THERMAL SHOCK RESPONSE BAND
20 OP27C 10 OP27A 0
20 OP27C 10 OP27A
10 5 0 20
20
40 TIME Sec
60
80
100
50 25
25
50
75
0 75 50
TEMPERATURE C
25 0 25 50 75 TEMPERATURE C
100
125
130 110
VOLTAGE GAIN dB
25
10
70
20 GAIN 15
TA = 25C VS = 15V
80 100 120
90 70 50 30 10 10
VS = 15V
60
GAIN dB
10 5 0 5
50
GBW
PHASE MARGIN = 70
SLEW
2
75
10
100
50 25
25
50
75
6 100 125
10 1M
TEMPERATURE C
10M FREQUENCY Hz
TPC 17. Slew Rate, Gain-Bandwidth Product, Phase Margin vs. Temperature
REV. C
OP27
2.5 TA = 25C
PEAK-TO-PEAK AMPLITUDE V
28 24 20 16 12 8 4 0 1k
0.5
10
20
30
40
50
10k
100k 1M FREQUENCY Hz
10M
2 100
80
20mV
2V +5V
% OVERSHOOT
60
0V
0V
40
50mV
5V
20
500
1000
1500
2000
2500
CAPACITIVE LOAD pF
60
140
16
VS = 15V TA = 25C VCM = 10V
SHORT-CIRCUIT CURRENT mA
TA = 25C VS = 15V 50
120
12
TA = 55C TA = +25C
COMMON-MODE RANGE V
40
ISC(+)
CMRR dB
100
30
ISC()
80
20
10
60 100
1k
1M
16
SUPPLY VOLTAGE V
10
REV. C
OP27
0.1F 100k
OPEN-LOOP VOLTAGE GAIN V/V
2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6
TA = 25C VS = 15V
1 SEC/DIV 120 VOLTAGE NOISE nV 80 40 0 40 90 120
OP27 10 D.U.T.
VOLTAGE GAIN = 50,000 4.7F
OP12 100k
0.4 100
100k
160
POWER SUPPLY REJECTION RATIO dB
TA = 25C
10
100
OP27 series units may be inserted directly into 725 and OP07 sockets with or without removal of external compensation or nulling components. Additionally, the OP27 may be fitted to unnulled 741-type sockets; however, if conventional 741 nulling circuitry is in use, it should be modified or removed to ensure correct OP27 operation. OP27 offset voltage may be nulled to zero (or another desired setting) using a potentiometer (see Figure 1). The OP27 provides stable operation with load capacitances of up to 2000 pF and 10 V swings; larger capacitances should be decoupled with a 50 W resistor inside the feedback loop. The OP27 is unity-gain stable. Thermoelectric voltages generated by dissimilar metals at the input terminal contacts can degrade the drift performance. Best operation will be obtained when both input contacts are maintained at the same temperature.
10k RP V+
The input offset voltage of the OP27 is trimmed at wafer level. However, if further adjustment of VOS is necessary, a 10 kW trim potentiometer can be used. TCVOS is not degraded (see Offset Nulling Circuit). Other potentiometer values from 1 kW to 1 MW can be used with a slight degradation (0.1 mV/C to 0.2 mV/C) of TCVOS. Trimming to a value other than zero creates a drift of approximately (VOS/300) mV/C. For example, the change in TCVOS will be 0.33 mV/C if VOS is adjusted to 100 mV. The offset voltage adjustment range with a 10 kW potentiometer is 4 mV. If smaller adjustment range is required, the nulling sensitivity can be reduced by using a smaller pot in conjuction with fixed resistors. For example, Figure 2 shows a network that will have a 280 mV adjustment range.
1 4.7k 1k POT 4.7k 8
V+
OP27
+
OUTPUT
REV. C
11
OP27
NOISE MEASUREMENTS
To measure the 80 nV peak-to-peak noise specification of the OP27 in the 0.1 Hz to 10 Hz range, the following precautions must be observed: 1. The device must be warmed up for at least five minutes. As shown in the warm-up drift curve, the offset voltage typically changes 4 mV due to increasing chip temperature after power-up. In the 10-second measurement interval, these temperature-induced effects can exceed tens-ofnanovolts. 2. For similar reasons, the device has to be well-shielded from air currents. Shielding minimizes thermocouple effects. 3. Sudden motion in the vicinity of the device can also feedthrough to increase the observed noise. 4. The test time to measure 0.1 Hz to 10 Hz noise should not exceed 10 seconds. As shown in the noise-tester frequency response curve, the 0.1 Hz corner is defined by only one zero. The test time of 10 seconds acts as an additional zero to eliminate noise contributions from the frequency band below 0.1 Hz. 5. A noise-voltage-density test is recommended when measuring noise on a large number of units. A 10 Hz noise-voltagedensity measurement will correlate well with a 0.1 Hz to 10 Hz peak-to-peak noise reading, since both results are determined by the white noise and the location of the 1/f corner frequency. When R f 100 W and the input is driven with a fast, large signal pulse (>1 V), the output waveform will look as shown in the pulsed operation diagram (Figure 3). During the fast feedthrough-like portion of the output, the input protection diodes effectively short the output to the input and a current, limited only by the output short-circuit protection, will be drawn by the signal generator. With Rf 500 W, the output is capable of handling the current requirements (IL 20 mA at 10 V); the amplifier will stay in its active mode and a smooth transition will occur. When Rf > 2 kW, a pole will be created with Rf and the amplifiers input capacitance (8 pF) that creates additional phase shift and reduces phase margin. A small capacitor (20 pF to 50 pF) in parallel with R f will eliminate this problem.
Rf
bias and offset currents, which would normally increase, are held to reasonable values by the input bias-current cancellation circuit. The OP27A/E has IB and IOS of only 40 nA and 35 nA at 25C respectively. This is particularly important when the input has a high source resistance. In addition, many audio amplifier designers prefer to use direct coupling. The high IB, VOS, and TCVOS of previous designs have made direct coupling difficult, if not impossible, to use. Voltage noise is inversely proportional to the square root of bias current, but current noise is proportional to the square root of bias current. The OP27s noise advantage disappears when high source-resistors are used. Figures 4, 5, and 6 compare OP27s observed total noise with the noise performance of other devices in different circuit applications.
(Voltage Noise)2 + 2 Total Noise = (Current Noise RS ) + 2 (Resistor Noise)
1/2
Figure 4 shows noise versus source-resistance at 1000 Hz. The same plot applies to wideband noise. To use this plot, multiply the vertical scale by the square root of the bandwidth.
100
50
1
TOTAL NOISE nV/ Hz
OP08/108 2 OP07 10
1 RS e.g. RS 2 RS e.g. RS UNMATCHED = R S1 = 10k, R S2 = 0 MATCHED = 10k, R S1 = R S2 = 5k RS1
RS2
1 50
50k
OP27
+
2.8V/s
At RS <1 kW, the OP27s low voltage noise is maintained. With RS <1 kW, total noise increases, but is dominated by the resistor noise rather than current or voltage noise. lt is only beyond RS of 20 kW that current noise starts to dominate. The argument can be made that current noise is not important for applications with low to moderate source resistances. The crossover between the OP27, OP07, and OP08 noise occurs in the 15 kW to 40 kW region. Figure 5 shows the 0.1 Hz to 10 Hz peak-to-peak noise. Here the picture is less favorable; resistor noise is negligible and current noise becomes important because it is inversely proportional to the square root of frequency. The crossover with the OP07 occurs in the 3 kW to 5 kW range depending on whether balanced or unbalanced source resistors are used (at 3 kW the IB and IOS error also can be three times the VOS spec.).
The OP27 is a very low-noise monolithic op amp. The outstanding input voltage noise characteristics of the OP27 are achieved mainly by operating the input stage at a high quiescent current. The input
12
REV. C
OP27
1k OP08/108 500 5534 50 1 2 OP08/108 100
OP07
p-p NOISE nV
1 100 OP27/37 50 2
1 RS e.g. RS 2 RS e.g. RS UNMATCHED = R S1 = 10k, R S2 = 0 MATCHED = 10k, R S1 = R S2 = 5k RS1
10
OP07 5534
5 OP27/37
1 RS e.g. RS 2 RS e.g. RS
RS2
RS2
50k
Figure 5. Peak-to-Peak Noise (0.1 Hz to 10 Hz) as Source Resistance (Includes Resistor Noise)
Therefore, for low-frequency applications, the OP07 is better than the OP27/OP37 when RS > 3 kW. The only exception is when gain error is important. Figure 6 illustrates the 10 Hz noise. As expected, the results are between the previous two figures. For reference, typical source resistances of some signal sources are listed in Table I.
Table I.
The following applications information has been abstracted from a PMI article in the 12/20/80 issue of Electronic Design magazine and updated. Figure 7 is an example of a phono pre-amplifier circuit using the OP27 for A1; R1-R2-C1-C2 form a very accurate RIAA network with standard component values. The popular method to accomplish RIAA phono equalization is to employ frequencydependent feedback around a high-quality gain block. Properly chosen, an RC network can provide the three necessary time constants of 3180, 318, and 75 ms.1 For initial equalization accuracy and stability, precision metal film resistors and film capacitors of polystyrene or polypropylene are recommended since they have low voltage coefficients, dissipation factors, and dielectric absorption.4 (High-K ceramic capacitors should be avoided here, though low-K ceramics such as NPO types, which have excellent dissipation factors and somewhat lower dielectric absorptioncan be considered for small values.)
C4 (2) 220F + + MOVING MAGNET CARTRIDGE INPUT Ra 47.5k Ca 150pF LF ROLLOFF OUT R5 100k
Comments Typically used in lowfrequency applications. Low is very important to reduce self-magnetization problems when direct coupling is used. OP27 IB can be neglected. Similar need for low IB in direct coupled applications. OP27 will not introduce any self-magnetization problem. Used in rugged servo-feedback applications. Bandwidth of interest is 400 Hz to 5 kHz.
<1500 W
A1 OP27
C3 0.47F
IN
R1 97.6k
OUTPUT
Open-Loop Gain
Frequency at 3 Hz 10 Hz 30 Hz
R2 7.87k R3 100
For further information regarding noise calculations, see Minimization of Noise in Op Amp Applications, Application Note AN-15.
REV. C
13
OP27
The OP27 brings a 3.2 nV/Hz voltage noise and 0.45 pA/Hz current noise to this circuit. To minimize noise from other sources, R3 is set to a value of 100 W, which generates a voltage noise of 1.3 nV/Hz. The noise increases the 3.2 nV/Hz of the amplifier by only 0.7 dB. With a 1 kW source, the circuit noise measures 63 dB below a 1 mV reference level, unweighted, in a 20 kHz noise bandwidth. Gain (G) of the circuit at 1 kHz can be calculated by the expression: The network values of the configuration yield a 50 dB gain at 1 kHz, and the dc gain is greater than 70 dB. Thus, the worst-case output offset is just over 500 mV. A single 0.47 mF output capacitor can block this level without affecting the dynamic range. The tapehead can be coupled directly to the amplifier input, since the worst-case bias current of 80 nA with a 400 mH, 100 m inch head (such as the PRB2H7K) will not be troublesome. One potential tapehead problem is presented by amplifier biascurrent transients which can magnetize a head. The OP27 and OP37 are free of bias-current transients upon power-up or powerdown. However, it is always advantageous to control the speed of power supply rise and fall, to eliminate transients. In addition, the dc resistance of the head should be carefully controlled, and preferably below 1 kW. For this configuration, the bias-current-induced offset voltage can be greater than the 100pV maximum offset if the head resistance is not sufficiently controlled. A simple, but effective, fixed-gain transformerless microphone preamp ( Figure 9) amplifies differential signals from low impedance microphones by 50 dB, and has an input impedance of 2 kW. Because of the high working gain of the circuit, an OP37 helps to preserve bandwidth, which will be 110 kHz. As the OP37 is a decompensated device (minimum stable gain of 5), a dummy resistor, Rp, may be necessary, if the microphone is to be unplugged. Otherwise the 100% feedback from the open input may cause the amplifier to oscillate. Common-mode input-noise rejection will depend upon the match of the bridge-resistor ratios. Either close-tolerance (0.1%) types should be used, or R4 should be trimmed for best CMRR. All resistors should be metal film types for best stability and low noise. Noise performance of this circuit is limited more by the input resistors R1 and R2 than by the op amp, as R1 and R2 each generate a 4 nV/Hz noise, while the op amp generates a 3.2 nV/Hz noise. The rms sum of these predominant noise sources will be about 6 nV/Hz, equivalent to 0.9 mV in a 20 kHz noise bandwidth, or nearly 61 dB below a 1 mV input signal. Measurements confirm this predicted performance.
R1 1k R3 316k C1 5F R6 100
R1 G = 0.101 1 + R3
For the values shown, the gain is just under 100 (or 40 dB). Lower gains can be accommodated by increasing R3, but gains higher than 40 dB will show more equalization errors because of the 8 MHz gain-bandwidth of the OP27. This circuit is capable of very low distortion over its entire range, generally below 0.01% at levels up to 7 V rms. At 3 V output levels, it will produce less than 0.03% total harmonic distortion at frequencies up to 20 kHz. Capacitor C3 and resistor R4 form a simple 6 dB-per-octave rumble filter, with a corner at 22 Hz. As an option, the switchselected shunt capacitor C4, a nonpolarized electrolytic, bypasses the low-frequency rolloff. Placing the rumble filters high-pass action after the preamp has the desirable result of discriminating against the RlAA-amplified low-frequency noise components and pickup-produced low-frequency disturbances. A preamplifier for NAB tape playback is similar to an RIAA phono preamp, though more gain is typically demanded, along with equalization requiring a heavy low-frequency boost. The circuit in Figure 7 can be readily modified for tape use, as shown by Figure 8.
+
TAPE HEAD Ra Ca 0.47F
OP27
R1 33k R2 5k 10 0.01F
15k
T1 = 3180s T2 = 50s
While the tape-equalization requirement has a flat high-frequency gain above 3 kHz (T2 = 50 ms), the amplifier need not be stabilized for unity gain. The decompensated OP37 provides a greater bandwidth and slew rate. For many applications, the idealized time constants shown may require trimming of R1 and R2 to optimize frequency response for nonideal tapehead performance and other factors.5
R7 10k
OUTPUT
14
REV. C
OP27
For applications demanding appreciably lower noise, a high quality microphone transformer-coupled preamp (Figure 10) incorporates the internally compensated OP27. T1 is a JE-115K-E 150 W/15 kW transformer which provides an optimum source resistance for the OP27 device. The circuit has an overall gain of 40 dB, the product of the transformers voltage setup and the op amps voltage gain.
C2 1800pF R1 121 R2 1100
Capacitor C2 and resistor R2 form a 2 ms time constant in this circuit, as recommended for optimum transient response by the transformer manufacturer. With C2 in use, A1 must have unitygain stability. For situations where the 2 ms time constant is not necessary, C2 can be deleted, allowing the faster OP37 to be employed. Some comment on noise is appropriate to understand the capability of this circuit. A 150 W resistor and R1 and R2 gain resistors connected to a noiseless amplifier will generate 220 nV of noise in a 20 kHz bandwidth, or 73 dB below a 1 mV reference level. Any practical amplifier can only approach this noise level; it can never exceed it. With the OP27 and T1 specified, the additional noise degradation will be close to 3.6 dB (or 69.5 referenced to 1 mV).
References
A1 OP27
OUTPUT
1. Lipshitz, S.R, On RIAA Equalization Networks, JAES, Vol. 27, June 1979, p. 458481. 2. Jung, W.G., IC Op Amp Cookbook, 2nd. Ed., H.W. Sams and Company, 1980. 3. Jung, W.G., Audio IC Op Amp Applications, 2nd. Ed., H.W. Sams and Company, 1978. 4. Jung, W.G., and Marsh, R.M., Picking Capacitors, Audio, February and March, 1980. 5. Otala, M., Feedback-Generated Phase Nonlinearity in Audio Amplifiers, London AES Convention, March 1980, preprint 1976. 6. Stout, D.F., and Kautman, M., Handbook of Operational Amplifier Circuit Design, New York, McGraw-Hill, 1976.
Gain may be trimmed to other levels, if desired, by adjusting R2 or R1. Because of the low offset voltage of the OP27, the output offset of this circuit will be very low, 1.7 mV or less, for a 40 dB gain. The typical output blocking capacitor can be eliminated in such cases, but is desirable for higher gains to eliminate switching transients.
+18V
OP27
18V
REV. C
15