AnalogXilinx Eng

Analog Design Guide for Xilinx FPGAs
Power Expert ........................... 2 National Semiconductor offers a broad portfolio of the engineer towards a typical solution for their Xilinx
power management and analog solutions for Xilinx design. Engineers can also find detailed explanation
Power Management
Solution for FPGAs ............. 3-19 Field Programmable Gate Arrays (FPGAs). This design on how to choose high-speed interface, JTAG, data
guide features individual National Semiconductor’s conversion and operational amplifiers for their FPGA
High-Speed Interface power devices, listed by part number, for different designs. More information can be found at:
Solution for FPGAs ........... 20-21
Xilinx families. The parametric tables will help guide http://xilinx.national.com
JTAG for FPGAs ................ 22-23
High-speed ADCs for

FPGAs ................................ 24-25
Pairing Amplifiers with

ADCs for FPGAs ................ 26-27
Online Tools ........................... 28

Power Expert
Description • Additionally, provides detailed and comprehensive power

Power Expert for Xilinx FPGAs is the latest addition to the line of requirements data/guidelines for each Xilinx device covered
design tools for assisting digital designers with their analog needs. (including voltages required, typical power consumption range for
This tool allows the user to select from a family of Xilinx FPGAs, most applications, sequencing requirements and power-on timing).
select the device and then select the correct National Semiconductor • It's free.
power solution for the system. The tool also ties directly to the • It runs locally (it's downloadable) so it's always available to use
National Semiconductor WEBENCH® environment which provides a (optional WEBENCH® simulation requires internet connection).
complete design and simulation methodology for the designer. Power • Based on it's technical depth and also ease of use, the tool is an
Expert also provides additional links to solutions for interface, analog excellent resource for both end customers designing with FPGAs as
signal conversion and other analog system needs. well as National and distribution engineers looking for solutions to
pair with Xilinx FPGAs.
Power Expert key features include
• Automated power solutions finder for Xilinx FPGAs and CPLDs.
• Includes solutions for all newest Xilinx devices, including all
Spartan-3's and Virtex-4's FPGAs as well as CoolRunner-II CPLDs.
• Creates customized solutions for specific customer application
requirements, such as VIN, ICCINT, etc, pairing individual power
management ICs specifically selected for the given operating
conditions to the exact FPGA or CPLD chosen.
• Provides these custom solutions for each of the needed voltage
rails (VCCINT, VCCO and VCCAUX) complete with BOMs*, Schematics*
and Simulation* (*depending on WEBENCH® availability for the
recommended ICs).
• Allows customers to choose solutions based on different
implementation priorities; highest efficiency or simplest
implementation.
• Supports the three most common system input voltages: 3.3V, 5V
and 12V.
• Solutions utilize National's latest Power Management ICs, from
linear regulators (LDOs) to various switching regulators topologies
(buck, synchronous buck, buck controllers, etc) offering a whole
optimized portfolio from less than 100mA to 5A and beyond.
• Saves significant time and removes the guess work for non-
experienced customers by screening solutions so that only
those that comply with the FPGA electrical and system thermal
requirements are recommended.
To download this tool and view more information, visit:

http://www.national.com/xilinx/power_expert.html

Power Management Solutions for FPGAs
For the most up-to-date information, see National’s Website: xilinx.national.com

Function: Step-down (VOUT < VIN) Buck Function: Step-down (VOUT < VIN) Buck Regulator
When to use: Typically when VIN When to use: Typically when I OUT
is 3x to 5x VOUT and I OUT is >0.5A <1A, ultra low-dropout, and low-
and <5A noise applications
Characteristics: Easy to design Characteristics: Excellent option
and good efficiency for the above- where fixed output, low current,
mentioned typical VIN/VOUT/I OUT and low voltage drops are required.
conditions Easy to implement
Devices to use: All buck integrated Devices to use: Any low-dropout,
regulators and controllers linear regulator
Comments: Great for micropower applications
Function: Step-down (VOUT < VIN)

Buck Buck Function: Buck-boost Single Inductor Step-up & Step-down
When to use: When high efficiency When to use: When
is required with high-output current automatic step-up and
(>5A) or low duty cycles (VIN >5 x step-down functionality
VOUT and/or I OUT <0.5A) is needed (For example,
Characteristics: A second switch VIN = 3.0V to 4.0V and
replaces the diode in the basic VOUT =3.3V) and no
buck topology, reducing losses in transformer or second
the conditions mentioned above inductor is desired
Devices to use: Any “synchronous (as with flyback or
rectification” buck integrated regulator or controller SEPIC topologies).
This topology can be
implemented on most existing buck regulator designs as offered in this Design Guide.
Characteristics: A second FET and output diode are added, effectively overlapping a boost
topology on top of a basic buck topology. If desired, synchronous rectification can be
implemented to increased efficiency (diodes may be replaced by FETs).
Devices to use: Any integrated buck regulator or controller, including SIMPLE SWITCHER
buck regulators.
Comments: If VIN is too high for the selected FET specifications, use voltage limiting circuitry.
Selected Synchronous Rectifier Buck Controllers

Product Number/ LM2727 LM2737 LM2742 LM2743 LM2744 LM2745 LM2746 LM2747 LM2748
Parameter
Arch PWM Voltage PWM Voltage PWM Voltage PWM Voltage PWM Voltage PWM Voltage PWM Voltage PWM Voltage PWM Voltage
Mode Mode Mode Mode Mode Mode Mode Mode Mode
VCON Range 4.5 - 5.5V @2 mA 4.5 - 5.5V @2 mA 4.5 - 5.5V @2 mA 3 - 6V 3 - 6V 3 - 6V 3 - 5.5V 3 - 6V 3 - 6V
VBOOT Max 2.2 - 16V 2.2 - 16V 1 - 16V 1-17V 1 - 16V 1 - 17V
Voltage or Min Voltage 0.6V 0.6V 0.6V 0.6V 0.5V 0.6V 0.6V 0.6V 0.6V
Driving Capabilty 3/2Ω 3/2Ω 3/2Ω 3/2Ω 3/2Ω 3/2Ω 3/2Ω 2.7/0.8Ω 3/2Ω
Source/Sink
Dual or Single Single Single Single Single Single Single Single Single Single
Operating Frequency 50 kHz - 2 MHz 50 kHz - 2 MHz 50 kHz - 2 MHz 50 kHz - 1 MHz 50 kHz - 1 MHz 50 kHz - 1 MHz 50 kHz - 1 MHz 50 kHz - 1 MHz 50 kHz - 1 MHz
Current Sensing w/o Rsense w/o Rsense R, Lowside R, Lowside R, Lowside R, Lowside R, Lowside R, Lowside R, Lowside
Current Limit 20A 20A 20A 25A 25A
Prebias Operation N N N N N Y N Y Y
Tracking N N N Y Y Y Y Y Y
Synchronization N N N N SEQ Optional Clock SEQ SEQ N
OVP Y Y Y Y Y Y Y Y Y
Soft-start Y Y Y Y Y Y Y Y Y
Power Good Y Y Y Y Y Y Y Y Y
Package TSSOP-14 TSSOP-14 TSSOP-14 TSSOP-14 TSSOP-14 TSSOP-14 TSSOP-14 TSSOP-14 TSSOP-14
Reference Accuraccy 1.5% 1.5% 1.50% 2% Ext Ref 1.50% 1% 1% 1.50%

(0 to 125˚C) (0 to 125˚C)
Temp Range -40 to 125˚C -40 to 125˚C -40 to 125˚C -40 to 125˚C -40 to 125˚C -40 to 125˚C -40 to 125˚C -40 to 125˚C -40 to 125˚C
Shutdown Y Y Y Y Y Y Y Y Y
Other Undervoltage Under Voltage Flag 4.2V UVLO, 2.7V UVLO, 40 ns Min Ext Clock Startup Delay, Ext Clock
Latch-off Tri-state, 40 ns Min Tri-state, Prec On-time 250 kHz - 40 ns Min 250 kHz - 1 MHz,
On-time SD, 40 ns Min 1 MHz, 40 ns Min On-time Programmable SS,
On-time On-time 40 ns Min on-time

Transient Response
The core voltage of the FPGA can produce extremely high slew rates on the
operating current. This requires the controller to deliver large step-load current
while minimizing perturbation on the output voltage. The ability of the controller
to respond to these loads is also known as transient response. The transient
response requirement dictates the operating bandwidth in conjunction with the
output capacitance and its ESR.
Sequencing and Tracking

During start up, it may be necessary for one supply to ramp up before the other. If
sequencing is ignored, the supply can “latch up” and the FPGA may be damaged
or may malfunction. Some FPGAs have sequencing and/or tracking requirement
between I/O and core voltages. (Refer to charts on the right for different types
of sequencing and tracking options.) Sequencing and tracking can be simply or
flexibly implemented if the regulators have integrated power good, enable, soft-
start and tracking functions. If not, external circuitry will need to be included to
ensure correct sequencing.
Start-up Requirements
If the FPGA voltage requires a specific ramp rate, this can be implemented
using a soft-start capacitor. Also, the rising voltage at start-up usually needs to
be monotonic (not droop). If the supply output capacitances are small, this can
cause the voltage at start-up to droop. Adequately sized capacitors store enough
charge to supply the start-up load transient of the FPGA.
Synchronization
Synchronization enables two or more regulators to be locked together to one
frequency. This eliminates the beat frequency that will otherwise be present if
synchronization is not applied.
Summary of Considerations
The best power supply configuration varies with the system requirements, as
well as the complexity and capacity utilization of the FPGA or ASIC. Apart from
the input voltage, output voltage, and output current, special requirements such
as sequencing, tracking, and start-up conditions should be considered. Finally,
power dissipation, footprint, and cost will influence the design.

National Power Solutions for Xilinx Virtex Virtex devices are designed and characterized to support various
I/O standards for VCCO values of 1.5, 2.5 and 3.3V. Internal core
The 2.5V Virtex family of FPGAs provide better performance designs with
logic circuits such as the Configurable Logic Blocks (CLBs) and
synchronous system clock rates up to 200 MHz including I/O. Both inputs
programmable interconnect operate from the VCCINT voltage
and outputs comply fully with PCI specifications, and interfaces can be
supply pins. VCCINT must be +2.5V. Also, there must be sufficient
implemented that operate at 33 MHz or 66 MHz. Additionally, the Virtex
supply decoupling on all supply lines to guarantee problem-free
family supports the hot-swapping requirements of Compact PCI.
operation.
Virtex Selection Table

National Semiconductor Device(s)**
VIRTEX
VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCINT
LP3852-2.5 (<1.5A) LP3871-2.5 (<700 mA) LM2652 (<3A) LM2694 (<600 mA) LM2696 (<3A)
LP3853-2.5 (<3A) LM2745/48 (>2A) Sync C LM1770/1771 (<4A) LM25010 (<1A) LM3485 (>3A)
VCCINT=2.5V 0.2A < ICCINT < 5A LM1770/1771 (<4A) LM2830 (<1A) LM2852 (2A) Sync R LM2695 (<1.25A) LM3075
LM2831 (<1.5A) LM3100 (<1.5A) 1/2 LM2647
LM2832 (<2A) LM25005 (<2.5A)
VCCO
XCV50
XCV100 LP3982-Adj (<300 mA) LP3874-Adj (<500 mA) LM2652 (<3A) LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
XCV150 VCCO=1.5V LP3875-Adj (<1.3A) LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
XCV200 LM1770/1771 (<4A) LM2832 (<2A) LM2695 (<1.25A)
XCV300
LP3852-2.5 (<1.5A) LP3871-2.5 (<700 mA) LM2652 (<3A) LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
LP3853-2.5 (<3A) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=2.5V 0.05A < ICCINT < 3A
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
LP3871-3.3 (<800 mA) LM2652 (<3A) LM2671-3.32 (<500 mA) LM3100 (<1.5A)
LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=3.3V –
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
VCCINT
LP3852-2.5 (<1.5A) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM2696 (<3A)
LP3853-2.5 (<3A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
VCCINT=2.5V 0.2A < ICCINT < 7A LM2743 (2A to >7A) SC LM2832 (<2A) LM2695 (<1.25A) LM3075
LM2652 (<3A) LM3100 (<1.5A) 1/2 LM2647
LM1770/1771 (<4A) LM25005 (<2.5A)
VCCO
LP3982-Adj (<300 mA) LP3874-Adj (<500 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
XCV400 LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
XCV600 VCCO=1.5V LP3875-Adj (<1.3A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM2695 (<1.25A) LM3075
LM1770/1771 (<4A) LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
XCV800 LM27431 (2A to >5A) Sync SC LM2652 (<3A) LM25005 (<2.5A)
XCV1000
LP3852-2.5 (<1.5A) LP3871-2.5 (<700 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LP3853-2.5 (<3A) LM2830 (<1A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
VCCO=2.5V 0.05A < ICCINT < 5A LM1770/1771 (<4A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM2695 (<1.25A) LM3075
LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
LP3871-3.3 (<800 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LM2830 (<1A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
VCCO=3.3V – LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM2695 (<1.25A) LM3075
LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
SC - Switching Controller *Disclaimer: An accurate computation of power consumption is only possible when a detailed knowledge of the design is known.
Sync SC - Synchronous Switching Controller 1 Synchronous switching regulator solution. Least heat dissipation. Maximum conversion efficiency.
Sync C - Synchronous Controller 2 Buck switching regulator. Very good efficiency. Low heat dissiptaion.
Sync R - Synchronous Regulator 3 You can always use the other half of a dual controller to power V
cco instead of the stand alone voltage regulator suggested.
**Suggested solutions are integrated regulators unless otherwise noted.

National Power Solutions for Virtex-E Virtex-E devices are designed and characterized to support various
I/O standards for VCCO values of 1.5, 1.8, 2.5 and 3.3V. Internal core
The 1.8V Virtex-E family of FPGAs provide better performance designs
with synchronous system clock rates up to 240 MHz including I/O or 622
programmable interconnect operate from the VCCINT voltage supply
Mb/s using Source Synchronous data transmission architectures. Virtex-
pins. VCCINT must be +1.8V. Also, there must be sufficient supply
E I/Os comply fully with the 3.3V PCI specifications, and interfaces can
decoupling on all supply lines to guarantee problem-free operation
be implemented that operate at 33 or 66 MHz. Additionally, the Virtex-E
family supports the hot-swapping requirements of Compact PCI.
Virtex-E Selection Table

VIRTEX-E
VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCINT
LP3872-1.8 (<1.5A) LP3871-1.8 (<600 mA) LM2652 (<3A) LM2694 (<600 mA) LM2696 (<3A)
LM1770/1771 (<4A) LM2830 (<1A) LM1770/1771 (<4A) LM25010 (<1A) LM3485 (>3A)
VCCINT=1.8V 0.2A < ICCINT < 5A
LM27431 (2A to >5A) Sync SC LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM2695 (<1.25A) LM3075
LM2832 (<2A) LM2852 (2A) Sync R LM25005 (<2.5A) 1/2 LM2647
VCCO
LP3982-Adj (<300 mA) LP3874-Adj (<500 mA) LM2652 (<3A) LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
VCCO=1.5V
XCV50E LP3875-Adj (<1.3A) LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM1770/1771 (<4A) LM2832 (<2A) LM2695 (<1.25A)
XCV100E
XCV200E LP3872-1.8 (<1.5A) LP3871-1.8 (<600 mA) LM2652 (<3A) LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
LM1770/1771 (<4A) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
XCV300E VCCO=1.8V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
0.05A < ICCINT < 3A
VCCO=2.5V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
LP3871-3.3 (<800 mA) LM2652 (<3A) LM2671-3.32 (<500 mA) LM3100 (<1.5A)
VCCO=3.3V –
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
VCCINT
LP3872-1.8 (<1.5A) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM2696 (<3A)
LM1770/1771 (<4A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
VCCINT=1.8V 0.2A < ICCINT < 7A LM27431 (2A to >7A) Sync SC LM2832 (<2A) LM2695 (<1.25A) LM3075
LM2652 (<3A) LM3100 (<1.5A) 1/2 LM2647
LM1770/1771 (<4A) LM25005 (<2.5A)
VCCO
LP3874-Adj (<800 mA) LM2830 (<1A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
XCV400E VCCO=1.5V LP3875-Adj (<1.3A) LM2831 (<1.5A) LM2852 (2A) Sync R LM2695 (<1.25A) LM3075
XCV600E LM1770/1771 (<4A) LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
XCV1000E
XCV1600E LP3872-1.8 (<1.5A) LP3871-1.8 (<600 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LM1770/1771 (<4A) LM2830 (<1A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
XCV2000E
VCCO=1.8V LM27431 (2A to >5A) Synch SC LM2831 (<1.5A) LM2852 (2A) Sync R LM2695 (<1.25A) LM3075
XCV2600E LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
XCV3200E LM2652 (<3A) LM25005 (<2.5A)
0.05A < ICCINT < 5A
LP3853-2.5 (<3A) LM2830 (<1A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
VCCO=2.5V LM1770/1771 (<4A) LM2831 (<1.5A) LM2852 (2A) Sync R LM2695 (<1.25A) LM3075
LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
LP3871-3.3 (<800 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LM2830 (<1A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
VCCO=3.3V – LM2831 (<1.5A) LM2852 (2A) Sync R LM2695 (<1.25A) LM3075
LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)

National Power Solutions for Virtex-II Virtex-II devices are designed and characterized to support various
The 1.5V Virtex-II family of FPGAs incorporates high logic capacity,
up to 10 million system gates, a new Active Interconnect architecture
optimized for predictable routing delays, an advanced memory array
pins. VCCINT must be +1.5V. The VCCAUX pins supply power to various
architecture with up to 4.5 Mbits of on-chip memory, and built-in
auxiliary circuits, such as the Digital Clock Managers (DCMs), JTAG
support for high-speed I/O standards.
pins, and to the dedicated configuration pins. VCCAUX must be +3.3V.
Also, there must be sufficient supply decoupling on all supply lines to
guarantee problem-free operation.
Virtex-II Selection Table

VIRTEX-II
VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCINT
LP3874-Adj (<800 mA) LM2852 (2A) Sync R LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LP3875-Adj (<1.3A) LM2830 (<1A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
VCCINT=1.5V 0.2A < ICCINT < 8A LM1770/1771 (<4A) LM2831 (<1.5A) LM3100 (<1.5A) LM3075
LM27431 (2A to >8A) SC LM2832 (<2A) LM2695 (<1.25A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
VCCAUX
LP3981-3.3 LM3671 (<600 mA) LM2671-3.3 (<500 mA)
VCCAUX=3.3V ICCINT = 0.3A –
LM3670 (<350 mA) 1/2 LM3370
VCCO
XC2V40 LP3982-Adj (<300 mA) LP3874-Adj (<500 mA) LM2652 (<3A) LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
XC2V80 LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=1.5V LP3875-Adj (<1.3A) LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
XC2V250
LM1770/1771 (<4A) LM2832 (<2A) LM2695 (<1.25A)
XC2V500
VCCO=1.8V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
0.05A < ICCINT < 2A
VCCO=2.5V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A)) LM2695 (<1.25A)
LP3871-3.3 (<800 mA) LM2652 (<3A) LM2671-3.32 (<500 mA) LM3100 (<1.5A)
VCCO=3.3V –
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
VCCINT
LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM2696 (<3A)
LP3875-Adj (<1.3A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
XC2V1000 VCCINT=1.5V 0.2A < ICCINT < 10A LM1770/1771 (<4A) LM2832 (<2A) LM2695 (<1.25A) LM3075
XC2V1500 LM27431 (2A to >10A) SC LM2652 (<3A) LM3100 (<1.5A) 1/2 LM2647
XC2V2000 LM1770/1771 (<4A) LM25005 (<2.5A)
XC2V3000
VCCAUX
LP3981-3.3 LM3671 (<600 mA) LM2671-3.3 (<500 mA)
VCCAUX=3.3V ICCINT = 0.3A –
LM3670 (<350 mA) 1/2 LM3370

Virtex-II Selection Table (Cont’d)
VIRTEX-II
VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCO
LM1770/1771 (<4A) LM2832 (<2A) LM3100 (<1.5A)
XC2V1000 LM1770/1771 (<4A) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=1.8V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
XC2V1500
LM2832 (<2A) LM3100 (<1.5A)
XC2V2000 0.05A < ICCINT < 3A
XC2V3000 LP3852-2.5 (<1.5A) LP3871-2.5 (<700 mA) LM2652 (<3A) LM2671-Adj2 (<500 mA) LM2695 (<1.25A)
VCCO=2.5V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
LP3871-3.3 (<800 mA) LM2652 (<3A) LM2671-3.32 (<500 mA) LM2695 (<1.25A)
VCCO=3.3V –
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
VCCINT
LP3874-Adj (<800 mA) LM2830 (<1A) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LP3875-Adj (<1.3A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3075
LM27431 (2A to >12A) Sync SC LM2832 (<2A) LM2852 (2A) Sync R LM2695 (<1.25A) 1/2 LM2647
LM1770/1771 (<4A) LM2652 (<3A) LM25005 (<2.5A)
VCCAUXX
LP3981-3.3 LM3671 (<600 mA) LM2671-3.3 (<500 mA)
VCCAUXX=3.3V ICCINT = 0.3A –
LM3670 (<350 mA) 1/2 LM3370
VCCO
LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
VCCO=1.5V LP3875-Adj (<1.3A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM3100 (<1.5A) LM3075
XC2V4000 LM27431 (2A to >5A) Sync SC LM2832 (<2A) LM2695 (<1.25A) 1/2 LM2647
LM1770/1771 (<4A) LM2652 (<3A) LM25005 (<2.5A)
XC2V6000
XC2V8000 LP3872-1.8 (<1.5A) LP3871-1.8 (<600 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LM27431 (2A to >5A) Sync SC LM2830 (<1A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
LM2832 (<2A) LM2695 (<1.25A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
0.05A < ICCINT < 5A
LP3853-2.5 (<3A) LM2830 (<1A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
LM2832 (<2A) LM2695 (<1.25A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
LP3871-3.3 (<800 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)

National Power Solutions for Xilinx Virtex-II Pro devices are designed and characterized to support
Virtex-II Pro various I/O standards for VCCO values of 1.5, 1.8, 2.5 and 3.3V. Internal
core logic circuits such as the Configurable Logic Blocks (CLBs) and
The 1.5V Virtex-II Pro family of FPGAs incorporates embedded PPC405 programmable interconnect operate from the VCCINT voltage supply
cores and RocketIO Multi-Gigabit Transceivers. The embedded high- pins. VCCINT must be +1.5V. The VCCAUX pins supply power to various
speed serial transceivers enable data bit rates up to 3.125 Gb/s per auxiliary circuits, such as the Digital Clock Managers (DCMs), JTAG
channel. And the IBM PowerPC 405 RISC processor blocks provide pins, and to the dedicated configuration pins. VCCAUX must be +2.5V.
performance of 300+ MHz. Also, there must be sufficient supply decoupling on all supply lines to
Virtex-II Pro Selection Table

VIRTEX-II National Semiconductor Device(s)**
Pro VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCINT
LP3874-Adj (<800 mA) LM2830 (<1A) LM2745/48 (>2A) Sync C LM2694 (<600 mA) LM2696 (<3A)
LP3875-Adj (<1.3A) LM2831 (<1.5A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
VCCINT=1.5V 0.2A < ICCINT < 8A LM1770/1771 (<4A) LM2832 (<2A) LM3100 (<1.5A) LM3075
LM274311 (2A to >8A) SC LM2652 (<3A) LM2695 (<1.25A) 1/2 LM2647
LM1770/1771 (<4A) LM25005 (<2.5A)
VCCAUX
LP3981-2.5 LP2989-2.5 LM2671-Adj (<500 mA)
LM3670 (<350 mA) LM3670 (<350 mA)
VCCAUX=2.5V ICCINT = 0.3A
LM3671 (<600 mA) LM3671 (<600 mA)
1/2 LM3370 1/2 LM3370
VCCO
XC2VP2 LP3982-Adj (<300 mA) LM3874-Adj (<500 mA) LM2652 (<3A) LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
XC2VP4 LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=1.5V
XC2VP7 LP3875-Adj (<1.3A) LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM1770/1771 (<4A) LM2832 (<2A) LM2695 (<1.25A)
VCCO=1.8V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
0.05A < ICCINT < 2A
VCCO=2.5V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
LP3871-3.3 (<800 mA) LM2652 (<3A) LM2671-3.32 (<500 mA) LM3100 (<1.5A)
VCCO=3.3V –
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
VCCINT
XC2VP20 LP3874-Adj (<800 mA) LM2830 (<1A) LM2745/48 (>2A) Sync C LM2694 (<600 mA) LM2696 (<3A)
XC2VP30 LP3875-Adj (<1.3A) LM2831 (<1.5A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
XC2VP40 VCCINT=1.5V 0.2A < ICCINT < 10A LM1770/1771 (<4A) LM2832 (<2A) LM3100 (<1.5A) LM3075
XC2VP50 LM27431 (2A to >10A) Sync SC LM2652 (<3A) LM2695 (<1.25A) 1/2 LM2647
LM1770/1771 (<4A) LM25005 (<2.5A)
10
Virtex-II Pro Selection Table (Cont’d)
VIRTEX-II National Semiconductor Device(s)**
Pro VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCAUX
LP3981-2.5 LP2989-2.5 LM2671-Adj (<500 mA)
LM3670 (<350 mA) LM3670 (<350 mA)
LM3671 (<600 mA) LM3671 (<600 mA)
1/2 LM3700 1/2 LM3700
VCCO
XC2VP20 LM1770/1771 (<4A) LM2832 (<2A) LM3100 (<1.5A)
XC2VP30
XC2VP40
XC2VP50 VCCO=1.8V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
0.05A < ICCINT < 3A
VCCO=2.5V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
LP3871-3.3 (<800 mA) LM2652 (<3A) LM2671-3.32 (<500 mA) LM2695 (<1.25A)
VCCO=3.3V –
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
VCCINT
LP3875-Adj (<1.3A) LM2830 (<1A) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LM1770/1771 (<4A) LM2831 (<1.5A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
LM27431 (2A to >12A) Sync SC LM2832 (<2A) LM2745/48 (>2A) Sync C LM2695 (<1.25A) LM3075
LM2652 (<3A) LM25005 (<2.5A) 1/2 LM2647
VCCAUX
LP3981-2.5 LP2989-2.5 LM2671-Adj (<500 mA)
LM3670 (<350 mA) LM3670 (<350 mA)
LM3671 (<600 mA) LM3671 (<600 mA)
1/2 LM3700 1/2 LM3700
VCCO
LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
VCCO=1.5V LP3875-Adj (<1.3A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM2695 (<1.25A) LM3075
XC2VP70 LM1770/1771 (<4A) LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
XC2VP100 LM27431 (2A to >5A) Sync SC LM2652 (<3A) LM25005 (<2.5A)
LM1770/1771 (<4A) LM2830 (<1A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
VCCO=1.8V LM27431 (2A to >5A) Sync SC LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM2695 (<1.25A) LM3075
LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
0.05A < ICCINT < 5A
LP3853-2.5 (<3A) LM2830 (<1A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
VCCO=2.5V LM1770/1771 (<4A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM2695 (<1.25A) LM3075
LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
LP3871-3.3 (<800 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A) 1/2 LM2647
LM2652 (<3A) LM25005 (<2.5A)
Sync SC - Synchronous Switching Controller 1 Synchronous switching regulator solution. Least heat dissipation. Maximum conversion efficiency. 11
National Power Solution for Xilinx Virtex-4 slices, high-speed clock management circuitry, and source-synchronous
interface blocks. The basic Virtex-4 building blocks are an enhancement
The Virtex-4 Family is the newest generation FPGA from Xilinx. The of those found in the popular Virtex-based product families: Virtex,
innovative Advanced Silicon Modular Block or ASMBLTM column-based Virtex-E, Virtex-II, Virtex-II Pro and Virtex-II Pro X, allowing upward
architecture is unique in the programmable logic industry. Virtex-4 FPGAs compatibility of existing designs. Virtex-4 devices are produced on a
contain three families (platforms): FX, SX, and LX. Choice and feature state-of-the-art 90-nm copper process, using 300 mm (12 inch) wafer
combinations are offered for all complex applications. A wide array of technology. Combining a wide variety of flexible features, the Virtex-
hard-IP core blocks complete the system solution. These cores include 4 family enhances programmable logic design capabilities and is a
the PowerPCTM processors (with a new APU interface), Tri-Mode Ethernet powerful alternative to ASIC technology.
MACs, 622 Mb/s to 11.1 Gb/s serial transceivers, dedicated DSP
Virtex-4FX, SX, LX Selection Table

VIRTEX 4
VIN = 3.3V 4.5V < VIN < 5.5V 8V < VIN < 14V
VCCINT
LP3875-Adj (<1A) LM27341 (<1A) SC LM2743 (>3A) LM2694 (<600 mA) LM2696 (<3A)
LM2830 (<1A) SC LM2830 (<1A) LM3475 (>3A) LM27341 (<1A) SC LM3485 (>3A)
VCCINT=1.2V 0.2A < ICCINT < 3A LM34751 (<1A) SC LM2831 (<1.5A) LM25010 (<1A) 1/2 LM26473 (>3A)
LM3671MF-1.2 (600 mA) LM2832 (<2A) LM2695 (<1.25A) LM2743 (>3A)
1/2 LM3700 LM3671MF-1.2 (600 mA) LM25005 (<2.5A)
VCCAUX
LP3981-2.5 LP3981-2.5 LM27361
VCCAUX=2.5V ICCINT = 0.3A LM3670-2.51 LM3670-2.51
VCCO
LM3671MF-1.2 (600 mA) LP3881-1.2 (<500 mA) LM3671MF-1.2 (600 mA) LM2694 (<600 mA) LM2696 (<3A)
LP3874-Adj (<800 mA) LM2830 (<1A) LM2745/48 (>2A) SC LM25010 (<1A) LM2745 (>2A) SC
VCCO=1.2V LM27431 (>2A) Sync SC LM2831 (<1.5A) 1/2 LM3700 LM2695 (<1.25A) 1/2 LM26471 (>2A) SC
XC4VLX15
1/2 LM3700 LM2832 (<2A) LM25005 (<2.5A)
XC4VLX25
LM3671-1.5 (<500 mA) SC LM3671-1.5 (<500 mA) SC LM2852 (<2A) Sync R LM2736 (<500 mA) SC LM2696 (<3A)
LP3874-Adj (<800 mA) LP3874-Adj (<800 mA) 1/2 LM3700 LM2694 (<600 mA)
XC4VSX25 LP3875-Adj (<1A) LM2734 (<1A) SC LM2734 (<1A) SC
VCCO=1.5V LM2830 (<1A) SC LM2830 (<1A) LM25010 (<1A)
XC4VSX35
LM2852 (<2A) Sync R LM2831 (<1.5A) LM2695 (<1.25A)
1/2 LM3700 LM2832 (<2A) LM3100 (<1.5A)
XC4VFX12
LM3671-1.8 (<500 mA) SC LM3671-1.8 (<500 mA) SC LM2852 (<2A) Sync R LM2736 (<500 mA) SC
XC4VFX20 LP3874-1.8 (<800 mA) LP3874-1.8 (<800 mA) 1/2 LM3700 LM2694 (<600 mA)
LP3875-1.8 (<1A) LM2734 (<1A) SC LM2734 (<1A) SC
VCCO=1.8V 0.05A < ICCINT < 2A LM2830 (<1A) SC LM2830 (<1A) LM25010 (<1A)
LM2852 (<2A) Sync R LM2831 (<1.5A) LM2695 (<1.25A)
1/2 LM3700 LM2832 (<2A) LM2696 (<3A)
LM3671-2.5 (<600 mA) SC LP3871-Adj (<500 mA) SC LM2852 (<2A) Sync R LM2736 (<500 mA) SC
LP3874-2.5 (<800 mA) LP3874-2.5 (<800 mA) LM2832 (<2A) LM2694 (<600 mA)
LP3875-2.5 (<1A) LP3875-2.5 (<1A) LM3671MF-2.5 (600 mA) LM2734 (<1A) SC
VCCO=2.5V LM2830 (<1A) SC LM2734 (<1A) SC LM25010 (<1A)
LM2852 (<2A) Sync R LM2830 (<1A) LM2695 (<1.25A)
1/2 LM3700 LM2831 (<1.5A) LM2696 (<3A)
LM3671-3.3 (<600 mA) SC LM2831 (<1.5A) LM2736 (<500 mA) SC LM2696 (<3A)
LP3874-3.3 (<800 mA) LM2832 (<2A) LM2694 (<600 mA)
VCCO=3.3V – LP3875-3.3 (<1A) LM2852 (<2A) Sync R LM2734 (<1A) SC
LM2734 (<1A) SC 1/2 LM3700 LM25010 (<1A)
LM2830 (<1A) LM2695 (<1.25A)
XC4VLX40 VCCINT
XC4VLX60 LP3875-Adj LM27341 (<1A) SC LM3475 (>3A) LM2694 (<600 mA) LM2696 (<3A)
XC4VLX80 LM2830 (<1A) SC LM2830 (<1A) LM2743 (>3A) LM27341 (<1A) SC LM2743 (>3A)
VCCINT=1.2V 0.2A < ICCINT < 4A LM34751 (<1A) SC LM2831 (<1.5A) LM25010 (<1A) 1/2 LM26473 (>3A)
LM3671MF-1.2 (600 mA) LM2832 (<2A) LM2695 (<1.25A) LM3485 (>3A)
XC4VSX55 LM3671MF-1.2 (600 mA) LM25005 (<2.5A)
VCCAUX
XC4VFX40
LP3981-2.5 LP3981-2.5 LM27361
XC4VFX60 VCCAUX=2.5V ICCINT = 0.3A LM3670-2.51 LM3670-2.51
12
Virtex-4FX, SX, LX Selection Table (Cont’d)
VIRTEX 4
VIN = 3.3V 4.5V < VIN < 5.5V 8V < VIN < 14V
VCCO
LP3874-Adj (<800 mA) LP3881-1.2 (<500 mA) LM2832 (<2A) LM2745 (>2A) SC
LM3671MF-1.2 (600 mA) LM3671MF-1.2 (600 mA) LM2745 (>2A) Sync C 1/2 LM26471 (>3A) Sync C
VCCO=1.2V LM27431 (>3A) Sync SC LM2830 (<1A) 1/2 LM3700 LM3485 (>3A)
1/2 LM3700 LM2831 (<1.5A)
LM3671-1.5 (<600 mA) SC LM3671-1.5 (<600 mA) SC LM2832 (<2A) LM2736 (<500 mA) SC LM2696 (<3A)
LP3874-Adj (<800 mA) LP3874-Adj (<800 mA) LM2652 LM2734 (<1A) SC
XC4VLX40 VCCO=1.5V LM2830 (<1A) SC LM2734 (<1A) SC 1/2 LM3700 LM2694 (<600 mA)
XC4VLX60 LM3475 (<3A) Sync R LM2830 (<1A) LM25010 (<1A)
1/2 LM3700 LM2831 (<1.5A) LM2695 (<1.25A)
XC4VLX80
LP3874-1.8 (<800 mA) LM3671-1.8 (<600 mA) SC LM2652 LM2736 (<500 mA) SC
LP3875-1.8 (<1A) LP3874-1.8 (<800 mA) 1/2 LM3700 LM2694 (<600 mA)
XC4VSX55 0.05A < ICCINT < 3A LM2830 (<1A) SC LM2734 (<1A) SC LM2734 (<1A) SC
VCCO=1.8V LM3475 (<3A) LM2830 (<1A) LM25010 (<1A)
LM3671MF-1.8 (600 mA) LM2831 (<1.5A) LM2695 (<1.25A)
XC4VFX40 1/2 LM3700 LM2832 (<2A) LM2696 (<3A)
XC4VFX60
LP3874-2.5 (<800 mA) LP3874-2.5 (<800 mA) SC LM2831 (<1.5A) LM2736 (<500 mA) SC LM2695 (<1.25A)
LP3875-2.5 (<1A) LP3875-2.5 (<1A) LM2832 (<2A) LM2694 (<600 mA) LM2696 (<3A)
VCCO=2.5V LM2830 (<1A) SC LM2734 (<1A) SC LM2652 LM2734 (<1A) SC
LM2852 (<2A) Sync R LM2830 (<1A) LM25010 (<1A)
LM3671MF-3.3 (600 mA) LM2830 (<1A) LM2736 (<500 mA) SC LM2695 (<1.25A)
LP3874-3.3 (<800 mA) LM2831 (<1.5A) LM2694 (<600 mA) LM2696 (<3A)
VCCO=3.3V –
LP3875-3.3 (<1A) LM2832 (<2A) LM2734 (<1A) SC
LM2734 (<1A) SC LM2652 LM25010 (<1A)
VCCINT
LM2830 (<1A) SC LM3671MF-1.2 (600 mA) LM2743 (>3A) LM27341 (<1A) SC
LM34751 (<1A) SC LM27341 (<1A) SC LM3475 (>3A) LM2696 (<3A)
VCCINT=1.2V 0.2A < ICCINT < 5A LM3671MF-1.2 (600 mA) LM2830 (<1A) LM1770/1771 (<4A) 1/2 LM26473 (>3A)
LP3875-Adj LM2831 (<1.5A) 1/2 LM3700 LM2743 (>3A)
1/2 LM3700 LM2832 (<2A) LM3485 (>3A)
VCCAUX
LP3981-2.5 LP3981-2.5 LM27361
VCCAUX=2.5V ICCINT = 0.3A LM3670-2.51 LM3670-2.51
VCCO
LM27431 (>4A) Sync SC LM3671MF-1.2 (600 mA) LM2745 (>2A) Sync C 1/2 LM26471 (>4A) SC
VCCO=1.2V LM3671MF-1.2 (600 mA) LM2830 (<1A) 1/2 LM3700
1/2 LM3700 LM2831 (<1.5A)
XC4VLX100
XC4VLX160 LP3875-Adj (<1A) LM3671MF-1.5 (600 mA) LM2743 (>3A) LM2694 (<600 mA) 1/2 LM26474(>6A)
LM2830 (<1A) Sync C LP3874-Adj (<800 mA) LM2652 LM25010 (<1A) LM2743
XC4VLX200 LM3475 (<3A) LM2734 (<1A) SC 1/2 LM3700 LM2734 (<1A) SC
VCCO=1.5V LM2743 (>3A) LM2830 (<1A) LM2695 (<1.25A)
LM3671MF-1.5 (600 mA) LM2831 (<1.5A) LM2696 (<3A)
XC4VFX100 1/2 LM3700 LM2832 (<2A) LM3485 (>3A)
XC4VFX140
LP3875-1.8 (<1A) LM3671MF-1.8 (600 mA) LM2652 LM2694 (<600 mA) 1/2 LM26474 (>6A)
LM2830 (<1A) SC LM2734 (<1A) SC 1/2 LM3700 LM25010 (<1A) LM2743
LM3475 (<3A) LM2830 (<1A) LM2734 (<1A) SC
VCCO=1.8V 0.05A < ICCINT < 2A LM2743 (>3A) LM2831 (<1.5A) LM2695 (<1.25A)
LM3671MF-1.8 (600 mA) LM2832 (<2A) LM2696 (<3A)
1/2 LM3700 LM2743 (>3A) LM3485 (>3A)
LM3671MF-2.5 (600 mA) LM3671MF-2.5 (600 mA) LM2743 (>3A) LM2736 (<500 mA) SC LM3485 (>3A)
LP3875-2.5 (<1A) LP3875-2.5 (<1A) 1/2 LM3700 LM2694 (<600 mA) 1/2 LM26474 (>6A)
LM2830 (<1A) SC LM2734 (<1A) SC LM2652 LM25010 (<1A) LM2743
VCCO=2.5V LM3475 (<3A) LM2830 (<1A) LM2734 (<1A) SC
LM2743 (>2A) LM2831 (<1.5A) LM2695 (<1.25A)
1/2 LM3700 LM2832 (<2A) LM2696 (<3A)
LM3671MF-3.3 (600 mA) LM2832 (<2A) LM2694 (<600 mA) LM3485 (>3A)
LP3875-2.5 (<1A) LM2743 (>3A) LM25010 (<1A) 1/2 LM26474 (>6A)
VCCO=3.3V – LM2734 (<1A) SC 1/2 LM3700 LM2734 (<1A) SC LM2743
LM2830 (<1A) LM2652 LM2695 (<1.25A)
LM2831 (<1.5A) LM2696 (<3A)
SC - Switching Controller 1 LDO option not applicable due to thermal constraints (heat dissipation) for the given operating conditions.
Sync SC - Synchronous Switching Controller 2 Buck Regulator. Good efficiency. Simple Implementation. WEBENCH design tools available.
Sync C - Synchronous Controller 3 Synchronous buck converter. Maximum efficiency. No external diode required. 13
Sync R - Synchronous Regulator 4 One half of a dual converter, such as the LM2647, can be used to power V
CCINT while the other half can be used to power VCCIO.
National Power Solutions for Xilinx Spartan-II Spartan-II devices are designed and characterized to support various
I/O standards for VCCO values of 1.5, 2.5 and 3.3V. Internal core logic
The 2.5V Spartan-II family of FPGAs offers six family members with
circuits such as the Configurable Logic Blocks (CLBs) and programmable
densities from 15,000 to 200,000 system gates. System performance is
interconnect operate from the VCCINT voltage supply pins. VCCINT must be
supported to 200 MHz.
+2.5V. Also, there must be sufficient supply decoupling on all supply lines
to guarantee problem-free operation.
Spartan-II Selection Table

Spartan-II
VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCINT
LP3852-2.5 (<1.5A) LP3871-2.5 (<700 mA) LM2671- Adj2 (<500 mA)
LP3853-2.5 (<3A) LM2830 (<1A) LM2694 (<600 mA)
LM2831 (<1.5A) LM25010 (<1A)
VCCINT=2.5V 0.2A < ICCINT < 2A LM2832 (<2A) LM2695 (<1.25A)
LM2852 (<2A) Sync R LM3100 (<1.5A)
LM2652 (<3A) LM25005 (<2.5A)
LM2696 (<3A)
VCCO
LP2985-1.5 (<150 mA) LM3670 (<350 mA) LM2671-Adj (<500 mA)
XC2S15 LP3982-Adj (<300 mA) LM3671 (<600 mA)
XC2S30 LM3670 (<350 mA) 1/2 LM3700
VCCO=1.5V
XC2S50 LM3671 (<600 mA) LM2852 (<2A) Sync R
XC2S100 1/2 LM3700
XC2S150 LM2852 (<2A) Sync R
XC2S200 LP3988-2.5 (<150 mA) LM3670 (<350 mA) LM2671-Adj (<500 mA)
LP3981-2.5 (<300 mA) LP2989-2.5 (<500 mA)
LM3670 (<350 mA) LM3671 (<600 mA)
VCCO=2.5V 0.05A < ICCINT < 0.5A
LM3671 (<600 mA) LM3671 (<600 mA)
1/2 LM3700 1/2 LM3700
LM2852 (<2A) Sync R LM2852 (<2A) Sync R
LP3988-3.3 (<150 mA) LM2671-3.3 (<500 mA)
LP3981-3.3 (<300 mA)
LM3670 (<350 mA)
VCCO=3.3V –
LM3671 (<600 mA)
1/2 LM3700
LM2852 (<2A) Sync R
Sync R - Synchronous Regulator **Suggested solutions are integrated regulators unless otherwise noted.
14
National Power Solutions for Xilinx Spartan-IIE Spartan-IIE devices are designed and characterized to support various
The 1.8V Spartan-IIE family of FPGAs offers seven family members logic circuits such as the Configurable Logic Blocks (CLBs) and
with densities from 50,000 to 600,000 system gates. System
performance is supported beyond 200 MHz. Spartan-IIE devices also
pins. VCCINT must be +1.8V. Also, there must be sufficient supply
offer on-chip synchronous single-port and dual-port RAM.
decoupling on all supply lines to guarantee problem-free operation.
Spartan-IIE Selection Table

Spartan- National Semiconductor Device(s)**
IIE VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCINT
LP3872-1.84 (<1.5A) LP3871-1.8 (<600 mA) LM2652-Adj1 (<3A) LM2671-Adj2 (<500 mA) LM2695 (<1.25A)
VCCINT=1.8V 0.2A < ICCINT < 2A LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
VCCO
LP2985-1.54 (<150 mA) LM3670 (<350 mA) LM2671-Adj (<500 mA) LM2695 (<1.25A)
LP2992-1.54 (<250 mA) LM3671 (<600 mA) LM2694 (<600 mA) LM2696 (<3A)
VCCO=1.5V LM3670 (<350 mA) LM2736 (<750 mA) SC LM2736 (<750 mA) SC
XC2S50E LM3671 (<600 mA) LM2734 (<1A) SC LM2734 (<1A) SC
XC2S100E 1/2 LM3700 1/2 LM3700 LM25010 (<1A)
XC2S150E LP2985-1.84 (<150 mA) LM3670 (<350 mA) LM2671-Adj (<500 mA) LM2695 (<1.25A)
XC2S200E LP2992-1.84 (<250 mA) LM3671 (<600 mA) LM2694 (<600 mA) LM2696 (<3A)
VCCO=1.8V LM3670 (<350 mA) LM2736 (<750 mA) SC LM2736 (<750 mA) SC
XC2S300E LM3671 (<600 mA) LM2734 (<1A) SC LM2734 (<1A) SC
1/2 LM3700 1/2 LM3700 LM25010 (<1A)
0.05A < ICCINT < 0.5A
LP3988-2.51 (<150 mA) LP2989-2.5 (<500 mA) LM2671-Adj (<500 mA) LM2695 (<1.25A)
VCCO=2.5V LM3670 (<350 mA) LM3671 (<600 mA) LM2736 (<750 mA) SC
LM3671 (<600 mA) 1/2 LM3700 LM2734 (<1A) SC
1/2 LM3700 LM25010 (<1A)
LM3670 (<350 mA) LM2671-3.3 (<500 mA) LM25010 (<1A)

LM3671 (<600 mA) LM2694 (<600 mA) LM2695 (<1.25A)
VCCO=3.3V – 1/2 LM3700 LM2736 (<750 mA) SC LM2696 (<3A)
LM2734 (<1A) SC
VCCINT
LM1770/1771 (<4A) LM2830 (<1A) LM2652-Adj1 (<3A) LM2694 (<600 mA) LM25005 (<2.5A)
VCCINT =1.8V 0.2A < ICCINT < 3A LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2852 (2A) Sync R LM2695 (<1.25A)
VCCO
LP2985-1.54 (<150 mA) LM3670 (<350 mA) LM2671-Adj (<500 mA) LM2695 (<1.25A)
LM3670 (<350 mA) LM2736 (<750 mA) SC LM2736 (<750 mA) SC
VCCO=1.5V LM3671 (<600 mA) LM2734 (<1A) SC LM2672-Adj (<1A)
LP3874-Adj4 (<800 mA) LM2852 (2A) Sync R LM2734 (<1A) SC
1/2 LM3700 1/2 LM3700 LM25010 (<1A)
XC2S400E LP2985-1.84 (<150 mA) LM3670 (<350 mA) LM2671-Adj (<500 mA) LM2695 (<1.25A)
XC2S600E LP2992-1.84 (<250 mA) LM3671 (<600 mA) LM2694 (<600 mA) LM2696 (<3A)
LM3670 (<350 mA) LM2736 (<750 mA) SC LM2736 (<750 mA) SC
VCCO=1.8V LM3671 (<600 mA) LM2734 (<1A) SC LM2672-Adj (<1A)
LP3871-1.84 (<800 mA) LM2852 (2A) Sync R LM2734 (<1A) SC
0.05A < ICCINT < 0.75A 1/2 LM3700 1/2 LM3700 LM25010 (<1A)
LP3988-2.54 (<150 mA) LP2989-2.5 (<500 mA) LM2671-Adj (<500 mA) LM2695 (<1.25A)
LM3670 (<350 mA) LM3671 (<600 mA) LM2736 (<750 mA) SC
VCCO=2.5V LM3671 (<600 mA) LP3871-2.5 (<800 mA) LM2672-Adj (<1A)
LP3871-2.54 (<800 mA) LM2852 (2A) Sync R LM2734 (<1A) SC
1/2 LM3700 1/2 LM3700 LM25010 (<1A)
LM3670 (<350 mA) 1/2 LM3700 LM2671-3.3 (<500 mA) LM2734 (<1A) SC
LM3671 (<600 mA) LM2694 (<600 mA) LM25010 (<1A)
VCCO=3.3V – LP3871-3.3 (<800 mA) LM2736 (<750 mA) SC LM2695 (<1.25A)
LM2852 (2A) Sync R LM2672-3.3 (<1A) LM2696 (<3A)
15
4 LDO solution. Minimal external components required.

National Power Solutions for Xilinx Spartan-3 Spartan-3 devices are designed and characterized to support various
I/O standards for VCCO values of 1.2, 1.5, 1.8, 2.5, 3.0 and 3.3V.
The 1.2V Spartan-3 family of Field Programmable Gate Arrays offers
Internal core logic circuits such as the Configurable Logic Blocks
8 members with densities ranging from 50K to 5M system gates. The
(CLBs) and programmable interconnect operate from the VCCINT voltage
Spartan-3L family offers 3 devices with reduced power (up to 98%
supply pins. VCCINT must be +1.2V. The VCCAUX pins supply power to
lower power consumption) and an exclusive hibernate mode that fits
various auxiliary circuits, such as the Digital Clock Managers (DCMs),
seamlessly with systems using power management. The Spartan-
JTAG pins and the dedicated configuration pins. VCCAUX must be +2.5V.
3 EasyPath™ FPGAs further extend the benefits of the Spartan-3
Also, there must be sufficient supply decoupling on all supply lines to
FPGA family to volume production with a conversion-free, no-risk
methodology that delivers up to 60% cost reduction.
Spartan-3,-3E,-3L Selection Table

Spartan-3
VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCINT
LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (<2A) LM3485 (>3A)
VCCINT=1.2V 0.2A < ICCINT < 3A LM27431 (>3A) Sync SC LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM27371 (>3A) SC
LM2832 (<2A) 1/2 LM26471 (>3A) SC3
VCCAUX
LP3981 2.5 LP2989-2.5 LM2671-Adj
VCCAUX=2.5V ICCINT=0.3A
LM26191 LM3671 (<600 mA)
VCCO
VCCO=1.2V LM27431 (>2A) Sync SC LM2830 (<1A) LM2745 (>2A) Sync C 1/2 LM26471 (>2A) SC
XC3S50 LM2831 (<1.5A)
XC3S200
LP3982-Adj (<300 mA) LP3874-Adj (<500 mA) LM2652-Adj1 (<3A) LM2671-Adj2 (<500 mA) LM2695 (<1.25A)
XC3S400 LP3874-Adj (<800 mA) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
XC3S100E LM1770/1771 (<4A) LM2832 (<2A) LM3100 (<1.5A)
XC3S250E LP3872-1.8 (<1.5A) LP3871-1.8 (<600 mA) LM2652-Adj1 (<3A) LM2671-Adj2 (<500 mA) LM2695 (<1.25A)
XC3S500E LM1770/1771 (<4A) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=1.8V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
XC3S1000L
0.05A < ICCINT < 2A LP3852-2.5 (1.5A) LP3871-2.5 (<700 mA) LM2652-Adj1 (<3A) LM2671-Adj2 (<500 mA) LM2695 (<1.25A)
VCCO=2.5V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
LP3856-Adj (<1A) LP3874-Adj (<800 mA) LM2652-Adj1 (<3A) LM2671-Adj2 (<500 mA) LM2695 (<1.25A)
LP2975 (1A to >2A) LM2830 (<1A) LM2852 (2A) Sync R LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=3.0V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
LP3871-3.3 (<800 mA) LM2652-Adj1 (<3A) LM2671-3.32 (<500 mA) LM2695 (<1.25A)
VCCO=3.3V –
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM3100 (<1.5A)
XC3S1000 VCCINT
XC3S1500 LP3874-Adj (<800 mA) LM2852 (<2A) LM2745/48 (>2A) Sync C LM3485 (>3A) 1/2 LM26471 (>4A) SC3
XC3S2000 VCCINT=1.2V 0.2A < ICCINT < 4A
LM27431 (>4A) Sync SC LM1770/1771 (<4A) LM27371 (>4A) SC
VCCAUX
XC3S1200E
XC3S1600E LP3981-2.5 LM3671 (<600 mA) LM2671-Adj
LM26191 LP2989-2.5
VCCAUX=2.5V ICCINT=0.3A
XC3S1500L
XC3S4000L
16
Spartan-3, -3E, -3L Selection Table (Cont’d)
Spartan-3
VIN = 3.3V 4.5V < VIN < 5.5V VIN = 12V
VCCO
VCCO=1.2V LM27431 (>3A) Sync SC LM2830 (<1A) LM2745/48 (>2A) Sync C 1/2 LM26471 (>3A) SC
LM2831 (<1.5A) LM3485 (>3A)
LP3982-Adj (<300 mA) LP3874-Adj (<500 mA) LM2852 (2A) Sync R LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
LP3874-Adj (<800 mA) LM2830 (<1A) LM2652 (<3A) LM2694 (<600 mA) LM25005 (<2.5A)
XC3S1000 LM1770/1771 (<4A) LM2832 (<2A) LM2695 (<1.25A)
XC3S1500
LP3872-1.8 (<1.5A) LP3871-1.8 (<600 mA) LM2852 (2A) Sync R LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
XC3S2000 LM1770/1771 (<4A) LM2830 (<1A) LM2652 (<3A) LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=1.8V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
XC3S1200E
XC3S1600E 0.05A < ICCINT < 3A LP3852-2.5 (<1.5A) LP3871-Adj (<700 mA) LM2852 (2A) Sync R LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
LP3853-2.5 (<3A) LM2830 (<1A) LM2652 (<3A) LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=2.5V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
XC3S1500L LM2832 (<2A) LM2695 (<1.25A)
XC3S4000L LP3856-Adj (<1A) LP3874-Adj (<800 mA) LM2852 (2A) Sync R LM2671-Adj2 (<500 mA) LM3100 (<1.5A)
LP2975 (1A to >3A) LM2830 (<1A) LM2652 (<3A) LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=3.0V LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
LP3871-3.3 (<800 mA) LM2852 (2A) Sync R LM2671-3.32 (<500 mA) LM3100 (<1.5A)
LM2830 (<1A) LM2652 (<3A) LM2694 (<600 mA) LM25005 (<2.5A)
VCCO=3.3V –
LM2831 (<1.5A) LM25010 (<1A) LM2696 (<3A)
LM2832 (<2A) LM2695 (<1.25A)
VCCINT
LP3874-Adj (<800 mA) LM2852 (2A) Sync R LM3485 (>3A) 1/2 LM26471 (>5A) SC
VCCINT=1.2V 0.2A < ICCINT < 5A LM27431 (>5A) Sync SC LM2745/48 (>2A) Sync C LM27371 (>5A) SC
VCCAUX
LP3981-2.5 LM3671 (<600 mA) LM2671-Adj
VCCAUX=2.5V ICCINT=0.3A LM26191 LP2989 2.5
VCCO
LP3874-Adj (<800 mA) LP3881-1.2 (<500 mA) LM2832 (<2A) LM3485 (>3A)
VCCO=1.2V LM27431 (>4A) Sync SC LM2830 (<1A) LM1770/1771 (<4A) LM27371 (>4A) SC
LM2831 (<1.5A) LM2745/48 (>2A) Sync C 1/2 LM26471 (>4A) SC
LP3874-Adj (<800 mA) LM2652 (<3A) LM2745/48 (>2A) Sync C LM3100 (<1.5A) 1/2 LM26471 (2A to >4A) Sync SC
VCCO=1.5V LP3875-Adj (<1.3A) LM2830 (<1A) LM2852 (2A) Sync R LM25010 (<1A) LM3485 (>3A)
LM1770/1771 (<4A) LM2831 (<1.5A) LM2695 (<1.25A)
LM2832 (<2A) LM25005 (<2.5A)
XC3S4000
XC3S5000 LM1770/1771 (<4A) LM2830 (<1A) LM2852 (2A) Sync R LM3100 (<1.5A) 1/2 LM26471 (2A to >4A) Sync SC
VCCO=1.8V LM27431 (2A to >4A) Sync SC LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
LM2832 (<2A) LM2695 (<1.25A)
LM2652 (<3A) LM25005 (<2.5A)
0.05A < ICCINT < 4A LP3852-2.5 (<1.5A) LP3871-2.5 (<700 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LP3853-2.5 (<3A) LM2830 (<1A) LM2852 (2A) Sync R LM3100 (<1.5A) 1/2 LM26471 (2A to >4A) Sync SC
VCCO=2.5V LM1770/1771 (<4A) LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
LM2832 (<2A) LM2695 (<1.25A)
LM2652-Adj (<3A) LM25005 (<2.5A)
LP3856-Adj (<1A) LP3874-Adj (<800 mA) LM1770/1771 (<4A) LM2694 (<600 mA) LM2696 (<3A)
LP2975 (1A to >4A) LM2830 (<1A) LM2852 (2A) Sync R LM3100 (<1.5A) 1/2 LM26471 (2A to >4A) Sync SC
VCCO=3.0V LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
LM2832 (<2A) LM2695 (<1.25A)
LM2652-Adj1 (<3A) LM25005 (<2.5A)
LP3871-3.3 (<800 mA) LM1770/1771 (<4A) LM2694 (<600 mA) 1/2 LM26471 (2A to >4A) Sync SC
LM2830 (<1A) LM2852 (2A) Sync R LM3100 (<1.5A) LM2696 (<3A)
VCCO=3.3V – LM2831 (<1.5A) LM2745/48 (>2A) Sync C LM25010 (<1A) LM3485 (>3A)
LM2832 (<2A) LM2695 (<1.25A)
LM2652-Adj1 (<3A) LM25005 (<2.5A)
cco instead of the stand alone voltage regulator suggested. 17
Voltage Supervisor and Power Sequencer Summary
1 For custom reset threshold Voltages between 2.2V and 5.0V in 10mV increments, contact National Semiconductor.
Voltage References and Termination Voltage Regulators Summary
1 Least heat dissipation. Maximum conversion efficiency.

18 2 DDR
3 Good
termination linear regulator.
alternative (space saving, integration) when the other 1/2 LM5642 is already being used for VCCINT or VCCO supply.
4 Good alternative (space saving, integration) when the other 1/2 LM2647 is already being used for V
CCINT or VCCO supply.
5 Max V for LM4140s is 5.5V. Down convert V first to 3.3V or 5.0V when using 12V supplies with LM4140s.
IN IN
6 Linear solution. Careful thermal design needs to be followed. Heatsink is required for large output currents or large V -V
IN OUT differentials.
Buck Controller and Regulator Summary
Part Vin (V) Vin (V) Iout (max) Freq Sync
Number Features Min Max (Amps) (kHZ) Buck Package
LM1770/71 Low-Voltage Synchronous Buck Controller With No 2.8 5.5 4/6 300 to 1000 Y SOT-23
External Compensation
LM2647/57 Dual Synchronous Buck Regulator Controller 5.5 28 25 x 2 200, 500 Y LLP-28, TSSOP-28
LM2652 Synchronous Step-Down DC/DC Converter 2.7 5.5 1.5 600, 1300 Y SOIC Wide-24
LM2694/95 COT Step-Down Switching Regulator 4.5 30 0.6/1.25 500 LLP-10, TSSOP-14
LM2696 COT Step-Down Switching Regulator 4.5 24 3 501 LLP-10, TSSOP EXP PAD
LM2734/36 1A Load Step-Down DC/DC Regulator 3 20/18 0.1/0.075 160, 550 SOT23-6
LM2743 Low Voltage N-Channel MOSFET Synchronous Buck 1 16 20 1000 Y TSSOP-14

Regulator Controller
LM2744 Low Voltage N-Channel MOSFET Synchronous Buck 1 16 2 1000 Y TSSOP-14
Regulator Controller with External Reference
LM2746/47 Low Voltage N-Channel MOSFET Synchronous Buck 1 14 25 1000 Y TSSOP EXP PAD
Regulator Controller
LM2745/48 Synchronous Buck Controller with Pre-bias Startup, and 1 14 25 1000 Y TSSOP-14
Optional Clock Synchronization
LM2830/1/2 High Frequency Step-Down DC-DC Regulator -40 125 1/1.5/0.002 1600, LLP-6, SOT23-5, eMSOP-8
550,3000
LM3075 High Efficiency, Synchronous Current Mode Buck Controller 4.5 36 20 200, 300 Y TSSOP-20
LM3100 SIMPLE SWITCHER® Synchronous 1 MHz 1.5A COT Step- 4.5 36 1.5 1000 Y eTSSOP-20
Down Voltage Regulator
LM3370 Dual Synchronous Step-Down DC-DC Converter with 2.7 5.5 0.6A 2000 Y LLP-16
Dynamic Voltage Scaling Function
LM3485/89 Hysteretic PFET Buck Controller 4.5 35 5 1400 MSOP-8
LM3495 Emulated Peak Current Mode Buck Controller for Low 2.9 18 10 1500 Y TSSOP-16
Output Voltage
LM3670/71 Step-Down DC/DC Converter 2.5/2.7 5.5 0.035/0.06 1000, 2000 SOT23-5, micro SMD-5
LM4050 Precision Micropower Shunt Voltage Reference 0.015 SOT23-3
LM4120 Precision Micropower Low Dropout Voltage Reference 14 ±0.005 SOT23-5, LLP-6, micro SMD-4
LM4132 Precision Low Dropout Voltage Reference 5.5 0.02 SOT-23
LM5642 High Voltage, Dual Synchronous Buck Converter with 4.5 36 20 x 2 150 to 250 Y TSSOP-28
Oscillator Synchronization
LM25005 Emulated Current Mode Step-Down Switching Regulator 7 42 2.5 500 TSSOP EXP PAD
LM25010 COT Step-Down Switching Regulator 6 42 1 1000 TSSOP EXP PAD
LM27241 Synchronous Buck Regulator Controller for Mobile System 5.5 28 200 to 500 Y TSSOP-20
LP3990 150 mA Linear Voltage Regulator for Digital Applications 2 6 0.15 SOT23-5, LLP-6, micro SMD-4
LP3999 Low Noise 150 mA Voltage Regulator for RF/Analog 2.5 6 0.15 micro SMD-5
Applications
19
High-speed Interface Solutions for FPGAs &
CPLDs
National Semiconductor is the leader in innovation and solutions for high

speed interface integrated circuits. As the company which invented LVDS
ESD ESD
(low voltage differential signal), National continues to drive the technology PLUG - IN CARD
and provides a host of solutions that dramatically improve and facilitate
high-speed data transfer in FPGA-based designs. Whether it is easing
FPGA
complexity in high-end FPGAs, or adding performance and capability to low- 1000v
Cable ESD I/O Pins
to mid-range versions, National’s LVDS product family adds value to any Connection
Interface
high speed FPGA design. Devices POWER
12,000v GROUND
Value Proposition
e.g. DS90LV001, DS92001
SCAN90CP02, DS90LV110A
Bring High-speed SerDes Capability to Low-cost

Let National’s LVDS buffers do the driving by placing them between high
FPGAs and CPLDs speed FPGA I/O and connectors. In addition to providing higher speed and
longer reach, these buffers will take over the burden of driving the signal and
Lower the interconnect cost for low-cost FPGAs by using National’s
allow the FPGA I/O to operate at minimal current drive - thereby minimizing
high-speed interface SerDes solutions. Low-cost FPGAs and CPLDs (eg.
simultaneous switching noise issues. Benefiting from the dramatically higher
Spartan II and Spartan-3) coupled with external SerDes and PHYs from
ESD protection, these buffers provide - 15x to 30x more than most FPGA I/O.
National can reduce wire and connector width at performance levels
At last, there are ESD buffers that will not degrade your high-speed signal.
traditionally reserved for the high-end FPGA.
Interfacing to a Cylcone FPGA Increase Multipoint Backplane Performance

Use National’s BUS LVDS buffers to add multipoint backplane performance
16 2 16
DIN DOUT DIN to FPGA I/O. These buffers enable data transfer rates as high as 200
Cyclone DS92LV16 Backplane DS92LV16 Cyclone Mbps per differential pair in multipoint/multidrop busses. Additionally,
or cable
FPGA FPGA their “stub-hiding” capability allows routing of FPGAs further away from
16 2 16
DOUT DIN
connectors, without suffering any increase in EMI or signal degradation.
Low cost Low cost
oscillator oscillator
Backplane Stubs ASIC/ Problem

- ASIC/FPGA LVDS
No Stub Hider
FPGA I/O has poor signal
quality when
Extend FPGA I/O Performance while Minimizing Stub Hider driving off board
Simultaneous Switching Noise and Enhancing Solution

- use LVDS Buffer(s)
DS90LV001 to "boost" signal
ESD Protection OE
+
-
+
- Constraints
- added jitter skew
- between channels
!CTUAL3IZE
1 Boost Drive Over Cables or Backplanes
2 8 kV ESD Protection
XMM
3 Ultra Low Jitter Outputs
(35 ps typ P-P)
FPGA/ASIC DS90LV004 DS90LV004 FPGA/ASIC Boost FPGA Performance
Save Valuable FPGA Resources with National’s Data

Quad LVDS Buffer Quad LVDS Buffer 2000
DS90LV004 Max Pre-Emphasis
1800
DS90LV004 No Pre-Emphasis
1600
1400
FPGA LVDS Output
1200
Data Rate (Mbps)
and Clock Distribution Products

1000
800
FPGA LVDS-Like Output
600
400 Agilent
2 2 DUT
81250
200
CAT5e cable, PRBS-7 pattern, based on 10-11 BER cable
0
JTAG JTAG 5m 10m 15m 20m 25m
CAT5e Cable Length
Use one high-speed signal from your FPGA and distribute it to multiple
Programmable Pre-Emphasis Lowers Jitter 4
LVDS/LVPECL/CML-Compatible Inputs,
destinations using National’s data and clock distribution solutions. Add
5
Tight Thresholds Reduce BER
6 IEEE 1149.6 “JTAG” Testability
redundant active and backup channels to FPGA I/O using National’s crosspoint
(SCAN90004 Version)
switches.
20
DS90LV110 FPGA
FPGA
Clock FPGA
or Serders FPGA
Signal FPGA
FPGA
FPGA
or
FPGA
FPGA
FPGA
PP1 PP2 MO1 MO2 MO3 MO4 MP1
Xilinx FPGA + National Companion Interface Solutions

FPGA INTERFACE
FPGA SerDes
Mux Ratio Clock (MHz) Payload (Mbps)
10:1 16 – 80 160 – 800
Virtex™ 4 (FX) Virtex 4 (LX & SX) Virtex 16:1 25 – 80 400 – 1280
Virtex II Pro/X Virtex II Spartan II 18:1 15 – 66 270 – 1188
Virtex E Spartan/XL 21:3 20 – 85 420 – 1785
Spartan™ 3 Coolrunner™ II/XPLA3 24:1 5 – 35 120 – 840
Spartan IIE XC9500/XV/XL 28:4 20 – 85 560 – 2380
48:8 33 – 133 1584 – 6384
4:1 625 4 x 5000
Buffers with Pre-Emphasis/Equalization (0 - 20 m)
Buffers Equalizers
Virtex™ 4 (FX) Virtex 4 (LX & SX) Virtex Switches LVDS (up to 1.5 Gbps)
Virtex II Pro/X Virtex II Spartan II Muxes CML (up to 6.25 Gbps)
Virtex E Spartan/XL
Spartan™ 3 Coolrunner™ II/XPLA3 Switching/Redundancy
Spartan IIE XC9500/XV/XL
Switches LVDS (up to 1.5 Gbps)

Muxes CML (up to 4.25 Gbps)
1:n Repeaters
Virtex™ 4 (FX) Virtex 4 (LX & SX) Virtex Clock Distribution

Virtex II Pro/X Virtex II Spartan II
Virtex E Spartan/XL LVDS Point-to-Point
Spartan™ 3 Coolrunner™ II/XPLA3 Bus LVDS Multidrop
Spartan IIE XC9500/XV/XL M-LVDS Multipoint
Virtex™ 4 (FX) Virtex 4 (LX & SX) Virtex 10/100 Ethernet

Virtex E Spartan/XL 0 - 70˚C
Spartan™ 3 Coolrunner™ II/XPLA3 10/100 PHY
-40 - 85˚C
Spartan IIE XC9500/XV/XL 10/100 MAC/PHY
-40 - 125˚C
Virtex™ 4 (FX) Virtex 4 (LX & SX) Virtex SDI (20 - 300 m)
Virtex E Spartan/XL
Cable Drivers Encoders
Spartan™ 3 Coolrunner™ II/XPLA3 Adaptive Equalizers Decoders
Spartan IIE XC9500/XV/XL Reclockers Switches
21
JTAG for FPGAs & CPLDs
One of the difficult areas in the development of any modern hardware

system is the production-testing of the Printed Circuit Boards (PCBs). In
Multi-drop Addressable JTAG Port
the past, the old method of testing complex boards involved an in-circuit
tester which was expensive, proprietary and required a long development Divide & Conquer
time. Testing has become even more difficult with the demand for higher
• Address one or
density and more layers on PCBs, buried nodes and chips in ball grid array multiple SCANSTA111
(BGA) packages with hidden balls. IEEE 1149.1
IEEE 1149.1
Bridge chips from one
JTAG bus
Configurable
Mission
FPGA Configurable
FPGA Logic
• Once Bridge(s)
The JTAG standard (IEEE 1149.1) is an industry standard that allows selected,
1-3 smaller JTAG
test automation tools to interface with chips and apply test vectors to buses can be selected
perform testing. The technology means test points for each device pin are LSP2 LSP1 Mission Mission
Mission
Logic
Logic Logic • Enables
built into chips and the test point are connected to a 5-wire serial bus. SCANSTA111 LSP0 - test complete
“Bridge” multi-board systems
Test development and execution can then be done on a simple personal Multidrop Flash - separate SCAN
computer. Addressable µC or FPGA
Read/Write Bus Memory chains for FPGAs
JTAG Port Address
with JTAG Flash - improved test
Memory
(Simplified Diagram) throughput
- faster programming
Many modern communications and networking systems, nowadays, & emulation
incorporate a system-wide IEEE 1149.1 (JTAG) test bus infrastructure. This IEEE 1149.1 “JTAG” Bus
test bus not only enables a comprehensive life-cycle approach to system

test, but it also offers a number of additional benefits to the system
designer as the utility of the JTAG bus continues to expand beyond the Contemporary designs already use numerous IEEE 1149.1 devices on multiple
boundaries of pure testing. JTAG is now used for emulation, memory system cards. The challenge is how to tie them all together efficiently for
programming, and configuration of CPLDs or FPGA, and these approaches targeted access and superior isolation.
are widely used in the industry.
National’s SCANSTA111 Multi-drop Addressable JTAG Port (also known as
“Bridge”) allows the JTAG bus to be broken up into smaller “scan chain”
Embedded JTAG Test Master pieces. The JTAG tester can select one or more of these pieces wherever
they are in the system for focused testing, or in the case of FPGAs and FLASH
memory, (re)programming. This is necessary for multi-board testing and highly
JTAG
Tester desirable for FPGA programming. Breaking one long scan chain into smaller
JTAG Port
chains can also significantly improve test time.
SCANSTA101 The SCANSTA111 Multi-drop Addressable port JTAG allows speedy

“Embedded SCANSTA101 Embedded µP or FPGA
Memory programming of FLASH or FPGAs by providing minimum length dedicated
JTAG Test 1149.1 Master with JTAG
Master scan chains. FLASH programming is accomplished by driving the necessary

bits from the boundary scan cells of the devices connected to the data and
• SCANSTA101 works with microprocessor/controller plus memory to provide an embedded in-system
• Design uses: address bits of the FLASH memory. The SCANSTA111 includes pass-through
- system self-test buffer that may be used to drive the read/write signal.
- system (re) configuration
The Embedded JTAG Test Master, for example of National’s SCANSTA101,
- remote diagnostics & upgrades (e.g. through telephone line)
allows designers to build an embedded JTAG test master device. The
SCANSTA101, in combination with a micro-controller or micro-processor FLASH & FPGA Programming
plus memory, can be embedded in a system and allows the system to • FLASH & FPGA
perform self-diagnostics and (re)configuration. The SCANSTA101 interfaces IEEE 1149.1
programming driving
IEEE 1149.1 need for
between the micro-controller or micro-processor and the serial JTAG bus.
Configurable Mission
Configurable Mission
FPGA
FPGA Logic
Logic SCANSTA111 Bridge
It drives the JTAG bus and offloads some work from the processor or
• Can quickly program
controller. LSP1 Data FLASH or Altera/
Xilinx FPGAs with
LSP0
JTAG
This embedded “test master” is not as sophisticated as a PC loaded SCANSTA111 µC or FPGA
Flash
with ATPG software (there will still be required during manufacturing or “Bridge”
with JTAG Address
Memory
Multidrop
tests), but it does enable a host of in-field features such as system self- Addressable
diagnostics and remote upgrades. JTAG Port
(Simplified Diagram)
Address
R/W
Separate SCAN chain dramatically

National provides SCANEASE software and also SCANSTA101 ANSI C
R/W
IEEE 1149.1 “JTAG” Bus speeds programming!

drivers to make the software development of SCANSTA101 easier.
22
Mixed-signal Test Tools SCANSTA476
The popular JTAG standard, IEEE1149.1 is only concerned with digital testing
Analog 8 Successive
yet even digital boards contains analog signals such as power supplies inputs Mux T/H approximation
ADC
that require testing and monitoring. The SCANSTA476 solves this problem
by monitoring analog voltages and using an integrated ADC to output this
information into JTAG accessible registers. A total of 8 signals can be Control
monitored and unique JTAG instructions are used to sample each signal with logic
the digital result then scanned through the JTAG port.

IEEE 1149.1
The SCANSTA476 is a low cost device with a small footprint and provides a Test access port
simple and accurate method to add analog test points to a JTAG test solution.
TDI TCK TMS TRST TDO
Total System Solution

National offers a full portfolio of JTAG devices, including:
- Standard LVDS devices and ser/des with at-speed BIST and IEEE1149.6 (the differential JTAG standard!)
- “JTAG Enablers” such as the SCANSTA101 Master, SCAN Bridges SCANSTA111 & 112 and Analog Voltage Monitor SCANSTA476
- SCANEASE software to simplify SCANSTA101 development
Quickly Target & Reprogram FPGAs & Flash;

Emulate and Debug Processor & DSP Code Monitor Critical Analog Voltages
Baseband Card Radio Card
Analog
Reconfigure Reconfigure IC
FPGAs FPGAs
Emulate and Debug
Processor & DSP
Code
Analog Analog
IC IC
JTAG0 JTAG1
Data
JTAG(n)
Probe0 Probe1
C or FPGA Probe(n)
Program
Address
with JTAG Flash
SCANSTA111/112 Memory SCANSTA476 Mux
A to D Converter
JTAG
Port
Address R/W
JTAG
Port SCAN Registers
R/W
IEEE 1149.1 "JTAG" Bus

Backhaul or Control Card
JTAG
Port Vectors
0 1 1 0 0 0 1 0 1 1 0 0 0 1
1 0 0 0 1 1 0 1 0 0 0 1 1 0
0 0 1 1 0 1 0 0 0 1 1 0 1 0
Backhaul Link
Dual Port Memory
1 0 1 0 1 1 1 1 0 1 0 1 1 1
Parallel Interface
Processor 1 1 0 1 1 0 0 1 1 0 1 1 0 0
0 0 1 1 1 0 1 0 0 1 1 1 0 1
or 1 1 1 0 0 1 0 1 1 1 0 0 1 0
Microcontroller 0 1 1 0 0 0 1 0 1 1 0 0 0 1
1 0 0 0 1 1 0 1 0 0 0 1 1 0
0 0 1 1 0 1 0 0 0 1 1 0 1 0
1 0 1 0 1 1 1 1 0 1 0 1 1 1
1 1 0 1 1 0 0 1 1 0 1 1 0 0
0 0 1 1 1 0 1 0 0 1 1 1 0 1
1 1 1 0 0 1 0 1 1 1 0 0 1 0
SCANSTA101
JTAG Master Memory
Test, Program, Emulate, Diagnose
Remotely Manage, Diagnose, and Reconfigure System

23
High-speed ADCs for FPGAs
National Semiconductor provides a wide selection of high speed and general The main advantage of the LVDS signaling method is that high data rates
purpose ADCs to fit for different applications and system requirements. can be reached for a very low power budget. This is achieved through the
use of 2 wires for each discrete signal that is to be carried across a circuit
More and more communications systems and test & measurement board or cable. The voltages on each of these conductors swing in opposite
equipment require high- or ultra high-speed ADCs. These ADCs are used in directions and also have a very small amplitude (typically 350mV) when
combination with a micro-processor, DSP, or FPGA and such systems need to compared to single-ended signaling such as CMOS or TTL. It is because
be capable of high conversion rates and the supporting analog components of the inherent noise immunity of the differential circuit that low voltage
have to generate and amplify high-frequency signals. swings can be used. This in turn means that the signal frequency can be
faster as the rise time is shorter.
Our high-speed ADCs offer the industry’s best in class system performance
of up to 3 Giga-sample per second (GSPS) which is the best partner of Xilinx The signal lines that carry the differential waveform on a circuit board
Virtex-4 FPGA. should be designed to have a characteristic impedance of 100 Ohms (defined
by the LVDS standard). These lines are then differentially terminated at
the receiver with a 100 Ohm resistor to match the line. A signal voltage is
FFT Plot of a 489 MHz Sine Wave Sampled at 1 GSPS generated across this 100 Ohm resistor by a 3.5 mA current source within
the transmitter circuit which provides the 350mV signal swing for the
receiving circuit to detect.
Minimize the Rate of Data Transfer for

Each Clock Cycle
National’s ADC provides a de-multiplexed data output for each of its 2
channels. This method reduces the data rate by a half but increases the
number of bits. For a 1 GSPS sample rate, the conversion data output from
the ADC is 500 MHz. Even at this reduced speed, most discrete or internal
FPGA memories would have problems capturing this data reliably. It is
therefore beneficial to use a Dual Data Rata (DDR) method where data is
presented to the outputs on both the rising and falling edges of the clock.
While the data rate remains the same for DDR signaling, the clock frequency
is halved again to a more manageable 250 MHz. This frequency is now
in the realm of CMOS memory circuits. Before the data can be stored to
Value Proposition memory, it requires an intermediate pair of data latches at the input to the
FPGA device. The first latch of the pair is clocked using an in-phase data
Maximize the Signal Integrity of the Digital Outputs clock, while the second latch is clocked using a signal that is 180 degrees
out of phase or an inverted data clock.
The digital output data produced by the conversion has to be stored or at least
transferred at very fast speed when sampling signals are at high frequencies
(1 GSPS and above). Signal integrity between the digital components in the
system is one of the key issues need to be considered.
High-speed ADC with National’s LVDS technology is able to maximize the

signal integrity of the digital outputs.
Driver
Current
Source –3.5 mA
– + –350 mV
+
Receiver
–
+
LVDS-001
24
Ready-to-Use Development Platform Board for
FPGA Data Capture Architecture Gigahertz-speed Data System
FPGA Clock Manager
National and Xilinx introduced an integrated development platform that
accelerates the design of complex, gigahertz-speed communications and
CLKO test & measurement systems. The platform includes the world’s highest
DCLK CLKFB CLKO performance Xilinx Vertex™-4 FPGA, which is optimized for reduced power
(250 MHz) and superior signal integrity; and National’s ADC08D1500, which is best-in-
CLKIN CLK180
BUFG Global CLK180 class, low-power, 3 GSPS ADC.
Clock Buffer
The development platform, in a plastic enclosure, requires only a power
source and USB connection in order to collect and store data from any
input signal, and upload test results to a PC. The platform is designed with
CH-I [7:0] functional blocks, including the ADC and FPGA; the LVDS interconnect
ODD
[7:0] between the ADC and FPGA; analog input networks to the ADC using
CLKO
baluns and differential amplifiers; on-board system clocking using a PLL and
CH-I [7:0] VCO; complete power supply design; and temperature monitoring circuitry.
EVEN
[7:0] Each of these blocks can be reused by designers to significantly speed the
CLK180 development process.
I Channel
FIFO Data [7:0]
MUX
CH-Id [7:0] Memory The FPGA has several thousand unused gates, DSPs and memory which
[7:0] can be programmed for proprietary firmware development. A parallel bus
ODD
expansion port for easy connection to the FPGA I/O is available along with
CH-Id [7:0] a high speed logic analyzer header to aid debugging of designs. All of this
[7:0] allows designers to concurrently develop hardware and FPGA logic designs
EVEN
without having to select and test individual components or utilize external
test equipment.
To simplify this clocking requirement, FPGAs come equipped with digital clock
managers in the form of PLLs (Phase Locked Loop) or DLLs (Delay Locked
Loop). These devices allow clock signals to be generated internally that are
phase locked to an input clock, and offer phase delay taps of 0, 90, 180, and
270 degrees. This clock management feature allows a DDR clocking scheme
to work effectively by providing a precise 180 degree phase-shifted clock.
This in turn allows the incoming data synchronous to the falling edge to be
captured reliably into a data latch.
After being latched, the incoming data can be transferred to a FIFO memory or
Block RAM. From there the data can be easily retrieved by the system micro-
controller at a much slower speed for post-capture processing.
25
Pairing Amplifiers with ADCs for FPGA & CPLDs
National, a pioneer and industry leader in operational amplifiers, offers Driving High Speed ADCs
a complete porfolio of amplifier products, from building blocks to
application – specific standard products (ASSPs). National’s innovative Operational amplifier selection criteria:
LMH® high-speed amplifier family is ideal for applications such as video, • AC specifications usually are vital in high speed applications, e.g.
communications signal path and instrumentation. They are also necessary - Bandwidth, Power Bandwidth
for driving high-performance ADCs. - Slew rate
- Distortion
- Noise
Value Proposition - Settling time
• Operational amplifiers chosen must be able to maintain the ADC
performance, e.g.
VIP10® Process for Delivers Performance - Operational amplifier circuit SNR must be at least 6 dB higher
High speed operational amplifiers are used to provide the necessary signal than that of an ADC
conditioning on input signal before interfacing to the Analog to Digital - SFDR should be better than that of an ADC
Converters (ADCs). Based on National’s VIP10 high-speed, dielectrically- • The power consumption of the operational amplifier chosen should be
isolated, complimentary bipolar IC process, our LMH operational amplifiers considered in designing a portable system or a compact-sized system
provide optimal power-to-bandwidth performance, lower distortion and (for thermal dissipation reason)
reduced die size. • When driving ADC with differential input, operational amplifier with
differential outputs are recommended.
Operational Amplifier as Analog Signal

Processing Device
Signal sensor Analog

Input signal
processing ADC
To address the challenging requirements of high performance systems,

operational amplifiers are often chosen as the analog signal processing
devices for their relatively simple in circuit design, supreme performance
and the variety of choices. As systems become more digital, shifting
computational duties from continuous-time to clocked-circuit operation
becomes common. This requires more operational amplifiers than ever
before to bridge with the ADCs.
Basic Functions of Analog signal processing :

• Dynamic Range Adjust ➞ Level shifting/amplification/
AGC
• Single-ended to Differential ➞ Signal immunity
• Impedance matching ➞ Signal integrity/SNR
• Reduce the effects of capacitive ➞ Buffer/Drive
loading
• Remove unwanted signal components ➞ Filters
• I-V or V-I convertion ➞ Amplifier circuit topology/
device selection
26
National’s Amplifier products Low Voltage Low Power Operational Amplifiers
• Low Operating Voltage (Operating at 5V and below)
High Speed LMH® Operational Amplifiers • Low Power Consumption (Quiescent Current below 0.5 mA per Amp)
• High Bandwidth (up to GHz) • Low Noise
• Fast Slew rate • RRO and RRIO
• Fast Settling time • Shutdown Features
• Low Distortion • Miniature Package
• Low Noise
• Low Power Target Market Segments
• Professional Video Grade • Notebook, PDA
• Cable driver • Mobile Phone
• Portable Audio Device
Target Market Segments • Portable Consumer Products
• Automotive • Portable Medical Equipment
• Industrial • Portable Test and Measurement
• Medical Equipment
• Professional Video
• Multimedia Equipment
• Test and Measurement
• Communications
Precision LMP® Operational Amplifiers

• Low Offset Voltage
• Low Drift Over Temperature
• Low Input Bias Current
• High Open Loop Gain
• High CMRR
• High PSRR
• Low 1/f Noise
• Small Package
Target Market Segments

• Automotive
• Industrial
• Medical
• Test and Measurement
• Extended Operating
Temperature Range
(-40˚C to 125˚C)
27
Online Tools
WEBENCH® Online Design Tools

webench.national.com
• Power supply design

• Amplifier and active filter design
• Audio design
• Wireless design
• Data conversion design
Our design and prototyping environment simplifies and expedites the entire design
process.
1. Choose a part
2. Create a design
3. Analyze it
4. Build it and receive your custom prototype kit very soon
Packaging
National’s LLP® provides excellent power dissipation capability in a very small package footprint.
LLP Unlike conventional leaded plastic packages, the LLP contains pads on the bottom of the package for
(Leadless leadframe) PCB mounting.
JA 40 to 60º C/W
micro SMD SO PSOP-8

(Small outline SOT-223
(small and large bump) JA 43º C/W SOT-23
molded/ceramic) (Power surface mount)
JA 220 to 290º C/W JA 120 to 290º C/W
JA 100 to 190º C/W JA 60 to 110º C/W
TO-263 MSOP
TO-220 (Power surface mount) (Mini 8-lead) TSSOP
JA 45 to 65º C/W JA 35 to 60º C/W JA 220º C/W JA 40 to 150º C/W
For complete product

information and technical
assistance, please visit
our website at
www.national.com
or email:
ap.support@nsc.com
© National Semiconductor Corporation, September 2006. National Semiconductor, SIMPLE SWITCHER, SWITCHERS MADE SIMPLE LLP, VIPIO, WEBENCH, WebTHERM and are registered trademarks of
National Semiconductor Corporation. All other brand or product names are trademarks or registered trademarks of their respective holders.
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Analog Design Guide for Xilinx FPGAs

High-speed ADCs for

Pairing Amplifiers with

Online Tools ........................... 28

Description • Additionally, provides detailed and comprehensive power

To download this tool and view more information, visit:

For the most up-to-date information, see National’s Website: xilinx.national.com

Function: Step-down (VOUT < VIN)

Selected Synchronous Rectifier Buck Controllers

VCON Range 4.5 - 5.5V @2 mA 4.5 - 5.5V @2 mA 4.5 - 5.5V @2 mA 3 - 6V 3 - 6V 3 - 6V 3 - 5.5V 3 - 6V 3 - 6V

Current Limit 20A 20A 20A 25A 25A

Synchronization N N N N SEQ Optional Clock SEQ SEQ N

Reference Accuraccy 1.5% 1.5% 1.50% 2% Ext Ref 1.50% 1% 1% 1.50%

Sequencing and Tracking

Virtex Selection Table

Virtex-E Selection Table

Virtex-II Selection Table

Virtex-II Pro Selection Table

Virtex-4FX, SX, LX Selection Table

Spartan-II Selection Table

Spartan-IIE Selection Table

LM3670 (<350 mA) LM2671-3.3 (<500 mA) LM25010 (<1A)

**Suggested solutions are integrated regulators unless otherwise noted.

Spartan-3,-3E,-3L Selection Table

Voltage Supervisor and Power Sequencer Summary

Voltage References and Termination Voltage Regulators Summary

1 Least heat dissipation. Maximum conversion efficiency.

LM2743 Low Voltage N-Channel MOSFET Synchronous Buck 1 16 20 1000 Y TSSOP-14

LM4050 Precision Micropower Shunt Voltage Reference 0.015 SOT23-3

LM4132 Precision Low Dropout Voltage Reference 5.5 0.02 SOT-23

LM25010 COT Step-Down Switching Regulator 6 42 1 1000 TSSOP EXP PAD

National Semiconductor is the leader in innovation and solutions for high

Bring High-speed SerDes Capability to Low-cost

Interfacing to a Cylcone FPGA Increase Multipoint Backplane Performance

Backplane Stubs ASIC/ Problem

Simultaneous Switching Noise and Enhancing Solution

FPGA/ASIC DS90LV004 DS90LV004 FPGA/ASIC Boost FPGA Performance

Save Valuable FPGA Resources with National’s Data

and Clock Distribution Products

PP1 PP2 MO1 MO2 MO3 MO4 MP1

Xilinx FPGA + National Companion Interface Solutions

Buffers with Pre-Emphasis/Equalization (0 - 20 m)

Switches LVDS (up to 1.5 Gbps)

Virtex™ 4 (FX) Virtex 4 (LX & SX) Virtex Clock Distribution

Virtex™ 4 (FX) Virtex 4 (LX & SX) Virtex 10/100 Ethernet

One of the difficult areas in the development of any modern hardware

test bus not only enables a comprehensive life-cycle approach to system

SCANSTA101 The SCANSTA111 Multi-drop Addressable port JTAG allows speedy

Master scan chains. FLASH programming is accomplished by driving the necessary

Separate SCAN chain dramatically

IEEE 1149.1 “JTAG” Bus speeds programming!

the digital result then scanned through the JTAG port.

Total System Solution

Quickly Target & Reprogram FPGAs & Flash;

IEEE 1149.1 "JTAG" Bus

Remotely Manage, Diagnose, and Reconfigure System

Minimize the Rate of Data Transfer for

High-speed ADC with National’s LVDS technology is able to maximize the

Operational Amplifier as Analog Signal

Signal sensor Analog

To address the challenging requirements of high performance systems,

Basic Functions of Analog signal processing :

Precision LMP® Operational Amplifiers