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Convertidor DA Resistores binarias ponderadas y amplificador operacional Escaleras resistivas R /2R y amplificador operacional Convertidor AD Convertidor AD tipo contador con realimentacin Convertidor AD utilizando pendiente dual Convertidor AD de aproximaciones sucesivas Convertidor AD tipo flash o conversin simultanea paralela
The analog samples at the output of a D/A converter are usually fed to a sample-and-hold circuit to obtain the staircase waveform shown. This waveform can then be filtered to obtain the smooth waveform, shown in color. The time delay usually introduced by the filter is not shown.
Dr. L.Salazar MicroelectronicaMicroelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 3
Circuit implementation of switch Sm in the DAC of Fig. 9.41. In a BiCMOS technology, Qms and Qmr can be implemented using MOSFETs, thus avoiding the inaccuracy caused by the base current of BJTs.
Dr. L.Salazar MicroelectronicaMicroelectronic Circuits - Fifth Edition Sedra/Smith Copyright 2004 by Oxford University Press, Inc. 9
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Charge-redistribution A/D converter suitable for CMOS implementation: (a) sample phase, (b) hold phase, and (c) charge-redistribution phase.
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