GSM Based DC Motor Control

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM
NOVA COLLEGE OF ENGINEERING&TECHNOLOGY
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CHAPTER: 1 Introduction
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Introduction
A pulse width modulator (PWM) is a device that may be used as an efficient DC motor speed controller or light dimmer. his pro!ect is a versatile device that can control DC devices which draw up to a few amps of current. he circuit may be used in either "# or #$ %olt systems with only a few minor wiring changes. his device has been used to control the speed of the DC motor and to control brightness of an automotive tail lamp. A PWM circuit wor&s by ma&ing a s'uare wave with a variable on(to(off ratio) the average on time may be varied from * to "** percent. +n this manner) a variable amount of power is transferred to the load. he main advantage of a PWM circuit over a resistive power controller is the efficiency) at a ,*- level) the PWM will use about ,*of full power) almost all of which is transferred to the load) a resistive controller at ,*load power would consume about ."- of full power) ,*- of the power goes to the load and the other #"- is wasted heating the series resistor. /ne additional advantage of pulse width modulation is that the pulses reach the full supply voltage and will produce more tor'ue in a motor by being able to overcome the internal motor resistances more easily. +n this pro!ect) the DC motor speed and controlled !ust by sending predefined messages to the modem. interface. he user has to send predefined messages to vary the speed and direction of the motor to the modem. When the modem receives data (0M0)) it will intimate the same to the microcontroller. 1ow) the controller will read the modem2s received data by issuing certain A 3 commands. he he modem is interfaced with the microcontroller via serial
he modem is interfaced with the microcontroller through serial interface.
controller performs the corresponding action in accordance with the message received from the modem. he controller in return) sends a message to the user about the status of
NOVA COLLEGE OF ENGINEERING&TECHNOLOGY Page 3
the motor. "45# 6CD is connected at the controller section to display the speed level of the motor and the direction. 1.1 Ob !cti"! o# t$! %ro !ct he pro!ect intends to interface the microcontroller with the 70M modem and start the motor as per the message received from the user mobile. he pro!ect uses the 70M technology and 8mbedded 0ystems to design this application. he main ob!ective of this pro!ect is to design a system that continuously chec&s for the messages) if any) received from the mobile and if so) start or stop the motor accordingly. his pro!ect is a device that collects data from the mobile) codes the data into a format that can be understood by the controlling section. master. he ob!ective of the pro!ect is to develop a microcontroller based control system. +t consists of a 70M modem) microcontroller) the interfacing unit to allow the communication between the microcontroller and mobile and the motor and its driver unit. 1.& B'c()round o# t$! Pro !ct he software application and the hardware implementation help the microcontroller read the messages sent by the user from a mobile phone or send messages to the mobile phone through the modem. he measure of efficiency is based on how fast the microcontroller can detect the incoming message and start or stop the motor. system is totally designed using 70M and embedded systems technology. he Controlling unit has an application program to allow the microcontroller read the incoming data through the modem and change the status of the motor accordingly. he performance of the design is maintained by controlling unit. he his system also collects information from the master device and implements commands that are directed by the
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CHAPTER: &
O"!r"i!* o# t$! t!c$no+o)i!, u,!d
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E-b!dd!d S.,t!-,: An embedded system can be defined as a computing device that does a specific focused !ob. Appliances such as the air(conditioner) %CD player) D%D player) printer) fa9 machine) mobile phone etc. are e9amples of embedded systems. 8ach of these appliances will have a processor and special hardware to meet the specific re'uirement of the application along with the embedded software that is e9ecuted by the processor for meeting that specific re'uirement. he embedded software is also called :firm ware;. he des&top<laptop computer is a general purpose computer. =ou can use it for a variety of applications such as playing games) word processing) accounting) software development and so on. +n contrast) the software in the embedded systems is always fi9ed listed below> ? 8mbedded systems do a very specific tas&) they cannot be programmed to do different things. . 8mbedded systems have very limited resources) particularly the memory. 7enerally) they do not have secondary storage devices such as the CD@/M or the floppy dis&. 8mbedded systems have to wor& against some deadlines. A specific !ob has to be completed within a specific time. +n some embedded systems) called real(time systems) the deadlines are stringent. Missing a deadline may cause a catastrophe(loss of life or damage to property. 8mbedded systems are constrained for power. As many embedded systems operate through a battery) the power consumption has to be very low. ? 0ome embedded systems have to operate in e9treme environmental conditions such as very high temperatures and humidity. Aollowing are the advantages of 8mbedded 0ystems> ". #. hey are designed to do a specific tas& and have real time performance constraints which must be met. hey allow the system hardware to be simplified so costs are reduced.
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B.
hey are usually in the form of small computeriCed parts in larger devices which serve a general purpose.
T$! E"o+ution o# Mobi+! T!+!%$on! S.,t!-,

I! "#e ea$%& 1'()*+ ,-*" ,-./%e "e%e0#-!e *&*"e,* 1e$e a!a%-g $a"#e$ "#a! 2/g/"a%+ %/3e "-2a&4* !e1e$ *&*"e,*5 O!e 6#a%%e!ge 7a6/!g a!a%-g *&*"e,* 1a* "#e /!a./%/"& "- #a!2%e "#e g$-1/!g 6a0a6/"& !ee2* /! a 6-*" e77/6/e!" ,a!!e$5 A* a $e*8%"+ 2/g/"a% "e6#!-%-g& 1a* 1e%6-,e25
he advantages of digital systems over analog systems include ease of signaling) lower levels of interference) integration of transmission and switching and increased ability to meet capacity demands. he table below shows the worldwide development of mobile telephone systems.
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/!'r "DE" "DEB "DE, "DE4 "DD" "DD" "DD# "DD$ "DD, "DD4
Mobi+! S.,t!N-$2/6 M-./%e Te%e0#-!e :NMT; 45) A,e$/6a! M-./%e P#-!e S&*"e, :AMPS; T-"a% A66e** C-,,8!/6a"/-! S&*"e, :TACS; N-$2/6 M-./%e Te%e0#-!& :NMT; ')) A,e$/6a! D/g/"a% Ce%%8%a$ :ADC; G%-.a% S&*"e, 7-$ M-./%e C-,,8!/6a"/-! :GSM; D/g/"a% Ce%%8%a$ S&*"e, :DCS; 1()) Pe$*-!a% D/g/"a% Ce%%8%a$ :PDC; PCS 1'))<Ca!a2a PCS<U!/"e2 S"a"e*
T'b+!: Wor+d *id! d!"!+o%-!nt o# -obi+! t!+!%$on! ,.,t!-,
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CHAPTER: 0 H'rd*'r! I-%+!-!nt'tion o# t$! Pro !ct
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his chapter briefly e9plains about the Fardware +mplementation of the pro!ect. +t discusses the design and wor&ing of the design with the help of bloc& diagram and circuit diagram and e9planation of circuit diagram in detail. +t e9plains the features) timer programming) serial communication) interrupts of A ED0,# microcontroller. +t also e9plains the various modules used in this pro!ect. 0.1 Pro !ct D!,i)n he implementation of the pro!ect design can be divided in two parts. Fardware implementation Airmware implementation
Fardware implementation deals in drawing the schematic on the plane paper according to the application) testing the schematic design over the breadboard using the various +C2s to find if the design meets the ob!ective) carrying out the PCG layout of the schematic tested on breadboard) finally preparing the board and testing the designed hardware. he firmware part deals in programming the microcontroller so that it can control the operation of the +C2s used in the implementation. +n the present wor&) we have used the /rcad design software for PCG circuit design) the Heil IvB software development tool to write and compile the source code) which has been written in the C language. he firmware implementation is e9plained in the ne9t chapter. he pro!ect design and principle are e9plained in this chapter using the bloc& diagram and circuit diagram. he bloc& diagram discusses about the re'uired components of the design and wor&ing condition is e9plained using circuit diagram and system wiring diagram. he Proload programmer has been used to write this compile code into the microcontroller.
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0.1.1 B+oc( Di')r'- o# t$! Pro !ct 'nd it, D!,cri%tion he bloc& diagram of the design is as shown in Aig B.". +t consists of power supply unit) microcontroller) 70M modem) 0erial communication unit and 6CD. brief description of each unit is e9plained as follows. he
1i): B+oc( di')r'- #or GSM b',!d A)ricu+tur! #i!+d contro+
0.& Po*!r Su%%+.:

he input to the circuit is applied from the regulated power supply. he a.c. input i.e.) #B*% from the mains supply is step down by the transformer to "#% and is fed to a rectifier. he output obtained from the rectifier is a pulsating d.c voltage. 0o in order to get a pure d.c voltage) the output voltage from the rectifier is fed to a filter to remove any
a.c components present even after rectification. 1ow) this voltage is given to a voltage regulator to obtain a pure constant dc voltage.
Tr'n,#or-!r: Jsually) DC voltages are re'uired to operate various electronic e'uipment and these voltages are ,%) D% or "#%. Gut these voltages cannot be obtained directly. hus the a.c input available at the mains supply i.e.) #B*% is to be brought down to the re'uired voltage level. his is done by a transformer. hus) a step down transformer is employed to decrease the voltage to a re'uired level. R!cti#i!r: he output from the transformer is fed to the rectifier. +t converts A.C. into pulsating D.C. he rectifier may be a half wave or a full wave rectifier. +n this pro!ect) a bridge rectifier is used because of its merits li&e good stability and full wave rectification.
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1i+t!r: Capacitive filter is used in this pro!ect. +t removes the ripples from the output of rectifier and smoothens the D.C. /utput received from this filter is constant until the mains voltage and load is maintained constant. 2o+t')! r!)u+'tor: As the name itself implies) it regulates the input applied to it. A voltage regulator is an electrical regulator designed to automatically maintain a constant voltage level. +n this pro!ect) power supply of ,% and "#% are re'uired. +n order to obtain these voltage levels) .E*, and .E"# voltage regulators are to be used. he first number .E represents positive supply and the numbers *,) "# represent the re'uired output voltage levels.
0.0 Microcontro++!r,:
Microprocessors and microcontrollers are widely used in embedded systems products. Microcontroller is a programmable device. A microcontroller has a CPJ in addition to a fi9ed amount of @AM) @/M) +</ ports and a timer embedded all on a single chip. he fi9ed amount of on(chip @/M) @AM and number of +</ ports in microcontrollers ma&es them ideal for many applications in which cost and space are critical. he +ntel E*," is Farvard architecture) single chip microcontroller (IC) which was developed by +ntel in "DE* for use in embedded systems. +t was popular in the "DE*s and early "DD*s) but today it has largely been superseded by a vast range of enhanced devices with E*,"(compatible processor cores that are manufactured by more than #* independent manufacturers including Atmel) +nfineon +ntegrated Products. echnologies and Ma9im
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1!'tur!, o# AT34S5&> EH Gytes of @e(programmable Alash Memory. @AM is #,4 bytes. $.*% to ,.,% /perating @ange. Aully 0tatic /peration> * FC to BB MFC2s hree(level Program Memory 6oc&. #,4 9 E(bit +nternal @AM. B# Programmable +</ 6ines. hree "4(bit imer<Counters. 8ight +nterrupt 0ources. Aull Duple9 JA@ 0erial Channel. 6ow(power +dle and Power(down Modes. +nterrupt recovery from power down mode. Watchdog timer. Dual data pointer. Power(off flag. Aast programming time. Ale9ible +0P programming (byte and page mode).
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D!,cri%tion: he A EDs,# is a low(voltage) high(performance CM/0 E(bit microcomputer with EH bytes of Alash programmable memory. he device is manufactured using Atmel2s high density nonvolatile memory technology and is compatible with the industry(standard MC0(," instruction set. he on chip flash allows the program memory to be reprogrammed in system or by a conventional non volatile memory programmer. Gy combining a versatile E(bit CPJ with Alash on a monolithic chip) the Atmel A EDs,# is a powerful microcomputer) which provides a highly fle9ible and cost( effective solution to many embedded control applications.
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1i): Pin di')r'-
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1i): B+oc( di')r'-
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Pin d!,cri%tion: 2cc Pin $* provides supply voltage to the chip. he voltage source is K,%. GND Pin #* is the ground. Port 6 Port * is an E(bit open drain bidirectional +</ port. As an output port) each pin can sin& eight 6 inputs. When "s are written to port * pins) the pins can be used as high impedance inputs. Port * can also be configured to be the multiple9ed low(order address<data bus during accesses to e9ternal program and data memory. +n this mode) P* has internal pull(ups. Port * also receives the code bytes during Alash programming and outputs the code bytes during Program verification. 89ternal pull(ups are re'uired during program verification. Port 1 Port " is an E(bit bidirectional +</ port with internal pull(ups. he Port " output buffers can sin&<source four 6 inputs. When "s are written to Port " pins) they are pulled high by the internal pull(ups and can be used as inputs. As inputs) Port " pins that are e9ternally being pulled low will source current (++6) because of the internal pull(ups. +n addition) P".* and P"." can be configured to be the timer<counter # e9ternal count input (P".*< #) and the timer<counter # trigger input (P"."< #85)) respectively. Port &
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Port # is an E(bit bidirectional +</ port with internal pull(ups. he Port # output buffers can sin&<source four 6 inputs. When "s are written to Port # pins) they are pulled high by the internal pull(ups and can be used as inputs. As inputs) Port # pins that are e9ternally being pulled low will source current (++6) because of the internal pull(ups. Port # emits the high(order address byte during fetches from e9ternal program memory and during accesses to e9ternal data memory that uses "4(bit addresses (M/%5 L DP @). +n this application) Port # uses strong internal pull(ups when emitting "s. Port 0 Port B is an E(bit bidirectional +</ port with internal pull(ups. he Port B output buffers can sin&<source four 6 inputs. When "s are written to Port B pins) they are pulled high by the internal pull(ups and can be used as inputs. As inputs) Port B pins that are e9ternally being pulled low will source current (++6) because of the pull(ups. Port B receives some control signals for Alash programming and verification. Port B also serves the functions of various special features of the A ED0,#) as shown in the following table.
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RST R!,!t in%ut A high on this pin for two machine cycles while the oscillator is running resets the device. his pin drives high for DE oscillator periods after the Watchdog times out. he D+0@ / bit in 0A@ AJ5@ (address E8F) can be used to disable this feature. +n the default state of bit D+0@ /) the @808 F+7F out feature is enabled.
ALE7PROG: Addr!,, L'tc$ En'b+! (A68) is an output pulse for latching the low byte of the address during accesses to e9ternal memory. his pin is also the program pulse input (P@/7) during Alash programming. Pro)r'- Stor! En'b+! (P081) is the read strobe to e9ternal program memory. When the A ED0,# is e9ecuting code from e9ternal program memory) P081 is activated twice each machine cycle) e9cept that two P081 activations are s&ipped during each access to e9ternal data memory. EA72PP
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E8t!rn'+ Acc!,, En'b+! 8A must be strapped to 71D in order to enable the device to fetch code from e9ternal program memory locations starting at ****F up to AAAAF. 1ote) however) that if loc& bit " is programmed) 8A will be internally latched on reset. 8A should be strapped to %CC for internal program e9ecutions. his pin also receives the "#(volt programming enable voltage (%PP) during Alash programming. 9TAL1 +nput to the inverting oscillator amplifier and input to the internal cloc& operating circuit. 9TAL& /utput from the inverting oscillator amplifier. O,ci++'tor Conn!ction,
C") C# M B* pA N "* pA for Crystals M $* pA N "* pA for Ceramic @esonators
E8t!rn'+ C+oc( Dri"! Con#i)ur'tion
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5 A6" and 5 A6# are the input and output) respectively) of an inverting amplifier that can be configured for use as an on(chip oscillator. 8ither a 'uartC crystal or ceramic resonator may be used. o drive the device from an e9ternal cloc& source) 5 A6# should be left unconnected while 5 A6" is driven. here are no re'uirements on the duty cycle of the e9ternal cloc& signal) since the input to the internal cloc&ing circuitry is through a divide(by(two flip(flop) but minimum and ma9imum voltage high and low time specifications must be observed. S%!ci'+ 1unction R!)i,t!r, A map of the on(chip memory area called the 0pecial Aunction @egister (0A@) space is shown in the following table.+t should be noted that not all of the addresses are occupied and unoccupied addresses may not be implemented on the chip. @ead accesses to these addresses will in general return random data) and write accesses will have an indeterminate effect. Jser software should not write "s to these unlisted locations) since they may be used in future products to invo&e new features. +n that case) the reset or inactive values of the new bits will always be *. Ti-!r & R!)i,t!r,> Control and status bits are contained in registers #C/1 and #M/D for imer #. he register pair (@CAP#F) @CAP#6) is the Capture<@eload register for imer # in "4(bit capture mode or "4(bit auto(reload mode. Int!rru%t R!)i,t!r,: he individual interrupt enable bits are in the +8 register. wo priorities can be set for each of the si9 interrupt sources in the +P register. Du'+ D't' Point!r R!)i,t!r,> o facilitate accessing both internal and e9ternal data memory) two ban&s of "4(bit Data Pointer @egisters are provided> DP* at 0A@ address locations E#F(EBF and DP" at E$F
and E,F. Git DP0 M * in 0A@ AJ5@" selects DP* and DP0 M " selects DP". he user should A6WA=0 initialiCe the DP0 bit to the appropriate value before accessing the respective Data Pointer @egister. Po*!r O## 1+')> he Power /ff Alag (P/A) is located at bit $ (PC/1.$) in the PC/1 0A@. P/A is set to :"; during power up. +t can be set and rest under software control and is not affected by reset. M!-or. Or)'ni:'tion MC0(," devices have a separate address space for Program and Data Memory. Jp to 4$H bytes each of e9ternal Program and Data Memory can be addressed.
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Pro)r'- M!-or. +f the 8A pin is connected to 71D) all program fetches are directed to e9ternal memory. /n the A ED0,#) if 8A is connected to %CC) program fetches to addresses ****F through "AAAF are directed to internal memory and fetches to addresses #***F through AAAAF are to e9ternal memory. D't' M!-or. he A ED0,# implements #,4 bytes of on(chip @AM. he upper "#E bytes occupy a parallel address space to the 0pecial Aunction @egisters. his means that the upper "#E bytes have the same addresses as the 0A@ space but are physically separate from 0A@ space. When an instruction accesses an internal location above address .AF) the address mode used in the instruction specifies whether the CPJ accesses the upper "#E bytes of @AM or the 0A@ space. +nstructions which use direct addressing access the 0A@ space.
W'tc$do) Ti-!r ;On!<ti-! En'b+!d *it$ R!,!t<out=

he WD is intended as a recovery method in situations where the CPJ may be sub!ected to software upsets. he WD consists of a "$(bit counter and the Watchdog imer @eset (WD @0 ) 0A@. he WD is defaulted to disable from e9iting reset. o enable the WD ) a user must write *"8F and *8"F in se'uence to the WD @0 register (0A@ location *A4F). When the WD is enabled) it will increment every machine cycle while the oscillator is running. fre'uency. he WD timeout period is dependent on the e9ternal cloc& e9cept through reset here is no way to disable the WD
(either hardware reset or WD overflow reset). When WD overflows) it will drive an output @808 F+7F pulse at the @0 pin.
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UART
he Atmel E*," Microcontrollers implement three general purpose) "4(bit timers< counters. hey are identified as imer *) imer " and imer # and can be independently configured to operate in a variety of modes as a timer or as an event counter. When operating as a timer) the timer<counter runs for a programmed length of time and then issues an interrupt re'uest. When operating as a counter) the timer<counter counts negative transitions on an e9ternal pin. After a preset number of counts) the counter issues an interrupt re'uest. he various operating modes of each timer<counter are described in the following sections. A basic operation consists of timer registers F9 and 69 (9M *) ") connected in cascade to form a "4(bit timer. 0etting the run control bit ( @9) in C/1 register turns the timer on by allowing the selected input to increment 69. When 69 overflows it increments F9O when F9 overflows it sets the timer overflow flag ( A9) in C/1 register. 0etting the @9 does not clear the F9 and 69 timer registers. imer registers can be accessed to obtain the current count or to enter preset values. he C< control bit (in C/1 register) selects timer operation or counter operation) by selecting the divided(down peripheral cloc& or e9ternal pin 9 as the source for the counted signal. @9 bit must be cleared when changing the mode of operation) otherwise the behavior of the timer<counter is unpredictable. Aor timer operation (C< 9P M *)) the timer register counts the divided(down peripheral cloc&. he timer register is incremented once every peripheral cycle (4 peripheral cloc& periods). he timer cloc& rate is AP8@ < 4) i.e. A/0C < "# in standard mode or A/0C < 4 in 5# mode. Aor counter operation (C< 9P M ")) the timer register counts the negative transitions on the 9 e9ternal input pin. he e9ternal input is sampled every peripheral cycle. When the sample is high in one cycle and low in the ne9t one) the counter is incremented. he four operating modes are described below. imer #) has three modes of operation> Qcapture2) Qauto(reload2 and Qbaud rate generator2
Ti-!r 6
imer * functions as either a timer or event counter in four modes of operation. imer * is controlled by the four lower bits of the M/D register and bits *) ") $ and , of the C/1 register. M/D register selects the method of timer gating (7A 8*)) timer or counter operation ( <C*P) and mode of operation (M"* and M**). Aor normal timer operation (7A 8*M *)) setting @* allows 6* to be incremented by the selected input. 0etting 7A 8* and @* allows e9ternal pin +1 *P to control timer operation. Mod! 6 ;10<bit Ti-!r= Mode * configures timer * as a "B(bit timer which is set up as an E(bit timer ( F* register) with a modulo(B# prescaler implemented with the lower five bits of the Prescaler overflow increments the F* register. As the count rolls over from all "2s to all *2s) it sets the timer interrupt flag A*. he counted input is enabled to the imer when @* M " and either 7A 8 M * or +1 * M ". (0etting 7A 8 M " allows the imer to be controlled by e9ternal input +1 *) to facilitate pulse width measurements). @* is a control bit in the 0pecial Aunction register C/1. 7A 8 is in M/D. he "B(bit register consists of all E bits of F* and the lower , bits of 6*. he upper B bits of 6* are indeterminate and should be ignored. 0etting the run flag ( @*) does not clear the registers. Mod! 1 ;1><bit Ti-!r= Mode " is the same as Mode *) e9cept that the imer register is being run with all "4 bits. Mode " configures timer * as a "4(bit timer with the F* and 6* registers connected in cascade. he selected input increments the 6* register. Mod! & ;3<bit Ti-!r *it$ Auto<R!+o'd= 6* register. he upper three bits of 6* register are indeterminate and should be ignored.
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Mode # configures timer * as an E(bit timer ( 6* register) that automatically reloads from the F* register. 6* overflow sets A* flag in the C/1 register and reloads 6* with the contents of F*) which is preset by software. Mod! 0 ;T*o 3<bit Ti-!r,= Mode B configures timer * so that registers 6* and F* operate as separate E(bit timers. his mode is provided for applications re'uiring an additional E(bit timer or counter. 6* uses the timer * control bits C< *P and 7A 8* in the M/D register) and @* and A* in the C/1 register in the normal manner. Ti-!r 1 imer " is identical to timer *) e9cept for mode B) which is a hold(count mode. following comments help to understand the differences> R imer " functions as either a timer or event counter in three modes of operation. imer "2s mode B is a hold(count mode. R imer " is controlled by the four high(order bits of the M/D register and bits #) B) 4 and . of the C/1 register. he M/D register selects the method of timer gating (7A 8")) timer or counter operation (C< "P) and mode of operation (M"" and M*"). he C/1 register provides timer " control functions> overflow flag ( A")) run control bit ( @")) interrupt flag (+8") and interrupt type control bit (+ "). Mod! 6 ;10<bit Ti-!r= Mode * configures imer " as a "B(bit timer) which is set up as an E(bit timer ( F" 6" register) with a modulo(B# prescaler implemented with the lower , bits of the the F" register. he
register. he upper B bits of the 6" register are ignored. Prescaler overflow increments
Mod! 1 ;1><bit Ti-!r= Mode " configures imer " as a "4(bit timer with the F" and 6" registers connected
in cascade. he selected input increments the 6" register. Mod! & ;3<bit Ti-!r *it$ Auto R!+o'd= Mode # configures imer " as an E(bit timer ( 6" register) with automatic reload from the F" register on overflow. 6" overflow sets the A" flag in the C/1 register and reloads 6" with the contents of F") which is preset by software. he reload leaves F" unchanged. Mod! 0 ;H'+t= Placing imer " in mode B causes it to halt and hold its count. his can be used to halt imer " when @" run control bit is not available i.e.) when imer * is in mode B. Ti-!r & imer # is a "4(bit imer<Counter that can operate as either a timer or an event counter. he type of operation is selected by bit C< # in the 0A@ #C/1. imer # has three operating modes> capture) auto(reload (up or down counting)) and baud rate generator. he modes are selected by bits in #C/1. imer # consists of two E(bit registers) F# and 6#. +n the imer function) the 6# register is incremented every machine cycle. 0ince a machine cycle consists of "# oscillator periods) the count rate is "<"# of the oscillator fre'uency.
C'%tur! Mod!
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+n the capture mode) two options are selected by bit 8581# in #C/1. +f 8581# M *) imer # is a "4(bit timer or counter which upon overflow sets bit A# in #C/1. his bit can then be used to generate an interrupt. +f 8581# M ") imer # performs the same operation) but a "(to(* transition at e9ternal input #85 also causes the current value in F# and 6# to be captured into @CAP#F and @CAP#6) respectively. +n addition) the transition at #85 causes bit 85A# in #C/1 to be set. he 85A# bit) li&e A#) can generate an interrupt. Auto<r!+o'd ;U% or Do*n Count!r= imer # can be programmed to count up or down when configured in its "4(bit auto( reload mode. his feature is invo&ed by the DC81 (Down Counter 8nable) bit located in the 0A@ #M/D. Jpon reset) the DC81 bit is set to * so that timer # will default to count up. When DC81 is set) imer # can count up or down) depending on the value of the #85 pin.
T&MOD ? Ti-!r & Mod! Contro+ R!)i,t!r
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he above figure shows
imer # automatically counting up when DC81 M *. +n this
mode) two options are selected by bit 8581# in #C/1. +f 8581# M *) imer # counts up to *AAAAF and then sets the A# bit upon overflow. he overflow also causes the timer registers to be reloaded with the "4(bit value in @CAP#F and @CAP#6. B'ud R't! G!n!r'tor imer # is selected as the baud rate generator by setting C6H and<or @C6H in #C/1. 1ote that the baud rates for transmit and receive can be different if imer # is used for the receiver or transmitter and imer " is used for the other function. 0etting @C6H and<or C6H puts imer # into its baud rate generator mode. he baud rates in Modes " and B are determined by imer #2s overflow rate according to the following
he imer can be configured for either timer or counter operation. +n most applications) it is configured for timer operation (CP< # M *). he timer operation is different for imer # when it is used as a baud rate generator. 1ormally) as a timer) it increments every machine cycle (at "<"# the oscillator fre'uency). As a baud rate generator) however) it increments every state time (at "<# the oscillator fre'uency). given below. he baud rate formula is
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imer # as a baud rate generator is shown in the below figure. his figure is valid only if @C6H or C6H M " in #C/1. 1ote that a rollover in F# does not set A# and will not generate an interrupt. 1ote too) that if 8581# is set) a "( to(* transition in #85 will set 85A# but will not cause a reload from (@CAP#F) @CAP#6) to ( F#) 6#). hus) when imer # is in use as a baud rate generator) #85 can be used as an e9tra e9ternal interrupt.
Int!rru%t, he A ED0,# has a total of si9 interrupt vectors> two e9ternal interrupts (+1 * and +1 ")) three timer interrupts ( imers *) ") and #)) and the serial port interrupt. hese interrupts are all shown in the below figure. 8ach of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in 0pecial Aunction @egister +8. +8 also contains a global disable bit) 8A) which disables all interrupts at once. he below table shows that bit position +8.4 is unimplemented. Jser software should not write a " to this bit position) since it may be used in future A ED products. imer # interrupt is generated by the logical /@ of bits A# and 85A# in register
#C/1. 1either of these flags is cleared by hardware when the service routine is vectored to. +n fact) the service routine may have to determine whether it was A# or 85A# that generated the interrupt) and that bit will have to be cleared in software. Po*!r ,'"in) -od!, o# o%!r'tion : E*," has two power saving modes. hey are> ". +dle Mode #. Power Down mode. he two power saving modes are entered by setting two bits +D6 and PD in the special function register (PC/1) respectively. he structure of PC/1 register is as follows.
PC/1>
Address E.F
W'. to !8it Id+! Mod!: Activation of any enabled interrupt will clear PC/1.* bit and hence the +dle Mode is e9ited. he program goes to the +nterrupt 0ervice @outine (+0@). After @8 + is e9ecuted at the end of +0@) the ne9t instruction will start from the one following the instruction that enabled the +dle Mode. A hardware reset e9its the idle mode. he CPJ starts from the instruction following the instruction that invo&ed the +dle mode. Po*!r Do*n Mod!: he Power Down Mode is entered by setting the PD bit to ". he internal cloc& to the entire microcontroller is stopped. Fowever) the program is not dead. he Power down Mode is e9ited (PC/1." is cleared to *) by Fardware @eset only. he CPJ starts from the ne9t instruction where the Power down Mode was invo&ed.
St'tu, o# E8t!rn'+ Pin, Durin) Id+! 'nd Po*!r<do*n Mod!,
Pro)r'--in) A+)orit$-:
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Gefore programming the A ED0,#) the address) data) and control signals should be set up according to the :Alash Programming Modes;. following steps> ". +nput the desired memory location on the address lines. #. Activate the correct combination of control signals. B. @aise 8A<%PP to "#%. $. Pulse A68<P@/7 once to program a byte in the Alash array or the loc& bits. he byte write cycle is self(timed and typically ta&es no more than ,* Is ,) changing the address and data for the entire array or until the end of the ob!ect file is reached. D't' Po++in): he A ED0,# features Data Polling to indicate the end of a byte write cycle. During a write cycle) an attempted read of the last byte written will result in the complement of the written data on P*... /nce the write cycle has been completed) true data is valid on all outputs) and the ne9t cycle may begin. Data Polling may begin any time after a write cycle has been initiated. R!'d.7Bu,.: he progress of byte programming can also be monitored by the @D=<G0= output signal. PB.* is pulled low after A68 goes high during programming to indicate GJ0=. PB.* is pulled high again when programming is done to indicate @8AD= .Pro)r'- 2!ri#.:. +f loc& bits 6G" and 6G# have not been programmed) the o program the A ED0,#) ta&e the
programmed code data can be read bac& via the address and data lines for verification. he status of the individual loc& bits can be verified directly by reading them bac&.
3.4 Serial Communication:

he main re'uirements for serial communication are> ". Microcontroller #. PC B. @0 #B# cable $. MA5 #B# +C ,. Fyper erminal When the pins PB.* and PB." of microcontroller are set) JA@ which is inbuilt in the microcontroller will be enabled to start the serial communication. Ti-!r,: he E*," has two timers> microcontroller. Goth imer * and imer " are "4(bit wide. 0ince the E*," has an E(bit architecture) each "4(bit timer is accessed as two separate registers of low byte and high byte. 6ower byte register of imer * is 6* and higher byte is F*. 0imilarly lower byte imer * and imer ". hey can be used either as timers to
generate a time delay or as counters to count events happening outside the
register of imer" is 6" and higher byte register is F". TMOD ;ti-!r -od!= r!)i,t!r: Goth timers * and " use the same register M/D to set the various operation modes.
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M/D is an E(bit register in which the lower $ bits are set aside for imer * and the upper $ bits for imer ". +n each case) the lower # bits are used to set the timer mode and the upper # bits to specify the operation.
7A 8 8very timer has a means of starting and stopping. 0ome timers do this by software) some by hardware and some have both software and hardware controls. he timers in the E*," have both. he start and stop of the timer are controlled by the way of software by the @ (timer start) bits @* and @". hese instructions start and stop the timers as long as 7A 8M* in the register. C7T imer or counter selected. Cleared for timer operation and set for counter operation. M/D register. he hardware way of starting and stopping the timer by an e9ternal source is achieved by ma&ing 7A 8M" in the M/D
M1 Mode bit " M6

Mode bit * Mod! S!+!ction M1 * M6 * Mod! * O%!r'tin) Mod! "B(bit timer mode E(bit timer<counter F9 with 69 as ,(bit prescaler * " " "4(bit timer mode "4(bit timer<counters F9 and 69 are cascaded " * # E(bit auto reload timer<counter F9 holds a value that is to be reloaded into 69 each time it overflows " " B 0plit timer mode
he mode used here to generate a time delay is M/D8 #. his mode # is an E(bit timer and therefore it allows only values of **F to AAF to be loaded into the timer2s register F. After F is loaded with the E(bit value) the E*," give a copy of it to 6. When the timer starts) it starts to count up by incrementing the 6 register. +t counts up until it reaches its limit of AAF. When it rolls over from AAF to **F) it sets high the A (timer flag). +f imer * is used) A* goes high and if imer " is
used) A" goes high. When the 6 register rolls from AAF to * and A is set to ") 6 is reloaded automatically with the original value &ept by the F register.
A,.nc$ronou, 'nd S.nc$ronou, S!ri'+ Co--unic'tion Computers transfer data in two ways> parallel and serial. +n parallel data transfers) often E or more lines are used to transfer data to a device that is only a few feet away. +n serial communication) the data is sent one bit at a time. only a few wires. 0erial data communication uses two methods) asynchronous and synchronous. he synchronous method transfers a bloc& of data at a time) while the asynchronous method transfers a single byte at a time. With synchronous communications) the two devices initially synchroniCe themselves to each other) and then continually send characters to stay in sync. Asynchronous means Sno synchroniCationS) and thus does not re'uire sending and receiving idle characters. Fowever) the beginning and end of each byte of data must be identified by start and stop bits. he start bit indicates when the data byte is about to begin and the stop bit signals when it ends. he re'uirement to send these additional two bits causes asynchronous communication to be slightly slower than synchronous however it has the advantage that the processor does not have to deal with the additional idle characters. here are special +C chips made by many manufacturers for serial data communications. hese chips are commonly referred to as JA@ (universal asynchronous receiver(transmitter) and J0A@ (universal synchronous(asynchronous receiver(transmitter). he E*," has a built(in JA@ .
he E*," has serial
communication capability built into it) thereby ma&ing possible fast data transfer using
+n the asynchronous method) the data such as A0C++ characters are pac&ed between a start and a stop bit. he start bit is always one bit) but the stop bit can be one or two bits. framing. he rate of data transfer in serial data communication is stated as bps (bits per second). Another widely used terminology for bps is baud rate. he data transfer rate of a given computer system depends on communication ports incorporated into that system. RS&0& CABLE: o allow compatibility among data communication e'uipment) an interfacing standard called @0#B# is used. 0ince the standard was set long before the advent of the family) its input and output voltage levels are not used to convert the MA9 &0&: Ma9#B# +C is a specialiCed circuit which ma&es standard voltages as re'uired by @0#B# standards. his +C provides best noise re!ection and very reliable against discharges and short circuits. MA5#B# +C chips are commonly referred to as line drivers. o ensure data transfer between PC and microcontroller) the baud rate and voltage levels of Microcontroller and PC should be the same. he voltage levels of microcontroller are logic" and logic * i.e.) logic " is K,% and logic * is *%. Gut for PC) @0#B# voltage levels are considered and they are> logic " is ta&en as (B% to (#,% and logic * as KB% to K#,%. 0o) in order to e'ual these voltage levels) MA5#B# +C is used. hus this +C converts @0#B# voltage levels to microcontroller voltage levels SCON ;,!ri'+ contro+= r!)i,t!r:
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he start bit is always a * (low) and stop bit (s) is " (high).
his is called
6 logic
6 compatible. Aor this reason) to
connect any @0#B# to a microcontroller system) voltage converters such as MA5#B# are 6 logic levels to the @0#B# voltage levels and vice versa.
he 0C/1 register is an E(bit register used to program the start bit) stop bit and data bits of data framing.
0M* 0M" 0M# @81 GE @GE +
0C/1.. 0C/1.4 0C/1., 0C/1.$ 0C/1.B 0C/1.# 0C/1."
0erial port mode specifier 0erial port mode specifier Jsed for multiprocessor communication 0et<cleared by software to enable<disable reception 1ot widely used 1ot widely used ransmit interrupt flag. 0et by hardware at the beginning of the stop bit in mode ". Must be cleared by software.
@+
0C/1.*
@eceive interrupt flag. 0et by hardware at the beginning of the stop bit in mode ". Must be cleared by software.
SM6 * * " "
SM1 * " * " 0erial Mode * 0erial Mode ") E(bit data) " stop bit) " start bit 0erial Mode # 0erial Mode B
/f the four serial modes) only mode " is widely used. +n the 0C/1 register) when serial mode " is chosen) the data framing is E bits) " stop bit and " start bit) which ma&es it compatible with the C/M port of +GM< compatible PC2s. And the most important is
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serial mode " allows the baud rate to be variable and is set by imer " of the E*,". +n serial mode ") for each character a total of "* bits are transferred) where the first bit is the start bit) followed by E bits of data and finally " stop bit.
3651 Int!r#'c! *it$ 'n. E8t!rn'+ D!"ic!, u,in) S!ri'+ Co--unic'tion:
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0.5 GSM T!c$no+o).:

D!#inition o# GSM: 70M (7lobal 0ystem for Mobile communications) is an open) digital cellular technology used for transmitting mobile voice and data services. 70M (7lobal 0ystem for Mobile communication) is a digital mobile telephone system that is widely used in 8urope and other parts of the world. 70M uses a variation of ime Division Multiple Access ( DMA) and is the most widely used of the three digital wireless telephone technologies ( DMA) 70M) and CDMA). 70M digitiCes and compresses data) then sends it down a channel with two other streams of user data) each in its own time slot. +t operates at either the D** MFC or ")E** MFC fre'uency band. +t supports voice calls and data transfer speeds of up to D.4 &bit<s) together with the transmission of 0M0 (0hort Message 0ervice). Hi,tor. +n "DE#) the 8uropean Conference of Postal and elecommunications Administrations +n "DE.) a memorandum of (C8P ) created the 7roup 0pecial Mobile (70M) to develop a standard for a mobile telephone system that could be used across 8urope. understanding was signed by "B countries to develop a common cellular telephone system across 8urope. Ainally the system created by 0+1 8A lead by orleiv Maseng was selected. +n "DED) 70M responsibility was transferred to the 8uropean elecommunications
0tandards +nstitute (8 0+) and phase + of the 70M specifications were published in "DD*. he first 70M networ& was launched in "DD" by @adiolin!a in Ainland with !oint technical infrastructure maintenance from 8ricsson. Gy the end of "DDB) over a million subscribers were using 70M phone networ&s being operated by .* carriers across $E countries. As of the end of "DD.) 70M service was available in more than "** countries and has become the de facto standard in 8urope and Asia.
GSM 1r!@u!nci!, 70M networ&s operate in a number of different fre'uency ranges (separated into 70M fre'uency ranges for #7 and JM 0 fre'uency bands for B7). Most #7 70M networ&s operate in the D** MFC or "E** MFC bands. 0ome countries in the Americas (including Canada and the Jnited 0tates) use the E,* MFC and "D** MFC bands because the D** and "E** MFC fre'uency bands were already allocated. Most B7 70M networ&s in 8urope operate in the #"** MFC fre'uency band. he rarer $** and $,* MFC fre'uency bands are assigned in some countries where these fre'uencies were previously used for first(generation systems. 70M(D** uses ED*TD", MFC to send information from the mobile station to the base station (uplin&) and DB,TD4* MFC for the other direction (downlin&)) providing "#$ @A channels (channel numbers " to "#$) spaced at #** &FC. Duple9 spacing of $, MFC is used. +n some countries the 70M(D** band has been e9tended to cover a larger fre'uency range. his Ue9tended 70MU) 8(70M) uses EE*TD", MFC (uplin&) and D#,T D4* MFC (downlin&)) adding ,* channels (channel numbers D., to "*#B and *) to the original 70M(D** band. ime division multiple9ing is used to allow eight full(rate or si9teen half(rate speech channels per radio fre'uency channel. here are eight radio timeslots (giving eight burst periods) grouped into what is called a and the frame duration is $.4", ms. errestrial 70M networ&s now cover more than E*- of the world2s population. 70M satellite roaming has also e9tended service access to areas where terrestrial coverage is not available. DMA frame. Falf rate channels use alternate frames in the same timeslot. he channel data rate for all E channels is #.*.EBB Hbit<s)
Mobi+! T!+!%$on. St'nd'rd,:
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St'nd'rd G!n!r'tion 70M 7P@0 8D78 JM 0 1G #7 #.,7 #..,7 B7
1r!@u!nc. b'nd Allows transfer of voice or low( volume digital data. Allows transfer of voice or moderate(volume digital data. Allows simultaneous transfer of voice and digital data. Allows simultaneous transfer of voice and high(speed digital data.
T$rou)$%ut D.4 &bps #".$(".".# &bps $B.#(B$,.4 &bps D.4 &bps $E &bps "." &bps
BE$ *."$$(# Mbps &bps
he first generation of mobile telephony (written 1G) operated using analogue communications and portable devices that were relatively large. +t used primarily the following standards> AMPS (Advanced Mobile Phone 0ystem)) which appeared in "D.4 in the Jnited 0tates) was the first cellular networ& standard. +t was used primarily in the Americas) @ussia and Asia. his first(generation analogue networ& had wea& security mechanisms which allowed hac&ing of telephones lines. TACS ( otal Access Communication 0ystem) is the 8uropean version of the AMP0 model. Jsing the D** MFC fre'uency band) this system was largely used in 8ngland and then in Asia (Fong(Hong and Vapan). ETACS (89tended otal Access Communication 0ystem) is an improved version of the AC0 standard developed in the Jnited Hingdom that uses a larger number of communication channels. S!cond G!n!r'tion o# Mobi+! N!t*or(, ;&G=:
he second generation of mobile networ&s mar&ed a brea& with the first generation of cellular telephones by switching from analogue to digital. he main #7 mobile telephony standards are> 70M (Global System for Mobile communications) is the most commonly used standard in 8urope at the end of the #*th century and supported in the Jnited 0tates. his standard uses the D** MFC and "E** MFC fre'uency bands in 8urope. +n the Jnited 0tates) however) the fre'uency band used is the "D** MFC band. Portable telephones that are able to operate in 8urope and the Jnited 0tates are therefore called tri<b'nd. CDMA (Code Division Multiple Access) uses a spread spectrum techni'ue that allows a radio signal to be broadcast over a large fre'uency range. TDMA (Time Division Multiple Access) uses a techni'ue of time division of communication channels to increase the volume of data transmitted simultaneously. DMA technology is primarily used on the American continent) in 1ew Wealand and in the Asia(Pacific region. With the #7 networ&s) it is possible to transmit voice and low volume digital data) for e9ample te9t messages (SMS) for Short Message Service) or multimedia messages (MMS) for Multimedia Message Service). rate of D.4 &bps. 89tensions have been made to the 70M standard to improve throughput. /ne of these is the GPRS (General Packet adio System) service which allows theoretical data rates on the order of ""$ Hbit<s but with throughput closer to $* Hbit<s in practice. As this technology does not fit within the SB7S category) it is often referred to as &.5G he 70M standard allows a ma9imum data
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0G
he +M (#*** (!nternational Mobile Telecommunications for the year "###) specifications from the +nternational characteristics are> ". Figh transmission data rate. #. "$$ Hbps with total coverage for mobile use. B. BE$ Hbps with medium coverage for pedestrian use. $. # Mbps with reduced coverage area for stationary use. ,. World compatibility. 4. Compatibility of Brd generation mobile services with second generation networ&s. B7 offers data rates of more than "$$ Hbit<s) thereby allowing the access to multimedia uses such as video transmission) video(conferencing or high(speed internet access. B7 networ&s use different fre'uency bands than the previous networ&s> "EE,(#*#, MFC and #""*(##** MFC. he main B7 standard used in 8urope is called UMTS ($niversal Mobile Telecommunications System) and uses WCDMA (%ideband Code Division Multiple Access) encoding. JM 0 technology uses , MFC bands for transferring voice and data) with data rates that can range from BE$ Hbps to # Mbps. HSDPA (&igh Speed Downlink Packet Access) is a third generation mobile telephony protocol) (considered as SB.,7S)) which is able to reach data rates on the order of E to "* Mbps. F0DPA technology uses the , 7FC fre'uency band and uses WCDMA encoding. Introduction to t$! GSM St'nd'rd: he GSM (Global System for Mobile communications) networ& is at the start of the #"st century) the most commonly used mobile telephony standard in 8urope. +t is called as
elecommunications Jnion (+ J) defined the
characteristics of 0G (third generation of mobile telephony). he most important of these
0econd 7eneration (#7) standard because communications occur in an entirely digital mode) unli&e the first generation of portable telephones.
When it was first standardiCed in "DE#) it was called as Grou% S%!ci'+ Mobi+! and later) it became an international standard called AG+ob'+ S.,t!#or Mobi+! co--unic'tion,A in "DD". +n 8urope) the 70M standard uses the D** MFC and "E** MFC fre'uency bands. +n the Jnited 0tates) however) the fre'uency band used is the "D** MFC band. Aor this reason) portable telephones that are able to operate in both 8urope and the Jnited 0tates are called tri<b'nd while those that operate only in 8urope are called bi<b'nd. he 70M standard allows a ma9imum throughput of D.4 &bps which allows transmission of voice and low(volume digital data li&e te9t messages (SMS) for Short Message Service) or multimedia messages (MMS) for Multimedia Message Service).
GSM St'nd'rd,: 70M uses narrowband DMA) which allows eight simultaneous calls on the same radio fre'uency. here are three basic principles in multiple access) ADMA (Are'uency Division Multiple Access)) DMA ( ime Division Multiple Access)) and CDMA (Code Division Multiple Access). All three principles allow multiple users to share the same physical channel. Gut the two competing technologies differ in the way user sharing the common resource.
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DMA allows the users to share the same fre'uency channel by dividing the signal into different time slots. 8ach user ta&es turn in a round robin fashion for transmitting and receiving over the channel. Fere) users can only transmit in their respective time slot. CDMA uses a spread spectrum technology that is it spreads the information contained in a particular signal of interest over a much greater bandwidth than the original signal. Jnli&e DMA) in CDMA several users can transmit over the channel at the same time. TDMA in bri!#: +n late"DE*2s) as a search to convert the e9isting analog networ& to digital as a means to improve capacity) the cellular telecommunications industry association chose over ADMA. ime Division Multiple9 Access is a type of multiple9ing where two or more channels of information are transmitted over the same lin& by allocating a different time interval for the transmission of each channel. he most comple9 implementation using DMA principle is of 70M2s (7lobal 0ystem for Mobile communication). o reduce the effect of co(channel interference) fading and multipath) the 70M technology can use fre'uency hoping) where a call !umps from one channel to another channel in a short interval. DMA
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DMA systems still rely on switch to determine when to perform a handoff. Fandoff occurs when a call is switched from one cell site to another while travelling. he DMA handset constantly monitors the signals coming from other sites and reports it to the switch without caller2s awareness. he switch then uses this information for ma&ing better choices for handoff at appropriate times. DMA handset performs hard handoff) i.e.) whenever the user moves from one site to another) it brea&s the connection and then provides a new connection with the new site. Ad"'nt')!, o# TDMA: here are lots of advantages of DMA in cellular technologies. ". +t can easily adapt to transmission of data as well as voice communication. #. +t has an ability to carry 4$ &bps to "#* Mbps of data rates. intensive application such as multimedia and video conferencing. B. 0ince DMA technology separates users according to time) it ensures that there will be no interference from simultaneous transmissions. his allows the operator to do services li&e fa9) voice band data and 0M0 as well as bandwidth
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$. +t provides users with an e9tended battery life) since it transmits only portion of the time during conversations. 0ince the cell siCe grows smaller) it proves to save base station e'uipment) space and maintenance. DMA is the most cost effective technology to convert an analog system to digital. Di,'d"'nt')!, o# TDMA: /ne ma!or disadvantage using DMA technology is that the users has a predefined time slot. When moving from one cell site to other) if all the time slots in this cell are full the user might be disconnected. 6i&ewise) if all the time slots in the cell in which the user is currently in are already occupied) the user will not receive a dial tone. he second problem in DMA is that it is sub!ected to multipath distortion. o overcome this distortion) a time limit can be used on the system. /nce the time limit is e9pired) the signal is ignored.
T$! conc!%t o# c!++u+'r n!t*or( Mobile telephone networ&s are based on the concept of c!++,) circular Cones that overlap to cover a geographical area.
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Cellular networ&s are based on the use of a central transmitter(receiver in each cell) called a Sb',! ,t'tionS (or 'ase Transceiver Station) written BTS). he smaller the radius of a cell) the higher is the available bandwidth. 0o) in highly populated urban areas) there are cells with a radius of a few hundred meters) while huge cells of up to B* &ilometers provide coverage in rural areas. +n a cellular networ&) each cell is surrounded by 4 neighbouring cells (thus a cell is generally drawn as a he9agon). o avoid interference) ad!acent cells cannot use the same fre'uency. +n practice) two cells using the same fre'uency range must be separated by a distance of two to three times the diameter of the cell.
Arc$it!ctur! o# t$! GSM N!t*or( +n a 70M networ&) the user terminal is called a -obi+! ,t'tion. A mobile station is made up of a SIM (Subscriber !dentity Module) card allowing the user to be uni'uely identified and a mobile terminal.
he terminals (devices) are identified by a uni'ue ",(digit identification number called IMEI (!nternational Mobile ()uipment !dentity). 8ach 0+M card also has a uni'ue (and secret) identification number called IMSI (!nternational Mobile Subscriber !dentity). his code can be protected using a $(digit &ey called a P!* code. he 0+M card therefore allows each user to be identified independently of the terminal used during communication with a base station. Communications occur through a radio lin& (air interface) between a mobile station and a base station.
All the base stations of a cellular networ& are connected to a b',! ,t'tion contro++!r (BSC) which is responsible for managing distribution of the resources. he system consisting of the base station controller and its connected base stations is called the B',! St'tion Sub,.,t!- (BSS).
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Ainally) the base station controllers are themselves physically connected to the Mobi+! S*itc$in) C!ntr! (MSC)) managed by the telephone networ& operator) which connects them to the public telephone networ& and the +nternet. he M0C belongs to a N!t*or( St'tion Sub,.,t!- (NSS)) which is responsible for managing user identities) their location and establishment of communications with other subscribers. generally connected to databases that provide additional functions> ". he Ho-! Loc'tion R!)i,t!r (HLR) is a database containing information (geographic position) administrative information etc.) of the subscribers registered in the area of the switch (M0C). #. he 2i,itor Loc'tion R!)i,t!r (2LR) is a database containing information of users other than the local subscribers. he %6@ retrieves the data of a new user from the F6@ of the userUs subscriber Cone. he data is maintained as long as the user is in the Cone and is deleted when the user leaves or after a long period of inactivity (terminal off). B. $. ,. he E@ui%-!nt Id!nti#. R!)i,t!r (EIR) is a database listing the mobile terminals. he Aut$!ntic'tion C!ntr! (AUC) is responsible for verifying user identities. he cellular networ& formed in this way is designed to support mobility via management of handovers (movements from one cell to another). Ainally) 70M networ&s support the concept of ro'-in) i.e.) movement from one operator networ& to another. Introduction to Mod!-: he M0C is
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Mod!- ,t'nd, #or modulator-demodulator: A modem is a device or program that enables a computer to transmit data over telephone or cable lines. Computer information is stored digitally) whereas information transmitted over telephone lines is transmitted in the form of analog waves. A modem converts between these two forms. Aortunately) there is one standard interface for connecting e9ternal modems to computers called S+","- Conse'uently) any e9ternal modem can be attached to any computer that has an @0(#B# port) which almost all personal computers have. here are also modems that come as an e9pansion board that can be inserted into a vacant e9pansion slot. hese are sometimes called onboard or internal modems. 0ome) li&e CC+ %.B$ are official standards) while others have been developed by
private companies. Most modems have built(in support for the more common protocols at slow data transmission speeds at least) most modems can communicate with each other. At high transmission speeds) however) the protocols are less standardiCed. B%,: Fow fast the modem can transmit and receive data. At slow rates) modems are measured in terms of baud rates. he slowest rate is B** baud (about #, cps). At higher speeds) modems are measured in terms of bits per second (bps). he fastest modems run at ,.)4** bps) although they can achieve even higher data transfer rates by compressing the data. /bviously) the faster the transmission rate) the faster the data can be sent and received. +t should be noted that the data cannot be received at a faster rate than it is being sent. 2oic!7d't': Many modems support a switch to change between voice and data modes. +n data mode) the modem acts li&e a regular modem. +n voice mode) the
modem acts li&e a regular telephone. Modems that support a voice<data switch have a built(in loudspea&er and microphone for voice communication. Auto<'n,*!r: An auto(answer modem enables the computer to receive calls in the absence of the operator. D't' co-%r!,,ion: 0ome modems perform data compression) which enables them to send data at faster rates. Fowever) the modem at the receiving end must be able to decompress the data using the same compression techni'ue. 1+',$ -!-or.: 0ome modems come with flash memory rather than conventional @/M which means that the communications protocols can be easily updated if necessary. 1'8 c'%'bi+it.: Most modern modems are fa9 modems) which mean that they can send and receive fa9es.
GSM Mod!-: A 70M modem is a wireless modem that wor&s with a 70M wireless networ&. A wireless modem behaves li&e a dial(up modem. he main difference between them is that a dial(up modem sends and receives data through a fi9ed telephone line while a wireless modem sends and receives data through radio waves.
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A 70M modem can be an e9ternal device or a PC Card < PCMC+A Card. ypically) an e9ternal 70M modem is connected to a computer through a serial cable or a J0G cable. 6i&e a 70M mobile phone) a 70M modem re'uires a 0+M card from a wireless carrier in order to operate. A 0+M card contains the following information> 0ubscriber telephone number (M0+0D1) +nternational subscriber number (IMSIB Int!rn'tion'+ Mobi+! Sub,crib!r Id!ntit.= 0tate of the 0+M card 0ervice code (operator) Authentication &ey P+1 (Personal !dentification Code) PJH (Personal $nlock Code)
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he number of 0M0 messages that can be processed by a 70M modem per minute is very low i.e.) about 4 to "* 0M0 messages per minute.
Introduction to AT Co--'nd, A commands are instructions used to control a modem. A is the abbreviation of A tention. 8very command line starts with SA S or SatS. commands are called A hatUs the reason) modem commands. Many of the commands that are used to control
wired dial(up modems) such as A D (Dial)) A A (Answer)) A F (Foo& control) and
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A / (@eturn to online data state) are also supported by 70M modems and mobile phones. 0ome of the tas&s that can be done using A mobile phone are listed below> 7et basic information about the mobile phone or 70M modem. Aor e9ample) name of manufacturer (A KC7M+)) model number (A KC7MM)) +M8+ number (+nternational Mobile 8'uipment +dentity) (A KC701) and software version (A KC7M@). 7et basic information about the subscriber. Aor e9ample) M0+0D1 (A KC1JM) and +M0+ number (+nternational Mobile 0ubscriber +dentity) (A KC+M+). 7et the current status of the mobile phone or 70M<7P@0 modem. Aor e9ample) mobile phone activity status (A KCPA0)) mobile networ& registration status (A KC@87)) radio signal strength (A KC0X)) battery charge level and battery charging status (A KCGC). 8stablish a data connection or voice connection to a remote modem (A D) A A) etc). 0end and receive fa9 (A D) A A) A KAY). 0end (A KCM70) A KCM00)) read (A KCM7@) A KCM76)) write (A KCM7W) or delete (A KCM7D) 0M0 messages and obtain notifications of newly received 0M0 messages (A KC1M+). @ead (A KCPG@)) write (A KCPGW) or search (A KCPGA) phoneboo& entries. commands with a 70M modem or
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Perform security(related tas&s) such as opening or closing facility loc&s (A KC6CH)) chec&ing whether a facility is loc&ed (A KC6CH) and changing passwords(A KCPWD). 0ave and restore configurations of the mobile phone or 70M<7P@0 modem. Aor e9ample) save (A KC0A0) and restore (A KC@80) settings related to 0M0 messaging such as the 0M0 center address. +t should be noted that the mobile phone manufacturers usually do not implement all A commands) command parameters and parameter values in their mobile phones. Also) the behavior of the implemented A commands may be different from that defined in the standard. +n general) 70M modems) designed for wireless applications) have better support of A commands than ordinary mobile phones. B',ic conc!%t, o# SMS t!c$no+o). 1. 2'+idit. P!riod o# 'n SMS M!,,')! An 0M0 message is stored temporarily in the 0M0 center if the recipient mobile phone is offline. +t is possible to specify the period after which the 0M0 message will be deleted from the 0M0 center so that the 0M0 message will not be forwarded to the recipient mobile phone when it becomes online. his period is called the validity period. A mobile phone should have a menu option that can be used to set the validity period. After setting it) the mobile phone will include the validity period in the outbound 0M0 messages automatically. &. M!,,')! St'tu, R!%ort, 0ometimes the user may want to &now whether an 0M0 message has reached the recipient mobile phone successfully. o get this information) you need to set a flag in the 0M0 message to notify the 0M0 center that a status report is re'uired about the delivery
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of this 0M0 message. he status report is sent to the user mobile in the form of an 0M0 message.
0. M!,,')! Sub-i,,ion R!%ort, After leaving the mobile phone) an 0M0 message goes to the 0M0 center. When it reaches the 0M0 center) the 0M0 center will send bac& a message submission report to the mobile phone to inform whether there are any errors or failures (e.g. incorrect 0M0 message format) busy 0M0 center) etc). +f there is no error or failure) the 0M0 center sends bac& a positive submission report to the mobile phone. /therwise it sends bac& a negative submission report to the mobile phone. he mobile phone may then notify the user that the message submission was failed and what caused the failure. C. M!,,')! D!+i"!r. R!%ort, After receiving an 0M0 message) the recipient mobile phone will send bac& a message delivery report to the 0M0 center to inform whether there are any errors or failures (e9ample causes> unsupported 0M0 message format) not enough storage space) etc). his process is transparent to the mobile user. +f there is no error or failure) the recipient mobile phone sends bac& a positive delivery report to the 0M0 center. /therwise it sends bac& a negative delivery report to the 0M0 center.
0.> ELECTRIC MOTORS: 8lectric motors are used to efficiently convert electrical energy into mechanical energy. Magnetism is the basis of their principles of operation. create these amaCing machines.
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hey use permanent
magnets) electromagnets) and e9ploit the magnetic properties of materials in order to
here are several types of electric motors available today. he following outline gives an overview of several popular ones. here are two main classes of motors> AC and DC. AC motors re'uire an alternating current or voltage source (li&e the power coming out of the wall outlets in your house) to ma&e them wor&. DC motors re'uire a direct current or voltage source (li&e the voltage coming out of batteries) to ma&e them wor&. Jniversal motors can wor& on either type of power. 1ot only is the construction of the motors different) but the means used to control the speed and tor'ue created by each of these motors also varies) although the principles of power conversion are common to both. Motors are used !ust about everywhere. +n our house) there is a motor in the furnace for the blower) for the inta&e air) in the sump well) dehumidifier) in the &itchen in the e9haust hood above the stove) microwave fan) refrigerator compressor and cooling fan) can opener) garbage disposer) dish washer pump) cloc&s) computer fans) ceiling fans) and many more items. +n industry) motors are used to move) lift) rotate) accelerate) bra&e) lower and spin material in order to coat) paint) punch) plate) ma&e or form steel) film) paper) tissue) aluminum) plastic and other raw materials. hey range in power ratings from less than "<"** hp to over "**)*** hp. rotate as slowly as *.**" rpm to over "**)*** rpm. small as the head of a pin to the siCe of a locomotive engine. W$'t $'%%!n, *$!n ' *ir! c'rr.in) curr!nt i, *it$in ' -')n!tic #i!+dD he
hey range in physical siCe from as
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his is the L!#t H'nd Ru+! for motors. he #ir,t #in)!r points in the direction of the -')n!tic #i!+d (first ( field)) which goes from the 1orth pole to the 0outh pole. he ,!cond #in)!r points in the direction of the curr!nt in the wire (second ( current). he t$u-b then points in the direction the wire is t$ru,t or pushed while in the magnetic field (thumb ( tor'ue or thrust). 0o) when a wire carrying current is perpendicular to a magnetic field) a force is created on the wire causing it to move perpendicular to the field and direction of current. he greater the current in the wire) or the greater the magnetic field) the faster the wire moves because of the greater force created. +f the current in the wire is parallel to the magnetic field) there will be no force on the wire.
DC Motor,:
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DC motors are fairly simple to understand. re'uire a battery or dc supply to ma&e them run.
hey are also simple to ma&e and only
A simple motor has si9 parts) as shown in the diagram below>

Ar-'tur! or rotor Co--ut'tor Bru,$!, A8+! 1i!+d -')n!t DC %o*!r ,u%%+. of some sort
An electric motor is all about magnets and magnetism> A motor uses -')n!t, to create motion. +f you have ever played with magnets you &now about the fundamental law of all magnets> /pposites attract and li&es repel. 0o if you have two bar magnets with their ends mar&ed SnorthS and Ssouth)S then the north end of one magnet will attract the south end of the other. /n the other hand) the north end of one magnet will repel the north end of the other (and similarly) south will repel south). +nside an electric motor) these attracting and repelling forces create rot'tion'+ -otion.
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he armature (or rotor) is an electromagnet) while the field magnet is a permanent magnet (the field magnet could be an electromagnet as well) but in most small motors it is not in order to save power). When you put all of these parts together) here is a complete electric motor>
Page 4
+n the above figure) the armature winding has been left out so that it is easier to see the commutator in action. he &ey thing to notice is that as the armature passes through the horiContal position) the poles of the electromagnet flip. Gecause of the flip) the north pole of the electromagnet is always above the a9le so it can repel the field magnetUs north pole and attract the field magnetUs south pole. 8ven a small electric motor contains the same pieces described above> two small permanent magnets) a commutator) two brushes) and an electromagnet made by winding wire around a piece of metal. +t is possible to have any number of poles) depending on the siCe of the motor and the specific application it is being used in.
T.%!, o# Motor,:
S%+it P$',!: he split phase motor is mostly used for Smedium startingS applications. +t has start and run windings) both are energiCed when the motor is started. When the motor reaches about .,- of its rated full load speed) the starting winding is disconnected by an automatic switch. U,!,: his motor is used where stops and starts are somewhat fre'uent. Common applications of split phase motors include> fans) blowers) office machines and tools such as small saws or drill presses where the load is applied after the motor has obtained its operating speed. C'%'citor St'rt his motor has a capacitor in series with a starting winding and provides more than double the starting tor'ue with one third less starting current than the split phase
motor. Gecause of this improved starting ability) the capacitor start motor is used for loads which are hard to start. +t has good efficiency and re'uires starting currents of appro9imately five times full load current. of its rated full load speed. U,!,: Common uses include> compressors) pumps) machine tools) air conditioners) conveyors) blowers) fans and other hard to start applications. Hor,!%o*!r E RPM: Hor,!%o*!r: 8lectric motors are rated by horsepower) the home shop will probably utiliCe motors from "<$ FP for small tools and up to , FP on air compressors. 1ot all motors are rated the same) some are rated under load) others as pea& horsepower and hence we have , FP compressors with huge motors and , Fp shopvacs with tiny little motors. Jnfortunately all , FP compressor motors are not e'ual in actual power either) to !udge the true horsepower the easiest way is to loo& at the amperage of the motor. 8lectric motors are not efficient) most have a rating of about ,*- due to factors such as heat and friction and some may be as high as .*-. his chart will give a basic idea of the true horse power rating compared to the ampere rating. Motors with a higher efficiency rating will draw fewer amps) for e9ample a , FP motor with a ,*- efficiency rating will draw about B# amps at #B* %AC compared to about #B amps for a motor with a .*- rating. he capacitor and starting windings are disconnected from the circuit by an automatic switch when the motor reaches about .,-
TRUE HP Z
AMPS 't 1152AC B.# ( #.B
AMPS 't &06 2AC ".4 (".#

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"<B [ \ " "[ # ,
$.B ( B." 4., ( $.4 D..( ..* "B.* ( D.B "D., ( "B.D #,.D ( "E., 4$.D ( $4.B
#.# ( "., B.# ( #.B $.D ( B., 4., ( $.4 D.. ( ..* "B.* ( D.B B#.$ ( #B.#
A 'uic& general calculation when loo&ing at a motor is " FP M "* amps on ""* volts and " FP M , amps on ##* volts. RPM he shaft on a typical shop motor will rotate at either ".#, or B$,* @PM (revolutions per minute). he speed of the driven machine will be determined by the siCe of pulleys used) for e9ample a B$,* @PM motor can be replaced by a ".,* @PM motor if the diameter of the pulley on the motor is doubled. he opposite is true as well but if the pulley on the ".,* @PM motor is small it is not always possible to replace it with one half the siCe.
P$',!B 2o+t')! E Rot'tion: Whether or not you can use a motor will li&ely depend on these factors. Sin)+! P$',!:
/rdinary household wiring is single phase) alternating current. 8ach cycle pea&s and dips as shown. o run a three phase motor a phase converter must be used) usually this is not practical) it is often less e9pensive to change the motor on a machine to a single phase style.
T$r!! P$',!: his is used in industrial shops) rather than pea&s and valleys the current supply is more even because of the other two cycles each offset by "#* degrees.
2o+t')!: Many motors are dual voltage i.e.) by simply changing the wiring configuration) they can be run on ""* volts or ##* volts. Motors usually run better on ##* volts) especially if there is any line loss because of having to use a long wire to reach the power supply. Motors are available for both AC and DC current) our typical home wiring will be AC. here are DC converters available which are used in applications where the speed of the motor is controlled.
Rot'tion: he direction the shaft rotates can be changed on most motors by switching the right wires. he direction of rotation is usually determined by viewing the motor from the shaft end and is designated as CW (cloc&wise) or CCW (counter(cloc&wise).
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0.F L&40D< CURRENT DRI2ER CHIP
Pin di')r'1EATURES Wide 0upply(%oltage @ange> $., % to B4 % 0eparate +nput(6ogic 0upply +nternal 80D Protection hermal 0hutdown Figh(1oise(+mmunity +nputs Aunctionally 0imilar to 070 6#DB and 070 6#DBD /utput Current " A Per Channel (4** mA for 6#DBD) Pea& /utput Current # A Per Channel (".# A for 6#DBD) /utput Clamp Diodes for +nductive ransient 0uppression (6#DBD)
DESCRIPTION: he 6#DB and 6#DBD are 'uadruple high(current half(F drivers. he 6#DB is
designed to provide bidirectional drive currents of up to " A at voltages from $., % to B4 %. he 6#DBD is designed to provide bidirectional drive currents of up to 4**(mA at voltages from $., % to B4 %. Goth devices are designed to drive inductive loads such as
NOVA COLLEGE OF ENGINEERING&TECHNOLOGY Page '
relays) solenoids) dc and bipolar stepping motors) as well as other high(current<high( voltage loads in positive(supply applications. All inputs are 6 compatible. 8ach output is a complete totem(pole drive circuit)
with a Darlington transistor sin& and a pseudo( Darlington source. Drivers are enabled in pairs) with drivers " and # enabled by ")#81 and drivers B and $ enabled by B)$81. When an enable input is high) the associated drivers are enabled and their outputs are active and in phase with their inputs. When the enable input is low) those drivers are disabled and their outputs are off and in the high(impedance state. With the proper data inputs) each pair of drivers forms a full(F (or bridge) reversible drive suitable for solenoid or motor applications. /n the 6#DB) e9ternal high(speed output clamp diodes should be used for inductive transient suppression. A %CC" terminal) separate from %CC#) is provided for the logic inputs to minimiCe device power dissipation. he 6#DB and 6#DBD are characteriCed for operation from * to .* degree Celsius.
BLOCG DIAGRAM
Page 9)
LOGIC DIAGRAM
Page 91
his chip contains $ enable pins. 8ach enable pin corresponds to # inputs. Gased on the input values given) the device connected to this +C wor&s accordingly.
L&40D Int!r#'cin) *it$ 3651:
Page 92
C$'%t!r C 1ir-*'r! I-%+!-!nt'tion o# t$! %ro !ct d!,i)n
his chapter briefly e9plains about the firmware implementation of the pro!ect. he re'uired software tools are discussed in section $.#. 0ection $.B shows the flow
Page 93
diagram of the pro!ect design. 0ection $.$ presents the firmware implementation of the pro!ect design. C.1 So#t*'r! Too+, R!@uir!d Heil IvB) Proload are the two software tools used to program microcontroller. he wor&ing of each software tool is e9plained below in detail. C.1.1 Pro)r'--in) Microcontro++!r A compiler for a high level language helps to reduce production time. o program the A ED0,# microcontroller the Heil IvB is used. he programming is done strictly in the embedded C language. Heil IvB is a suite of e9ecutable) open source software development tools for the microcontrollers hosted on the Windows platform. he compilation of the C program converts it into machine language file (.he9). his is the only language the microcontroller will understand) because it contains the original program code converted into a he9adecimal format. During this step there are some warnings about eventual errors in the program. his is shown in Aig $.". +f there are no errors and warnings then run the program) the system performs all the re'uired tas&s and behaves as e9pected the software developed. +f not) the whole procedure will have to be repeated again. Aig $.# shows e9pected outputs for given inputs when run compiled program.
/ne of the difficulties of programming microcontrollers is the limited amount of resources the programmer has to deal with. +n personal computers resources such as @AM and processing speed are basically limitless when compared to microcontrollers. +n contrast) the code on microcontrollers should be as low on resources as possible.
G!i+ Co-%i+!r:
Heil compiler is software used where the machine language code is written and compiled. After compilation) the machine source code is converted into he9 code which is to be dumped into the microcontroller for further processing. Heil compiler also supports C language code.
1i) C.1: Co-%i+'tion o# ,ourc! Cod!
Page 95
1i) C.&: Run t$! co-%i+!d %ro)r'Pro+o'd: Proload is software which accepts only he9 files. /nce the machine code is converted into he9 code) that he9 code has to be dumped into the microcontroller and this is done by the Proload. Proload is a programmer which itself contains a microcontroller in it other than the one which is to be programmed. his microcontroller has a program in it written in such a way that it accepts the he9 file from the Heil compiler and dumps this he9 file into the microcontroller which is to be programmed. +t should be noted that this programmer &it contains a power supply section in the board itself but in order to switch on that power supply) a source is re'uired. hus this is accomplished from the power supply board with an output of "#volts.
Page 9
1i) C.0: At-!+ AT34C&651 D!"ic! %ro)r'--!r 1!'tur!,:

0upports ma!or Atmel ED series devices Auto +dentify connected hardware and devices 8rror chec&ing and verification in(built 6oc& of programs in chip supported to prevent program copying #* and $* pin W+A soc&et on(board Auto 8rase before writing and Auto %erify after writing +nformative status bar and access to latest programmed file 0imple and 8asy to use Wor&s on ,.4** speed
D!,cri%tion +t is simple to use and low cost) yet powerful flash microcontroller programmer for the Atmel ED series. +t will Program) @ead and %erify Code Data) Write 6oc& Gits) 8rase and Glan& Chec&. All fuse and loc& bits are programmable. his programmer has intelligent onboard firmware and connects to the serial port. All devices have signature bytes that the programmer reads to automatically identify the chip. 1o need to select the device type) !ust plug it in and go] All devices also have a number of loc& bits to provide
various levels of software and programming protection. All the programming UintelligenceU is built into the programmer so you do not need any special hardware to run it. Programmer comes with window based software for easy programming of the devices.
Page 9(
Pro)r'--in) So#t*'r! Computer side software called HPro+o'd 2C.1H is e9ecuted that accepts the +ntel F85 format file generated from compiler to be sent to target microcontroller. +t auto detects the hardware connected to the serial port. +t also auto detects the chip inserted and bytes used. 0oftware is developed in Delphi . and re'uires no overhead of any e9ternal D66.
1i) C.C: Writin) t$! %ro)r'-, b.t!, onto t$! -icrocontro++!r
Page 9'
C$'%t!r 5 R!,u+t, 'nd Di,cu,,ion,
Page ()
5.1 R!,u+t, Assemble the circuit on the PCG as shown in Aig ,.". After assembling the circuit on the PCG) chec& it for proper connections before switching on the power supply. 5.& Conc+u,ion he implementation of 70M based DC motor control using microcontroller is done successfully. he communication is properly done without any interference between different modules in the design. Design is done to meet all the specifications and re'uirements. 0oftware tools li&e Heil Jvision 0imulator) Proload to dump the source code into the microcontroller) /rcad 6ite for the schematic diagram have been used to develop the software code before realiCing the hardware. he performance of the system is more efficient. Continuously reading the signal from the modem) read the message if any and change the status of the motor is the main !ob carried out by the microcontroller. microcontroller. Circuit is implemented in /rcad and implemented on the microcontroller board. he performance has been verified both in software simulator and hardware design. he total circuit is completely verified functionally and is following the application software. +t can be concluded that the design implemented in the present wor& provide portability) fle9ibility and the data transmission is also done with low power consumption. he mechanism is controlled by the
Wor(in) %roc!dur!:
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DC motor control using 70M is carried out in a very efficient way. he user has to send predefined messages from his mobile to the controlling unit. he controlling unit consists of a microcontroller) 70M modem) circuitry to allow the serial communication between the microcontroller and modem and the motor unit. Whenever the user sends a predefined message to the controlling unit) the modem receives this and passes the data to the microcontroller. he microcontroller upon reading this data) starts or stops the motor as per the re'uest sent by the user. he system can also send a message as a confirmation reply to the user mobile. 0ince the DC motor re'uires more current for its functioning) the microcontroller cannot handle the motor and cannot provide the re'uired current to the motor) a current driver +C 6#DBD is used as an interface between the microcontroller and the DC motor. hus) the status of the motor can be changed within no time using the concepts of 70M.
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GSM Based DC Motor Control

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GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

he modem is interfaced with the microcontroller through serial interface.

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

O"!r"i!* o# t$! t!c$no+o)i!, u,!d

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

T$! E"o+ution o# Mobi+! T!+!%$on! S.,t!-,

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GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

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NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

CHAPTER: 0 H'rd*'r! I-%+!-!nt'tion o# t$! Pro !ct

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GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

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GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

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NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

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NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

C") C# M B* pA N "* pA for Crystals M $* pA N "* pA for Ceramic @esonators

E8t!rn'+ C+oc( Dri"! Con#i)ur'tion

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

W'tc$do) Ti-!r ;On!<ti-! En'b+!d *it$ R!,!t<out=

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

NOVA COLLEGE OF ENGINEERING&TECHNOLOGY

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

GSM BASED DC MOTOR SPEED AND DIRECTION CONTROL USING PWM

St'tu, o# E8t!rn'+ Pin, Durin) Id+! 'nd Po!r<don Mod!,