a

FEATURES DC PERFORMANCE 25 V max Offset Voltage (AD705T) 0.6 V/C max Drift (AD705K/T) 100 pA max Input Bias Current (AD705K) 600 pA max IB Over MIL Temperature Range (AD705T) 114 dB min CMRR (AD705K/T) 114 dB min PSRR (AD705T) 200 V/mV min Open Loop Gain 0.5 V p-p typ Noise, 0.1 Hz to 10 Hz 600 A max Supply Current AC PERFORMANCE 0.15 V/ s Slew Rate 800 kHz Unity Gain Crossover Frequency 10,000 pF Capacitive Load Drive Capability Low Cost Available in 8-Pin Plastic Mini-DlP, Hermetic Cerdip and Surface Mount (SOIC) Packages MIL-STD-883B Processing Available Dual Version Available: AD706 Quad Version: AD704 APPLICATIONS Low Frequency Active Filters Precision Instrumentation Precision Integrators

Picoampere Input Current Bipolar Op Amp AD705

CONNECTION DIAGRAM Plastic Mini-DIP (N) Cerdip (Q) and Plastic SOIC (R) Packages
OFFSET NULL IN +IN V 1 2 3 4 TOP VIEW 8 7 6 OFFSET NULL V+ OUTPUT OVER COMP

AD705

levels, the commonly used balancing resistor (connected between the noninverting input of a bipolar op amp and ground) is not required. The AD705 is an excellent choice for use in low frequency active filters in 12- and 14-bit data acquisition systems, in precision instrumentation and as a high quality integrator. The AD705 is internally compensated for unity gain and is available in five performance grades. The AD705J and AD705K are rated over the commercial temperature range of 0C to +70C. The AD705A and AD705B are rated over the industrial temperature range of 40C to +85C. The AD705T is rated over the military temperature range of 55C to +125C and is available processed to MIL-STD-883B, Rev. C. The AD705 is offered in three varieties of 8-pin package: plastic DIP, hermetic cerdip and surface mount (SOIC). J grade chips are also available.
PRODUCT HIGHLIGHTS

PRODUCT DESCRIPTION

The AD705 is a low power bipolar op amp that has the low input bias current of a BiFET amplifier but which offers a significantly lower IB drift over temperature. The AD705 offers many of the advantages of BiFET and bipolar op amps without their inherent disadvantages. It utilizes superbeta bipolar input transistors to achieve the picoampere input bias current levels of FET input amplifiers (at room temperature), while its IB typically only increases 5 times vs. BiFET amplifiers which exhibit a 1000X increase over temperature. This means that, at room temperature, while a typical BiFET may have less IB than the AD705, the BiFETs input current will increase to a level of several nA at +125C. Superbeta bipolar technology also permits the AD705 to achieve the microvolt offset voltage and low noise characteristics of a precision bipolar input amplifier. The AD705 is a high quality replacement for the industrystandard OP07 amplifier while drawing only one sixth of its power supply current. Since it has only 1/20th the input bias current of an OP07, the AD705 can be used with much higher source impedances, while providing the same level of dc precision. In addition, since the input bias currents are at picoAmp REV. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

1. The AD705 is a low drift op amp that offers BiFET level input bias currents, yet has the low IB drift of a bipolar amplifier. It upgrades the performance of circuits using op amps such as the LT1012. 2. The combination of Analog Devices advanced superbeta processing technology and factory trimming provides both low drift and high dc precision. 3. The AD705 can be used in applications where a chopper amplifier would normally be required but without the choppers inherent noise and other problems.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703

AD705SPECIFICATIONS (@ T = +25C, V
A

CM

= 0 V, and VS = 15 V dc, unless otherwise noted)

Min AD705K/B Typ 10 25 0.2 129 126 0.3 30 50 0.3 50 70 30 30 0.3 50 50 Max 35 60 0.6 114 108 Min AD705T Typ 10 25 0.2 129 126 0.3 30 50 0.6 90 120 30 30 0.4 80 80 Max 25 60 0.6 Units V V V/C dB dB V/month pA pA pA/ C pA pA pA pA pA/ C pA pA

Parameter INPUT OFFSET VOLTAGE Initial Offset Offset vs. Temp, Average TC vs. Supply (PSRR) TMIN to TMAX Long Term Stability INPUT BIAS CURRENT 1

Conditions

Min

AD705J/A Typ Max 30 45 0.2 129 126 0.3 60 80 0.3 80 100 40 40 0.3 80 80 90 150 1.2

TMIN to TMAX VS = 2 V to 18 V VS = 2.5 V to 18 V 110 108

110 108

VCM = 0 V VCM = 13.5 V vs. Temp, Average TC TMIN to TMAX TMIN to TMAX INPUT OFFSET CURRENT vs. Temp, Average TC TMIN to TMAX TMIN to TMAX FREQUENCY RESPONSE Unity Gain Crossover Frequency Slew Rate, Unity Gain Slew Rate INPUT IMPEDANCE Differential Common Mode INPUT VOLTAGE RANGE Common-Mode Voltage COMMON-MODE REJECTION RATIO VCM = 13.5 V TMIN to TMAX 0.1 Hz to 10 Hz f = 10 Hz f = 1 kHz f = 10 Hz VO = 12 V RLOAD = 10 k TMIN to TMAX VO = 10 V RLOAD = 2 k TMIN to TMAX RLOAD = 10 k TMIN to TMAX Short Circuit Gain = +1 Open Loop 13.5 110 108 VCM = 0 V VCM = 13.5 V VCM = 0 V VCM = 13.5 V VCM = 0 V VCM = 13.5 V

150 200 250 450 150 200 250 450

100 150 150 350 100 150 150 350

100 150 600 750 100 150 250 450

G = 1 TMIN to TMAX

0.4 0.1 0.05

0.8 0.15 0.15 402 3002 14 132 128 0.5 17 15 50

0.4 0.1 0.05

0.8 0.15 0.15 402 3002

0.4 0.1 0.05

0.8 0.15 0.15 402 3002

MHz V/s V/s MpF GpF V

13.5 114 108

14 132 128 0.5 17 15 50 1.0 22

13.5 114 108

14 132 128 0.5 17 15 50 1.0 22

dB dB V p-p nV/Hz nV/Hz fA/Hz V/mV V/mV V/mV V/mV

INPUT VOLTAGE NOISE

22

INPUT CURRENT NOISE OPEN-LOOP GAIN

300 200 200 150 13 13

2000 1500 1000 1000 14 14 15 10,000 200 15 380 400

400 300 300 200 13 13

2000 1500 1000 1000 14 14 15 10,000 200 15 380 400

400 300 300 200 13 13

2000 1500 1000 1000 14 14 15 10,000 200 15 380 400

OUTPUT CHARACTERISTICS Voltage Swing Current Capacitive Load Drive Capability Output Resistance POWER SUPPLY Rated Performance Operating Range Quiescent Current

V V mA pF

2.0 TMIN to TMAX

18 600 800

2.0

18 600 800

2.0

18 600 800

V V A A

TEMPERATURE RANGE FOR RATED PERFORMANCE Commercial (0C to +70C) Industrial (40 C to +85C) Military (55C to +125C)

AD705J AD705A

AD705K AD705B AD705T

REV. B

AD705
Parameter PACKAGE OPTIONS 8-Pin Cerdip (Q-8) 8-Pin Plastic Mini-DIP (N-8) 8-Pin SOIC (R-8) Chips TRANSISTOR COUNT # of Transistors Conditions Min AD705J/A Typ Max Min AD705K/B Typ Max AD705BQ AD705KN Min AD705T Typ AD705TQ Max Units

AD705AQ AD705JN AD705JR AD705JCHIPS 45

45

45

NOTES 1 Bias current specifications are guaranteed maximum at either input. All min and max specifications are guaranteed Specifications in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. Specifications subject to change without notice.

METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
0.074 (1.88) NULL 8
8

+VS 7
7

VOUT 6
6

5 OVER COMP
5

0.0677 (1.72)
1

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Internal Power Dissipation2 . . . . . . . . . . . . . . . . . . . 650 mW Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . 0.7 V Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite Storage Temperature Range (N, R) . . . . . . . 65C to +125C Storage Temperature Range (Q) . . . . . . . . . 65C to +150C Operating Temperature Range AD705J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to +70C AD705A/B . . . . . . . . . . . . . . . . . . . . . . . . . 40C to +85C AD705T . . . . . . . . . . . . . . . . . . . . . . . . . . 55C to +125C Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300C
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-Pin Plastic Package: JA = 165C/Watt 8-Pin Cerdip Package: JA = 110C/Watt 8-Pin Small Outline Package: JA = 155C/Watt 3 The input pins of these amplifiers are protected by back-to-back diodes. If the differential voltage exceeds 0.7 V, external series protection resistors should be added to limit the input current to less than 25 mA.

ABSOLUTE MAXIMUM RATINGS 1

NULL 1
2

4 VS

IN 2
3

3 +IN

ORDERING GUIDE Model AD705AQ AD705BQ AD705JCHIPS AD705JN AD705JR AD705JR-REEL AD705JR-REEL7 AD705KN AD705TQ AD705TQ/883B Temperature Range 40C to +85C 40C to +85C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 0C to +70C 55C to +125C 55C to +125C Package Description 8-Pin Ceramic DIP 8-Pin Ceramic DIP Bare Die 8-Pin Plastic DIP 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Plastic SOIC 8-Pin Plastic DIP 8-Pin Ceramic DIP 8-Pin Ceramic DIP Package Option Q-8 Q-8 N-8 R-8 R-8 R-8 N-8 Q-8 Q-8

CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD705 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!
ESD SENSITIVE DEVICE

REV. B

AD705Typical Characteristics (@ +25C, V = 15 V, unless otherwise noted)

S
100 SAMPLE SIZE: 610 80

200 SAMPLE SIZE: 1040 160

NUMBER OF UNITS
NUMBER OF UNITS

200 SAMPLE SIZE: 510 160

NUMBER OF UNITS

60

120

120

40

80

80

20

40

40

0 80

60 40 20 0 + 20 +40 +60 +80 INPUT OFFSET VOLTAGE Microvolts

120 0 +60 +120 60 INPUT BIAS CURRENT Picoamperes

120 60 0 +60 +120 INPUT OFFSET CURRENT Picoamperes

Figure 1. Typical Distribution of Input Offset Voltage

Figure 2. Typical Distribution of Input Bias Current

Figure 3. Typical Distribution of Input Offset Current

INPUT COMMON MODE VOLTAGE LIMIT Volts (REFERRED TO SUPPLY VOLTAGES)

+VS 0.5 1.0 1.5

OUTPUT VOLTAGE Volts p-p

35

100

25 20 15 10 5 0 1k

OFFSET VOLTAGE DRIFT V/C

30

SOURCE RESISTANCE MAY BE EITHER BALANCED OR UNBALANCED 10

+1.5 +1.0 +0.5 VS 0 5 10 15 SUPPLY VOLTAGE Volts 20

1.0

0.1

10k 100k FREQUENCY Hz

1M

1k

10k 100k 1M 10M SOURCE RESISTANCE

100M

Figure 4. Input Common-Mode Voltage Range vs. Supply Voltage

Figure 5. Large Signal Frequency Response

Figure 6. Offset Voltage Drift vs. Source Resistance

50

60

CHANGE IN OFFSET VOLTAGE V

SAMPLE SIZE: 85 55C TO +125C 40

NUMBER OF UNITS

40 3

INPUT BIAS CURRENT pA

20 POSITIVE IB 0

30

20

20 NEGATIVE IB

10

40

0 0.4 0.2 0 +0.2 +0.4 OFFSET VOLTAGE DRIFT V/C

0 0 1 2 3 4 WARM-UP TIME IN MINUTES 5

60 15

10 5 0 +5 +10 COMMON MODE VOLTAGE Volts

+15

Figure 7. Typical Distribution of Offset Voltage Drift

Figure 8. Change in Input Offset Voltage vs. Warm-Up Time

Figure 9. Input Bias Current vs. Common-Mode Voltage

REV. B

AD705
1000 1000

VOLTAGE NOISE nV/Hz

CURRENT NOISE fA/Hz

100

100

0.5V

100 10

10k 20M

10

VOUT = in(2 109) 1 1 10 100 FREQUENCY Hz 1000 1 1 10 100 FREQUENCY Hz 1000 0 5 TIME Seconds 10

Figure 10. Input Noise Voltage Spectral Density

Figure 11. Input Noise Current Spectral Density

Figure 12. 0.1 Hz to 10 Hz Noise Voltage

500

160 140

180 160 140

PSRR dB

QUIESCENT CURRENT A

450
CMRR dB

120 100 80 60 40
+55C

120 100 PSRR 80 + PSRR 60 40 20 0.1

400

+125C +25C

350

20 0

300 0 5 10 15 SUPPLY VOLTAGE Volts 20

0.1

10 100 1k 10k FREQUENCY Hz

100k

1M

10 100 1k 10k FREQUENCY Hz

100k

1M

Figure 13. Quiescent Supply Current vs. Supply Voltage

Figure 14. Common-Mode Rejection vs. Frequency

Figure 15. Power Supply Rejection vs. Frequency

10M

140 120

+VS

OUTPUT VOLTAGE LIMIT Volts (REFERRED TO SUPPLY VOLTAGES)

30 60 PHASE 90 120 GAIN 150 180

OPEN LOOP VOLTAGE GAIN

OPEN LOOP VOLTAGE GAIN

55C +25C 1M +125C

PHASE SHIFT Degrees

0.5 1.0 1.5

100 80 60 40 20 0

+1.5 +1.0 +0.5 VS

100k 1 2 4 6 10 20 40 60 LOAD RESISTANCE k 100

20 0.01 0.1

10 100 1k 10k 100k 1M 10M FREQUENCY Hz

5 10 15 SUPPLY VOLTAGE Volts

20

Figure 16. Open Loop Gain vs. Load Resistance over Temperature

Figure 17. Open Loop Gain and Phase Shift vs. Frequency

Figure 18. Output Voltage Limit vs. Supply Voltage

REV. B

AD705
1 GAIN BANDWIDTH 1M

1000

RF +VS

CLOSED LOOP OUTPUT IMPEDANCE

GAIN BANDWIDTH PRODUCT Hz

100 AV = 1000 10
2

0.1F 7

SLEW RATE V/s

0.1

100k

SLEW RATE

1 AV = +1 0.1
VIN 3

AD705
4

6 RL 2k CL

VOUT

0.01

ADDING AN EXTERNAL CAPACITOR BETWEEN PIN 5 AND GROUND INCREASES THE AMPLIFIER'S COMPENSATION

10k

VS

0.1F

0.01 IOUT = +1mA 0.001 1 10 100 1k 10k 100k FREQUENCY Hz

SQUARE WAVE INPUT

0.001 1 10 100 1000

1k 10,000

VALUE OF OVERCOMPENSATION CAPACITOR pF

Figure 19. Slew Rate & Gain Bandwidth Product vs. Value of Overcompensation Capacitor

Figure 20. Magnitude of Closed Loop Output Impedance vs. Frequency

Figure 21a. Unity Gain Follower (For Large Signal Applications, Resistor RF Limits the Current Through the Input Protection Diodes)

20s
100 90
100 90

5s
100 90

5s

10 0%

10 0%

10 0%

2V

20mV

20mV

Figure 21b. Unity Gain Follower Large Signal Pulse Response RF = 10 k, CL = 50 pF

Figure 21c. Unity Gain Follower Small Signal Pulse Response RF = 0 , CL = 100 pF

Figure 21d. Unity Gain Follower Small Signal Pulse Response RF = 0 , CL = 1000 pF

10k +VS 0.1F 10k VIN 2 7

100 90

2V

50s
100 90

5s

AD705
3 4

6 RL 2.5k CL

VOUT

10 0%

10 0%

VS SQUARE WAVE INPUT

0.1F

20mV

Figure 22a. Unity Gain Inverter

Figure 22b. Unity Gain Inverter Large Signal Pulse Response CL = 50 pF

Figure 22c. Unity Gain Inverter Small Signal Pulse Response CL = 100 pF

REV. B

AD705
5s
100 90

A High Performance Differential Amplifier Circuit

10 0%

20mV

Figure 25 shows a high input impedance, differential amplifier circuit that features a high common-mode voltage, and which operates at low power. Table I details its performance with changes in gain. To optimize the common-mode rejection of this circuit at low frequencies and dc, apply a 1 volt, 1 Hz sine wave to both inputs. Measuring the output with an oscilloscope, adjust trimming potentiometer R6 for minimum output. For the best CMR at higher frequencies, capacitor C2 should be replaced with a 1.5 pF to 20 pF trimmer capacitor. Both the IC socket and any standoffs at the op amps input terminals should be made of Teflon* to maintain low input current drift over temperature.
*Teflon is a registered trademark of E.I. DuPont, Co.
C1 5pF R2 10M R3 200k +VS

Figure 22d. Unity Gain Inverter Small Signal Pulse Response C, = 1000 pF
10pF* 10k +VS 0.1F SQUARE WAVE INPUT 5k VIN 3 4 2 7

R5*

AD705
5

VOUT

R1 100M 2 VIN

0.1F 7 R4* 6 VOUT

AD705
3 4

*RESPONSE IS
NEARLY IDENTICAL FOR CAPACITANCE VALUES OF 0 TO 100pF

SOURCE

VS

0.1F

0.1F VS R1' 100M VIN+ R2' 10M C2 5pF DC CMR ADJUST

CIRCUIT GAIN, G = R2+R3 (1+ R5 ) R4 R1 VOUT = G (VIN VIN+) COMMON MODE INPUT RANGE = 10 (VS 1.5V) FOR VS = 15V, VCM RANGE = 135V RESISTORS R1 AND R1', R2 AND R2' ARE VICTOREEN MOX-200 1/4 WATT, 1% METAL OXIDE.

4.1nF

Figure 23a. Follower Connected in Feed-Forward Mode

GND

R6 500k

*SEE TABLE I
WARNING: POTENTIAL DANGER FROM HIGH SOURCE VOLTAGE. THIS DIFFERENTIAL AMPLIFIER DOES NOT PROVIDE GALVANIC ISOLATION. INPUT SOURCE MUST BE REFERRED TO THE SAME GROUND CONNECTION AS THIS AMPLIFIER. INPUT

5V
100 90

5s

Figure 25. A High Performance Differentials Amplifier Circuit

10 0%

OUTPUT

Table I. Typical Performance of Differential Amplifier Circuit Operating at Various Gains

Circuit R4 Gain () R5 () Trimmed DC CMR (dB) RTI Average Circuit Drift TC Bandwidth (V/C) 3 dB 30 30 30 4.4 kHz 2.8 kHz 930 Hz

5V

Figure 23b. Follower Feed-Forward Pulse Response

VOS ADJUST +VS 20k 1 2 8 7 0.1F

1 10 100

1.13 k 10 k 85 100 9.76 k 85 10.2 10 k 85

AD705
5 3 4 VS

OVERCOMPENSATION CAPACITOR

0.1F

Figure 24. Offset Null and Overcompensation Connections

REV. B

AD705
A 1 Hz, 2-Pole, Active Filter

Table II gives recommended component values for the 1 Hz filter of Figure 26. An unusual characteristic of the AD705 is that both the input bias current and the input offset current and their drift remain low over most of the op amps rated temperature range. Therefore, for most applications, there is no need to use the normal balancing resistor tied between the noninverting terminal of the op amp and ground. Eliminating the standard balancing resistor reduces board space and lowers circuit noise. However, this resistor is needed at temperatures above 110C, because input bias current starts to change rapidly, as shown by Figure 27.

Table II. Recommended Component Values for the 1 Hz Low-Pass Filter

Desired Low Pass Response Bessel Response Butterworth Response 0.1 dB Chebychev 0.2 dB Chebychev 0.5 dB Chebychev 1.0 dB Chebychev Pole Frequency (Hz) 1.27 1.00 0.93 0.90 0.85 0.80 Pole Q C1 Value (F) 0.58 0.707 0.77 0.80 0.86 0.96 0.14 0.23 0.26 0.28 0.32 0.38 C2 Value (F)
C1357a210/94 PRINTED IN U.S.A.

0.11 0.11 0.11 0.11 0.11 0.10

C1 +VS R1 1M INPUT C2 2 R2 1M 3 0.1F 7

Specified values are for a 3 dB point of 1.0 Hz. For other frequencies, simply scale capacitors C1 and C2 directly; i.e., for 3 Hz Bessel response, C1 = 0.046 F, C2 = 0.037 F.
OFFSET VOLTAGE OF FILTER CIRCUIT (RTI) V
90 WITHOUT OPTIONAL BALANCE RESISTOR, R3

60

AD705
4

VOUT

30

0.1F OPTIONAL BALANCE RESISTOR NETWORK VS R3 2M WITHOUT THE NETWORK, PINS 2 AND 6 OF THE AD705 ARE TIED TOGETHER. C3 0.01F

0 WITH OPTIONAL BALANCE RESISTOR, R3

30

60

CAPACITORS C1, C2 AND C3 ARE SOUTHERN ELECTRONICS MPCC, POLYCARBONATE, 5%, 50 VOLT.

90 60

40

20

+20

+40

+60

+80 +100 +120 +140

TEMPERATURE C

Figure 26. A 1 Hz, 2-Pole Active Filter

Figure 27. VOS vs. Temperature of 1 Hz Filter

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

Cerdip (Q) Package

0.005 (0.13) MIN 0.055 (1.4) MAX

Plastic Mini-DIP (N) Package

8-Pin SOIC (R) Package

8 0.25R (0.64) 1

8 PIN 1

5 8 0.25 (6.35) 0.31 (7.87) PIN 1 1 4 5 0.154 0.004 (3.91 0.10) 0.236 0.012 (6.00 0.20)

0.405 (10.29) MAX 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.060 (1.52) 0.015 (0.38)

0.39 (9.91) MAX 0.165 0.01 (4.19 0.25) 0.035 0.01 (0.89 0.25) 0.008 0.004 (0.203 0.075) 0.0500 (1.27) BSC 0.193 0.008 (4.90 0.10) 0.098 0.006 (2.49 0.23) 0.017 0.003 (0.42 0.07)

0.150 (3.81) MIN

0.125 (3.18) MIN

0.18 0.03 (4.57 0.76)

0.023 (0.58) 0.014 (0.36)

0.100 0.070 (1.78) (2.54) 0.030 (0.76) BSC

SEATING PLANE

0.018 0.003 (0.46 0.08)

0.100 (2.54) TYP 0.30 (7.62) REF

0.033 (0.84) NOM

SEATING PLANE

0.310 (7.87) 0.220 (5.59)

0.011 0.002 (0.269 0.03)

0.033 0.017 (0.83 0.43)

0.32 (8.13) 0.29 (7.37)

0.011 0.003 (0.28 0.08)

0.015 (0.38) 0.008 (0.20)

0-15

0-15

REV. B

This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.