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Kelvin Divider (String DAC)

The simplest structure of all is the Kelvin divider or string DAC as shown in Figure 6.2. An N-bit version of this DAC simply consists of 2N equal resistors in series and 2N switches (usually CMOS), one between each node of the chain and the output. The output is taken from the appropriate tap by closing just one of the switches (there is some slight digital complexity involved in decoding to 1 of 2N switches from N-bit data). This architecture is simple, has a voltage output and is inherently monotoniceven if a resistor is accidentally short-circuited, output n cannot exceed output n + 1. It is linear if all the resistors are equal, but may be made deliberately nonlinear if a nonlinear DAC is required. The output is a voltage, but it has the disadvantage of having a relatively large output impedance. This output impedance is also code dependant (the impedance changes with changes to the digital input). In many cases it will be beneficial to follow the output of the DAC with an op amp to buffer this output impedance and present a low impedance source to the following circuitry. Since only two switches operate during a transition it is a low glitch architecture (the concept of glitch will be examined in a following section). Also, the switching glitch is not code-dependent, making it ideal for low distortion applications. Because the glitch is constant regardless of the code transition, the frequency content of the glitch is at the DAC update rate and its harmonicsnot at the harmonics of the DAC output signal frequency. The major drawback of the Kelvin DAC is the large number of resistors and switches required for high resolution. There are 2N resistors required, so a 10 bit DAC would require 1024 switches and resistors, and as a result it was not commonly used as a simple DAC architecture until the recent advent of very small IC feature sizes made it very practical for low and medium resolution (typically up to 10 bits) DACs. CONVERTERS DIGITAL-TO-ANALOG CONVERTER ARCHITECTURES 6.5 Figure 6.2: Simplest Voltage-Output Thermometer DAC: The Kelvin Divider As we mentioned in the section on sampling theory, the output of a DAC for an all 1s code is 1 LSB below the reference, so a Kelvin divider DAC intended for use as a general-purpose DAC has a resistor between the reference terminal and the first switch as shown in Figure 6.2.

Segmented String DACs


A variation of the Kelvin divider is the segmented string DAC. Here we reduce the number of resistors required by segmenting. Figure 6.3 shows two varieties of segmented voltage-output DAC. The architecture in Figure 6.3A is sometimes called a KelvinVarley Divider. Since there are buffers between the first and second stages, the second string DAC does not load the first, and the resistors in the second string do not need to have the same value as the resistors in the first. All the resistors in each string, however, do need to be equal to each other or the DAC will not be linear. The examples shown have 3-bit first and second stages but for the sake of generality, let us refer to the first (MSB) stage resolution as M-bits and the second (LSB) as K-bits for a total of N = M + K bits. The MSB DAC has a string of 2M equal resistors and a string of 2K equal resistors in the LSB DAC. As an example, if we make a 10-bit string DAC out of two 5-bit sections, each segment would have 25 or 32 resistors, for a total of 64, as opposed to the

1024 required for a standard Kelvin divider. This is an obvious advantage.


3-TO-8 DECODER 3-BIT DIGITAL INPUT ANALOG OUTPUT VREF
CIRCA 1920 SWITCHES WERE RELAYS OR VACUUM TUBES 8 TO SWITCHES R R R R R R R R

BASIC LINEAR DESIGN


6.6 Figure 6.3: Segmented Voltage-Output DACs Buffer amplifiers can have offset, of course, and this can cause nonmonotonicity in a buffered segmented string DAC. In the simpler configuration of a buffered Kelvin-Varley divider buffer (Figure 6.3A), buffer A is always below (at a lower potential than) buffer B, and the extra tap labeled A on the LSB string DAC is not necessary. The data decoding is just two priority encoders. But if the decoding of the MSB string DAC is made more complex so that buffer A can only be connected to the taps labeled A in the MSB string DAC, and buffer B to the taps labeled B, then it is not possible for buffer offsets to cause nonmonotonicity. Of course, the LSB string DAC decoding must change direction each time one buffer leapfrogs the other, and taps A and B on the LSB string DAC are alternately not usedbut this involves a fairly trivial increase in logic complexity and is justified by the increased performance. Rather than using a second string of resistors, a binary R-2R DAC can be used to generate the three LSBs as shown in Figure 6.3B. This voltage-output DAC (Figure 6.3B) consists of a 3-bit string DAC followed by a 3-bit buffered voltage-mode ladder network. Again the number of resistors require for the DAC is reduced.

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