Hardware Description

DOI-N08145
MMSP-600
SDH SDH SDH SDH
OPTI CAL TRANSMI SSI ON SYSTEM OPTI CAL TRANSMI SSI ON SYSTEM OPTI CAL TRANSMI SSI ON SYSTEM OPTI CAL TRANSMI SSI ON SYSTEM

HARDWARE DESCRIPTION

NEC Cor por at i on NEC Cor por at i on NEC Cor por at i on NEC Cor por at i on 7-1, Shiba 5-Chome, Minato-Ku, Tokyo 108-8001, Japan
TEL: +81-3-3454-1111
FAX: +81-3-3798-1510
TELEX: NECTOK J22686
DOI-N08145

Every effort has been made in the preparation of this document to ensure
accuracy of the contents, however all statements, information, and
recommendations in this document are subject to change without notice.

1st Edition September 2004

Copyright 2004by NEC Corporation
All rights reserved. No part of this document may be disclosed,
reproduced, distributed or transmitted in any form or by any means
without prior written-agreement of NEC Corporation.
Printed in J apan

DOI-N08145

- i -

1 About This Manual

Release Notes
This manual is for MMSP-600 SDH Optical Transmission System, Version
V100R001.
Related Manuals
Manual Usage
MMSP-600
SDH Optical Transmission System
Hardware Description Manual
Introduces the hardware architecture, and functions, principles,
interfaces and technical parameters of respective boards, as well as
the cable of the equipment, facilitating user to get a deeper
understanding of the equipment.
MMSP-600
Installation Manual
Introduces the equipment installation procedure and the cable
arrangement requirements, offering user instructions to install the
equipment.
MMSP-600
Maintenance Manual
Introduces the precautions and common methods for the equipment
maintenance, offering user instructions to perform the routine
maintenance.
Various alarm reasons and handling methods are described to help
user in troubleshooting.

About This Manual DOI-N08145

- ii -

Organization
The manual has the following organization:
Chapter Description
Chapter 1 Overview This chapter introduces the architecture, slot assignment, board type, and
correspondence between respective boards and slots. Brief introduction is also
given to the cable of the equipment.
Chapter 2 Board Description This chapter gives detailed introduction to respective boards of the MMSP-600
from the following aspects:
! Functions and principle
! Front panel (include the description of the interfaces and indicators)
! Parameter Configuration
! Technical Parameters
Chapter 3 Cable Description This chapter gives detailed introduction to the cables of the MMSP-600 from the
following aspects:
! Structure
! Pin assignment
! Technical Parameters
Appendix A Power Consumption Appendix A summarizes the power consumption of the equipment and
respective boards for convenient query of the user.
Appendix B Board Indicators Appendix B summarizes the description of various board indicators for
convenient query of the user.
Appendix C Acronyms Appendix C summarizes all acronyms of the whole manual, facilitating user to
read the manual easily.


- iii -

Intended Audience
This manual is for:
! Network administrator
! Maintenance engineer
! Provisioning engineer
Conventions
The following conventions are used throughout this publication.
Symbol Description

Means reader be careful. In this situation, you might do something that
could result in equipment damage or loss of data.
#
Means reader take note. Notes contain helpful suggestions or useful
background information.

Release Upgrade Description
Release Release upgrade description
1st Edition 2004 This manual is the first release.


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E

This page is intentionally left blank.

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i

Contents
1 Overview
1.1 Structure of the MMSP-600 1-2
1.1.1 The Front Panel 1-2
1.1.2 The Rear Panel 1-3
1.2 Boards 1-5
1.3 Cables 1-6
1.4 Technical Specifications 1-7

2 Board Description
2.1 STM-1 Optical Interface Board (SL1/SD1) 2-1
2.1.1 Functions 2-1
2.1.2 Principle 2-2
2.1.3 Front Panel 2-3
2.1.4 Parameter Configuration 2-4
2.1.5 Technical Parameters 2-5
2.2 STM-1 Optical Interface Board (OSB1) 2-6
2.2.1 Functions 2-6
2.2.2 Principle 2-6
2.2.4 Technical Specifications 2-9
2.3 STM-4 Optical Interface Board (OSB4) 2-10
2.3.1 Functions 2-10
2.3.2 Principle 2-10
2.4 E1 Electrical Interface Board (PL1S/PL1D) 2-14

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ii

Contents
2.5 E1/T1 Electrical Interface Board (PM1S/PM1D) 2-18
2.6 E1 Electrical Interface Board (PF1S/PF1D) 2-23
2.7 E3/DS3 Electrical Interface Board (PL3) 2-28
2.7.3 Fornt Panel 2-30
2.8 10M/100M Ethernet Electrical Interface Board (ET1D) 2-33
2.9 3-Channel FE/GE Processing Board EMS3 2-38
2.9.2 Principles 2-39

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iii

Contents
2.10 4-Channel 10M/100M BaseT Fast Ethernet Interface
Unit ETF4 2-45
2.10.2 Principles 2-45
2.11 System Control & Communication Board (FSCC) 2-48
2.11.3 Front Pannel 2-50
2.11.4 DIP Switches 2-52
2.12 Cross-connect & Timing Board (XCS/XCS1/XCS4) 2-54
2.13 Engineering Orderwire Board (FEOW) 2-60
2.14 Power Board (SPIU) 2-67
2.15 Fan Interface Board (FAN) 2-70

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iv

Contents
2.16 E1/T1 Interface Commutator Board (C12) 2-74
2.16.1 Front panel 2-74
2.17 E1/T1 Electrical Interface Switching & bridge Board
(C12S) 2-77
2.18 E3/DS3 Electrical Interface Switching Board (C34S) 2-81
2.19 E3/DS3 Switching & bridging Board (TSB3) 2-84
2.20 Synchronous Timing Interface Board (STIA/STIB) 2-87

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v

Contents
3 Cable Description
3.1 75 E1 Cable 3-2
3.1.1 Structure 3-2
3.1.2 Pin Assignments 3-3
3.2 120 E1/T1 Cable 3-5
3.2.1 Structure 3-5
3.2.3 Teachnical Specifications 3-7
3.3 E3/DS3 Cable 3-8
3.3.1 Structure 3-8
3.4 Power Cable 3-9
3.4.1 Structure 3-9
3.5 PGND Cable 3-11
3.5.1 Structure 3-11
3.6 75 Clock Cable 3-12
3.7 120 Clock Cable 3-13
3.7.3 Teachnical Specifications 3-14
3.8 Network Cable 3-15
3.9 Fiber 3-18

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vi
E

Contents
A Power Consumption
A.1 Power Consumption of the MMSP-600 A-1
A.2 Power Consumption of the Boards A-2

B Board Indicators
B.1 SL1/SD1 B-1
B.2 PL1D/PL1S B-2
B.3 PM1D/PM1S B-2
B.4 PF1D/PF1S B-2
B.5 PL3 B-2
B.6 ET1D B-3
B.7 XCS/XCS1/XCS4 B-4
B.8 FSCC B-4
B.9 FEOW B-5
B.10 PIU B-5
B.11 FAN B-5

C Acronyms

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1-1

1 Overview

This chapter introduces the architecture, slot assignment and equipment composition
of the MMSP-600.
The MMSP-600 adopts a box-shaped design as shown in Figure 1-1.

Figure 1-1 Structure of the MMSP-600

1.1 Structure of the MMSP-600

Error! Style not defined. DOI-N08145

1-2

The MMSP-600 has front panel and rear panel, respectively providing front outlets
and rear outlets.
1.1.1 The Front Panel
Slot
Assignment

Figure 1-2 shows the front slot assignment of the MMSP-600.
XCS A
XCS B
Slot 13
Slot 1 Slot 2 Slot 3

Figure 1-2 Front slot assignment of the MMSP-600
Installed Unit
Plesiochronous Digital Hierarchy (PDH) electrical interface processing unit
Synchronous Digital Hierarchy (SDH) optical interface unit
Ethernet network interface processing unit
Cross-connect & timing unit
System control unit
Power supply unit
Engineering orderwire unit
Fan unit
Relations
Between
Boards and
Slots
In the front panel, the relations between boards and slots is given in Table
1-1.
Table 1-1 The relations between boards and slots in the front panel
Slots Board Remarks
Slot 1 and Slot 2 SPIU
Slot 3 FSCC
Slot 4, 5, 6, 10, 11 or
12
PL1S, PL1D, PF1S, PF1D,
PM1S, PM1D, PL3, ET1D

Slot 10 and 11 SL1, SD1
Slot 7 and slot 8 XCS1, XCS4,XCS OSB1 is on the XCS1 board;
OSB4 is on the XCS4 board
Slot 9 FEOW


1-3

1.1.2 The Rear Panel
Slot
Assignment

Figure 1-3 shows the rear slot assignment of the MMSP-600.
XCS B
Slot 21

Figure 1-3 Rear slot assignment of the MMSP-600
Installed Unit
Electrical interface commutator
Electrical interface switching & bridging unit
Synchronous timing interface unit
Relations
Between
Boards and
Slots

In the rear panel, the relations between boards and slots is given in Table
1-2.
Table 1-2 The relations between boards and slots in the rear panel
Slot Board Remarks
Slot 21 STIA/STIB
Slot 24, 25, 26,
30, 31 or 32
C12, C12S,C34S
Slot 26 or 32 TSB3 Only TSB3 board can be inserted in
this slot if Tributary Protection
Switching Unit (TPS) protection is
provided for 34368 kbit/s or
44736 kbit/s.

Table 1-3 shows the correspondence between the rear slot assignment for
interface boards and the front slot assignment for processing boards.


1-4

Table 1-3 Correspondence between the slot assignment for interface boards
and that for processing boards
Slot for processing board Corresponding slot for interface board
Slot 24 Slot 4
Slot 25 Slot 5
Slot 26 Slot 6
Slot 30 Slot 10
Slot 31 Slot 11
Slot 32 Slot 12
Slot 21 Slot 7, 8


1-5

1.2 Boards
Board configuration resources are shown in Table 1-4.
Table 1-4 Board configuration resources
Unit name Board Function description
PL1S 8 2048kbit/s interfaces board
PL1D 16 2048kbit/s interfaces board
PF1S 8 2048kbit/s framed interfaces board
PF1D 16 2048kbit/s framed interfaces board
PM1S 8 2048kbit/s or 1544kbit/s interfaces board
PM1D 16 2048kbit/s or 1544kbit/s interfaces board
PDH unit
PL3 3 34368kbit/s or 44736kbit/s interfaces board
ETHERNET
unit
ET1D 2 port 10/100M Ethernet Electrical Interface Board
OSB1 STM-1 optical interface board
OSB4 STM-4 optical interface board
SL1 STM-1 optical interface board
SDH unit
SD1 2STM-1 optical interface board
XCS General cross-connect & timing board
XCS1 Cross-connect & timing board with STM-1 line board
Cross-connect
&timing unit
XCS4 Cross-connect &timing board with STM-4 line board
System control
unit
SCC System control and communication board
Engineering
orderwire unit
FEOW Engineering orderwire board
Power supply
unit
PIU Power board
Fan unit FAN Fan board
Electrical
interface
commutator
C12 2048 kbit/s or 1544 kbit/s electrical interface commutator


1-6

Unit name Board Function description
C12S 2048 kbit/s or 1544 kbit/s 120 electrical interface
switching & bridge board
C34S 34368 kbit/s or 44736 kbit/s electrical interface switching
board
Electrical
interface
switching &
bridge unit
TSB3 34368 kbit/s or 44736 kbit/s electrical interface Switching
& bridge board
STIA Synchronous Timing Interface Board 75 , is used for
MMSP-600.
Synchronous
Timing
Interface Unit
STIB Synchronous Timing Interface Board 120 , is used for
MMSP-600.

1.3 Cables
The cables of the MMSP-600 include:
75 E1 trunk cables
120 E1/T1 trunk cables
E3/DS3 trunk cables
48 V/60 V DC power cables
PGND grounding cable
Clock cables
Fiber
Network cable


1-7

1.4 Technical Specifications
Full configuration: 6ETID+2XCS4+2PIU+FSCC+FEOW+STIA
Typical configuration: ETID+PL1S+2XCS1+2PIU+FSCC
Specifications MMSP-600
Dimensions 436 mm (W) x 365 mm (D) x 130.6 mm (H)
Weight Full configuration:15 kg
Typical configuration:12.5 kg
Power
consumption
Full configuration: 75 W
Typical configuration: 50 W
Working power 48 V/60 V Range: 36.8 V to 72 V


1-8
E

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2-1

2 Boards Description

2.1 STM-1 Optical Interface Board
(SL1/SD1)
! SL1 is the STM-1 optical interface board.
! SD1 is the 2STM-1 optical interface board.
Both the SL1 and SD1 boards receive and transmit the STM-1 optical signals. They
can convert the optical STM-1 signals into electrical ones, extract and insert overhead
bytes, and generate various alarm signals on the line.
The SL1 and SD1can be seated in Slot10 or Slot11.
2.1.1 Functions
! Receive/transmit STM-1 optical signals.
! Provide Ie-1 optical interface and S-1.1, L-1.1 and L-1.2 standard optical
interfaces, with their characteristics compliant with ITU-T Recommendation
G.957.
! Provide inloop and outloop function.
! Support pass-through of the Data Communication Channel (DCC) byte and
orderwire byte.
When the FSCC board is not in position, the D byte and E1/E2 byte can pass
through the eastbound and westbound optical interface boards of this station,
2

Boards Description DOI-N08145

2-2

without affecting the DCC and orderwire communication between this station
and other stations.
! Support Automatic Laser Shutdown (ALS) function.
! Detect and report various alarm signals and performance events on the lines.
! Support online board query function.
2.1.2 Principle
The SL1 board is taken as the example here for describing the working principle of the
SL1 and SD1 boards. Figure 2-1 shows a principle block diagram of SL1.

STM - 1
STM - 1
FSCC board
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross -connect unit
Cross -connect unit
Logic control
moudle
Overhead
processing
module
STM - 1
STM - 1
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross -connect unit
Cross -connect unit
Logic control
module
Overhead
processing
module
STM - 1
STM - 1
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross -connect unit
Cross -connect unit
Logic control
moudle
Overhead
processing
module
STM - 1
STM - 1
Frame
synchroni-
zation and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross -connect unit
Cross -connect unit
Logic control
module
Overhead
processing
module

Figure 2-1 Principle block diagram of SL1

In Receive Direction
The O/E conversion module converts the received STM-1 optical signal into electrical
ones and restores the clock signal. Then, it sends the clock signal together with the
STM-1 electrical signals to the frame synchronization and scrambling module. The
R_LOS alarm signal is also detected at the O/E conversion module.
At the frame synchronization and scrambling module, the incoming STM-1 electrical
signals are scrambled and converted into parallel signals, and then sent to the
overhead processing module. The R_LOF and R_OOF alarm signals are also
detected at the frame synchronization and scrambling module.
The overhead processing module performs overhead extraction to the received
STM-1 signals and converts them into VC-4 signals, which are sent to the
cross-connect unit through the backplane.
In Transmit Direction
At overhead processing unit, the VC-4 signals from the cross-connect unit are


2-3

inserted with overhead bytes and then sent to the frame synchronization and
scrambling module.
Parallel/serial conversion and scrambling are performed to the incoming STM-1
electrical signals at the frame synchronization and scrambling module. After that, the
signals are sent to the E/O conversion module.
The E/O conversion module converts the electrical STM-1 signals into optical ones
and then sends them onto optical fiber for transmission.
Auxiliary Functional Module
Logical control module: This module generates the timing clock and frame header
information required by SL1/SD1. When fault occurs to the cross-connect board, it
implements switching to the active/standby boards, and supports ALS function. When
the FSCC board is not in position, it allows the overhead bytes to pass through the
eastbound and westbound optical interface boards of this station.
2.1.3 Front Panel
The front panel of SL1 and SD1 is shown in Figure 2-2 and Figure 2-3
respectively.

Figure 2-2 Front panel of SL1

Figure 2-3 Front panel of SD1

There are alarm indicators and SC optical interfaces on the front panel of
SL1 and SD1.


2-4

Indicator

Table 2-1 gives a description to the alarm indicator.
Table 2-1 Description of indicator of SL1/SD1
Indicator Status Description
Off No alarm occurs to the SL1 board.
LOS (red)
On Alarm occurs to the SL1 board.
Off No alarm occurs to the first pair of optical
interface of the SD1 board.
LOS1 (red)
On Alarm occurs to the first pair of optical interface of
the SD1 board.
Off No alarm occurs to the second pair of optical
LOS2 (red)
On Alarm occurs to the second pair of optical

Interface The SL1 has one pair of SC optical interfaces, providing input and output of
1 STM-1 optical signal.
The SD1 has two pairs of SC optical interfaces, providing input and output
of 2 STM-1 optical signals.

2.1.4 Parameter Configuration
Main parameters that should be configured for SL1/SD1 are as follows:
J0 byte Generally, the default value is used. The parameter configured for the
interconnected equipment should be inconsistent.
C2 byte

The C2 byte should be configured according to the service type in practice.
Table 2-2 shows the corresponding relationship between the parameter
configuration of C2 byte and the service type.
Table 2-2 Corresponding relationship between the C2 byte and the service type
Service Type C2 byte
E1 or T1 tugs
E3 or DS3 asyn
E4 a140


2-5

Laser status The laser can be set to either ON or OFF, and the former is the default
setting.
Loopback Loopback is usually used for fault localization, falling into two types:
! VC-4 loopback: for the one VC-4 in the STM-1 signal
! Optical interface loopback: for VC-4 in the STM-1 signal.
The default setting is non-loopback.

2.1.5 Technical Parameters
Description
Parameter
SL1 SD1
Rate STM-1
Processing capability 1!STM-1 2!STM-1
Code pattern NRZ
Connector SC
Optical fiber 1310 nm, single-mode optical fiber
Size (mm) 245 mm (L) 100 mm (W)
Power consumption
(W)
4 4.5
Code of optical module Ie-1 S-1.1 L-1.1 L-1.2
Transmission distance 0.5 km 15 km 50 km 80 km
Mean launched power 19 to 14 dBm 8 to 15 dBm 0 to 5 dBm 0 to 5 dBm
Receiver sensitivity 23 dBm 28 dBm 34 dBm 34 dBm
Overload point 14 dBm 8 dBm 10 dBm 10 dBm
Environment

Temperature Humidity
Long-term working conditions: 0C to 45C 10% to 90%
Short-term working conditions: 5C to 50C 5% to 95%
For storage: 40C to +70C 10% to 100%
For transportation: 40C to +70C 10% to 100%


2-6

(OSB1)
The OSB1 provides one STM-1 optical interface. It receives/transmits 1 STM-1
optical signals and fulfills the O/E conversion of STM-1 signals, extraction and
insertion of overhead bytes and generation of alarm signals on the line.
Being a module of the XCS1 board, the OSB1 is mounted on the XCS1 board, which
can be inserted in Slot 7 and Slot 8 of the MMSP-600. This design gives full utilization
of available space.
2.2.1 Functions
! Receives/transmits 1 STM-1 optical signals.
! Provides the Ie-1 and S-1.1, L-1.1, L-1.2 standard optical interfaces described
in International Telecommunication Union - Telecommunication
Standardization Sector (ITU-T) Recommendation G.957.
! Provides in-loop and out-loop functions for system testing.
! Supports Data Communication Channel (DCC) and orderwire pass-through
function.
When the FSCC board is not in position, such bytes as D byte and E1/E2 can
pass through the east and west line boards at this station, which will not affect the
data and orderwire communications with other stations.
! The optical interface has the Automatic Laser Shutdown (ALS) function.
! Supports the online query of board information.
2.2.2 Principle
The block diagram of the OSB1 board is shown in Figure 2-4.


2-7

STM - 1
STM - 1
FSCC board
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross -connect unit
Cross -connect unit
Logic control
moudle
Overhead
processing
module
STM - 1
STM - 1
FSCC board
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross -connect unit
Cross -connect unit
Logic control
module
Overhead
processing
module
STM - 1
STM - 1
FSCC board
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross -connect unit
Cross -connect unit
Logic control
moudle
Overhead
processing
module
STM - 1
STM - 1
FSCC board
Frame
synchroni-
zation and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross -connect unit
Cross -connect unit
Logic control
module
Overhead
processing
module

Figure 2-4 Principle block diagram of OSB1

scrambling module.
information required by OSB1. When fault occurs to the cross-connect board, it


2-8

Main parameters that should be configured for OSB1 are as follows:
C2 byte

E1 or T1 tugs
E3 or DS3 asyn
E4 a140

setting.
! Optical interface loopback: for VC-4 in the STM-1 signal


2-9

2.2.4 Technical Specifications
Description
Item
OSB1
Line Bite Rate STM-1
Line Code Non Return to Zero code (NRZ)
Connectors SC
Fiber 1310 nm, single mode, multi-mode
Dimensions (mm) 90 mm (L) 85 mm (W)
Application codes Ie-1 S-1.1 L-1.1 L-1.2
Transmission distance 0.5 km 15 km 50 km 80 km
Mean launched power 19 to 14 dBm 8 to 15 dBm 0 to 5 dBm 0 to 5 dBm
Receiver overload power 14 dBm 8 dBm 10 dBm 10 dBm
Environment

For transportation: 40C to +70C 10 to 100%


2-10

(OSB4)
The OSB4 board provides STM-4 optical interface. It receives/transmits 1 STM-4
optical signals and fulfills the O/E conversion of STM-4 signals, extraction and
insertion of overhead bytes and generation of alarm signals on the line.
As the subboard of the XCS4 board, the OSB4 shares a slot with the XCS4 board and
can be installed in Slot 7 and Slot 8 of the MMSP-600. This design helps to achieve
maximum space utilization.
2.3.1 Functions
! Receives/transmits 1 STM-4 optical signals.
! Provides the Ie-4 and S-4.1, L-4.1, L-4.2 standard optical interfaces described
in ITU-T Recommendation G.957.
! Provides inloop and outloop functions for system testing.
! Supports DCC and orderwire pass-through function.
When the SCC board is not in position, such bytes as D byte and E1/E2 byte can
pass through the eastbound and westbound line boards at this station, which will
not affect the Embedded Control Channel (ECC) and orderwire communications
with other stations.
! The optical interface has the Automatic Laser Shutdown (ALS) function.
2.3.2 Principle
The block diagram of the OSB4 board is shown in Figure 2-5.


2-11

STM-4
STM-4
FSCC board
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross-connect unit
Cross-connect unit
Logic control
moudle
Overhead
processing
module
STM-
STM-
FSCC board
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross-connect unit
Cross-connect unit
Logic control
module
Overhead
processing
module
STM-4
STM-4
FSCC board
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross-connect unit
Cross-connect unit
Logic control
moudle
Overhead
processing
module
STM-
STM-
FSCC board
Frame
synchroni-
zaion and
scrambling
processing
module
O/E
conversion
E/O
conversion
Cross-connect unit
Cross-connect unit
Logic control
module
Overhead
processing
module

Figure 2-5 Principle block diagram of OSB4

scrambling module.
information required by OSB4. When fault occurs to the cross-connect board, it


2-12


Main parameters that should be configured for OSB4 are as follows:
C2 byte

E1 or T1 tugs
E3 or DS3 asyn
E4 a140

setting.
! Optical interface loopback: for all 4 VC-4s in the STM-4 signal.


2-13

Description
Item
OSB4
Line Bite Rate STM-4
Line Code NRZ
Connectors SC
Fiber 1310 nm, single mode
Application codes Ie-4 S-4.1 L-4.1 L-4.2
Transmission distance 25 km 50 km 80 km
Mean launched power 8 to 15 dBm 8 to 15 dBm +2 to 3 dBm +2 to 3 dBm
Receiver overload power 8 dBm 8 dBm 8 dBm 8 dBm
Environment



2-14

2.4 E1 Electrical Interface Board
(PL1S/PL1D)
! The PL1S board is an 82048 kbit/s electrical interfaces board.
! The PL1D board is an 162048 kbit/s electrical interfaces board.
They mainly perform mapping and demapping of 2048 kbit/s signals and provide TPS
function.
There are two types of the PL1S and PL1D boards available.
! Interface impedance of 75 : The board whose bar code is labeled as A.
! Interface impedance of 120 : the board whose bar code is labeled as B.
The PL1S/PL1D board can be installed in Slot 4, 5, 6, 10, 11, 12.
A PL1S/PL1D board can be 1: 5 protected with other PL1S/PL1D boards, you must
install the PL1S/PL1D boards in Slot 4, 5, 6, 10 or Slot 11 to serve as working board
and in Slot 12 to serve as protect board.
2.4.1 Functions
! Maps and multiplexes 2048 kbit/s signals into the VC-4, and demaps and
demultiplexes the VC-4 to 2048 kbit/s signals.
! Provides 75 unbalanced interface and 120 balanced interface. The
interface characteristics comply with ITU-T Recommendation G.703.
! Provides inloop and outloop functions for testing.
! Supports 1:N (N 5) TPS protection.
! Supports hot-swapping
2.4.2 Principle
Take one channel-signal input and output for example, the block diagram of the
PL1S/PL1D board is shown in Figure 2-6.


2-15

connect
connect
Cross -
unit
Interface
Moudle
Decoder Mapping
Logical
control
modul
FSCC board
Encoder Demapping
Cross -
unit
Cross - connect
unit
E1
E1
Interface
module
Decoder Mapping
Logical
control
module
FSCC board
Encoder Demapping
C12/C12S
C12/C12S
Cross - connect
unit
connect
connect
Cross -
unit
Interface
Moudle
Decoder Mapping
Logical
control
modul
FSCC board
Encoder Demapping
Cross -
unit
Cross - connect
unit
E1
E1
Interface
module
Decoder Mapping
Logical
control
module
FSCC board
Encoder Demapping
C12/C12S
C12/C12S
Cross - connect
unit

Figure 2-6 Block diagram of the PL1S/PL1D board

The incoming E1 signal passes the interface module and enters decoder for decoding.
Then, the recovered NRZ data and clock signals are sent to the mapping module.
In the mapping module, the 2048 kbit/s signal sent by decoder is mapped
asynchronously to the C-12, and then forms the VC-12 after the path overhead
processing. Then, it transforms into TU-12 after pointer processing and then is
multiplexed to get the VC-4. Finally, the VC-4 is sent to the cross-connect unit.
The mapping process is shown in Figure 2-7.

TUG-3 TUG-2 TU-12
VC-12
C-12
2048 kbit/s
VC-4
X3 X7 X3

Figure 2-7 Process of mapping and multiplexing 2048 kbit/s signal

The demapping module demaps the VC-4 signal sent by the cross-connect unit and
extracts the binary data and clock signal to send to the HDB3 encoder. After encoding,
the HDB3 data signal is output through the interface module.
Logical control module: This module fulfills communication with FSCC board. It
reports the board information, alarm and performance to FSCC board and receives


2-16

the configuration command from FSCC board.
2.4.3 Front Panel
The front panel of the PL1S and the PL1D are shown in Figure 2-8 and Figure 2-9.
PL1S
STATE

Figure 2-8 The PL1S board front panel

PL1D
STATE

Figure 2-9 The PL1D board front panel

There are indicators on the front panel of PL1S and PL1D, indicating the board
working status.
Indicator

Table 2-5 gives a description to the alarm indicator of the PL1S and PL1D
board.
Table 2-5 Description of indicator of PL1S/PL1D
Off The board is configured with service and is in
working status.
STATE
(green)
On The board is not configured with service, or the
board is under protection.

Interface PL1S and PL1D provide no interface on their front panels. C12 is needed
for the input and output of E1 signal. For details about C12, refer to 2.16
E1/T1 Interface Commutator Board (C12).
When TPS is configured for PL1S and PL1D, C12S is needed for the input
and output of E1 signal. For details about C12S, refer to 2.17 E1/T1
Electrical Interface Switching & bridge Board (C12S).


2-17


Main parameters that should be configured for PL1S/PL1D are as follows:
Payload
loading
indication
If Unloaded is selected, the service carried by this path will not be processed,
and the alarm of this path will not be reported to the FSCC board.
Unloaded is selected to screen the alarms of the paths with no service loaded.
Tributary
Loopback
Tributary loopback is used to locate the fault of each service path.
Tributary loopback is a diagnostic function which will affect the service of
relevant path. Please use it careful.

Description
Item
PL1S PL1D
Rate 2048 kbit/s
Processing capability 82048 kbit/s 162048 kbit/s
Code HDB3
Connectors DB78
Weight (g) 200 g 250 g
Power consumption (W) 3 W 4.0 W
Input jitter tolerance Satisfies G.823
Output jitter B1(20 Hz to 100 kHz) 0.4 UI
B2(18 kHz to 100 kHz) 0.075 UI
Allowable frequency
deviation at input port
50 ppm
Environment



2-18

2.5 E1/T1 Electrical Interface Board
(PM1S/PM1D)
! The PM1S board is a 8 2048 kbit/s or 1544 kbit/s framed electrical interface
board.
! The PM1D board is a 16 2048 kbit/s or 1544 kbit/s framed electrical interface
board.
They mainly perform mapping and demapping of 2048 kbit/s or 1544 kbit/s signals
and provide TPS function.
The PM1S/PM1D board can be installed in Slot 4, 5, 6, 10, 11, 12.
A PM1S/PM1D board can be 1: 5 protected with other PM1S/PM1D boards, you must
install the PM1S/PM1D boards in Slot 4, 5, 6, 10 or Slot 11 to serve as working board
2.5.1 Functions
! Maps and multiplexes 2048 kbit/s or 1544 kbit/s signals into the VC-4 signal,
and demaps and demultiplexes the VC-4 signal into 2048 kbit/s or 1544 kbit/s
signals.
! Provides 100 /120 balanced interfaces. The interface characteristics
comply with ITU-T Recommendation G.703.
! Supports Cyclic Redundancy Check (CRC), and the board can detect bit errors
in the received signals.
! Provides tributary inloop and outloop functions for testing.
! Supports the re-timing function (Not supported in the T1 mode).
2.5.2 Principle
PM1D/PM1S board is shown in Figure 2-10.


2-19

Cross - connect
unit
Interface
Moudle
Decoder Mapping
Logical
control
modul
FSCC board
Encoder Demapping
Cross - connect
unit
Cross - connect
unit
E1/T1
E1/T1
Interface
module
Decoder Mapping
Logical
control
module
Encoder Demapping
C12/C12S
C12/C12S
Cross - connect
unit
Cross - connect
unit
Interface
Moudle
Decoder Mapping
Logical
control
modul
Encoder Demapping
Cross - connect
unit
Cross - connect
unit
E1/T1
Interface
module
Decoder Mapping
Logical
control
module
Encoder Demapping
C12/C12S
C12/C12S
Cross - connect
unit

Figure 2-10 Block diagram of the PM1D/PM1S board

The incoming 2048 kbit/s or 1544 kbit/s signal passes the interface module and
enters decoder for decoding. Then, the recovered NRZ data and clock signals are
sent to the mapping module.
In the mapping module, the 2048 kbit/s or 1544 kbit/s signal sent by decoder is
mapped asynchronously to the C-12, and then forms the VC-12 after the path
overhead processing. Then, it transforms into TU-12 after pointer processing and
then is multiplexed to get the VC-4. Finally, the VC-4 is sent to the cross-connect unit.

X3
VC-4 TUG-3
TU-12
VC-12
C-12
X3
TUG-2
X7
2048 kbit/s
1544 kbit/s

Figure 2-11 Process of mapping and multiplexing 2048 kbit/s or 1544 kbit/s signals

extracts the binary data and clock signal to send to the encoder. After encoding, the
HDB3 or B8ZS data signal is output through the interface module.


2-20

# ## # Note:
The code patterns of 2048 kbit/s and 1544 kbit/s signals are HDB3 and B8ZS
respectively.

2.5.3 Front Panel
The PM1S and PM1D front panels are shown in Figure 2-12 and Figure 2-13.
PM1S
STATE

Figure 2-12 The PM1S front panel

PM1D
STATE

Figure 2-13 The PM1D front panel

There are indicators on the front panel of PM1S and PM1D, indicating the board
working status.


2-21

Indicator

Table 2-6 gives a description to the alarm indicator of the PM1S and PM1D
board.
Table 2-6 Description of indicator of PM1S/PM1D
working status.
STATE
(green)

Interface PM1S and PM1D provide no interface on their front panels. C12 is needed
for the input and output of 2048 kbit/s or 1544 kbit/s signal. For details about
C12, refer to 2.16 E1/T1 Interface Commutator Board (C12).
When TPS is configured for PM1S and PM1D, C12S is needed for the input
and output of 2048 kbit/s or 1544 kbit/s signal. For details about C12S, refer
to 2.17 E1/T1 Electrical Interface Switching & bridge Board (C12S).


Main parameters that should be configured for PM1S/PM1D are as follows:
Payload
loading
indication
Tributary
Loopback
Path service
type
2048 kbit/s or 1544 kbit/s can be selected according to the input service type.


2-22

Description
Item
PM1S PM1D
Rate 2048 kbit/s or 1544 kbit/s
Processing capability 82048 kbit/s or 1544 kbit/s 162048 kbit/s or 1544 kbit/s
Support Code HDB3, B8ZS
Connectors DB78
Power consumption (W) 4.2 W 5.6 W
Interface specifications 2048 kbit/s 1544 kbit/s
Input jitter tolerance Satisfies G.823 Satisfies G.824
Output jitter B1(20 Hz to 100 kHz) 0.4 UI
B2(18 kHz to 100 kHz) 0.075 UI
B1(10 Hz to 40 kHz) 1.5 UI
B2(10 kHz to 40 kHz) 0.1 UI
Allowable frequency
50 ppm 50 ppm
Environment



2-23

2.6 E1 Electrical Interface Board
(PF1S/PF1D)
! The PF1S board is an 8 2048 kbit/s framed electrical interface board.
! The PF1D board is an 16 2048 kbit/s framed electrical interface board.
They mainly perform mapping and demapping of 2048kbit/s framed signals and
provide TPS function.
The PF1S/PF1D board can be installed in Slot 4, 5, 6, 10, 11, 12.
A PF1S/PF1D board can be 1: 5 protected with other PF1S/PF1D boards, you must
install the PF1S/PF1D boards in Slot 4, 5, 6, 10 or Slot 11 to serve as working board
2.6.1 Functions
! Maps and multiplexes 2048 kbit/s signals into the VC-4 signal, and demaps
and demultiplexes the VC-4 signal into 2048 kbit/s signals.
! Provides 75 unbalanced interfaces. The interface characteristics comply with
ITU-T Recommendation G.703.
! Supports Cyclic Redundancy Check (CRC), and the board can detect bit errors
in the received signals.
! Provides tributary inloop and outloop functions for testing.
! Supports the re-timing function.
2.6.2 Principle
PF1D/PF1S board is shown in Figure 2-14.


2-24

connect
connect
Cross -
unit
Interface
Moudle
Decoder Mapping
Logical
control
modul
FSCC board
Encoder Demapping
Cross -
unit
Cross - connect
unit
E1
E1
Interface
module
Decoder Mapping
Logical
control
module
FSCC board
Encoder Demapping
C12/C12S
C12/C12S
Cross - connect
unit
connect
connect
Cross -
unit
Interface
Moudle
Decoder Mapping
Logical
control
modul
FSCC board
Encoder Demapping
Cross -
unit
Cross - connect
unit
E1
E1
Interface
module
Decoder Mapping
Logical
control
module
FSCC board
Encoder Demapping
C12/C12S
C12/C12S
Cross - connect
unit

Figure 2-14 Block diagram of the PF1D/PF1S board

The incoming E1 framing signal passes the interface module and enters decoder for
decoding. Then, the recovered NRZ data and clock signals are sent to the mapping
module.
In the mapping module, the framed 2048 kbit/s signal sent by decoder is mapped
asynchronously to the C-12, and then forms the VC-12 after the path overhead
multiplexed to get the VC-4. Finally, the VC-4 is sent to the cross-connect unit.

TUG-3 TUG-2 TU-12
VC-12
C-12
2048 kbit/s
VC-4
X3 X7 X3

Figure 2-15 Process of mapping and multiplexing 2048 kbit/s signals

extracts the binary data and clock signal to sends to the encoder. After encoding, the
HDB3 data signal is output by the interface module.


2-25

2.6.3 Front Panel
The PF1S and PF1D front panels are shown in Figure 2-16 and Figure 2-17.
PF1S
STATE

Figure 2-16 The PF1S front panel

PF1D
STATE

Figure 2-17 The PF1D front panel

There are indicators on the front panel of PF1S and PF1D, indicating the board
working status.
Indicator

Table 2-7 gives a description to the alarm indicator of the PF1S and PF1D
board.
Table 2-7 Description of indicator of PF1S/PF1D
working status.
STATE
(green)

Interface PF1S and PF1D provide no interface on their front panels. C12 is needed
for the input and output of 2048kbit/s framed signal. For details about C12,
refer to 2.16 E1/T1 Interface Commutator Board (C12).


2-26

When TPS is configured for PF1S and PF1D, C12S is needed for the input
and output of 2048 kbit/s framed signal. For details about C12S, refer to
2.17 E1/T1 Electrical Interface Switching & bridge Board (C12S).


Main parameters that should be configured for PF1S/PF1D are as follows:
Payload
loading
indication
Tributary
Loopback

Description
Item
PF1S PF1D
Rate 2048 kbit/s
Processing capability 82048 kbit/s 162048 kbit/s
Support Code HDB3
Connectors DB78
Power consumption (W) 4.2 W 5.6 W
Input jitter tolerance Satisfies G.823
Output jitter B1(20 Hz to 100 kHz) 0.4UI
B2(18 kHz to 100 kHz) 0.075UI
Allowable frequency
50 ppm


2-27

Description
Item
PF1S PF1D
Environment



2-28

2.7 E3/DS3 Electrical Interface Board
(PL3)
The PL3 board is a 3 34368 kbit/s or 3 44736 kbit/s electrical interface board with
75 impedance.
The PL3 board can be installed in Slot 4, 5, 6, 10, 11, 12.
A PL3 board can be two groups of 1:3 protected with other PL3 boards, you must
install the PL3 board in Slot 4 or 5 to serve as working board and in Slot 6 to serve as
protect board. Or you must install the PL3 board in Slot 10 or 11 to serve as working
board and in Slot 12 to serve as protect board.
2.7.1 Functions
! Maps and multiplexes 3 34368 kbit/s or 44736 kbit/s signals to the VC-4, and
demaps and demultiplexes the VC-4 into 3 34368 kbit/s or 44736 kbit/s
signals.
! Provides inloop and outloop functions at the tributary for testing.
! Supports signal input equalization to enhance the transmission distance of the
signal.
! Supports the board information query.
! Supports two groups of 1: 1 or 1: 2 TPS.
2.7.2 Principle
Take one channel-signal input and output for example, the block diagram of the PL3
board is shown in Figure 2-18.


2-29

connect
connect
Cross -
unit
Interface
Moudle
Decoder Mapping
Logical
control
modul
FSCCboard
Encoder Demapping
Cross -
unit
Cross - connect
unit
E3/DS3
Interface
module
Decoder Mapping
Logical
control
module
FSCCboard
Encoder Demapping
C34S
C34S
Cross - connect
unit
connect
connect
Cross -
unit
Interface
Moudle
Decoder Mapping
Logical
control
modul
FSCCboard
Encoder Demapping
Cross -
unit
Cross - connect
unit
E3/DS3
E3/DS3
Interface
module
Decoder Mapping
Logical
control
module
FSCCboard
Encoder Demapping
C34S
C34S
Cross - connect
unit

Figure 2-18 Block diagram of the PL3 board

In Receiving Direction
The incoming 34368 kbit/s or 44736 kbit/s signal passes the interface module and
enters decoder for decoding. Then, the recovered NRZ data and clock signals are
sent to the mapping module.
In the mapping module, the 34368 kbit/s or 44736 kbit/s signal sent by decoder is
mapped asynchronously to the C-3, and then forms the VC-3 after the path overhead
multiplexed into VC-4 and sent to the cross-connect unit.
x 3
44736 kbit/s
VC-4 TUG-3 TU-3
VC-3
C-3
34368 kbit/s

Figure 2-19 Process of mapping and multiplexing 34368 kbit/s or 44736 kbit/s signal

In Transmitting Direction
extracts the binary data and clock signal to send to the encoder. After encoding, the
HDB3 or B3ZS data signal is output by the interface module.


2-30

# ## # Note:
The code patterns of 34368 kbit/s and 44736 kbit/s signals are HDB3 and B3ZS
respectively.

Logical control module: This module fulfills communication with FSCC. It reports the
board information, alarm and performance to FSCC and receives the configuration
command from FSCC.
2.7.3 Fornt Panel
The PL3 board front panel is shown in Figure 2-20.
PL3
STATE

Figure 2-20 The PL3 board front panel

There is an indicator on the front panel of PL3, indicating the board working
status.
Indicator

Table 2-8 gives a description to the alarm indicator of the PL3 board.
Table 2-8 Description of indicator of PL3
working status.
STATE
(green)

Interface There are no interface connectors on the PL3 board front panel. To
input/output 34368 kbit/s or 44736 kbit/s signals, it should be used together
with the C34S board.
When TPS is configured for PL3, C34S and TSB3 are needed for the input
and output of 34368 kbit/s or 44736 kbit/s signal. For details about C34S
and TSB3, refer to 2.18 E3/DS3 Electrical Interface Switching Board
(C34S) and 2.19 E3/DS3 Switching & bridging Board (TSB3).


2-31


Main parameters that should be configured for PL3 are as follows:
Payload
loading
indication
If the path is loaded with service, Loaded must be selected.
Tributary
Loopback
Path service
type
34368 kbit/s and 44736 kbit/s can be selected according to the input
service type.

Description
Item
PL3
Rate 34368 kbit/s or 44736 kbit/s
Processing capability 334368 kbit/s or 44736 kbit/s
Support Code HDB3, B3ZS
Connectors BNC
Weight (g) 250 g
Power consumption (W) 4.18 W
Interface specifications 34368 kbit/s 44736 kbit/s
Input jitter tolerance Satisfies G.823 Satisfies G.824
Output jitter B1(100 Hz to 800 kHz) 0.4UI
B2(10 kHz to 800 kHz) 0.075UI
B1(10 Hz to 400 kHz) 0.4UI
B2(30 kHz to 400 kHz) 0.1UI
Allowable frequency
20 ppm 20 ppm


2-32

Description
Environment



2-33

2.8 10M/100M Ethernet Electrical
Interface Board (ET1D)
ET1D is a 2 10M/100M Ethernet electrical interface board, responsible for access,
transparent transmission and switching of 2 10M/100Mbit/s IEEE 802.3-compliant
Ethernet services.
ET1D can be seated in Slot 4, 5, 6, 10, 11 and 12.
2.8.1 Functions
! Provides two 10M/100M adaptive Ethernet interfaces and supports 10BASE-T
and 100BASE-TX cable connection.
! Accesses 2 10M/100M IEEE 802.3-compliant Ethernet services.
! Provides semi-duplex and full-duplex working modes.
! Supports the 10M/100M Ethernet service being mapped into 32 VC-12s at
most.
! Supports IEEE 802.3-compliant flow control function.
! Provides Virtual Local Area Network (VLAN) identification and VLAN-based
convergence of the Ethernet service.
! Provides Medium Access Control (MAC)-based Layer 2 switching.
! Supports Internet Group Management Protocol (IGMP) snooping and dynamic
multicast route study function, dynamically configuring the multicast.
! Supports IEEE 802.1d-compliant Spanning Tree Protocol (STP).
! Supports configuration and query of static route.
! Provides mailbox module for communication with FSCC board. It reports the
alarm and performance events to NM and receives the setting command from
NM.
2.8.2 Principle
The principle block diagram of ET1D is shown in Figure 2-21.


2-34

FSCC board
10M/100Mbit/s
Ethernet
frame
access
Segmenting
and
rearranging
Framing
and
deframing
Mapping
and
demapping
Cross-connect unit
Mailbox
10M/100Mbit/s

Figure 2-21 Principle block diagram of ET1D

The Ethernet frame access module performs decoding, serial/parallel conversion and
CRC check to the Ethernet signal from external cable, and then sends the signal to
the segmenting and rearranging module.
At the segmenting and rearranging module, the incoming signal is segmented
according to the Multi-link Point-to-Point Protocol (ML-PPP) and then transferred to
the framing and deframing module, where the signal is encapsulated and converted
into E1 signal and passed to the mapping and demapping module.
The mapping and demapping module maps the VC-12 signal into VC-4 and then
sends it to the cross-connect unit for lower-order cross-connect.
The VC-4 signal from the cross-connect unit is demapped into VC-12 signal by the
mapping and demapping signal then sent to the framing and deframing module.
The framing and deframing module performs framing to the E1 signal and then sends
it to the segmented and rearranging module, where the signal is rearranged and sent
to the Ethernet frame access module as Ethernet frame.
The Ethernet frame access module performs serial/parallel conversion and encoding
to the Ethernet frame and sends it to the external cable.
Mailbox: The mailbox fulfills communication with FSCC board.


2-35

2.8.3 Front Panel
The front panel of ET1D is shown in Figure 2-22.
ET1D

Figure 2-22 Front panel of ET1D

There are indicators on the front panel of ET1D indicating the board working status,
and network ports for input and output of Ethernet services.
Indicator

Table 2-9 gives a description to the indicator of the ET1D board.
Table 2-9 Description of indicators of ET1D
5 times every other second NE software is being loaded
3 times every other second NE software is being deleted
Once every other second NE software is lost, waiting for
loading
RUN (green)

Once every other two
second
Normal operation state
Off No alarm
Once every other second Minor alarm
2 times every other second Major alarm
ALM (red)
3 times every other second Critical alarm
Normally on The link connection is normal.
Green Ethernet port
indicator (right) link
status indicator
Normally off The link breaks or is not
established.
Flash or normally on Data are being transmitted.
Yellow Ethernet port
indicator (left) data
status indicator
Normally off There is no data
transmitted/received.


2-36

Interface ! FE1: the first 10M/100M auto-negotiated Ethernet port, using RJ-45
connector.
! FE2: the second 10M/100M auto-negotiated Ethernet port, using RJ-45
connector.
Figure 2-23 shows the pinouts of the RJ-45 connector.

1 8 7 6 5 4 3 2
1
2
3
6
TX+
TX-
RX+
RX-
No. Signal

Figure 2-23 Pinouts of RJ-45 connector of ET1D


Main parameters that should be configured for ET1D are as follows:
TAG identifier The Ethernet port that can identify and transmit data packets with 802.1Q tag
head is called Tag port, otherwise it is called Untag port.
Working mode The working mode for the port can be set to auto-negotiated, 10M
semi-duplex/full-duplex, or 100M semi-duplex full-duplex
Port enabling Set the working mode of port. When service is configured for the port, the
port must be set as enabled.
MAC layer
loopback
It is used to locate the faults in MAC layer. When this diagnosis function is
used, service in corresponding path will be interrupted
PHY layer
loopback
It is used to locate the faults in PHY layer. When this diagnosis function is
used, service in corresponding path will be interrupted
Flow control
enabling
Set the enabling status of the port flow control function. Usually, this
function is enabled.


2-37

Description
Item
ET1D
Connector RJ-45
Processing capability 2 10M/100M Ethernet services
Dimensions (mm) 245 mm (L) 100 mm (W) 2 mm (H)
Weight (g) 300 g
Power consumption (W) 17 W
Environment

Long-term working conditions: 0C ~ 45C 10% to 90%


2-38

2.9 3-Channel FE/GE Processing
Board EMS3
EMS3 is a 3-channel FE/GE processing board providing the switching function to
access and switch two channels of 10M/100M and one channel of 1000M Ethernet
services
The EMS3 board can be seated in Slot 4, 5, 10 or Slot 11.
2.9.1 Functions
! Provide two RJ-45 10M/100M Ethernet electrical interfaces to access
10BASE-T and 100BASE-TX.
! Provide one LC 1000M Ethernet optical interface to access 1000BASE-SX/LX.
! The electrical characteristics of the Ethernet interfaces comply with IEEE
802.3x.
! Map three channels of Ethernet services into 1~126 VC-12s or six VC-3s.
! Provide reliable transmission channels for users using SDH protection (MSP
and SNCP).
! Support autosensing, half duplex and full duplex modes.
! Support layer 2 switching of Ethernet data.
! Support Link Capacity Adjustment Scheme (LCAS).
! Support transparent transmission and convergence of FE services.
! Support the application of Ethernet Virtual Private Line (EVPL) and Ethernet
Private Line (EPL).
! Support the application of two virtual LAN services: Ethernet Private LAN
(EPLAN) and Ethernet Virtual Private LAN (EVPLAN).
! Support Martini encapsulation frame format that is compliant with
Multi-Protocol Label Switching (MPLS).
! Support Committed Access Rate (CAR), the bandwidth adjustment granularity
being 64kbps.
! Support MAC self-learning, broadcast, multicast, and Rapid Spanning Tree
Protocol (RSTP).
! Provide subscriber security isolation and VLAN security isolation insider
subscribers.


2-39

! Support the filtering to MAC addresses and the suppression to broadcast
packets.
! Provide bandwidth sharing and statistic multiplexing based on VLAN and port
to improve bandwidth utility.
! Encapsulate packets by following Generic Framing Procedure (GFP), Link
Access Protocol-SDH (LAPS) and High level Data Link Control (HDLC)
protocols.
! Receive and transmit testing frames (the frame format is unified by the Core
Networks Division of NEC).
! Support the identification and transparent transmission of packet frame in
online test.
! Provide multiple inloop and outloop methods to enable fast location and
elimination of faults.
! Report the flow statistics and alarms of frames.
2.9.2 Principles
The EMS3 board can only access and process two channels of 10/100M Ethernet
services when it is used alone. However, it can process up to six channels of 10/100M
Ethernet services when used together with ETF4.
Figure 2-24 shows the working principle of EMS3. In the figure, six channels of
10/100M and one channel of 1000M Ethernet services are accessed and processed.
2!FE
Electrical
interface
module
Optical
interface
module
Service
processing
module
Encapsulation/
decapsulation
module
Mapping/
demapping
module
4!FE
1!GE
ETF4 6!FE
Cross-
connect
unit
1!GE
Logic contril
module
FSCC

Figure 2-24 Principle block diagram of EMS3
In receive direction
The 10/100M Ethernet data signal from ETF4 and the signal cable is decoded and
converted into parallel signal at the Ethernet electrical interface module, and then is


2-40

sent to the service processing module.
The GE optical signal from the optical fiber is converted to electrical signal prior to
decoding and serial/parallel conversion at the optical interface module, and then is
sent to the service processing module.
In service processing module, the parallel data signals from the electrical and optical
interfaces are performed with packet framing and CRC. And they are marked with
Tunnel and VC labels.
Then the data signals are encapsulated in the encapsulation/decapsulation module.
In the mapping/demapping module, the encapsulated signals are mapped into VC12
or VC3 and then output to the cross-connect unit.
In transmit direction
The signal from the cross-connect unit is sent to the decapsulation module after being
demapped.
In the encapsulation/decapsulation module, the demapped signal is decapsulated to
Ethernet data signal.
Then the service processing module extracts the Tunnel and VC labels of the signal,
and forwards it.
The Ethernet electrical interface module converts the received data signal to serial
one, codes it and then sends it to the signal cable and ETF4.
The Ethernet optical interface module converts the received data signal to serial one,
codes it and then coverts the coded signal to optical signal, and sends it to the optical
fiber for transmission.
Auxiliary unit
Logical control module: It provides the function to communicate with SCC and monitor
the performance of Ethernet data services.


2-41

2.9.3 Front Panel
Figure 2-25 shows the front panel of EMS3.

Figure 2-25 Front panel of EMS3
The front panel provides indicators to indicate the working state of the board, and
provides interfaces to input/output Ethernet service signals.
Indicator
Table 2-10 gives the description of indicators on EMS3.

Table 2-10 Description of indicators on EMS3.
Indicator Status Meaning
Flashing five
times every
second
Loading the NE software
Flashing three
times every
second
Deleting the NE software
Flashing once
every second
Wait to load the NE software for the original
one is lost
RUN (green)
Flashing once
every other
second
Normal
Off No alarm occurs to NE.
Flashing once
every other
second
Minor alarm occurs to NE
ALM (red)
Flashing twice
every other
second
Major alarm occurs to NE


2-42

Flashing three
times every other
second
Critical alarm occurs to NE
On The link is normal
LINK
Off The link is interrupted or not connected
Flashing or On The data is in transmission
ACT
Off No data is transmitted
On The link is normal Green indicator at
Ethernet interface
connection
status
Off The link is interrupted or not connected
Flashing or On The data is in transmission Yellow indicator at
Ethernet interface
data status Off No data is transmitted

Interface
Table 2-11 shows the description of interfaces on the front panel of EMS3.

Table 2-11 Description of interfaces on the front panel of EMS3
Interface Description Interface
type
FE1 The first 10M/100M autosensing Ethernet interface. RJ-45
FE2
The second 10M/100M autosensing Ethernet
interface.
RJ-45
OUT The output interface for GE optical signal.
IN The input interface for GE optical signal.
LC

Figure 2-26 shows the pins on the RJ-45 connector of the EMS3 board.


2-43

1 8 7 6 5 4 3 2
1
2
3
6
TX+
TX-
RX+
RX-
No. Signal

Figure 2-26 Pins on RJ-45 connector of EMS3
Main parameters that should be configured for EMS3 are as follows:
! TAG mark
Tag port refers to an Ethernet port that can identify and transmit packets with VLAN
TAG header. The TAG mark of this port is set to Tag aware.
While an Ethernet port that cannot identify and transmit packets with VLAN TAG
header is named as Access port, whose TAG mark is Access.
An Ethernet port that can receive and transmit packets with or without VLAN TAG
header is called Hybrid port, whose TAG mark is Hybrid.
! Working mode
The working mode of the port can be autosensing, 10M half/full duplex, or 100M
half/full duplex.
! Port enable
It indicates the working status of a port. A port must be enabled when it is configured
with services.
! Flow control enable
The flow control function of a port is usually enabled.
! Forwarding filter table
The forwarding filter table contains the slot information, VB name, VLAN ID and
correspondence between VB ports.


2-44

Description
Parameter
EMS3
Interface type Two RJ-45 connectors and a pair of LC connectors
Processing
capability
It can process two channels of 10M/100M Ethernet services and one channel
of 1000M Ethernet service when used alone; it can process six channels of
10M/100M Ethernet services and one channel of 1000M Ethernet service
when used together with ETF4.
Dimensions
(mm)
245mm (L) 100mm (W) 2mm (H)
Weight (g)
Power
consumption (W)
25W
Environment
Long-term working conditions: Short-term working conditions:
Temperature: 0C to 45C Temperature: 5C to 50C
Humidity: 10% to 90% Humidity: 5% to 95%
For storage: For transportation:
Temperature: 40C to +70C Temperature: 40C to +70C
Humidity: 10% to 100% Humidity: 10% to 100%


2-45

2.10 4-Channel 10M/100M BaseT Fast
Ethernet Interface Unit ETF4
The 4-channel 10M/100M base-T fast Ethernet interface unit (ETF4) provides four
10M/100M autosensing base-T user interfaces. It is used with EMS3 board to expand
the 10M/100M user interface on EMS3.
The ETF4 board can be seated in Slot 24, 25, 30 or Slot 31.
2.10.1 Functions
! Provide four 10BASE-T/100BASE-TX user interfaces.
! Expand the 10BASE-T/100BASE-TX user interfaces on EMS3 board from two
channels to six channels.
! Board reset function.
! Hot swappable.
2.10.2 Principles
The ETF4 board comprises four base-T user interfaces, as shown in Figure 2-27.
Backplane
EMS3
4
FSCC
10BASE-T or Network
interface
connection
module
4
100BASE-TX

Figure 2-27 Principle block diagram of ETF4
In receive direction
Four channels of 10M/100M signals from the external cable reach the backplane
through the network interface connection module, and then exchange data with the
EMS3 board through the backplane.
In transmit direction
The network interface connection module receives the four channels of 10M/100M
signals from the EMS3 board through the backplane, and then sends them to the
external cable.


2-46

Auxiliary Unit
Auxiliary circuit module:
! Each network interface of the ETF4 board has an indicator. The auxiliary circuit
receives from the EMS3 board the signal for turning on the indicator. Through
the backplane, it reports the signals to the FSCC board and receives the control
command issued by the FSCC board.
2.10.3 Front Panel
Figure 2-28 shows the appearance of the ETF4 board.

Figure 2-28 Appearance of ETF4
The ETF4 board provides interfaces to input/output the Ethernet service signals on
the front panel, each interface has an indicator to show the transmission status of
data.
Indicator
The description of indicators at the Ethernet interface of ETF4 is shown in Table 2-12.

Table 2-12 Description of indicators at the Ethernet interface of ETF4
On The link is normal
Green indicator at
Ethernet interface
Connection status Off
The link is interrupted or not
connected
Flashing or On The data is in transmission Yellow indicator at
Ethernet interface
data status Off No data is transmitted

Interface
Table 2-13 gives the description of interfaces on the front panel of ETF4.


2-47

Table 2-13 Description of interfaces on the front panel of ETF4
Interface Description Interface type
FE3
The third 10M/100M autosensing
Ethernet interface.
FE4
The fourth 10M/100M autosensing
Ethernet interface.
FE5
The fifth 10M/100M autosensing
Ethernet interface.
FE6
The sixth 10M/100M autosensing
Ethernet interface.
RJ-45
Note: FE1 and FE2 are on the front panel of EMS3.

Figure 2-29 shows the pins on the RJ-45 connector of ETF4.
1 8 7 6 5 4 3 2
1
2
3
6
TX+
TX-
RX+
RX-
No. Signal

Figure 2-29 Pins on RJ-45 connector of ETF4
The ETF4 board supports the interchange of input signals and output signals through
pins 1, 2, 3 and 6.
Description
Parameter
ETF4
Interface rate 10M/100M
Interface number Four
Dimensions 366.7mm (L) 120mm (W) 2mm (D)
Weight
Power consumption 1W


2-48

2.11 System Control &
Communication Board (FSCC)
The FSCC board is a system control & communication board.
It performs management on synchronous equipment and executes communication
among them. It also provides interfaces for the equipment to connect with the
transmission network management system.
The FSCC board can be installed in Slot 3.
2.11.1 Functions
! Communicates with various boards of the NE, implements the configuration of
various function units, and collects performance parameters and alarm data.
! Process six DCCs to enable remote system management interface.
! Provides audio and visual alarms for the MMSP-600.
! Supports hot-swapping.
2.11.2 Principle
Figure 2-30 shows the block diagram of the FSCC board. It is mainly composed of
system control unit and communication unit.


2-49

Ethernet
CPU
Inner memory
RS232
F
2

i
n
t
e
r
f
a
c
e
Overhead time-
division multiplexing
module
T
o
/
f
r
o
m

l
i
n
e

b
o
a
r
d
R
J
4
5

i
n
t
e
r
f
a
c
e
T
o
/
f
r
o
m

o
v
e
r
h
e
a
d
p
r
o
c
e
s
s
i
n
g

b
o
a
r
d
T
o
/
f
r
o
m

c
r
o
s
s
-
c
o
n
n
e
c
t

a
n
d
Bus
System control unit
Communication unit
D
C
C

2
M
b
/
s
Buzzer

Figure 2-30 Block diagram of the FSCC board

System Control Unit
The unit consists of Center Processing Unit (CPU), inner memory, buzzer etc. It
mainly performs Synchronous Equipment Management Function (SEMF) and
Message Communication Function (MCF). It provides control processing interfaces
for various boards via the drive on the FSCC board, and performs initialization and
configuration of various boards. It also monitors and collects the alarms and
performance data of the boards. It deals with four DCCs and performs management
to remote system. Audio alarm and NE ID are also the provision of the system control
unit.
Communication Unit
The unit mainly provides Q and F interfaces, required for the network management. It
implements time-division switching of the system overhead buses. It also provides
Ethernet interface and RS-232 interface on the FSCC board front panel, for the
network management.


2-50

2.11.3 Front Pannel
The FSCC front panel is shown in Figure 2-31.
FSCC

Figure 2-31 The FSCC front panel

Switch ! RESET is used to restart the system. To avoid any incident, this button is
only accessed by a sharp-pointed object.
! ALMCUT is an alarm cutoff switch, and it should be ON during normal
operation. When critical alarm is received by the FSCC board, an alarm
sound will be generated. To clear audiable alarm indications, switch the
ALMCUT to OFF and then ON.
Indicator

Table 2-14 gives a description to the indicator of the FSCC board.
Table 2-14 Description of indicators of FSCC
loading
RUN (running
indicator)

Once every other two second Normal operation state
Off No alarm
ALM (alarm
indicator)

On Data is being transmitted.
Yellow
Off No data is transmitted.
On Link connection is normal.
Ethernet
interface
indicator
Green
Off Link is broken or not
connected.


2-51

Interface ! F&f interface
F&f is an RS-232 type interface and is used in communication with the
transmission network management system. A DB9 socket is available for
interconnection, its pin assign is shown in Figure 2-32.
9876
1 2 3 4 5
No.
Signal
2 RS232RXD
GND
3
RS232TXD
5
1,4,6,7,8 NC
Figure 2-32 F&f interface

! Ethernet interface
Ethernet interface is an RJ-45 socket and is used for NMS communication,
there are two indicators on the its port.
Ethernet interface is shown in Figure 2-33.

1 8 7 6 5 4 3 2
1
2
3
6
TX+
TX-
RX+
RX-
No. Signal

Figure 2-33 Pinouts of RJ-45 connector of FSCC


2-52

2.11.4 DIP Switches
The MMSP-600 supports setting NE ID through software other than DIP switches.
The DIP switches on the FSCC use a 4-bit mode. Figure 2-34 shows the position of
them on FSCC.
Front panel
Mode DIP switches
0 1 2 3
There are totally four bits for the DIP switches, bit sequence of 3210 from high to low.
It is "0" when the switch is put upward, and "1" when put downward.
If the debugging mode 3 is desired, the DIP switches should be set as 0011.
That is, put the bits 3 and 2 upward, and the bits 1 and 0 downward.
If the BIOS mode 5 is desired, the DIP switches should be set as 0101.
That is, put the bits 3 and 1 upward, and the bits 2 and 0 downward.

Figure 2-34 Location of DIP switches on the FSCC

# ## # Note:
The mode DIP switches are used for equipment debugging. All of them are in "0"
position during the equipment operation.


2-53

Common parameter settings for the FSCC board include:
! Gateway setting
! Extended ID
! Extended ECC parameter settings
Description
Item
FSCC
Interface type F&f, Ethernet
Weight (g) 300 g
Environment



2-54

2.12 Cross-connect & Timing Board
(XCS/XCS1/XCS4)
! The XCS is a cross-connect & timing board.
! The XCS1 is a cross-connect & timing board with STM-1 line unit.
! The XCS4 is a cross-connect & timing board with STM-4 line unit.
The working of the line units on the XCS1 and the XCS4 boards are independent,
their functions and working principle can refer to 2.2 STM-1 Optical Interface Board
(OSB1) and 2.3 STM-4 Optical Interface Board (OSB4).
The XCS/XCS1/XCS4 board can be installed in Slot 7 and Slot 8 (displayed as Slot
17 and Slot 18 on NM).
2.12.1 Functions
! Provides full cross-connection with the capacity of 2020 VC-4, fulfilling service
grooming at the VC-4 or VC-12 level.
! Provides synchronization clock sources for itself and the system.
! Queries the information about board making.
! Provides board temperature check function.
! Provides main control service data backup.
! Detects and controls the TPS.
! Provides 1+1 hot backup for the board, ensuring the reliability of the
cross-connect and timing subsystems running in the entire system.
2.12.2 Principle
Block diagram of the working principle is shown in Figure 2-35.


2-55

Cross-connect
module
Clock module
Main
control
data
backup
module
VC-4 BUS
Clock signal
Clock signal
STIA/STIB board
Service processing
boards
Service processing
boards

Figure 2-35 Block diagram of the XCS/XCS1/XCS4 board

Cross-connect Module
This module grooms service between the service boards. The MMSP-600 does not
support time division (TD) cross-connect but space division (SD) cross-connect only.
# ## # Note:
SD cross-connect refers to the cross-connect between the same VC-12 timeslots in
different VC-4s, as shown by (a) in Figure 2-36.
TD cross-connect refers to the cross-connect between different VC-12 timeslots in
different VC-4s, as shown by (b) in Figure 2-36.
The MMSP-600 supports cross-connects between the tributary board port and the
VC-12 timeslot are supported.


2-56

#2 VC-4
#3 VC-4
#1 VC-4
#4 VC-4
#1 VC-4
#2 VC-4
#3 VC-4
#4 VC-4
1
1 2 1
1 2
2
#2 VC-4
#3 VC-4
#1 VC-4
#4 VC-4
#1 VC-4
#2 VC-4
#3 VC-4
#4 VC-4
1
1 2 1
1 2
2
2
a
b

Figure 2-36 SD cross-connect and TD cross-connect

Clock Module
This module implements source selection, detection, phase locking to the system
clock, switches the active and standby XCS boards, and communicates with FSCC
through mailbox.
Main Control Data Backup Module
This module backs up the main control data. When the FSCC board goes faulty, the
new FSCC board replaced can read the configuration data from this module and no
data re-configuration is needed.
2.12.3 Front Panel
Appearances of the front panel of the XCS, the XCS1 and XCS4 are shown in Figure
2-37, Figure 2-38 and Figure 2-39.
XCS
ACT
RUN

Figure 2-37 The XCS front panel

(a)
(b)


2-57

XCS1
IN OUT LOS
RUN
ACT

Figure 2-38 The XCS1 front panel

XCS4
IN OUT LOS
RUN
ACT

Figure 2-39 The XCS4 front panel

Indicator

Table 2-15 gives a description to the indicator of the XCS, XCS1 and XCS4
boards.
Table 2-15 Description of indicators of XCS, XCS1 and XCS4
Off No alarm occurs to the board LOS
(Red) On R_LOS alarm occurs to the board.
Flashing 5 times every second. NE software is being loaded.
Flashing 3 times every second. NE software is being deleted.
Flashing once every second. NE software is lost, awaiting for
loading
RUN
(Green)
Flash once every two seconds. Normal operation state
Off The board works normally in the
active state. ACT
(Green) On The board works normally in the
standby state.

Interface ! There is no interface on the XCS front panel.
! The XCS1 board provides one pair of SC/PC connector to process 1 X
STM-1 signal.


2-58

! The XCS4 board provides one pair of SC/PC connector to process 1 X
STM-4 signal.


Main parameters that should be configured for XCS/XCS1/XCS4 are as
follows:
Protection
parameter
! Active board
Generally, Slot 7 is set as active slot.
! Standby board
Generally, Slot 8 is set as standby slot.

Clock
parameter
settings
! Clock source and priority table.
! Clock quality.
! External clock source mode and Synchronization status byte.
! Phase-lock source of external clock output.
! Clock source switching conditions and Clock source restoration
parameters.
! Clock subnet.


2-59

Description
Item
XCS XCS1+OSB1 XCS4+OSB4
Cross-connect capability
20 20 VC-4
1260 1260 VC-12
Cross-connect level VC-4, VC-12
Weight (g) 350 g 400 g 420 g
Power consumption (W) 6.5 W 7.8 W 8.4 W
Environment

Short-term working conditions: -5C to 50C 5% to 95%
For storage: -40C to +70C 10% to 100%
For transportation: -40C to +70C 10% to 100%


2-60

2.13 Engineering Orderwire Board
(FEOW)
The FEOW board is an engineering orderwire board, and mainly performs extraction
and insertion of the overhead bytes. It provides orderwire phone, transparent data
transmission or Boolean inputs/outputs.
The FEOW board can be installed in Slot 9.
2.13.1 Functions
! Extracts/inserts E1, E2, and F2 bytes.
! Provides one channel of orderwire phone over E1/E2 byte and supports
addressing call and conference call.
! Provides four transparent data transmission (RS-232) broadcast interfaces,
namely, S1, S2, S3 and S4 via F2, X1, X2 and X3 bytes, with the maximum
data transmission rate of 19.2 kbit/s per channel. It also supports the
point-to-point and point-to-multipoint data transmission.
! The four data interfaces can be multiplexed for three Boolean inputs and one
Boolean output.
2.13.2 Principle
Block diagram of the FEOW board is shown in Figure 2-40. It mainly implements the
extraction and insertion of overhead bytes such as E1, E2 and F2 and other user data
interface bytes. The orderwire phone channel and data interfaces are also available.


2-61

User circuit
Data circuit
Boolean circuit
FPGA
Phone interface
S1,S2,S3,S4
S1:The first data interface (Input of the first boolean)
S2:The second data interface (Input of the second boolean)
S3:The third data interface (Input of the third boolean)
S4:The fourth data interface (Boolean output )

Figure 2-40 Block diagram of the FEOW board

The FEOW board includes user circuit module, data circuit module, Boolean module
and FPGA module.
User Circuit Module
It provides one orderwire phone interface, complete function of phone.
Data Interface and Boolean Circuit Module
It provides physical interface of the peripheral data terminal equipment. It provides
complete transparent data transmission, asynchronous RS-232 serial ports. The
RS-232 serial port is optional and its maximum transmission rate is 19.2 kbit/s. The
four RS-232 serial ports can be multiplexed into three Boolean inputs and one
Boolean output.
FPGA Module
It performs the functions of processing and detection of the signaling, generation of
the frame header and clock, clock detection and switching.
2.13.3 Front Panel
From Figure 2-41, there is one phone interface and four RS-232 transparent data (or
three Boolean inputs/one Boolean output) interfaces on the FEOW board.


2-62

FEOW

Figure 2-41 The FEOW board

Indicator

Table 2-16 gives a description to the indicator of the FEOW board.
Table 2-16 Description of indicators of the FEOW
On Normal link connection Connection status
indicator (Green,
right) Off Link interrupted or not connected
Flashing or On Data being transmitted Data status
indicator (Orange,
left) Off No data transceiving

Interface ! PHONE interface
It is an orderwire phone interface, working in Dual Tone Multi Frequency
(DTMF) mode, using E1/E2 overhead byte.
The orderwire phone interface is an RJ-11 socket, its pin number is
shown in Figure 2-42.
3
4
1.2.5.6
1 6 5 4 3 2
No. Signal
Signal
Signal
NC

Figure 2-42 RJ-11 pin number ring

! S1 to S4 interfaces
S1 to S4 are single-row 4-port RJ-45 network port connectors, used for
transparent data transmission or Boolean signal transmission.
When interfaces S1, S2, S3 and S4 are used as data interfaces, they use
the bytes X3, X2, X1 and F2 respectively. Figure 2-43 shows the


2-63

positions of these bytes in the STM frame structure.
A1 A1 A1 A2 A2 A2 J1 J0M
B1 E1 F1
D1 D2 D3 C2
H11 H12 H13 H21 H22 H23 H31 H32 H33 G1
B21 B22 B23 K1 K2 F2
D4 X1 X2 D5 D6 H4
D7 D8 D9 F3
D10 D11 D12
X3 K3
S1 M1 E2 N1
B3 J1M

Figure 2-43 Positions of X3, X2, X1 and F2 bytes in the STM frame structure
For S1~S4 interfaces the pin numbering is shown in Figure 2-44, and the
pin assignments are respectively listed in Table 2-17, Table 2-18, Table
2-19 and Table 2-20.
1 8 7 6 5 4 3 2

Figure 2-44 RJ-45 pin numbering

Table 2-17 Pin assignment of S1 interface
Pin number Signal Functions
1 PGND Protection ground
2 RS-232RXD_1 RS-232 receiving data (1F2)
3 RS-232TXD_1 RS-232 transmitting data(1F2)


2-64

5 DGND Digital ground
7 KGIN_1 The first Boolean input
8 KGINGND_1 The first Boolean input ground

7 KGIN_2 The second Boolean input
8 KGINGND_2 The second Boolean input ground

7 KGIN_3 The third Boolean input
8 KGINGND_3 The third Boolean input ground


2-65

3 RS-232TXD_4 RS-232 transmitting data (4F2)
7 KGOUTA Boolean output A
8 KGOUTB Boolean output B


Main parameters for the FEOW board include telephone call parameters
and data server parameters:
Telephone call ! Telephone number
! Call waiting time
! Orderwire phone occupation byte E1/E2

Data server ! Working mode
! Broadcast data source
! Broadcast data sink

Description
Item
FEOW
Number of Boolean
interface
3 Boolean inputs and 1 Boolean output
Number of orderwire
interface
1
Number of Data interface 4


2-66

Description
Weight (g) 350 g
Environment



2-67

2.14 Power Board (SPIU)
The SPIU board is a power board. It provides two 48 V/60 V DC power inputs to the
equipment. Since power supply is critical for every system, two SPIUs are used in the
MMSP-600, which provide backup to each other.
The PIU board can be installed in Slot 1 and Slot 2.
2.14.1 Functions
! Provides the access of 48 V/60 V DC, with the allowed voltage ranging
38.4 V to 72 V DC.
! Executes the Electro Magnetic Compatibility (EMC) protection, undervoltage
and buffer startup protection of the power supply.
! Supports board temperature check function.
! Provides 1+1 hot backup mode, increases the reliability of the equipment.
! Communicates with FSCC.
2.14.2 Principle
Block diagram of the SPIU board is shown in Figure 2-45.
EMC
Undervoltage
protection
module
Output circuit
module
Communication
module
FSCC board
Boards
-48V/-60V

Figure 2-45 Block diagram of the SPIU board

The 48 V/60 V DC power supply from the secondary power supply system
undergoes EMC protection processing, passes the undervoltage and overcurrent
protection module, and then is output with desired voltage for respective boards by
the output circuit.
The following is the description of each functional module.


2-68

EMC Protection Module
It performs lightning protection and reverse insertion protection of the 48 V/60 V
power input to guarantee the subsequent circuits will not be damaged.
Undervoltage Protection Module
It realizes the undervoltage and surge current protection.
When the input voltage is below the undervoltage protection point (36.6 V), the
power input will be disconnected.
Board swapping is supported through the suppression of surge current.
Output Circuit Module
It converts the input DC power supply into the system operating voltage.
Communication Module
It collects the board working statuses, environmental temperature and the alarms of
the damages caused by lightning shock and reports the monitoring results to the
FSCC board.
2.14.3 Front Panel
The front panel of SPIU board is shown in Figure 2-46.

Figure 2-46 The SPIU board front panel


2-69

Switch There is a power switch on the SPIU front panel.
On: Equipment power is on.
Off: Equipment power is off.
Indicator

Table 2-21 gives a description to the indicator of the SPIU board.
Table 2-21 Description of indicator of the SPIU
On Board is normal. OUT
(green) Off Input voltage is abnormal or PIU board fails.

Interface Through DB3 socket 48/60 V DC power supply is attached to it. The
voltage range of power should be 38.4 to 72 V DC.

Common parameters for PIU board include:
! Temperature upper limit and lower limit
! Input power upper limit and lower limit
Description
Item
SPIU
Input voltage 48 V/60 V
Input voltage range 38.4 V to 72 V
Weight (g) 550 g
Environment



2-70

2.15 Fan Interface Board (FAN)
The FAN board contains two fans and is used for heat dissipation of the equipment.
The FAN board can be installed in Slot 13.
2.15.1 Functions
! Regulates the fan speed. If the temperature is very high and beyond the upper
threshold, the fan will rotate at higher speed. While it will lower the speed if the
temperature is lower.
! High maintenance ability. If any of the fans stop rotating, an alarm will be
reported to the SCC board. Correspondingly, the red indicator of the FAN will
be on.
! Supports hot-swapping.
! Supports the environmental temperature query of the fan board.
! Support the query of board information.
2.15.2 Principle
Block diagram of the FAN unit is shown in Figure 2-47, followed by the brief
introduction of these units.
Local
temperature
detection
module
Fan control
module
Fans
Fans failure
detection
module
FSCC board FSCC board
Board
information
Alarm
indicator
FSCC board

Figure 2-47 Block diagram of the FAN

Local Temperature Detection Module
It detects the surrounding temperature.


2-71

Fan Control Module
It determines the operating voltage of the fans and controls their speeds according to
the temperature detected by the Local temperature detection module, and as well as
the temperature information of other circuit boards collected by FSCC board.
Fans Failure Detection Module
It detects the on/off state of the fans. When either of the two fans stops, an alarm will
be reported to the FSCC board, and the corresponding alarm indicator of the FAN will
be on. When both the fans stop running, the FAN not-in-position alarm will be reported
to the FSCC board.
2.15.3 Front Panel
The front panel of FAN is shown in Figure 2-48.

Figure 2-48 The FAN front panel

There are two indicators, one handle and one Electrostatic Discharge (ESD) jack on the
FAN front panel.
Handle Handle Used to draw out the air filter and FAN board.
Indicator

Table 2-22 gives a description to the indicator of the FAN board.
Table 2-22 Description of indicators of FAN
Indicator Status Description Remark
On FAN 1 stops running
FAN1 ALM
Off FAN 1 is normal
FAN 1 is near the front
panel, as shown in Figure
2-49
On FAN 2 stops running FAN2 ALM
Off FAN 2 is normal
FAN 2 is away from the
front panel, as shown in
Figure 2-49.


2-72

connector
FAN1
ALM
FAN2
ALM
FAN2 FAN1
Front

Figure 2-49 The position of the fans on the FAN
Interface ESD jack Used to insert static wrist.

Common parameters for the FAN board include:
! Temperature threshold


2-73

Item Description
Number of fans 2
Weight 9.5 kg
Environment



2-74

2.16 E1/T1 Interface Commutator
Board (C12)
C12 is a 16% 2048 kbit/s or 1544 kbit/s signal conversion board, and is used together
with the PL1D, PL1S, PM1D, PM1S, PF1D, PF1S boards to achieve electrical
transfer of 2048 kbit/s or 1544 kbit/s signals.
C12 board is seated in the Slot 24, 25, 26, 30, 31, 32.
2.16.1 Front panel
The front panel of the C12 is shown in Figure 2-50.
C12
1 16

Figure 2-50 The C12 front panel

Interface A DB78 connector on the C12 front panel provides 2048 kbit/s or 1544 kibt/s
interface for the electrical interface board.
Figure 2-51 shows the DB78-connector pin numbering, followed by Table
2-23 listing its pinouts.
12 11 10 9 16 15 14 13 17 20 19 4 3 2 1 5 8 7 6 18
31 30 29 28 35 34 33 32 36 39 38
23 22 21 24 27 26 25
37
51 50 49 48 55 54 53 52 56 59 58
43 42 41 40 44 47 46 45 57
70 69 68 67 74 73
72 71 75 78 77 62 61 60 63 66 65 64 76

Figure 2-51 The DB78 connector of the C12 board


2-75

Table 2-23 . Pinouts of DB78 interface
Pin No. Signal Functions Pin No. Signal Functions
2 RP1 1st positive input 6 RP9 9th positive input
22 RN1 1st negative input 26 RN9 9th negative input
31 TP1 1st positive output 35 TP9 9th positive output
12 TN1 1st negative output 16 TN9 9th negative output
41 RP2 2nd positive input 45 RP10 10th positive input
61 RN2 2nd negative input 65 RN10 10th negative input
70 TP2 2nd positive output 74 TP10 10th positive output
51 TN2 2nd negative output 55 TN10 10th negative output
3 RP3 3rd positive input 7 RP11 11th positive input
23 RN3 3rd negative input 27 RN11 11th negative input
32 TP3 3rd positive output 36 TP11 11th positive output
13 TN3 3rd negative output 17 TN11 11th negative output
42 RP4 4th positive input 46 RP12 12th positive input
62 RN4 4th negative input 66 RN12 12th negative input
71 TP4 4th positive output 70 TP12 12th positive output
52 TN4 4th negative output 51 TN12 12th negative output


2-76

1 GND Protection ground 40 GND Protection ground

Description
Item
C12
Number of interfaces 16
Interface type DB78
Support rate 2048 kbit/s, 1544 kbit/s
Support impedance 75 /100/120
Weight (g) 250 g
Environment



2-77

2.17 E1/T1 Electrical Interface
Switching & bridge Board (C12S)
The C12S board is a 162048 kbit/s or 1544 kbit/s electrical interface switching &
bridge board, and is used together with the 75 /120 /100 interface boards to
achieve electrical transfer of 2048kbit/s or 1544kbit/s signals.
When TPS is configured for the equipment, C12S can be seated in Slot 24, 25, 26, 30
and 31.
If there is no TPS configured for the equipment, C12S can be seated in Slot 24, 25, 26,
30, 31 and 32.
2.17.1 Functions
! Leads out 2048 kbit/s or 1544 kbit/s services of corresponding slots to the
cable.
! Accepts the command and control of electrical interface protection control
signals and leading out services of working slots to the cable when no switching
occurs.
! Leads out service signals of protection slots to the cable via relay switch array
when switching occurs.
2.17.2 Principle
The working principle of the C12S is shown in Figure 2-52.
DB78
conne
ctor
Cable
Cable
Slot4,5,6,10,11
Slot12
Slot4,5,6,10,11
Slot12
Switching
control module

Figure 2-52 Working principle of the C12S

Taking the input and output of E1/T1 signal as example, the working principle of C12S
is as follows:


2-78

In normal conditions, the switch of the switching control module points to the E1/T1
electrical interface boards in working slots, while it points to the one in protection slot
when the switching event occurs.
2.17.3 Front Panel
The front panels of the C12S is shown in Figure 2-53.

Figure 2-53 The C12S front panel

Interface A DB78 connector on the C12S front panel provides 2048 kbit/s or 1544 kibt/s
interface for the electrical interface board.
Figure 2-54 shows the DB78-connector pin numbering, followed by Table
2-24 listing its pinouts.
12 11 10 9 16 15 14 13 17 20 19 4 3 2 1 5 8 7 6 18
31 30 29 28 35 34 33 32 36 39 38
23 22 21 24 27 26 25
37
51 50 49 48 55 54 53 52 56 59 58
43 42 41 40 44 47 46 45 57
70 69 68 67 74 73
72 71 75 78 77 62 61 60 63 66 65 64 76

Figure 2-54 The DB78 connector of the C12S board

Table 2-24 . Pinouts of DB78 interface
2 RP1 1st positive input 6 RP9 9th positive input
22 RN1 1st negative input 26 RN9 9th negative input
31 TP1 1st positive output 35 TP9 9th positive output
12 TN1 1st negative output 16 TN9 9th negative output
41 RP2 2nd positive input 45 RP10 10th positive input
61 RN2 2nd negative input 65 RN10 10th negative input


2-79

70 TP2 2nd positive output 74 TP10 10th positive output
51 TN2 2nd negative output 55 TN10 10th negative output
3 RP3 3rd positive input 7 RP11 11th positive input
23 RN3 3rd negative input 27 RN11 11th negative input
32 TP3 3rd positive output 36 TP11 11th positive output
13 TN3 3rd negative output 17 TN11 11th negative output


2-80


Description
Item
C12S
Number of interfaces 16
Interface type DB78
Support impedance
75
120/100
Weight (g) 250 g
Power consumption (W) Normally state: 0.5 W
Switching state: 4.92 W
Environment



2-81

2.18 E3/DS3 Electrical Interface
Switching Board (C34S)
The C34S is a 3 34368 kbit/s or 44736 kbit/s switching board. It works with PL3 to
transfer the 34368 kbit/s or 44736 kbit/s signal.
The C34S board is installed in Slot24, 25, 26, 30, 31, and 32 when no TPS protection
is provided. When TPS protection is provided the C34S is installed in Slot24, 25, 30,
31.

2.18.1 Functions
! Works with PL3 to transfer the 34368 kbit/s or 44736 kbit/s signal.
! Participated in the TPS of PL3.
2.18.2 Principle
The working principle of the C34S board is shown in Figure 2-55.
BNC
conne
ctor
Cable
Cable
Slot4,5,10,11
Slot6,12
Switching
control module
Slot4,5,10,11
Slot6,12
Protection bus
Protection bus

Figure 2-55 Working principle of the C34S board

Taking the input and output of E3/DS3 signal as example, the working principle of
C34S is as follows:
In normal conditions, the E3/DS3 signal from cable passes through the switching
control module and input to the PL3s in working Slot 4, 5, 10 and 11.


2-82

When the TPS event is detected by the equipment, the E3/DS3 signal from cable is
switched to the protection bus by the switching control module and sent to the TSB3
in Slot 26 and 32.
In normal conditions, The E3/DS3 signal from PL3s in working Slot 4, 5, 10 and 11
passes through the switching control module and is output to cable for transmission.
When the TPS event is detected by the equipment, the E3/DS3 signal from TSB3s in
Slot 26 and 32 will be received by the switching control module from the protection
bus and then output to cable for transmission.
2.18.3 Front Panel
The front panel of the C34S is shown in Figure 2-56.
C34S

Figure 2-56 The C34S front panel

Interface The three pairs of BNC connectors on the front panel of C34S are
TX1/RX1, TX2/RX2 and TX3/RX3.
! TX1: Output of the first channel of signal
! RX1: Input of the first channel of signal
! TX2: Output of the second channel of signal
! RX2: Input of the second channel of signal
! TX3: Output of the third channel of signal
! RX3: Input of the third channel of signal



2-83

Description
Item
C34S
Number of interfaces Three pairs of
Interface type BNC
Support impedance 75
Weight (g) 400 g
Environment



2-84

2.19 E3/DS3 Switching & bridging
Board (TSB3)
The TSB3 is a 3 34368 kbit/s, 44736 kbit/s signal switching & bridging board. It
works with PL3 and C34S to fulfill TPS of the 34368 kbit/s, 44736 kbit/s electrical
signal.
When the equipment is configured with TPS, the TSB3 can be seated in Slot 26 and
32.
2.19.1 Functions
The TSB3 works with PL3 and C34S to fulfill TPS of the 34368 kbit/s, 44736 kbit/s
electrical signal.
2.19.2 Principle
The principle block diagram of TSB3 is shown in Figure 2-57.
Slot6,12
Switching
control module
Protection bus
Slot25,31
Slot24,30
Protection bus

Figure 2-57 Principle block diagram of TSB3

Taking the input and output of the E3/DS3 signal as example, the working principle of
TSB3 is as follows:
If the PL3 in Slot 5 or 11 fails, the E3/DS3 signal will be input by the C34 in Slot 25 or
31, it then passes through the switching control module and is input to the PL3 in Slot
6 or 12.
If the PL3 in Slot 4 or 10 fails, the E3/DS3 signal will be input by the C34 in Slot 24 or
30, it then passes through the switching control module and is input to the PL3 in Slot
6 or 12.


2-85

If the PL3 in Slot 5 or 11 fails, the E3/DS3 signal will be output by the PL3 in protection
Slot 6 or 12, it then passes through the switching control module and is sent to the
C34S in Slot 25 or 31.
If the PL3 in Slot 4 or 10 fails, the E3/DS3 signal will be output by the PL3 in protection
Slot 6 or 12, it then passes through the switching control module and is sent to the
C34S in Slot 24 or 30.
2.19.3 Front Panel
The front panel of TSB3 is shown in Figure 2-58.
TSB3

Figure 2-58 The TSB3 front panel

Description
Item
TSB3
Processing capability 3 E3/DS3
Connector None
Rate 34368 kbit/s, 44736 kbit/s
Impedance 75
Weight (g) 175 g


2-86

Description
Item
TSB3
Environment
Short-term working conditions: -5C to 50C 5% to 95%
For storage: -40C to +70C 10% to 100%
For transportation: -40C to +70C 10% to 100%


2-87

2.20 Synchronous Timing Interface
Board (STIA/STIB)
The STIA and STIB are used for the MMSP-600, they are used together with the
XCS/XCS1/XCS4 to input and output 2048 kHz or 2048 kbit/s clock signals.
! The STIA board is a 75 synchronous timing interface board.
! The STIB board is a 120 synchronous timing interface board.
The STIA/STIB board can be installed in Slot 21 of the MMSP-600.
2.20.1 Functions
! Processes two 2048 kHz or 2048 kbit/s clock signal.
! Control output/input two 2048 kHz or 2048 kbit/s external clocks via board
software.
! Provides 75 and 120 interfaces.
! Processes synchronization status byte S1.
2.20.2 Principle
The block diagram of the STIA/STIB board is shown in Figure 2-59, including the
receiving and transmitting parts.
External clock
External clock Clock signal
processing
module
Control
module
2 MHz
2 Mbit/s
XCS/XCS1/
XCS4
board

Figure 2-59 Block diagram of the STIA/STIB/STIC/STID


2-88

The incoming 2 MHz or 2 Mbit/s signal passes through the clock signal processing
unit and control unit and is sent to the XCS/XCS1/XCS4 board.
The 2M clock signal from XCS passes through the control unit and clock signal
processing unit and is output to the external clock interface. The rate of the output
clock signal may be either 2 MHz or 2 Mbit/s.
2.20.3 Front Panel
Front panel of the STIA and STIB are shown in Figure 2-60, and Figure 2-61.

Figure 2-60 Front panel of the STIA

STIB

Figure 2-61 Front panel of the STIB


2-89

Interface The interface description of the STIA and STIB boards are shown in Table
2-25.
Table 2-25 The interface description of the STIA and STIB board
Board name Interface description
STIA There are two pairs of SMB (SMBY-TK32-C) sockets on the front
panel of the STIA, they provide interfaces for 2048 kHz or 2048
kbit/s clock signal.
STIB There is a DB9 connector on the front panel of the STIB, it provides
interface for 2048 kHz or 2048 kbit/s clock signal.
The pin assignment of DB9 is shown in Table 2-26.

Table 2-26 Pin assignment of DB9
3 GND Protection ground
5 EXT1R+ 1st external clock positive input
9 EXT1T+ 1st external clock positive output
4 EXT1R- 1st external clock negative input
8 EXT1T- 1st external clock negative output
7 EXT2T+ 2nd external clock positive input
2 EXT2R+ 2nd external clock positive output
6 EXT2T- 2nd external clock negative input
1 EXT2R- 2nd external clock negative output

Item Description
Clock reference 2 (Output and Input)
Interface type SMB (SMBY-TK32-C)
Clock signal 2048 kbit/s, 2048 kHz


2-90
E

Item Description
Weight (g) 200 g
Environment


DOI-N08145

3-1

3 Cables Description

This chapter introduces the architecture and pin assignments of cables of the
MMSP-600.
The following cables are used for the MMSP-600:
! 75 E1 cable
! 120 E1/T1 cable
! 75 E3/DS3 cable
! Power cable
! PGND cable
! Clock cable
! Network cable
! Fiber
3

Cables Description DOI-N08145

3-2

3.1 75 E1 Cable
3.1.1 Structure
Structure of the 75 cable is shown in Figure 3-1.

Metal screw
W1~W4

Figure 3-1 Structure of the 75 E1 cable

The pin assignments of the DB78 connector for 75 E1 cable are shown in Figure
3-2.
1
39 21
59
40
78 60
20

Figure 3-2 Pin assignments of DB78 connector for 75 E1 cable

The 75 E1 cable comprises four coaxial cables, namely W1, W2, W3 and W4.
Each coaxial cable is composed of eight cores, numbered 1 through 8 on the sheath
respectively. Figure 3-3 shows the arrangement of these eight cores.


3-3

2
3
4
1
8
7
6 5

Figure 3-3 Arrangement of the eight cores

3.1.2 Pin Assignments
The 75 E1 cable is terminated with a DB78 connector, for connecting the 75 E1
electrical interface board of the MMSP-600.
Table 3-1 shows the pin assignments of DB78 connector for 75 E1 cable.
Table 3-1 Pin assignments of the DB78 connector for 75 E1 cable
Cable
Pin
No.
Signal
Core
No.
Remarks Cable
Pin
No.
Signal
Core
No.
Remarks
2 Tip 4 Tip
22 Ring
1 R1
24 Ring
1 R5
31 Tip 33 Tip
12 Ring
2 T1
14 Ring
2 T5
41 Tip 43 Tip
61 Ring
3 R2
63 Ring
3 R6
70 Tip 72 Tip
51 Ring
4 T2
53 Ring
4 T6
3 Tip 5 Tip
23 Ring
5 R3
25 Ring
5 R7
32 Tip 34 Tip
13 Ring
6 T3
15 Ring
6 T7
42 Tip 44 Tip
62 Ring
7 R4
64 Ring
7 R8
W1
71 Tip 8 T4
W2
73 Tip 8 T8


3-4

Cable
Pin
No.
Signal
Core
No.
Remarks Cable
Pin
No.
Signal
Core
No.
Remarks
52 Ring 54 Ring
6 Tip 8 Tip
26 Ring
1 R9
28 Ring
1 R13
35 Tip 37 Tip
16 Ring
2 T9
18 Ring
2 T13
45 Tip 47 Tip
65 Ring
3 R10
67 Ring
3 R14
74 Tip 76 Tip
55 Ring
4 T10
57 Ring
4 T14
7 Tip 9 Tip
27 Ring
5 R11
29 Ring
5 R15
36 Tip 38 Tip
17 Ring
6 T11
19 Ring
6 T15
46 Tip 48 Tip
66 Ring
7 R12
68 Ring
7 R16
75 Tip 77 Tip
W3
56 Ring
8 T12
W4
58 Ring
8 T16

Cable Type
SFYZTP-75-2-1 8
Core number
8 core
Connector
DB78
Length
10 m, 15 m, 20 m, 30 m, 40 m


3-5

3.2 120 E1/T1 Cable
3.2.1 Structure
Structure of the 120 E1/T1 cable is shown in Figure 3-4.
Metal screw
W1~W4

Figure 3-4 Structure of the 120 E1/T1 cable

The pin assignments of the DB78 connector for 120 E1/T1 cable are shown in
Figure 3-5.
1
39 21
59
40
78 60
20

Figure 3-5 Pin assignments of DB78 connector for 120 E1/T1 cable

The 120 E1/T1 cable comprises four twisted pairs, namely W1, W2, W3 and W4.
Each twist-pair cable is composed of eight twisted pairs, numbered 1 through 8 on
the sheath respectively.


3-6

The 120 E1/T1 cable is terminated with a DB78 connector, for connecting the 120
E1/T1 electrical interface board of the MMSP-600.
Table 3-2 shows the pin assignments of DB78 connector for the 120 E1/T1 cable.
Table 3-2 Pin assignments of the DB78 connector for 120 E1/T1 cable
Cable
Pin
No.
Core color
Core
No.
Remarks Cable
Pin
No.
Core color
Core
No.
Remarks
2 Blue 6 Blue
22 White/Blue
Pair1 R1
26 White/Blue
Pair1 R9
41 Orange 45 Orange
61 White/Orange
Pair2 R2
65 White/Orange
Pair2 R10
3 Green 7 Green
23 White/Green
Pair 3 R3
27 White/Green
Pair 3 R11
42 Brown 46 Brown
62 White/Brown
Pair 4 R4
66 White/Brown
Pair 4 R12
4 Gray 8 Gray
24 White/Gray
Pair 5 R5
28 White/Gray
Pair 5 R13
43 Red 47 Red
63 White/Red
Pair 6 R6
67 White/Red
Pair 6 R14
5 Black 59 Black
25 White/Black
Pair 7 R7
29 White/Black
Pair 7 R15
44 Yellow 48 Yellow
W1
64 White/Yellow
Pair 8 R8
W2
68 White/Yellow
Pair 8 R16
31 Blue 35 Blue
12 White/Blue
Pair1 T1
16 White/Blue
Pair1 T9
70 Orange 74 Orange
51 White/Orange
Pair2 T2
55 White/Orange
Pair2 T10
32 Green 36 Green
13 White/Green
Pair 3 T3
17 White/Green
Pair 3 T11
W3
71 Brown Pair 4 T4
W4
75 Brown Pair 4 T12


3-7

Cable
Pin
No.
Core color
Core
No.
Remarks Cable
Pin
No.
Core color
Core
No.
Remarks
52 White/Brown 56 White/Brown
33 Gray 37 Gray
14 White/Gray
Pair 5 T5
18 White/Gray
Pair 5 T13
72 Red 76 Red
53 White/Red
Pair 6 T6
57 White/Red
Pair 6 T14
34 Black 38 Black
15 White/Black
Pair 7 T7
19 White/Black
Pair 7 T15
73 Yellow 77 Yellow

54 White/Yellow
Pair 8 T8

58 White/Yellow
Pair 8 T16

Cable Type SEYPVPV-120-8 2 0.5
Core number 8 core
Connector DB78
Length 10 m, 15 m, 20 m, 30 m, 40 m


3-8

3.3 E3/DS3 Cable
3.3.1 Structure
Structure of the 75 E3/DS3 cable is shown in Figure 3-6.
BNC Connecter
Heat shrink tube Main label

Figure 3-6 Structure of the 75 E3/DS3 cable

Cable Type RG59/U
Connector BNC
Length 15 m, 30 m


3-9

3.4 Power Cable
3.4.1 Structure
Structure of the power cable is shown in Figure 3-7.

A2
A1
A3
A
Injection molding screw
Tag 1 Main tag
X

Figure 3-7 Structure of the 48 V/60 V DC power cable

The power cable is terminated with a 3-core connector, for connecting the power
board of the MMSP-600.
The power cable is composed of two wires. Table 3-3 shows the pin assignments of
the 3-core connector.
Table 3-3 Pin assignments of the 3-core connector for power cable
Cable Pin Core color
W1 A1 (48 V/60 V) Blue
W2 A3 (ground) Black


3-10

Cable Type UL2562-18AWG
Connector 3 pin plug
Length 15 m, 30 m


3-11

3.5 PGND Cable
3.5.1 Structure
Structure of the PGND Cable is shown in Figure 3-8.
Mai n l abel
OT termi nal
Heat shri nk tube

Figure 3-8 Structure of the PGND grounding Cable


3-12

3.6 75 Clock Cable
3.6.1 Structure
Structure of the 75 clock cable is shown in Figure 3-9.

Figure 3-9 Structure of the 75 clock cable

The 75 clock cable is terminated with an SMB (SMBY-TK32-C) connector, for
connecting the 75 clock interface board of the MMSP-600.


3-13

3.7 120 Clock Cable
3.7.1 Structure
Structure of the 120 clock cable is shown in Figure 3-10.
Main tag
A
Injection molding screw

Figure 3-10 Structure of the 120 clock cable

The 120 clock cable is terminated with a DB9 connector, for connecting the 120
clock interface board of the MMSP-600. Table 3-4 shows the pin assignments of the
DB9 connector.
Table 3-4 Pin assignments of the DB9 connector for 120 clock cable
Cable Pin No. Core color Remarks
1 Blue T2R-
2 White/Blue T2R+
3 Braid -
4 Orange T1R-
5 White/Orange T1R+
6 Green T2T-
7 White/Green T2T+
8 Brown T1T-
W
9 White/Brown T1T+


3-14

Cable Type
SEYPVPV-120-4 2 0.4
Connector DB9
Length 5 m, 30 m


3-15

3.8 Network Cable
3.8.1 Structure
Structure of the network cable is shown in Figure 3-11.

Network Interface Connector
Label 1 Label 2 Main Label
A
A
W
X2 X1
8
1
8
1

Figure 3-11 Structure of the network cable

Both ends of the network cable are terminated with RJ-45 connectors, for
connecting the NM computer and the MMSP-600 NM interface.
Figure 3-12 shows the RJ-45 connector.
PIN #1
PIN #8

Figure 3-12 RJ-45 connector

The network falls into straight through cable and crossover cable.
! Straight through cable: Connects the NM computer and the MMSP-600
through HUB.
! Crossover cable: Directly connects the NM computer and the MMSP-600.


3-16

Straight Through Network Cable
Table 3-5 shows the pin assignments of the X1 connector for straight through cable.
Table 3-5 Pin assignments of the X1 connector for straight through cable
X1 connector pin No. 8-core twisted pair X2 connector pin No.
1 White/orange 1
2 Orange 2
3 White/green 3
4 Blue 4
5 White/blue 5
6 Green 6
7 White/brown 7
8 Brown 8

Crossover Network Cable
Table 3-6 shows the pin assignments of the crossover cable.
Table 3-6 Pin assignments of the X1 connector for crossover cable
X1 connector pin No. 8-core twisted pair X2 connector pin No.
1 White/ orange 3
2 Orange 6
3 White/ green 1
4 Blue 4
5 White/ blue 5
6 Green 2
7 White/ brown 7
8 Brown 8


3-17

Cable Type
CC4P0.5P445U(S)
Connector RJ-45
Length 10 m, 20 m


3-18
E

3.9 Fiber
3.9.1 Structure
Structure of the fiber is shown in Figure 3-13.

Figure 3-13 Structure of the fiber

Cable Type
Optical connector-SC/PC-single mode
Connector SC/PC
Length 2 m, 5 m, 15 m, 20 m, 25 m, 30 m, 35 m, 50 m

DOI-N08145

A-1

A Power Consumption

This chapter summarizes the power consumption of the equipment and respective
boards for convenient query of the user.
A.1 Power Consumption of the
MMSP-600
Full configuration: 6ETID+2XCS4+2PIU+FSCC+FEOW+STIA
Typical configuration: ETID+PL1S+2XCS1+2PIU+FSCC
Equipment
type
MMSP-600
Power
consumption
Full configuration: 146W
Typical configuration: 56W


A-2
E

A.2 Power Consumption of the
Boards
Board name
Power consumption
(W)
Board name
Power consumption
(W)
SPIU 9 ET1D 17
FSCC 2.5 FAN 9
FEOW 5 C34S 0.8
XCS 6.5 TSB3 0.5
XCS1+OSB1 7.8 STIA 1.74
XCS4+OSB4 8.4 STIB 1.74
PL1S 3.0 STIC 1.74
PL1D 4.0 STID 1.74
PF1S 4.2 C12S Normal state:0.5
Switching state:4.92
PF1D 5.6 SL1 4
PM1S 4.2 SD1 4.5
PM1D 5.6
PL3 4.18

DOI-N08145

B-1

B Board Indicators

This chapter collects the description of indicators for the MMSP-600 boards,
convenient for your reference.
B.1 SL1/SD1
Off No alarm occurs to the SL1 board.
LOS (red)
On Alarm occurs to the SL1 board.
Off No alarm occurs to the first pair of optical
LOS1 (red)
On Alarm occurs to the first pair of optical interface of
the SD1 board.
Off No alarm occurs to the second pair of optical
LOS2 (red)
On Alarm occurs to the second pair of optical


B-2

B.2 PL1D/PL1S
working status. STATE
(green) On The board is not configured with service, or the

B.3 PM1D/PM1S

B.4 PF1D/PF1S

B.5 PL3


B-3

B.6 ET1D
loading
RUN (green)

Once every other two
second
Normal operation state
Off No alarm
ALM (red)
Normally on The link connection is normal.
Green Ethernet port
indicator (right) link
status indicator
Normally off The link breaks or is not
established.
Flash or normally on Data are being transmitted.
Yellow Ethernet port
indicator (left) data
status indicator
Normally off There is no data
transmitted/received.


B-4

B.7 XCS/XCS1/XCS4
Off No alarm occurs to the board LOS
(Red) On R_LOS alarm occurs to the board.
Flashing 5 times every second. NE software is being loaded.
Flashing 3 times every second. NE software is being deleted.
Flashing once every second. NE software is lost, awaiting for
loading
RUN
(Green)
Flash once every two seconds. Normal operation state
Off The board works normally in the
active state. ACT
(Green) On The board works normally in the
standby state.
B.8 FSCC
loading
RUN (running
indicator)

Once every other two second Normal operation state
Off No alarm
ALM (alarm
indicator)

On Data is being transmitted.
Yellow
Off No data is transmitted .
On Link connection is normal.
Ethernet
interface
indicator
Green
Off Link is broken or not
connected.


B-5

B.9 FEOW
On Normal link connection Connection status
indicator (Green,
right) Off Link interrupted or not connected
Flashing or On Data being transmitted Data status
indicator (Orange,
left) Off No data transceiving

B.10 PIU
On Board is normal. OUT
(green) Off Input voltage is abnormal or PIU board fails.

B.11 FAN
On FAN 1 stops running
FAN1 ALM
Off FAN 1 is normal
On FAN 2 stops running FAN2 ALM
Off FAN 2 is normal


B-6
E


DOI-N08145

C-1

C Acronyms

Acronyms Full name
ADM Add/Drop Multiplexer
ALS Automatic Laser Shutdown
CPU Center Processing Unit
CRC Cyclic Redundancy Check
DCC Data Communication Channel
DTMF Dual Tone Multi Frequency
ECC Embedded Control Channel
EMC Electro Magnetic Compatibility
EMI ElectroMagnetic Interference
ESD Electrostatic Discharge
ID IDentity
IEC International Electrotechnical Commission
ITU-T International Telecommunication Union - Telecommunication
Standardization Sector
LSB Least Significant Bit
MCF Message Communication Function


C-2
E

Acronyms Full name
MSB Most Significant Bit
NRZ Non Return to Zero code
PDH Plesiochronous Digital Hierarchy
SDH Synchronous Digital Hierarchy
SEMF Synchronous Equipment Management Function
SSM Synchronization Status Message
TPS Tributary Protection Switching
TUG Tributary Unit Group

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DOI-N08145

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