AMMC-6650

DC40 GHz Variable Attenuator

Data Sheet

Chip Size: 1530 m x 660 m (61.2 x 26.4 mils)

Chip Size Tolerance: 10 m (0.4 mils)
Chip Thickness: 100 10 m (4 0.4 mils)
Pad Dimensions: 80 x 120 m (3.2 x 4.8 mils)

Description

Features

The AMMC-6650 is a voltage controlled variable attenuator designed to operate from DC-40 GHz. It is fabricated
using Avago Technologies enhancement mode pHEMT
MMIC process with backside ground vias, and gate lengths
of approximately 0.25um. The distributed topology of the
AMMC-6650 facilitates broadband operation by absorbing
parasitic effects of its series and shunt FETs. An on-chip DC
reference circuit may be used to maintain optimum VSWR
for any attenuation setting or to provide more linear
attenuation versus voltage response.

Wide Frequency Range DC-40 GHz

Attenuation Range 20dB
Single Positive Bias Supply
Unconditionally Stable

Applications
Microwave Radio Systems
Satellite VSAT, DBS Up / Down Link
LMDS & Pt Pt mmW Long Haul

Simplified Schematic

Broadband Wireless Access (including 802.16 and

802.20 WiMax)
WLL and MMDS loops
DC
reference circuit

variable
attenuator

RFin

DCin

V1

DCout

RFout

V2

Attention: Observe precautions for

handling electrostatic sensitive devices.
ESD Machine Model = 80 V
ESD Human Body Model = 400 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.

Table 1. Absolute Maximum Ratings

Symbol

Parameters and Test Conditions

Unit

Minimum

Maximum

V1

Voltage to Control VSWR

1.6

V2

Voltage to Control Attenuation

1.6

Pin

RF Input Power

dBm

17

Tch

Operating Channel Temperature

+150

Tstg

Storage Temperature

-65

+150

Tmax

Maximum Assembly Temperature

+300
for 60 seconds

Notes:
Operation in excess of any one of these conditions may result in permanent damage to this device.
The absolute maximum ratings for V1, V2 and Pin were determined at an ambient temperature of 25C unless noted otherwise.

Table 2. DC Specifications
Symbol

Parameters

Test Conditions

Unit

Min

Typical

Max

Ic_V1_ref

V1 Control Current (Min Attenuation)

V1=1.5 V, V2=0 V

mA

1.93

2.0

Ic_V2_ref

V2 Control Current (Min Attenuation)

V1=1.5 V, V2=0 V

uA

0.8

2.5

Ic_V1_max

V1 Control Current (Max Attenuation)

V1=0V, V2=1.25 V

uA

1.1

2.5

Ic_V2_max

V2 Control Current (Max Attenuation)

V1=0 V, V2=1.25 V

mA

1.41

1.5

Notes:
Ambient temperature TA = 25C

Table 3. RF Specifications (TA = 25C, Z0 = 50 )

Symbol

Parameters and Test Conditions

Units

Freq. [GHz]

Minimum Attenuation
(Reference State)

|S21|
V1 = 1.5 V
V2 = 0.0 V

dB

Maximum Attenuation

|S21|
V1 = 0.0 V
V2 = 1.25 V

dB

Minimum

Typical

Maximum

1.1

2.0

20

1.7

2.5

33

2.6

4.0

40

3.1

5.0

24.0

26.4

20

24.5

28.1

33

26.0

32.7

40

27.0

35.7

Return Loss (In/Out)

at Reference State

V1=1.5 V, V2=0.0 V

dB

<40

10

Return Loss (In/Out)

at Max. Attenuation

V1=0.0 V, V2=1.25 V

dB

<40

10

Notes:
Data obtained from on-wafer measurements

Typical Distribution Charts

Figure 1d. Min Attenuation @ 2GHz, Nominal=1.1, USL=2.0

Figure 2d. Min Attenuation @ 20GHz, Nominal=1.7, USL=2.5

Figure 3d. Min Attenuation @ 33GHz, Nominal=2.6, USL=4.0

Figure 4d. Min Attenuation @ 40GHz, Nominal=3.1, USL=5.0

Figure 5d. Max Attenuation @ 2GHz, LSL=24.0, Nominal=26.4

Figure 6d. Max Attenuation @ 20GHz, LSL=24.5, Nominal=24.5

Figure 7d. Max Attenuation @ 33GHz, LSL=26.0, Nominal=32.7

Figure 8d. Max Attenuation @ 40GHz, LSL=27.0, Nominal=35.7

Notes:
1. All data from on-wafer measurements
2. Distribution data based on 5000 part sample from two wafer lots tested during initial characterization. Future wafers may have nominal values
anywhere between upper and lower limit

Typical Performance (TA = 25C, Zin = Zout = 50 )

0

Min

Attenuation (dB)

Min+4dB
Min+6dB

20

Min+8dB
30

Min+12dB
Min+16dB

40

Input Return Loss (dB)

Min+2dB

10

-10

-20

-30

Min
Max

Min+20dB
Max

50
0

10

20
30
Frequency (GHz)

40

-40

50

Figure 1. Attenuation vs Frequency

10

20
30
Frequency (GHz)

40

50

Figure 2. Input Return Loss vs Frequency

30

20
IIP3 (dBm)

Output Return Loss (dB)

25
-10

-20

-40
0

10

20
30
Frequency (GHz)

40

50

Figure 3. Output Return Loss vs Frequency

10

15
20
Attenuation (dB)

25

30

25

30

Figure 4. IIP3 vs Attenuation at 2 GHz (note 2)

25

25

20

20
IIP3 (dBm)

IIP3 (dBm)

10

-30
Min
Max

15
10
5

15
10
5

0
0

10

15
20
Attenuation (dB)

Figure 5. IIP3 vs Attenuation at 12 GHz (note 2)

15

25

30

10

15
20
Attenuation (dB)

Figure 6. IIP3 vs Attenuation at 22 GHz (note 2)

Min+2dB
Min+4dB
Min+6dB

10
15

Min+8dB

Attenuation (dB)

Attenuation (dB)

Min

20

25

Min+16dB
Min+20dB

30

Max

35

-5

0
5
Input Power (dBm)

10

Figure 7. Attenuation vs Input Power at 2 GHz

-10

-5

0
5
Input Power (dBm)

10

15

Min+4dB
Min+6dB

20

Min+8dB
Min+12dB

25

Attenuation (dB)

Min
Min+2dB

10

Min+16dB
Min+20dB

30
35

Min+12dB
Min+16dB
Min+20dB
Max

25

Figure 8. Attenuation vs Input Power at 12 GHz

Attenuation (dB)

15

Min+12dB

-10

-5

0
5
Input Power (dBm)

Min
Min+2dB
Min+4dB
Min+6dB

10
15
20

Min+8dB

25

Min+12dB
Min+16dB
Min+20dB

30

Max
-10

35

10

Figure 9. Attenuation vs Input Power at 22 GHz

Max
-10

-5

0
5
Input Power (dBm)

10

Figure 10. Attenuation vs Input Power at 32 GHz

20

-40C
25C
85C

25
Attenuation (dB)

Attenuation (dB)

10

20

30

Min
Min+2dB
Min+4dB
Min+6dB
Min+8dB

4
6
-40C
25C
85C

30

35

10

40
0

10

20
30
Frequency (GHz)

Figure 11. Attenuation vs Frequency (Min Attenuation)

40

50

10

20
30
Frequency (GHz)

Figure 12. Attenuation vs Frequency (Max Attenuation)

Notes:
1. All tests done on a AMMC-6650 mounted on a PCB equipped with RF connectors and an op-amp driver shown in Figure 14.
2. IIP3 measured with two input signals with frequency difference of 10 MHz, each input signal at -10 dBm
3. All attenuation settings were done at 2GHz

40

50

AMMC-6650 Typical Scattering Parameters at Minimum Attenuation

(Measured on-wafer, Tc = 25C, Zo = 50ohm, V1 = 1.5V, V2 = 0V)
Freq
GHz

S11
dB

Mag

Phase

S21
dB

Mag

Phase

S12
dB

Mag

Phase

S22
dB

Mag

Phase

0.5
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
14.0
15.0
16.0
17.0
18.0
19.0
20.0
21.0
22.0
23.0
24.0
25.0
26.0
27.0
28.0
29.0
30.0
31.0
32.0
33.0
34.0
35.0
36.0
37.0
38.0
39.0
40.0
41.0
42.0
43.0
44.0
45.0
46.0
47.0
48.0
49.0

-25.969
-26.108
-22.757
-20.131
-18.373
-16.948
-16.016
-15.340
-14.813
-14.689
-14.466
-14.737
-14.851
-15.386
-15.918
-16.809
-17.890
-19.372
-21.140
-23.388
-27.432
-32.956
-31.568
-25.613
-21.577
-18.380
-16.461
-15.006
-14.352
-14.239
-14.485
-14.535
-15.001
-16.021
-17.735
-20.087
-22.476
-23.479
-21.463
-18.570
-16.375
-14.563
-13.116
-12.013
-11.264
-10.800
-10.586
-10.592
-10.779
-11.283

0.050
0.050
0.073
0.099
0.121
0.142
0.158
0.171
0.182
0.184
0.189
0.183
0.181
0.170
0.160
0.144
0.128
0.108
0.088
0.068
0.043
0.023
0.026
0.052
0.083
0.121
0.150
0.178
0.192
0.194
0.189
0.188
0.178
0.158
0.130
0.099
0.075
0.067
0.085
0.118
0.152
0.187
0.221
0.251
0.273
0.288
0.296
0.295
0.289
0.273

-39.087
-66.653
-93.483
-108.015
-120.271
-131.540
-140.873
-149.734
-157.525
-165.279
-172.907
-179.967
172.450
165.587
158.241
151.016
143.458
135.142
127.266
116.287
99.261
59.397
-19.082
-53.962
-71.482
-85.747
-100.632
-114.327
-127.726
-137.892
-147.053
-155.460
-164.229
-171.696
-177.349
-178.011
-166.294
-143.625
-122.928
-116.928
-118.715
-123.769
-130.906
-139.354
-148.870
-158.844
-169.457
-179.737
170.426
162.115

-1.135
-1.103
-1.132
-1.242
-1.313
-1.359
-1.420
-1.464
-1.522
-1.551
-1.616
-1.643
-1.678
-1.699
-1.733
-1.753
-1.781
-1.801
-1.806
-1.836
-1.867
-1.920
-2.000
-2.121
-2.230
-2.348
-2.387
-2.450
-2.494
-2.585
-2.649
-2.703
-2.737
-2.784
-2.833
-2.832
-2.949
-2.966
-3.009
-3.119
-3.243
-3.424
-3.690
-4.013
-4.342
-4.784
-5.259
-5.672
-6.145
-6.762

0.878
0.881
0.878
0.867
0.860
0.855
0.849
0.845
0.839
0.837
0.830
0.828
0.824
0.822
0.819
0.817
0.815
0.813
0.812
0.810
0.807
0.802
0.794
0.783
0.774
0.763
0.760
0.754
0.750
0.743
0.737
0.733
0.730
0.726
0.722
0.722
0.712
0.711
0.707
0.698
0.688
0.674
0.654
0.630
0.607
0.577
0.546
0.521
0.493
0.459

-5.786
-10.300
-19.219
-28.116
-36.932
-45.539
-54.184
-62.729
-71.279
-79.808
-88.399
-96.805
-105.447
-114.080
-122.788
-131.503
-140.327
-149.250
-158.422
-167.679
-176.938
173.528
163.905
154.170
144.556
135.424
126.769
118.757
110.138
101.101
91.495
82.323
73.207
63.269
53.098
42.787
31.993
21.034
9.877
-1.475
-13.001
-24.858
-36.766
-48.669
-60.453
-72.706
-84.156
-95.670
-107.654
-119.116

-1.147
-1.176
-1.230
-1.341
-1.428
-1.470
-1.544
-1.595
-1.653
-1.702
-1.746
-1.788
-1.819
-1.838
-1.850
-1.870
-1.889
-1.896
-1.917
-1.934
-1.961
-2.023
-2.096
-2.209
-2.348
-2.448
-2.498
-2.553
-2.597
-2.638
-2.681
-2.726
-2.773
-2.832
-2.873
-2.922
-2.958
-3.013
-3.088
-3.194
-3.317
-3.491
-3.756
-4.088
-4.425
-4.816
-5.296
-5.720
-6.224
-6.798

0.876
0.873
0.868
0.857
0.848
0.844
0.837
0.832
0.827
0.822
0.818
0.814
0.811
0.809
0.808
0.806
0.805
0.804
0.802
0.800
0.798
0.792
0.786
0.775
0.763
0.754
0.750
0.745
0.742
0.738
0.734
0.731
0.727
0.722
0.718
0.714
0.711
0.707
0.701
0.692
0.683
0.669
0.649
0.625
0.601
0.574
0.544
0.518
0.488
0.457

-5.788
-10.283
-19.238
-28.094
-36.892
-45.485
-53.995
-62.548
-71.025
-79.509
-88.014
-96.516
-105.110
-113.678
-122.395
-131.171
-139.898
-148.860
-158.009
-167.132
-176.522
174.005
164.364
154.655
145.178
136.043
127.328
119.173
110.632
101.581
91.910
82.845
73.808
63.902
53.676
43.305
32.694
21.810
10.556
-0.735
-12.195
-24.054
-36.082
-48.156
-59.744
-71.850
-83.532
-95.070
-107.004
-118.459

-26.143
-25.498
-22.662
-20.202
-18.533
-17.310
-16.346
-15.740
-15.254
-15.026
-14.943
-15.006
-15.360
-15.831
-16.415
-17.355
-18.621
-20.175
-22.192
-24.928
-28.730
-35.239
-37.589
-29.473
-24.437
-20.896
-18.496
-16.755
-15.885
-15.473
-15.650
-15.735
-16.165
-17.215
-18.854
-20.964
-23.427
-24.082
-21.587
-18.599
-16.283
-14.316
-12.686
-11.509
-10.672
-9.962
-9.476
-9.224
-9.136
-9.000

0.049
0.053
0.074
0.098
0.118
0.136
0.152
0.163
0.173
0.177
0.179
0.178
0.171
0.162
0.151
0.136
0.117
0.098
0.078
0.057
0.037
0.017
0.013
0.034
0.060
0.090
0.119
0.145
0.161
0.168
0.165
0.163
0.156
0.138
0.114
0.090
0.067
0.063
0.083
0.118
0.153
0.192
0.232
0.266
0.293
0.318
0.336
0.346
0.349
0.355

-39.150
-60.168
-85.472
-102.098
-115.389
-127.577
-137.375
-146.531
-155.038
-163.282
-171.767
179.931
172.348
164.283
156.596
148.580
141.079
134.038
125.365
118.442
107.600
81.055
-23.760
-61.826
-73.246
-85.749
-98.530
-110.996
-123.634
-134.550
-144.865
-151.713
-160.229
-168.812
-174.738
-173.111
-162.318
-137.349
-117.676
-113.548
-115.929
-121.984
-130.382
-139.456
-149.803
-160.722
-171.880
176.644
164.963
152.822

AMMC-6650 Typical Scattering Parameters at Maximum Attenuation

(Measured on-wafer, Tc = 25C, Zo = 50ohm, V1 = 0V, V2 = 1.25V)
Freq
GHz

S11
dB

Mag

Phase

S21
dB

Mag

Phase

S12
dB

Mag

Phase

S22
dB

Mag

Phase

0.5
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
14.0
15.0
16.0
17.0
18.0
19.0
20.0
21.0
22.0
23.0
24.0
25.0
26.0
27.0
28.0
29.0
30.0
31.0
32.0
33.0
34.0
35.0
36.0
37.0
38.0
39.0
40.0
41.0
42.0
43.0
44.0
45.0
46.0
47.0
48.0
49.0

-22.853
-22.534
-21.906
-20.867
-19.862
-19.023
-18.209
-17.445
-16.803
-16.346
-15.890
-15.494
-15.315
-15.169
-15.011
-15.045
-15.209
-15.325
-15.453
-15.708
-15.972
-16.143
-16.472
-16.973
-17.530
-18.041
-18.651
-19.356
-19.676
-20.537
-21.650
-22.793
-24.013
-25.482
-26.916
-27.639
-27.171
-25.866
-23.917
-22.114
-20.391
-19.220
-17.951
-17.133
-16.397
-15.762
-15.045
-14.289
-13.457
-12.027

0.072
0.075
0.080
0.091
0.102
0.112
0.123
0.134
0.145
0.152
0.161
0.168
0.172
0.174
0.178
0.177
0.174
0.171
0.169
0.164
0.159
0.156
0.150
0.142
0.133
0.125
0.117
0.108
0.104
0.094
0.083
0.073
0.063
0.053
0.045
0.042
0.044
0.051
0.064
0.078
0.096
0.109
0.127
0.139
0.151
0.163
0.177
0.193
0.212
0.250

-12.256
-21.574
-38.524
-53.432
-66.954
-78.640
-89.031
-98.870
-107.012
-114.618
-121.500
-127.928
-134.558
-140.662
-146.591
-151.665
-156.830
-162.011
-166.083
-170.398
-174.733
-178.859
176.398
170.743
166.527
164.230
159.564
154.880
149.943
144.531
135.232
126.384
118.078
103.602
81.551
58.000
33.749
12.352
-1.642
-15.994
-25.159
-32.093
-40.338
-46.939
-52.696
-56.989
-58.021
-58.820
-62.285
-67.461

-24.466
-24.510
-24.539
-24.510
-24.451
-24.308
-24.166
-24.013
-23.849
-23.688
-23.531
-23.375
-23.248
-23.135
-23.061
-22.987
-22.902
-22.950
-23.135
-23.544
-24.027
-24.423
-24.913
-25.368
-25.849
-26.214
-26.840
-27.351
-28.046
-28.179
-28.382
-28.898
-28.995
-29.168
-29.551
-29.924
-30.257
-30.842
-31.150
-31.768
-32.146
-32.542
-33.191
-33.893
-34.379
-35.090
-35.863
-36.595
-37.856
-38.344

0.060
0.060
0.059
0.060
0.060
0.061
0.062
0.063
0.064
0.065
0.067
0.068
0.069
0.070
0.070
0.071
0.072
0.071
0.070
0.067
0.063
0.060
0.057
0.054
0.051
0.049
0.046
0.043
0.040
0.039
0.038
0.036
0.036
0.035
0.033
0.032
0.031
0.029
0.028
0.026
0.025
0.024
0.022
0.020
0.019
0.018
0.016
0.015
0.013
0.012

-3.791
-6.688
-12.555
-18.549
-24.608
-30.768
-37.148
-44.026
-51.085
-58.509
-66.183
-74.133
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For the minimum attenuation, V1 is set to 1.5 V and V2 is

set to 0 V. The 1.5 V applied to the V1 pin biases the series
FETs to a full on state, while the 0 V applied to the V2
pin keeps the shunt FETs in an off or open state; thus
creating the lumped element 50 transmission line
effect. The V2 voltage swing from 0 V to 1.25 V increases
the level of attenuation. The V1 voltage swing from 1.5 V
to 0 V effectively optimizes the input and output match at
higher attenuation levels. The AMMC-6650 can be driven
by two complementary voltage ramps placed on V1 and
V2. Careful adjustment of the two control lines over a relatively small voltage ranges are required to set the attenuation and optimize VSWR.

Biasing considerations

The on-chip DC reference circuit can be used to optimize

VSWR for any attenuation setting, improve voltage versus
attenuation linearity and range, and provide temperature
compensation.
Figure 13. Bias voltage connections

Attenuation is controlled by applying voltage to pins V1

and V2 as shown in Figure 13.

The on-chip DC reference circuit is a non-distributed T attenuator designed to operate in a 500 system and track
the control voltage versus attenuation characteristics of
the RF attenuator. A simplified schematic of the AMMC6650 together with an op-amp driver that utilizes the DC
reference circuit is shown in Figure 14.

RFin

RFout

DCin
VREF

V1

V2

RS
500

R L (500)

OP AMP 1
A
500

OP AMP 2

V CONTROL
C

R1 (10K)
D

R REF (620)

R2 (100)
C1

Figure 14. AMMC-6650 and the op-amp driver circuit

DCout

+
_

CAUTION: Low voltage op-amps must be used so as not to

exceed the maximum limit of V1 and V2 control voltages.

As shown, a voltage reference (VREF) is fed to the reference

circuit DCin pad via a 500 resistor, creating a 500 source.
The reference circuit termination RL, is connected to the
DCout pad and ideally is also equal to 500. This voltage
is controlled in parallel with the RF attenuator. The chosen
value of VREF must be low enough to avoid modifying the
FET biasing and lower than the turn-on voltage of the ESD
protection diode but high enough such that the attenuated voltage at OP AMP 2 is usable compared to input offsets
etc. The optimum value for the positive reference voltage
is approximately 0.1 to 0.4 V.
At equilibrium, the voltages at nodes A and B of the OP AMP 1
must be equal which implies that the input impedance
to the DC reference circuit is equal to RREF. When V2 is
changed to a lower value, the voltage at node A becomes
greater than that of node B. This voltage difference causes
the output voltage of op OP AMP 1 to move toward its
positive rail until equilibrium is once again established.
When V2 is changed to a higher value the voltage at node
A becomes less than that of node B and the output voltage
of OP AMP 1 will swing toward its negative rail until equilibrium is reached. If the reference circuit precisely tracks
the RF circuit, the voltage output of OP AMP 1 at equilibrium
insures that the RF circuit is matched to 50.
If attenuation linearity is required, OP AMP 2 is included
as shown in Figure 14 and a positive control voltage is
applied to VCONTROL.
At equilibrium, voltages at nodes C and D are equal.
When VCONTROL is changed, the output of OP AMP 2 adjusts
to a value that forces the voltage at node C to equal the
voltage at node D. Therefore, the output voltage of the
DC reference circuit is proportional to VCONTROL. The input
voltage to the reference circuit is being held constant and
the log(VCONTROL) is proportional to the reference circuit
attenuation 20log(DCout/DCin).
If the FET parameters of the DC reference circuit track the
FET parameters of the RF circuit, the voltage output of the
RF circuit is also proportional to the control voltage. This
translates to a linear relationship between the attenuation
(in dB) and the log(VCONTROL).
9

Because the FETs in the DC circuit are not identical to

those in the RF circuit, the DC circuit does not exactly track
the RF circuit. This results in attenuation vs. voltage curves
that are not exactly linear.
OP AMP 2 provides temperature compensation by adjusting
V2 in such a way as to keep voltage at point C equal to
that point D. If the attenuation changes over temperature, voltage at point C tries to change, but is corrected
by OP AMP 2.
Another way to improve performance of the attenuator
driver circuit is to adjust RL and RREF. If the reference circuit
precisely tracked the RF circuit and the ON resistance
of the FETs was zero ohms, then RL and RREF would be
exactly 500. Due to the difference in layout structures,
the reference circuit does not track the RF circuit precisely.
RL and RREF can be adjusted in order to compensate for
these differences. Optimum values of RL and RREF have
been found to be between 500 and 650.
For maximum dynamic range on the attenuation control
circuit, RL should be less than RREF by an amount equal
to the ON resistance of the reference circuit series FETs.
The ON resistance of the series FETs is about 95 total.
Therefore, the relationship between RL and RREF is as
follows:
RREF = RL + 95
The voltage divider formed by R1 and R2 can be used
to adjust the sensitivity of the attenuator versus control
voltage. For the driver circuit shown in Figure 14, maximum
attenuation is always achieved by setting VCONTROL equal
to 0 V. Minimum attenuation is achieved when

R1 + R2
RL
Vcontrol
x
x Vref
500 + RL
R2
or

R1
Vcontrol 1 +
R2

pad of the AMMC-6650 and the control voltage can be

applied directly to V2.

Values for RL, R1 and R2 were 500, 10 k and 100 respectively. Control voltage ranged from 4.5 V to 0 V.

If optimum VSWR is all that is required, OP AMP 2 may be

eliminated however, RL must remain connected to the
DCout

Two RF attenuation vs voltage curves corresponding

to different values of VREF are shown in Figure 15. These
curves were obtained by using the driver circuit shown in
Figure 14 and the VREF values 0.1 V and 0.4 V.

OP AMP 1 insures that the attenuator maintains a good

input and output match to 50, while OP AMP 2 increases
the usable control voltage range versus using only direct
voltage ramps for V1 and V2 and improves over temperature operation.

x DCout

Therefore, an increase in the resistor ratio R1/R2 increases

the value of the control voltage required to produce
minimum attenuation.

Attenuation (dB)

LMV932 (National Semiconductor) was used in the control

circuit that produced the results shown in Figure 15;
however, any low noise, low offset voltage op amp should
produce similar results. LMV932s low supply voltage of
1.8 volts, limits the possibility of exceeding the 1.5 volt
absolute maximum of the AMMC-6650 V1 and V2 control
line inputs.
0
-5
-10
-15
-20
-25
-30
-35
-40
-45
-50
0.01

Vref=0.1V
Vref=0.2V

RF connections should be kept as short as reasonable to

minimize performance degradation due to undesirable
series inductance.
A single bond wire is normally sufficient for signal connections, however double bonding with 0.7mil gold wire
will reduce series inductance. Gold thermo-sonic wedge
bonding is the preferred method for wire attachment to
the bond pads. The recommended wire bond stage temperature is 150C +/- 2C. Caution should be taken to not
exceed the Absolute Maximum Rating for assembly temperature and time.
The chip is 100um thick and should be handled with care.
The MMIC has air bridges on the top surface and should be
carefully handled by the edges or with a custom collet, (do
not pick up the die with a vacuum on die center). Bonding
pads and chip backside metallization are gold.

0.1
1
Control Voltage (Vin)

10

Figure 15. Attenuation vs. Control Voltage, Frequency = 15 GHz

Assembly Techniques
The backside of the MMIC chip is RF ground. The chip
should be attached directly to the ground plane (e.g.
circuit carrier or heatsink) using electrically conductive
epoxy [1,2].

This MMIC is also static sensitive and ESD precautions

should be taken.
Notes:
1. Ablebond 84-1 LMI silver epoxy is recommended
2. Eutectic attach is not recommended and may jeopardize reliability of
the device.

Bond Pad Dimensions and Locations

For best performance, the topside of the MMIC should be

brought up to the same height as the circuits surrounding
it. This can be accomplished by mounting a gold plated
metal shim (same length as the MMIC) under the chip. The
amount of epoxy used for the chip or shim attachment
should be just enough to provide a thin fillet around the
bottom perimeter of the chip. The ground plane should
be free of any residue that may jeopardize electrical or
mechanical contact with the chip.

Part Number Ordering Information

Part Number

Devices Per
Container

Container

AMMC-6650-W10

10

Gelpak

AMMC-6650-W50

50

Gelpak

For product information and a complete list of distributors, please go to our web site:

www.avagotech.com

Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright 2005-2008 Avago Technologies. All rights reserved.
AV02-1301EN - July 11, 2008