Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11AX

GENERAL DESCRIPTION
High-voltage, high-speed glass-passivated npn power transistor in a plastic full-pack envelope intended for use in converters, inverters, switching regulators, motor control systems, etc.

QUICK REFERENCE DATA

SYMBOL VCESM VCEO IC ICM Ptot VCEsat ICsat tf PARAMETER Collector-emitter voltage peak value Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage Collector saturation current Fall time CONDITIONS VBE = 0 V TYP. 2.5 150 MAX. 1000 450 5 10 32 1.5 UNIT V V A A W V A ns

Ths 25 C

PINNING - SOT186A
PIN 1 2 3 base collector emitter DESCRIPTION

PIN CONFIGURATION
case

SYMBOL

c b
1 2 3

case isolated

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL VCESM VCEO IC ICM IB IBM Ptot Tstg Tj PARAMETER Collector-emitter voltage peak value Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature CONDITIONS VBE = 0 V MIN. -65 MAX. 1000 450 5 10 2 4 32 150 150 UNIT V V A A A A W C C

Ths 25 C

THERMAL RESISTANCES
SYMBOL Rth j-hs Rth j-a PARAMETER Junction to heatsink Junction to ambient CONDITIONS with heatsink compound in free air TYP. 55 MAX. 3.95 UNIT K/W K/W

November 1995

Rev 1.100

Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11AX

ISOLATION LIMITING VALUE & CHARACTERISTIC

Ths = 25 C unless otherwise specified SYMBOL Visol PARAMETER R.M.S. isolation voltage from all three terminals to external heatsink CONDITIONS f = 50-60 Hz; sinusoidal waveform; R.H. 65% ; clean and dustfree MIN. TYP. MAX. 2500 UNIT V

Cisol

Capacitance from T2 to external f = 1 MHz heatsink

10

pF

STATIC CHARACTERISTICS
Ths = 25 C unless otherwise specified SYMBOL ICES ICES IEBO VCEOsust VCEsat VBEsat hFE hFE PARAMETER Collector cut-off current
1

CONDITIONS

MIN. 450 10 10

TYP. 18 20

MAX. 1.0 2.0 10 1.5 1.3 35 35

UNIT mA mA mA V V V

VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 C Emitter cut-off current VEB = 9 V; IC = 0 A Collector-emitter sustaining voltage IB = 0 A; IC = 100 mA; L = 25 mH Collector-emitter saturation voltages IC = 2.5 A; IB = 0.5 A Base-emitter saturation voltage IC = 2.5 A; IB = 0.5 A DC current gain IC = 5 mA; VCE = 5 V IC = 500 mA; VCE = 5 V

DYNAMIC CHARACTERISTICS
Ths = 25 C unless otherwise specified SYMBOL ton ts tf PARAMETER Switching times (resistive load) Turn-on time Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time CONDITIONS ICon = 2.5 A; IBon = -IBoff = 0.5 A TYP. 0.6 3.5 0.6 MAX. UNIT s s s s ns s ns

ICon = 2.5 A; IBon = 0.5 A; LB = 1 H; -VBB = 5 V ICon = 2.5 A; IBon = 0.5 A; LB = 1 H; -VBB = 5 V; Tj = 100 C

1.5 150

1.8 170

1 Measured with half sine-wave voltage (curve tracer).

November 1995

Rev 1.100

Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11AX

+ 50v 100-200R
IC

90 %

ICon

90 %

10 %

Horizontal Oscilloscope Vertical 300R 30-60 Hz 6V 1R

IB

ts ton toff IBon 10 % tr 30ns -IBoff

tf

Fig.1. Test circuit for VCEOsust.

Fig.4. Switching times waveforms with resistive load.

IC / mA

VCC

250 200

LC

IBon
100

LB T.U.T.

-VBB
0 VCE / V min VCEOsust

Fig.2. Oscilloscope display for VCEOsust.

Fig.5. Test circuit inductive load. VCC = 300 V; -VBE = 5 V; LC = 200 uH; LB = 1 uH

VCC

ICon 90 % IC

RL VIM 0 tp
IB

RB T.U.T.
ts toff IBon

10 % tf t

T
-IBoff

Fig.3. Test circuit resistive load. VIM = -6 to +8 V VCC = 250 V; tp = 20 s; = tp / T = 0.01. RB and RL calculated from ICon and IBon requirements.

Fig.6. Switching times waveforms with inductive load.

November 1995

Rev 1.100

Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11AX

120 110 100 90 80 70 60 50 40 30 20 10 0

Normalised Derating
with heatsink compound

100

IC / A

ICM max
P tot

= 0.01
tp = 10 us

10 IC max
II
(1) 100 us

1
0 20 40 60 80 Ths / C 100 120 140
1 ms 10 ms

Fig.7. Normalised power derating and second breakdown curves.

0.1

(2) 500 ms DC

6 5 4 3 2 1 0

IC / A

BUT11AX

III

0.01 1 10 100 VCE / V 1000

Fig.10. Forward bias safe operating area. Ths 25 C (1) (2) I II III
0 400 VCE / V 800 1200

Fig.8. Reverse bias safe operating area. Tj Tj max

NB:

Ptot max and Ptot peak max lines. Second breakdown limits. Region of permissible DC operation. Extension for repetitive pulse operation. Extension during turn-on in single transistor converters provided that RBE 100 and tp 0.6 s. Mounted with heatsink compound and 30 5 newton force on the centre of the envelope.

100

h FE

BUT11AX

5V 10 1V

1 0.01

0.1

1 IC / A

10

100

Fig.9. Typical DC current gain. hFE = f(IC); parameter VCE

November 1995

Rev 1.100

Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11AX

Fig.11. Typical base-emitter and collector-emitter saturation voltages. VBEsat = f(IC); VCEsat = f(IC); IC/IB = 5

Fig.12. Collector-emitter saturation voltage. Solid lines = typ values, dotted lines = max values. VCEsat = f(IB); parameter IC

November 1995

Rev 1.100

Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11AX

Fig.13. Typical base-emitter saturation voltage. VBEsat = f(IB); parameter IC

Fig.14. Transient thermal impedance. Zth j-hs = f(t); parameter D = tp/T

November 1995

Rev 1.100

Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11AX

MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
10.3 max 3.2 3.0

4.6 max 2.9 max

Recesses (2x) 2.5 0.8 max. depth

2.8 6.4 15.8 19 max. max. seating plane 15.8 max

3 max. not tinned 3 2.5 13.5 min. 1 0.4

M

3 1.0 (2x) 0.6 2.54 0.5 2.5 1.3 0.9 0.7

5.08

Fig.15. SOT186A; The seating plane is electrically isolated from all terminals.
Notes 1. Refer to mounting instructions for F-pack envelopes. 2. Epoxy meets UL94 V0 at 1/8".

November 1995

Rev 1.100

Philips Semiconductors

Product specification

Silicon Diffused Power Transistor

BUT11AX

DEFINITIONS
Data sheet status Objective specification Product specification Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. This data sheet contains target or goal specifications for product development. This data sheet contains final product specifications. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.

November 1995

Rev 1.100

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