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INA

122

INA122

INA

122

Single Supply, MicroPower INSTRUMENTATION AMPLIFIER


FEATURES
G LOW QUIESCENT CURRENT: 60A G WIDE POWER SUPPLY RANGE Single Supply: 2.2V to 36V Dual Supply: 0.9/+1.3V to 18V G COMMON-MODE RANGE TO (V)0.1V G RAIL-TO-RAIL OUTPUT SWING G LOW OFFSET VOLTAGE: 250V max G LOW OFFSET DRIFT: 3V/C max G LOW NOISE: 60nV/ Hz G LOW INPUT BIAS CURRENT: 25nA max G 8-PIN DIP AND SO-8 SURFACE-MOUNT

APPLICATIONS
G PORTABLE, BATTERY OPERATED SYSTEMS G INDUSTRIAL SENSOR AMPLIFIER: Bridge, RTD, Thermocouple G PHYSIOLOGICAL AMPLIFIER: ECG, EEG, EMG G MULTI-CHANNEL DATA ACQUISITION

DESCRIPTION
The INA122 is a precision instrumentation amplifier for accurate, low noise differential signal acquisition. Its two-op-amp design provides excellent performance with very low quiescent current, and is ideal for portable instrumentation and data acquisition systems. The INA122 can be operated with single power supplies from 2.2V to 36V and quiescent current is a mere 60A. It can also be operated from dual supplies. By utilizing an input level-shift network, input commonmode range extends to 0.1V below negative rail (single supply ground). A single external resistor sets gain from 5V/V to 10000V/V. Laser trimming provides very low offset voltage (250V max), offset voltage drift (3V/C max) and excellent common-mode rejection. Package options include 8-pin plastic DIP and SO-8 surface-mount packages. Both are specified for the 40C to +85C extended industrial temperature range.

V+ 7 INA122 + VIN 3 6 8 100k 25k RG 25k VO + V) G VO = (VIN IN 200k G=5+ RG

1 VIN 2 100k 5 Ref

4 V

International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111 Twx: 910-952-1111 Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132

1997 Burr-Brown Corporation

PDS-1388B

Printed in U.S.A. October, 1997

SBOS069

SPECIFICATIONS
At TA = +25C, VS = +5V, RL = 20k connected to VS/2, unless otherwise noted. INA122P, U PARAMETER INPUT Offset Voltage, RTI vs Temperature vs Power Supply (PSRR) Input Impedance Safe Input Voltage Common-Mode Voltage Range Common-Mode Rejection INPUT BIAS CURRENT vs Temperature Offset Current vs Temperature GAIN Gain Equation Gain Error vs Temperature Gain Error vs Temperature Nonlinearity NOISE (RTI) Voltage Noise, f = 1kHz f = 100Hz f = 10Hz fB = 0.1Hz to 10Hz Current Noise, f = 1kHz fB = 0.1Hz to 10Hz OUTPUT Voltage, Positive Negative Short-Circuit Current Capacitive Load Drive FREQUENCY RESPONSE Bandwidth, 3dB VS = 15V VS = 15V Short-Circuit to Ground CONDITIONS MIN TYP 100 1 10 1010 || 3 (V)0.3 (V)40 0 83 MAX 250 3 30 (V+)+0.3 (V+)+40 3.4 96 10 40 1 40 25 2 6 6 6 76 MIN INA122PA, UA TYP 150 6 6 6 MAX 500 5 100 6 6 6 90 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 +36 18 85 +85 +85 +125 150 150 6 6 6 6 6 6 6 6 6 6 6 6 6 50 5 UNITS V V/C V/V || pF V V V dB nA pA/C nA pA/C V/V V/V % ppm/C % ppm/C % nV/Hz nV/Hz nV/Hz Vp-p fA/Hz pAp-p V V mA nF kHz kHz kHz V/s s s ms s V V A C C C C/W C/W

VS = +2.2V to +36V RS = 0 RS = 10k VCM = 0V to 3.4V

G=5 G=5 G = 100 G = 100 G = 100, VO = 14.85V to +14.9V

G = 5 to 10k G = 5 + 200k/RG 0.05 0.1 5 10 0.3 0.5 25 100 0.005 0.012 60 100 110 2 80 2 (V+)0.1 (V+)0.05 (V)+0.15 (V)+0.1 +3/30 1 120 5 0.9 +0.08/0.16 350 450 1.8 3 +2.2 0.9/+1.3 +5 60 40 55 55

0.15 6 1 6 0.024

G=5 G = 100 G = 500 G=5 G = 100 G = 500 50% Input Overload

Slew Rate Settling Time, 0.01%

Overload Recovery POWER SUPPLY Voltage Range, Single Supply Dual Supplies Current TEMPERATURE RANGE Specification Operation Storage Thermal Resistance, JA 8-Pin DIP SO-8 Surface-Mount 6 Specification same as INA122P, INA122U.

IO = 0

6 6 6

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.

INA122

PIN CONFIGURATION
Top View 8-Pin DIP, SO-8

ELECTROSTATIC DISCHARGE SENSITIVITY


This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

RG V
IN

1 2 3 4

8 7 6 5

RG V+ VO Ref

+ VIN V

ABSOLUTE MAXIMUM RATINGS(1)


Supply Voltage, V+ to V .................................................................... 36V Signal Input Terminals, Voltage(2) ....................... (V)0.3V to (V+)+0.3V Current(2) ...................................................... 5mA Output Short Circuit ................................................................. Continuous Operating Temperature ................................................. 40C to +125C Storage Temperature ..................................................... 55C to +125C Lead Temperature (soldering, 10s) ............................................... +300C NOTES: (1) Stresses above these ratings may cause permanent damage. (2) Input terminals are internally diode-clamped to the power supply rails. Input signals that can exceed the supply rails by more than 0.3V should be current-limited to 5mA or less.

PACKAGE INFORMATION
PRODUCT INA122PA INA122P INA122UA INA122U PACKAGE 8-Pin DIP 8-Pin DIP SO-8 Surface Mount SO-8 Surface Mount PACKAGE DRAWING NUMBER(1) 006 006 182 182

NOTE: (1) For detailed drawing and dimension table, see end of data sheet, or Appendix C of Burr-Brown IC Data Book.

INA122

TYPICAL PERFORMANCE CURVES


At TA = +25C and VS = 5V, unless otherwise noted.

GAIN vs FREQUENCY 70
Common-Mode Rejection (dB)

COMMON-MODE REJECTION vs FREQUENCY 110 100 90 80 70 60 50 40 30 20 10 0 G=5 G = 100 G = 1000

60 50
Gain (dB)

G = 1000

40 30 20 10 0 10 100

G = 100 G = 20 G=5

1k

10k Frequency (Hz)

100k

1M

10

100

1k

10k

100k

Frequency (Hz)

POSITIVE POWER SUPPLY REJECTION vs FREQUENCY 100 G = 500 100

NEGATIVE POWER SUPPLY REJECTION vs FREQUENCY

Power Supply Rejection (dB)

80

Power Supply Rejection (dB)

G = 100

80

G = 500

60

60

40

40 G=5 20

G = 100

20

G=5

0 10 100 1k 10k 100k 1M Frequency (Hz)

0 1 10 100 1k 10k 100k Frequency (Hz)

INPUT COMMON-MODE RANGE vs OUTPUT VOLTAGE, VS = 15V, G = 5 15


5

INPUT COMMON-MODE VOLTAGE vs OUTPUT VOLTAGE, VS = 5V, G = 5

Common-Mode Voltage (V)

10 5 VD/2 0
+ + +

Input Common-Mode Voltage (V)

4 3 2 1 0 1 2 3 4 5 5 4 VREF = 0V VS = 5V VS = +5V/0V VREF = 2.5V

+15V VO Ref 15V

VD/2 VCM

5 10

Limited by A2
15 15 10 5

output swing

see text

Limited by A2 ou
3 2 1

tput swingsee

text

10

15

Output Voltage (V)

Output Voltage (V)

INA122

TYPICAL PERFORMANCE CURVES


At TA = +25 C and VS = 5V, unless otherwise noted.

(CONT)

VOLTAGE and CURRENT NOISE DENSITY vs FREQUENCY (RTI) 1000

SETTLING TIME vs GAIN 10

Voltage Noise (nV/Hz)

Current Noise (fA/Hz)

Settling Time (ms)

10V Step

100

1 0.01% 0.1%

VN IN

10 1 10 100 Frequency (Hz) 1k 10k

0.1 1 10 Gain (V/V) 100 1k

INPUT-REFERRED OFFSET VOLTAGE WARM-UP


10 8
Offset Voltage Change (V)

QUIESCENT CURRENT vs TEMPERATURE 80

Quiescent Current (A)

6 4 2 0 2 4 6 8 10 0 1 2 3

Turn-on time 1ms. Settling time to final value depends on Gainsee settling time.

60

(Noise)

40

20

10

0 75

50

25

25

50

75

100

125

Time After Turn-On (ms)

Temperature (C)

TOTAL HARMONIC DISTORTION+NOISE vs FREQUENCY 1 V+

OUTPUT VOLTAGE SWING vs OUTPUT CURRENT

(V+)1

Sourcing Current

THD+N (%)

0.1

G = 100

Output Voltage (V)


RL = RL = 25k

(V+)2

(V)+2

0.01

G=5

(V)+1

Sinking Current

0.001 10 100 Frequency (Hz) 1k 10k

V 0 5 10 15 20 25 Output Current (mA)

INA122

TYPICAL PERFORMANCE CURVES


At TA = +25C and VS = 5V, unless otherwise noted.

(CONT)

SMALL-SIGNAL STEP RESPONSE G=5

SMALL-SIGNAL STEP RESPONSE G = 100

100mV/div

50s/div

100mV/div

100s/div

LARGE-SIGNAL STEP RESPONSE G=5

INPUT-REFERRED NOISE VOLTAGE 0.1Hz to 10Hz

50s/div

2V/div

2V/div

500ms/div

INA122

APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation of the INA122. Applications with noisy or high impedance power supplies may require decoupling capacitors close to the device pins. The output is referred to the output reference (Ref) terminal which is normally grounded. This must be a low-impedance connection to ensure good common-mode rejection. A resistance of 10 in series with the Ref pin will cause a typical device to degrade to approximately 80dB CMR. SETTING THE GAIN Gain of the INA122 is set by connecting a single external resistor, RG, as shown:

offset adjustment. Figure 2 shows an optional circuit for trimming the output offset voltage. The voltage applied to the Ref terminal is added to the output signal. An op amp buffer is used to provide low impedance at the Ref terminal to preserve good common-mode rejection.

VIN RG V+
IN

V+ INA122 Ref VO 100A 1/2 REF200

G=5+

200 k RG

(1)

OPA336 10mV Adjustment Range

10k

100

100

Commonly used gains and RG resistor values are shown in Figure 1. The 200k term in equation 1 comes from the internal metal film resistors which are laser trimmed to accurate absolute values. The accuracy and temperature coefficient of these resistors are included in the gain accuracy and drift specifications of the INA122. The stability and temperature drift of the external gain setting resistor, RG, also affects gain. RGs contribution to gain accuracy and drift can be directly inferred from the gain equation (1). OFFSET TRIMMING The INA122 is laser trimmed for low offset voltage and offset voltage drift. Most applications require no external

100A 1/2 REF200 V

FIGURE 2. Optional Trimming of Output Offset Voltage. INPUT BIAS CURRENT RETURN PATH The input impedance of the INA122 is extremely high approximately 1010. However, a path must be provided for the input bias current of both inputs. This input bias current is approximately 10nA (current flows out of the input terminals). High input impedance means that this input bias current changes very little with varying input voltage.
V+ 0.1F

DESIRED GAIN (V/V) 5 10 20 50 100 200 500 1000 2000 5000 10000 NC: No Connection.

RG () NC 40k 13.33k 4444 2105 1026 404 201 100.3 40 20

NEAREST 1% RG VALUE NC 40.2k 13.3k 4420 2100 1020 402 200 100 40.2 20
7 INA122 + VIN 3 8 A1 100k 25k RG 25k Load VO 1 VIN 2 A2 100k 5 Ref 4 0.22F INA122 1 2 5 6 Ref V Dual Supply VO Single Supply 6 G = 5 + 200k RG + V) G VO = (VIN IN +

Also drawn in simplified form: V+


IN

3 8 RG

VIN

FIGURE 1. Basic Connections.

INA122

Input circuitry must provide a path for this input bias current for proper operation. Figure 3 shows various provisions for an input bias current path. Without a bias current path, the inputs will float to a potential which exceeds the common-mode range of the INA122 and the input amplifiers will saturate. If the differential source resistance is low, the bias current return path can be connected to one input (see the thermocouple example in Figure 3). With higher source impedance, using two equal resistors provides a balanced input with possible advantages of lower input offset voltage due to bias current and better high-frequency common-mode rejection.

INPUT PROTECTION The inputs of the INA122 are protected with internal diodes connected to the power supply rails (Figure 4). These diodes will clamp the applied signal to prevent it from damaging the input circuitry. If the input signal voltage can exceed the power supplies by more than 0.3V, the input signal current should be limited to less than 5mA to protect the internal clamp diodes. This can generally be done with a series input resistor. Some signal sources are inherently current-limited and do not require limiting resistors. INPUT COMMON-MODE RANGE The common-mode range for some common operating conditions is shown in the typical performance curves. The INA122 can operate over a wide range of power supply and VREF configurations, making it impractical to provide a comprehensive guide to common-mode range limits for all possible conditions. The most commonly overlooked overload condition occurs by attempting to exceed the output swing of A2, an internal circuit node that cannot be measured. Calculating the expected voltages at A2s output (see equation in Figure 4) provides a check for the most common overload conditions. The design of A1 and A2 are identical and their outputs can swing to within approximately 100mV of the power supply rails, depending on load conditions. When A2s output is saturated, A1 can still be in linear operation, responding to changes in the non-inverting input voltage. This may give the appearance of linear operation but the output voltage is invalid.

Microphone, Hydrophone etc. 47k 47k

INA122

Thermocouple

INA122

10k

INA122

Center-tap provides bias current return.

A single supply instrumentation amplifier has special design considerations. Using commonly available single-supply op amps to implement the two-op amp topology will not yield equivalent performance. For example, consider the condition where both inputs of common single-supply op amps are

FIGURE 3. Providing an Input Common-Mode Current Path.

V+

+ + 0.5V VIN + VIN (3) (8) 25k RG 25k (1) A2 VIN (2) + 0.5V VIN 100k Ref V02 (V + V ) 25k + 0.6V VO2 = 1.25VIN IN IN RG (Voltages are referred to VREF) (V) + 0.1V V02 (V+) 0.1V A1 100k VO

V V+

FIGURE 4. INA122 Simplified Circuit Diagram.

INA122

equal to 0V. The outputs of both A1 and A2 must be 0V. But any small positive voltage applied to VIN+ requires that A2s output must swing below 0V, which is clearly impossible without a negative power supply. To achieve common-mode range that extends to singlesupply ground, the INA122 uses precision level-shifting buffers on its inputs. This shifts both inputs by approximately +0.5V, and through the feedback network, shifts A2s output by approximately +0.6V. With both inputs and VREF at single-supply, A2s output is well within its linear range. A positive VIN+ causes A2s output to swing below 0.6V. As a result of this input level-shifting, the voltages at pin 1 and pin 8 are not equal to their respective input terminal voltages (pins 2 and 3). For most applications, this is not important since only the gain-setting resistor connects to these pins. LOW VOLTAGE OPERATION The INA122 can be operated on a single power supply as low as +2.2V (or a total of +2.2V on dual supplies). Performance remains excellent throughout the power supply range up to +36V (or 18V). Most parameters vary only slightly throughout this supply voltage rangesee typical performance curves.

Operation at very low supply voltage requires careful attention to ensure that the common-mode voltage remains within its linear range. LOW QUIESCENT CURRENT OPERATION The INA122 maintains its low quiescent current (60A) while the output is within linear operation (up to 200mV from the supply rails). When the input creates a condition that overdrives the output into saturation, quiescent current increases. With VO overdriven into the positive rail, the quiescent current increases to approximately 400A. Likewise, with VO overdriven into the negative rail (single supply ground) the quiescent current increases to approximately 200A. OUTPUT CURRENT RANGE Output sourcing and sinking current values versus the output voltage ranges are shown in the typical performance curves. The positive and negative current limits are not equal. Positive output current sourcing will drive moderate to high load impedances. Battery operation normally requires the careful management of power consumption to keep load impedances very high throughout the design.

+5V

REF200 200A

200mV + VIN RG 1 VIN 2 4 3 8

(60A)

VCM 100mV

1k

7 INA122 6 5 Ref(1)

VO = 0.1V to 4.9V VO NOTE: (1) To accomodate bipolar input signals, VREF can be offset to a positive voltage. Output voltage is then referred to the voltage applied to Ref.

FIGURE 5. Micropower Single Supply Bridge Amplifier.


V+ +5V Load 8 IL 2.5A + VIN Shunt RS 0.02 3 8 50mV RG 1 VIN 2 4 INA122 5 7 G = 100 6 1k 0.47F 2 +IN 3 IN ADS7816 12-Bit A/D CS CLK Differential measurement avoids ground loop errors. 4 5 7 Chip Select Clock 1 VREF D 6 Serial Data

FIGURE 6. Single-Supply Current Shunt Measurement.

INA122

IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TIs publication of information regarding any third partys products or services does not constitute TIs approval, warranty or endorsement thereof.

Copyright 2000, Texas Instruments Incorporated

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