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Prepared by: Hu nh H Vnh Phc ( Training Devision)

Ca Cac ho ho sa san pha pham PLC cu cua Omron


5120 pts

Kch thc I/O

Dung cho he thong ieu khien quan trong can cac chc nang cao cap Dung cho he thong c ln can chc nang cao cap 640 pts
512 pts 362 pts

5120 pts

CS1D CS1 CJ1 CJ1M CQM1H


320 pts

2560 pts

180 pts

180 pts

CPM2C-S CPM2C CPM2A CP1L

CP1H

Dung cho he thong c va can 1 so chc nang at biet

160 pts

CPM1A

Dung cho he thong c nho can 1 so chc nang n 3 ac tnh gian

1. Cc ng dng ca PLC CP1L/1H 2. Gii thiu cc tnh nng ca PLC CP1L/CP1H 3. Cc Khi nim C bn v PLC 4. Cc ng dng ca CP1L/1H 5. Cch u dy ng vo/ra trn PLC 6. Cu Trc v chc nng cc vng nh trong PLC CP1L. 7. Truyn thng gia PLC vi cc thit b khc 8. Gii thiu v b training Kit CP1L & HMI 9. Cc tp Lnh c Bn 10.Bi tp ng dng (Exercises)
4

Gii thiu v PLC CP1L/1H

PLC CP1L/CP1H

Gii thiu v PLC CP1L/1H

nh v

CP1L

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
S lng I/O & dung lng b nh nhiu hn
Kch thc I/O Chng trnh T c lnh S unit m r ng : 10,14, 20 : 5 K steps : 0.55 s :1

CP1L

Nhiu ngn ng lp trnh


Khi chc nng (FB)

CP1L-L

S thang (LD) CP1L-M


Kch thc I/O Chng trnh T c lnh S unit m r ng : 30, 40, 60 : 10 K steps : 0.55 s :3

Ngn ng cu trc (ST) Gim thi gian lp trnh & khc phc s c
7

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
iu khin truyn ng vi chnh xc cao
Ng ra pht xung B m tc cao - 4 b m 1 pha 50kHz - 2 b m sai pha 100kHz - Ng vo interupt nhanh 5kHz

CP1L

ModBus-RTU Truyn thng ModBusRTU khng cn lp trnh ng dng truyn thng vi bin tn

CP1L h tr iu khin ng ra pht xung 2 trc v i tc ti a 100kHz. Nhiu chc nng: Tm im gc, gia tc & gim tc hnh thang,

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Truyn thng ni tip Serial PLC Link chia s d liu gia cc PLC qua RS-485/RS422. Giao tip qua cng USB

CP1L

Thch hp cho laptop khng c cng COM


9

Gii thiu v PLC CP1L/1H

PLC CP1H

10

Gii thiu v PLC CP1L/1H

nh v

CP1H

11

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Kh nng m rng

CP1H

C th m rng ti a thm 7 unit CP1W hoc CPM1A


C th kt ni 2 module CPU Bus Unit hoc Special I/O Unit ca PLC CJ1

12

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Ng ra pht xung

CP1H

CP1H-Y

- 2 trc: 1MHz & 2 trc: 100kHz - 4 trc: 100kHz

CP1H-X[]

- 4 trc: 100kHz

13

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
B m tc cao
4 b m (M t pha hoc sai pha) CP1H-Y[]

CP1H

- 2 ng: sai pha (500kHz) hay mt pha (1MHz) - 2 ng: sai pha (50kHz) hay mt pha (100kHz) CP1H-X[]

Cho php iu khin bin tn, tc con sut trong ngnh dt,

- 4 ng: sai pha (50kHz) hay mt pha (100kHz)


14

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Ng vo ngt
- Tch hp sn 8 ng vo ngt - Ng vo p ng nhanh c rng xung 50 s. - Ng vo ngt c th c dng nh b m mt pha (tn s p ng: 5 kHz)

CP1H

Thi gian thc thi lnh


So vi CPM2A - Lnh c bn: nhanh hn 6 ln - Lnh c bit: nhanh hn 26 ln

15

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Ng vo/ra tng t

CP1H

AD041

DA041

MAD11
16

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Truyn thng ni tip
Slave

CP1H

Serial PLC Links


Slave 7

NS-AL002

Master

Slave 0

CJ1M c th kt ni

D liu c th c chia s gia 9 PLC CP1H, CP1L hay CJ1M thng qua Serial PLC Links. S word lin kt: 10 words

17

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
ModBus-RTU
Khng cn lp trnh truyn thng Khng tnh ton CRC phc tp Truyn nhn d liu vi bin tn c thc thi rt d dng. Ch cn ghi a ch, m lnh, & d liu trong vng nh DM & t bit trong vng nh AR tng ng ln ON (A640.00: port 1, A641.00: port 2)

CP1H

18

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Th vin hm chc nng (FB)
Th vin FB cung cp cc khi hm chc nng gip giao tip d dng vi bin tn v iu khin nhit , nh: chy/dng, ci t & gim st tn s, ghi tr SetValue, c PresentValue,

CP1H

19

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Ngn ng cu trc (ST)

CP1H

Dng ngn ng lp trnh nh Pascal vit FB khi kh vit bng ladder. PLC h tr nhiu hm ton hc nh: ly cn, logarit, SIN, COS, TAN,

20

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
iu khin bin tn

CP1H

RS-485

21

Gii thiu v PLC CP1L/1H

Tnh nng ni bt
Hin th LED 7 on

CP1H

Ng vo tng t
Nm chnh analog phn gii: 256. Gi tr c lu vo A642, hin th LED 7 on (00-FF) trong 3s

- Hin th m li , thun tin cho vic bo dng, khc phc s c - LED 7 on ch c loi CP1H

Ng vo analog ngoi phn gii: 256. (0-10V). Cp di ti a 3m

22

Cc Khi nim c bn v PLC CC KHI NiM C BN V PLC

1.1 Cc h m (Number System) B x l trung tm (CPU) bn trong PLC ch lm vic vi hai trng thi 0 hoc 1 (d liu s), do cn thit phi c mt s cch biu din cc i lng lin tc thng gp hng ngy di dng cc dy s 0 v 1. H nh phn H thp phn H thp lc (h Hex) (Binary) (Decimal) (Hexadecimal)

1. H nh phn (Binary) L h m trong ch s dng 2 con s 0 v 1 biu din tt c cc con s v i lng. Dy s nh phn c nh s nh sau: bit ngoi cng bn phi l bit 0, bit th hai ngoi cng bn phi l bit 1, c nh vy cho n khi bit ngoi cng bn phi l bit n. Bit nh phn th n c trng s l 2n x 0 hoc 1, trong n = s ca bit trong dy s nh phn, 0 hoc 1 l gi tr ca bit . Gi tr ca dy s bng tng trng s ca tng bit trong dy V d: dy s nh phn 1001 s c gi tr nh sau: trng 1001 = 1x23 + 0x 22 + 0x21 + 1x20 = 9
23

Cc Khi nim c bn v PLC

Bit 3 1 Trng s: 23x 1 8x1 +

Bit 2 0 22x 0 4x0 +

Bit 1 0 21x 0 2x0 +

Bit 0 1 20x 1 1x1 = 910

2. H thp phn (Decimal) L h m s dng 10 ch s l 0 1 2 3 4 5 6 7 8 9 biu din cc con s. H thp phn cn kt hp vi h nh phn c cch biu din gi l BCD (Binary-Coded Decimal) 3. H thp lc (Hexadecimal) L h m s dng 16 k t s l 0 1 2 3 4 5 6 7 8 9 A B C D E F (trong 10 ch s t 0 n 9, cc ch s t 11 m 15 c biu din bng cc k t t A-F

Khi vit, phn bit dy ch s ngi ta thng thm cc ch BIN, BCD hay HEX vo sau cc con s.
24

Cc Khi nim c bn v PLC


S Thp Phn - Bng Bn l cch biu din ca cc ch s thp phn, s Hexa v BCD bng cc ch s nh phn ( mi ch s HEXA v BCD u c 4 bit nh phn tng ng) S HEX S BCD Bit 3 23 = 8 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 A B C D E F 0 1 2 3 4 5 6 7 8 9 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 S nh phn 4 bit t ng ng Bit 2 22 = 4 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Bit 1 21 = 2 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Bit 0 20 = 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 25

Cc Khi nim c bn v PLC 1.2 Cch biu din s nh Phn


1.2.1) Biu di n s thp phn bng s nh phn V d : Gi s ta c dy s nh phn 16 bit nh sau: 0000 0000 1001 0110 tnh gi tr thp phn ca 16 bit ny ta lm nh sau :
15
0

14
0

13
0

12
0

11
0

10
0

9
0

8
0

7
1

6
0

4
0

3
1

2
0

1
1

0
1 0

Trng s

215

214

213

212

211

210

29

28

27

26

25

24

23

22

21

20

32768 16384 8192

4096

2048

1024

512

256

128

64

32

16

128

16

=> Nh V y ta c : 128 + 16+4+2 = #150 (Thp phn) 26

Cc Khi nim c bn v PLC


Ngc l i khi chuyn i t mt s thp phn l: (1750)10 = (1024 + 512 + 128 + 64 + 16 + 4 + 2) = (0000 0110 1101 0110)2 Nh trn ta thy, vi c tnh nhm gi tr thp phn ca mt dy s nh phn di l rt mt thi gian. V vy ngi ta c mt cch bi u di n s thp phn d i dng n gin hn. l dng BCD v c dng ph bin trong cc loi PLC ca OMRON 1.2.2) Biu din s nh phn d i dng BCD Khi bi u di n bng m BCD, mi s thp phn c bi u di n ring bng nhm 4 bit nhi phn V d: Gi s ta c mt s h thp phn l 1750 v cn chuyn n sang dng m BCD 16 bit.

1750

-S th p phn di dng BCD (1750)10= (0001011101010000)BCD 27

Cc Khi nim c bn v PLC


1.2.3) Biu din s nh phn di dng hexa : S nh phn c biu din di dng hexa bng cch nhm 4 bit mt, bt u t phi qua tri v biu din mi nhm bit ny bng mt ch s g i l (digit). Digit 3 Digit 2 Digit 1 Digit 0

15 0

14 0

13 0

12 1

11 0

10 0

9 0

8 0

7 1

6 0

5 1

4 0

3 1

2 1

1 1

0 1

Nhm 3

Nhm 2

Nhm 1

Nhm 0

=1

=0

=A

=F

Nh vy thay v bi u di n dy s nh phn (0001 0000 1010 1111)2 th ta c th bi n di n = 10AF => (0001 0000 1010 1111)2 = 10AF (Hex) Ch : - Biu din s thp phn di dng hexa v BCD l khng hon ton tng ng nhau (cho kt qu bng dy s nh phn khc nhau) - M BCD c dng ch yu khi chuyn i nhanh t s thp phn ra m nh phn dng BCD trong khi m hexa c dng ph bin khi biu din dy s nh phn di dng ngn gn v n gin hn.

28

Cc Khi nim c bn v PLC 1.3 Cc Khi nim v Digit, Byte, Word


D liu trong PLC c m ha d i dng m nh phn. Mi ch s c gi l mt bit, 8 bit lin tip gi l 1 Byte, 16 bit hay 2 Byte g i l mt Word. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Digit 3

Digit 2

Digit 1

Digit 0

Byte ( Left most) Word ( Channel) =>Nh V y : 1 Word = 2 Byte = 4 Digits = 16 Bit

Byte ( Right most)

Cc i lng lin t c (analog) nh dng in, in p, .. Khi lu vo vng nh PLC u c i sang dng m nh phn 16 bit (word) v cn c gi l 1 knh (Channel). Ngoi ra biu din nhng s lng l n hn, ngi ta c thm cc n v sau: - Kilo Bit : Trong k thut s 1 Kilobit l 210= 1024 bit. Tuy nhin tin tnh ton ngi ta thng dng l 1Kb = 1000 bit. - Mega : 1 Mb = 1024Kb. Ng i ta th ng dng gn ng l 1Mb=1000Kb=1.000.000 bit. - Kiloword : 1 Kword=1000 Word 29

Cc Khi nim c bn v PLC 1.4 Cu trc ca PLC:


Phn ny gii thch cu trc bn trong v ch c nng ca khi PLC

30

Cc Khi nim c bn v PLC


(1) Chuyn chng trnh v cc tham s: - D liu trong RAM c t ng lu tr n b nh (Flash Memory) khi c s thay i t ph n mm lp trnh CX-Programmer. - Khi cp ngu n cho PLC th d liu c chuyn t b nh (Flash memory) n RAM (2) Chuyn gi tr mc nh trong vng nh d liu DM. - Khi kh i to t phn mm lp trnh CX-Programmer, gi tr mc nh DM c chuyn t RAM n b nh (Flash memory). - Khi cp ngu n cho khi PLC th gi tr ny c chuyn t b nh n RAM. Ty theo cc ci t ban u ( PLC setup). (3) Chuyn d liu gia b nh v th nh. - Khi kh i to trong phn mm lp trnh, d liu c chuyn t RAM hay b nh n th nh . - Khi ta cp ngun cho khi PLC th d liu c chuyn t th nh n b nh. (4) Qun l chng trnh - Chng trnh dng s ladder c lu tr trong RAM. Chng trnh c ng/m, lp trnh, lu tr t phn mm CX-Programmer. (5) Vng nh I/O. - y l vng nh m ngi lp trnh dng c v vit ch ng trnh. - Phn giao din u vo bin i cc tn hiu in thnh cc mc tn hiu s cp cho CPU x l - Phn giao din u ra thc hin bin i cc lnh iu khin mc tn hiu s bn trong PLC thnh cc tn hiu vt l thch hp bn ngoi nh ng m rle. (6) Khu vc lu cc tham s. - b xung cho vng nh I/O, vng ny c dng xy d ng cc ton hng b i ngi s dng. 31

Cc Khi nim c bn v PLC


(7) B nh - Trong PLC CP1L c tch hp mt b nh . D liu c t ng lu tr trong b nh khi ta lp trnh t phn mm CX-Programmer, hay ta th c hin vic chuyn i t th nh. - Khi cp ngu n cho PLC, gi tr nh ny t ng chuyn t b nh n RAM. - Bng vic s d ng ph n mm CX-Programmer, cc d liu nh thanh ghi tm, trng thi u vo, lnh iu khin u ra cng c lu trong b nh. (8) Th nh - Th nh c dng lu chng trnh, trng thi u vo/ra, n i dung d liu nh t CX-Programmer. - Ni dung lu trn th nh c t ng chuyn ti PLC khi ta cp ngun cho PLC. 1.5 Hot ng ca PLC: Hnh di l lu thc hin bn trong PLC, trong c 3 phn quan tr ng l Thc hin chng trnh, cp nht u vo ra v phc v yu cu t cng Peripheral Port. Qu trnh ny thc hin lin tc khng ngng theo mt vng kn gi l scan.

32

Cc Khi nim c bn v PLC


Cp ngun

Khi to qui trnh:

- Khi to - Kim tra kt ni - Thc hin load t th nh. - Xa vng nh I/O. - Kim tra vng nh User.

Gim St qui trnh:

Kim tra s c v Battery Kim tra cng tc DIP SW. Kim tra tn hiu I/O. Kim tra b nh chng trnh

Thc hin chng trnh:


Cycle time (chu k
qut ca chng trnh)

- Thc hin yu cu t ngi s dng - Khi pht hin li: OFF u ra. - Khi li thc hin: xa vng nh I/O

Cp nht u vo/ ra:

- Thc hin cp nht u vo/ u ra

Phc v cc yu cu t cng truyn thng

T cng USB Phc v yu cu t cng truyn thng Thc hin vic cp nht u vo ra Phc v truy cp t th nh Phc v kt ni Online

33

Cc Khi nim c bn v PLC


Cp ngun cho PLC Kim tra k t ni t i cc module m rng khc Kim tra phn cng & b nh chng trnh C Li Kim tra OK? OK Bt cc c bo l i ON n nhp nhy khi b l i nh n bo li sng hoc nhp nhy Sng lun khi b l i nng. Thc hin chng trnh NO Thc hin chng trnh Chu K Qut C a Chng Trnh Kim tra v gim st Khi to

Gi n hot ng ca PLC

Kt thc ch trnh Yes Ch kt thc chu k qut ( khi c ci t trc) Tnh ton chu k qut Thc hin lm ti (Refresh) cc I/O Thc hin cc yu cu t cng truyn thng

Tnh ton Th i gian qut

Lm ti cc I/O Phc v cc yu cu t cng truyn thng

34

Cc Khi nim c bn v PLC


1.6 Cc bit u vo trong PLC v cc tn hiu in bn ngoi
+V

0 1

0 0

Cc bit bn trong PLC phn nh trng thi ng m cng tc bn ngoi

0.15

0.01 0.00

Cc bit trong PLC phn nh trng thi ng m ca cng tc in bn ngoi nh trn hnh. Khi trng thi kha u vo thay i (ng/m), trng thi cc bit tng t c ng thay i tng ng. Cc bit trong PLC c t chc thnh word 1.7 Cc bit u ra trong PLC v cc thit b in bn ngoi
100.15 100.04 0 1 100.00 0 0 1 Cc bit ca word 100 Hnh bn : Cc bit u ra v cc thit b in bn ngoi Trn hnh l v d v cc bit iu khin u ra ca PLC. Cc bit ca word 100 s iu khin bt tt cc n tng ng vi trng thi (1 hoc 0 ca n) 0V

35

Cc Khi nim c bn v PLC


1.8 Cch nh a ch b nh trong PLC Cc a ch dng bit trong PLC c biu din di dng nh sau:

[Tin t] [S a ch word] . [S ca bit trong word] [Tin t] [S a ch word] . [S ca bit trong word]

Cho bit chc nng ca vng nh

Xc nh a ch ca word trong vng nh

Xc nh s th t ca Bit trong word (0~15)

0.15 15 14 13 12 11

Input Channel 0 10 9 8 7 6 5 4 3 2 1

0.00 0

CIO 0 .10 Bit th 10 trong word a ch word l 0 Tin t l CIO ( nhng i vi vng CIO th khi biu din ta khng cn vit tin t PLC vn hiu) => Nh v y a ch s c vit l : 0.10 36

Cc Khi nim c bn v PLC


Ti n t l k hiu ca loi a ch b nh. Cho ta bit chc nng ca vng nh . V d: H cho Holding Area, A cho Auxiliary Area. Ring CIO Area l vng nh cho cc bit vo ra , nn khng cn c a tin t CIO khi tham chiu. V d 0.00 l bit th nht ca word 0 0.01 l bit th hai ca word 0 ...... 0.15 l bit th 16 ca word 0 - Bn di l v d v cch biu din 2 vng nh c bi t trong PLC ca OMRON

Holding Area H 511.15


Bit 15 Word 511
Holding area

Auxiliary Area A 959.15


Bit 15

Word 959
Auxiliary area

37

Cu trc v chc nng cc Vng nh 1.10 Chc nng cc vng nh trong PLC CP1L
Vng nh Input area Output area Words CIO 0 n CIO 99 (100 words) CIO 100 n CO 199 (100 words) CIO 3000 t i CIO 3063 (64 words) CIO 3100 t i CIO 3189 (90 words) CIO 3800 t i CIO 6143 (900 word) W000 t i W511 (512 words) H000 t i H511 (512 words) A000 t i A959 (960 words) (32.768 words) Bits CIO 0.00 t i CIO 99.15 (1600 bits) CIO 100.00 t i CIO 199.15 (1600 bits) CIO3000.00 t i CIO3063.15 (1024 bits) CIO 3100.00 t i CIO 3189.15 CIO 3800.00 t i CIO 6143.15 W000.00 t i W511.15 H000 t i H511.15 (8.192 bits) A000 t i AR959.15 (15.360 bits) D00000 t i D32767 c dng kt ni 1:1 Master, Slave Chc n ng Cc bit ny dng gn cho cc u dy vo ra I/O

CIO Area

1:1 Link area

Serial PLC Link area Work area Work area Holding area

Dng kt ni v i nhiu CP1L hay CP1H khc Cc bit ny c s dng nh mt bit trung gian. Cc bit ny c s dng nh mt bit trung gian. Cc bit ny lu d liu v lu trng thi , khi PLC b mt ngun. (H512 ~1535 s dng cho FB) Cc bit ny phc v cho cc chc nng ring bit nh c bo v cc bit iu khin D liu lu vng nh DM ch c th truy cp theo dng word. Gi tr c a word t lu tr khi b mt in

Auxiliary area

DM area

38

Cu trc v chc nng cc Vng nh


Vng nh Words Bits Chc n ng

Timer (4096 Bit) Counter (4096) Bit TR Area Task Flag Area Index Registers Data Registers

4096 Bit C0000 ti C4096 Bits. 16 Bit 31 Bit 16 Registers 16 Register

T0000 ti T4096 Bits.

a ch cho cc Timer a ch cho cc Timer

TR0 ~ TR15 TK0 ~ TK31 IR0 ~ IR15 DR0 ~ DR15

Chc Nng ca cc vng nh : 1. Vng nh CIO : Vng nh ny c s dng cho cc bit u vo/ ra, v cc bit trung gian, c truy cp theo d ng Bit

39

Cu trc v chc nng cc Vng nh


Input Area: CIO 0~99 (bit 0.00 ~99.15) t ng cng 1600 bit, c s dng lm a ch cho cc u vo. Output Are: CIO 100~199 (bit 100.00 ~199.15) t ng cng 1600 bit, c s dng lm a ch cho cc u ra. Reverse for System Area :CIO 1900 ~ CIO 1999 , c s dng nh mt bit trung gian 1:1 Link Area : CIO 3000 ~ CIO 3063 : Vng nh dng trao i d liu khi kt n61i 2 PLC l i vi nhau theo kiu truyn 1:1 ( 1 Master ni vi 1 Salve) Serial PLC Link Area : Vng nh dng trao i d liu khi kt ni nhiu PLC vi nhau. PLC CP1L/1H, h tr truyn thng 1:8 PLC Link ( 1 Master ni vi 8 Slaves), c th s dng vng nh ny lm bit trung gian, trong trng hp khng s dng cho mc ch truyn thng Serial PLC Link. Work Area : CIO 3800 ~ 6143: Vng nh ny c s dng lm bit trung gian, v s dng t do trong chng trnh. Cc bit trung gian phi u tin s dng trong vng nh ny, khi no thi u th mi s dng n cc vng nh khc. Lu : i vi vng nh CIO, Khi bi u di n a ch b nh khng cn thm tin t CIO vo tr c a ch.

2. Vng nh Work Area ( W): vng nh ny c 513 words : W000~W511(bit W0.00~ W511.15 = 8176 Bits) Vng nh ny c s dng cho cc bit trung gian v s dng t do trong chng trnh, Khi cn bit trung gian nn u tin s dng vng nh ny tr c, khi no thiu mi s dng sang vng nh CIO

W000

15

14

13

12

11

10

W0.00

W511 W511.15

15

14

13

12

11

10

40

Cu trc v chc nng cc Vng nh


3. Vng nh Hold Area (H): H000~H511 (Bit H0.00~H511.15) = 8176 Bits Cc Bit trong vng nh ny c gi nguyn trng thi khi PLC b mt ngun hoc khi PLC chuyn t ch RUN sang Program. c s dng t do trong chng trnh nh mt bit trung gian

H000

15

14

13

12

11

10

H0.00

H511 H511.15

15

14

13

12

11

10

Lu : T H512 ~H1535 ch s dng cho ch c nng trong Fuction Block. V vy khng th dng lp trnh nh cc bit trung gian khc. 4. Vng nh Auxiliary Area (A): A000~A959 Vng nh ny cha cc bit c bit, cc c nh nhng bit khng phi l bit c bi t th c th s dng t do trong chng trnh nh mt bit trung gian. Gm c 2 vng nh : - Vng nh ch c : Ch c php c ra , khng c ghi vo - Vng nh c / Ghi : cho php ghi vo hoc c ra ty .

41

Cu trc v chc nng cc Vng nh A000


15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Vng nh ch c

A447 A448

15

14

13

12

11

10

Vng nh cho php c hoc ghi vo

A959

15

14

13

12

11

10

5. Vng nh Temporary relay Are (TR). TR0~TR15: Vng nh ny ch s dng khi l p trnh bng bn phm, cn r nhnh ng ra. Khi l p trnh bng phn mm CX-Programmer th vng nh ny khng cn s dng. 6. Vng nh D li u Data Memory Area (D) . y l vng nh ln nht trong PLC, truy sut dng word , dng lu tr d liu. D liu trong vng nh ny s khng b mt khi PLC b ngt ngun i n PLC loi 30/40/60 I/O D00000 D00000 D9999 D32000 D32767 D32767 42 PLC loi 14/20 I/O

Cu trc v chc nng cc Vng nh


7. Vng nh Timer (T) : T0~&T4095 . Vng nh cho cc a ch ca timer. Gm c 2 thnh phn : - Gi tr PV ca timer - Trng thi ca Timer bit.

Gi tr hin ti ca Timer 8. Vng nh Counter (C) : C0~& C4095 . Vng nh cho cc a ch ca Counter. Gm c 2 thnh phn : - Gi tr PV ca counter - Trng thi ca Couter bit.
C C

Trng thi ca timer Bit

Ga tr hi n t i ca Counter

Trng thi ca Counter Bit.

9. Vng Nh Task ( Task Flag Area:TK): TK0~TK31 : Vng ny s dng gi mt chng trnh chy hoc dng, c tt c 32 Bit , cho php gi ti a 32 chng trnh, bng l nh Task On ( TKON), Task Off (TKOF)

43

Cu trc v chc nng cc Vng nh


10. Vng nh Index Registers (IR): IR0 ~IR15 c s dng nh 1 con tr, nhm thc hin mt tc v c nh sn trong chng trnh. 11. Vng nh Data Registers (DR): DR0~DR15 c s dng cng vi Index Register . Khi mt Data Register c nhp vo trc mt Index Register, ni dung ca n s c cng vo a ch c nh sn trong Index Registera.

44

Gii thiu cc tnh nng ca PLC CP1L

San pham mi 2007


45

Gii thiu cc tnh nng ca PLC CP1L


2. Nhng i mi cho dng sn phm PLC c nh: - PLC vi tnh nng n gi n, nhng c cu trc vng nh gi ng nh PLC cao cp h CJ & CS. - Loi CP1L mi ny s thay th cho dng sn phm CPM1A & CPM2A - C cu trc v tnh nng gi ng nh dng sn phm CP1H

Cc dng sn phm PLC Omron


Price

Vi s ng ho cc dng PLC, Chng ta s c c tt c trong mt b iu khin, tch hp sn ng vo / ra Analog, chc nng pht Xung, truyn thngFunction Block

CJ1G CJ1M CJ series CJ1H

CPM2A
Dng CPM1A & CPM2A s c thay th bng CP1L.

CP1H CP series (package series)

CPM1A

CP1L

Functionality

PLC vi tnh nng n gi n, nhng c cu trc vng nh gi ng nh PLC cao cp h CJ & CS 46

Gii thiu cc tnh nng ca PLC CP1L HNH DANG & CAC BO TR TREN CP1L

Khi CPU 30 & 40 I/O : loi M


Battery Battery connector Cng USB Nm iu chnh Analog

LED ch th
Trm ni dy ng vo (removable)

Cng kt ni ng vo tn hiu analog Dip Switch ( 6 chn) ci t cc chc nng truyn thng cho CPU
1: 2: 3: 4: 5: 6: User memory protection Auto transfer AR Port 1 Port 1 NC

Khe cm cng truyn thng RS 232 / RS 485

Cng kt ni n cc khi m rng

Trm ni dy ng ra ( Removable)

Khe cm th nh

Khi CPU 14& 20 loi: L


Khe cm th nh Cng USB Nm iu chnh Analog Cng kt ni ng vo tn hiu Analog Battery Battery connector DIP switch (4-pin) ci t truyng thng cho CPU 1: User memory protection 2: Auto transfer 3: AR 4: Port 1

Trm ni dy ng vo ( c nh) Khe cm cng truyn thng RS232 hoc 422./ 485

Cng kt ni khi m rng

Trm ni dy ng ra ( c nh)

47

Gii thiu cc tnh nng ca PLC CP1L H tr kt ni cc khi m rng ca CPM1A & CP1W Khoi CPU 30 & 40 , 60 I/O loai M

Cho phep gan toi a 3 khoi m rong

Khoi CPU 10,14 & 20 I/O loai L

Cho phep gan toi a 1 khoi m rong


48

Gii thiu cc tnh nng ca PLC CP1L Kch thc cua khoi CPU 30 points (18/12) 90 mm 130 mm
CP1L-M30DR-A (AC power, relay outputs) CP1L-M30DR-D (DC power, relay outputs) CP1L-M30DT-D (DC power, transistor (NPN) outputs) CP1L-M30DT1-D (DC power, transistor (PNP) outputs)

Khch thc san pham


40 points (24/16 D = 85 mm 90 mm 150 mm
CP1L-M40DR-A (AC power, relay outputs) CP1L-M40DR-D (DC power, relay outputs) CP1L-M40DT-D (DC power, transistor (NPN) outputs) CP1L-M40DT1-D (DC power, transistor (PNP) outputs)

D = 85 mm

14 points (8/6) 90 mm 86 mm
CP1L-L14DR-A (AC power, relay outputs) CP1L-L14DR-D (DC power, relay outputs) CP1L-L14DT-D (DC power, transistor (NPN) outputs) CP1L-L14DT1-D (DC power, transistor (PNP) outputs)

20 points (12/8) D = 85 mm 90 mm 86 mm
CP1L-L20DR-A (AC power, relay outputs) CP1L-L20DR-D (DC power, relay outputs) CP1L-L20DT-D (DC power, transistor (NPN) outputs) CP1L-L20DT1-D (DC power, transistor (PNP) outputs)

D = 85 mm

49

Gii thiu cc tnh nng ca PLC CP1L

Nhng loi CPU c sn xut


CPU Units
14 I/O (8 vo, 6 ra)
- Ngun cung cp AC - Ng vo 24 VDC, ng ra r le - Ngun cp 24 VDC - Ng vo 24VDC, ng ra r le - Ngun cp 24 DC - Ng vo 24VDC, ng ra Transisotr (NPN) - Ngun cp 24 VDC - Ng vo 24 VDC, ng ra transistor (PNP)

20 I/O (12 Vo,8 ra)

30 I/O (18 Vo, 12 Ra)

40 I/O (24 Vo,16 Ra)

CP1L-L14DR-A CP1L-L14DR-D CP1L-L14DT-D

CP1L-L20DR-A CP1L-L20DR-D CP1L-L20DT-D

CP1L-M30DR-A CP1L-M30DR-D CP1L-M30DT-D

CP1L-M40DR-A CP1L-M40DR-D CP1L-M40DT-D

CP1L-L14DT1-D

CP1L-L20DT1-D

CP1L-M30DT1-D

CP1L-M40DT1-D

51

Gii thiu cc tnh nng ca PLC CP1L

Ho tr ket noi cac khoi m rong sau:.


M sn phm loi mi ( CP1L) CP1W-8ED ( input DC) CP1W-8ER (8 Output role) CP1W-8ET CP1W-8ET1 CP1W-16ER CP1W-20EDR1 CP1W-20EDT CP1W-20EDT1 - No plan CP1W-SRT21 CP1W-MAD11 - No plan CP1W-AD041 CP1W-DA041 CP1W-TS001 CP1W-TS002 CP1W-TS101 CP1W-TS102

Lu y: Khoi m rong cua CPM1A mau xam con CP1W mau en .


M sn phm loi PLC c tng ng ( CPM1A) CPM1A-8ED CPM1A-8ER CPM1A-8ET CPM1A-8ET1 CPM1A-16ER (abatable soon) CPM1A-20EDR1 CPM1A-20EDT CPM1A-20EDT1 CPM1A-DRT21 CPM1A-SRT21 CPM1A-MAD11 CPM1A-MAD01 CPM1A-AD041 CPM1A-DA041 CPM1A-TS001 CPM1A-TS002 CPM1A-TS101 CPM1A-TS102

52

Gii thiu cc tnh nng ca PLC CP1L

Cc khi m rng Digital I/O & Analog I/O

53

Gii thiu cc tnh nng ca PLC CP1L

C c Bo Option cho php gn vo 2 khe cm truy n thng trn PLC

Cc khi m rng nhit .

54

Gii thiu cc tnh nng ca PLC CP1L


Kh nng kt ni thm khi m rng ca CP1L - Ty theo loi CPU m kh nng kt ni thm khi m rng s khc nhau. PLC CP1L , CPU loi M ( 30/40/60) I/O cho php gn thm t i a 3 khi m rng 36 In 24 In 24 In 24 In

60 I/O

40 I/O

40 I/O

40 I/O

24 Out CPU Unit (30/40/60) I/O

16 Out Expansion 1

16 Out Expansion 2

16 Out Expansion 3

=> Max I/O = 108 In/ 72 Out = 180 I/O

55

Gii thiu cc tnh nng ca PLC CP1L


PLC CP1L , CPU loi L ( 14/20) I/O cho php gn thm t i a 1 khi m rng 12 In

24 In

20 I/O 40 I/O

8 Out CPU Unit (14/20) I/O

16 Out Expansion 1

Max : 36 In/24 Out = 60 I/O

56

Gii thiu cc tnh nng ca PLC CP1L Kh nng kt ni thm cc khi m rng

Cc khi m r ng bao gm cc Mododule : - Digital I/O - Analog I/O - Temperature input - I/O Link

57

Gii thiu cc tnh nng ca PLC CP1L


c tnh K thut Item Loi 40-point CPU Units Vng nh cho cc Bt vo Word I/O areas Vng nh cho cc Bit ra 1:1 Link Area Serial PLC Link Bit Area Work bits Loi M 30-point CPU Units 20-point CPU Units c tnh k thut Loi L 14-point CPU Units

1,600 bits (100 words): CIO 0000.00 to CIO 0099.15 (The built-in input 24 bits are allocated to 0000.00 to 0000.11 and 0001.00 to 0001.11.) 1,600 bits (100 words): CIO 0100.00 to CIO 0199.15 (The built-in output 16 bits are allocated to CIO 0100.00 to CIO CIO 0100.07 and CIO 0101.00 to CIO 0101.07.) 1,024 bits (64 words): to 3063.15 (CIO 3000 to CIO 3063) 1,440 bits (90 words): CIO 3100.00 to CIO 3189.15 (CIO 3100 to CIO 3189) 37,504 bits (2344 words) CIO 3800.00 to CIO 6143.15 (CIO 3800 to CIO 6143)

Work Area TR Area

8,192 bits (512 words): W000.00 to W511.15 (W000 to W511) 16 bits: TR0 to TR15

58

Gii thiu cc tnh nng ca PLC CP1L


c imk thut Loi 40-I/O CPU Units Model S lng I/O tch hp sn Khi m rng (Max). S lng I/O t i a Dung lng chng trnh S lng ng vo ngt Ng vo m tc cao CP1L-M40D@-@ 40 (24 ng vo /16 ng ra) 3 160 10 Ksteps 6 bao gm ng vo ngt v ng vo m xung tc cao 150 Loi M 30-I/O CPU Units CP1L-M30D@-@ 30 (18 ng vo/12 ng ra) 20-I/O CPU Units CP1-N20D@-@ 20 (12 ng vo/8 ng ra) 1 60 5 Ksteps 4 bao gm ng vo ngt v ng vo m xung tc cao) 54 Loi L 14-I/O CPU Units CP1L-14D@-@ 14 (8 ng vo/6 ng ra)

2 counters: Differential phase (multiplier of 4, pulse plus direction input, up-down counting), 50 kHz, or 4 counters: Single-phase (incrementing), 100 kHz (The total for 4 axes, however, must not exceed 200 kHz.) Number range: 32-bit linear mode, ring mode Interrupt: Target value match comparison, range comparison 6 Max 5KhZ/total 16 bit 4 Max 5KhZ/total 16 bit

Kin m ng vo ngt Ng ra pht xung (transistor outputs only)

Trapezoidal acceleration/deceleration, S-curve acceleration/deceleration (fixed to 50% of duty) 2: 1 to 100 Hz (CCW/CW or pulse plus direction) PWM output (0.0 to 100.0% of duty, specified in increments of 0.1%) 2: 0.1 to 1 kHz (precision: 5% at 1 kHz) (Cannot be used, however, when four high-speed counters are being used.) 6 Min.50MicroS) 1 (setting range: 0 to 255) 1 (resolution: 1/256, input range: 0 to 10 V) 4 Min.50MicroS)

High-speed inputs Analog adjustment Simplified analog input

61

Gii thiu cc tnh nng ca PLC CP1L


Chc n ng cc thnh ph n trn PLC.

62

Gii thiu cc tnh nng ca PLC CP1L


S th t 1 2 3 4 Chc nng V tr gn Pin Cc n ch th hot ng Cng truyn thng USB port: Nt chnh Analog: M t V tr gn Pin , lu tr d liu trong RAM, khi PLC b mt ngun, v lu gi tr thi gian thc trong PLC Dng ch th cc trng thi hot ng trong PLC ( vem chi tit phn sau) c s dng kt ni vi mt my tnh. Xoay chnh gi tr thanh ghi A642, trong vng nh PLC, vi gi tr t 0 n 255. c s dng thay i nhanh gi tr t cho Timer v Counter m khng cn s dng phn mm lp trnh. Cho php Kt n i tn hiu ng vo analog t 0 n 10V, c phn gii 1/256 c lu tr trong nh A643 (t 0 n 255) Ci cc chc nng cho PLC ( xem chi tit phn sau) c s dng gn th nh (15). Th nh ny cn c s dng lu tr file d phng cho cc chng trnh, tham s, gi tr nh c trong PC1L. Bn cnh ta cng c th sao lu d liu n mt CP1L khc m khng cn ph i s dng b t c mt ph n mm no khc

Chn cm cc u vo Analog Cng tc chuyn mch DIP: Khe cm th nh

6 7

63

Gii thiu cc tnh nng ca PLC CP1L


8 9 Cc u ni ngun & ng vo PLC Khe cm cc bo Option - C 2 loi ngun cp cho PLC : loi AC 100~240 V, loi DC =24V, ring cc u vo PLC th phi cp ngun 24 VDC. C 2 khe cm bo Option: cho php cm thm cng truyn thng RS232C hoc RS-422/485, mn hnh LCD gim st lu phi tt ngun PLC trc khi cm bo option vo. Cc n LED ch th trng thi cc ng vo trn PLC, n LED s sng ln khi ng vo tng ng trn PLC ON. Cho php cm thm cc khi m rng nh: Digital I/O unit , Analog I/O unit, Temperature unit.. Cc n LED ch th trng thi cc ng ra trn PLC, n LED s sng ln khi ng ra tng ng trn PLC ON. - Trn PLC c 2 u ni ngun 24VDC cp ra t PLC, 300mA, (dng cp cho cc u vo) v cc u ni ng ra.. - Th nh dng sao lu d liu b nh , hoc copy chng trnh t PLC ny sang PLC khc. Bo truy n thng RS-232C, dng kt ni PLC vi cc thit b khc theo chun truy n RS-232C Bo truyn thng RS-422/485, dng kt ni PLC vi cc thit b khc theo chun truy n RS-422/485

10 11 12 13

Cc n LED ch th trang thi ng vo Khe cm khi m rng Cc n LED ch th trng thi ng ra. Cc u ni ng ra & ngun 24V cp ra bn ngoi Th nh Bo truyn thng RS232C Bo Trn thng RS422/485

15 16 17

64

Gii thiu cc tnh nng ca PLC CP1L - Chc Nng cc n ch th trn PLC CP1L/CP1H

65

Gii thiu cc tnh nng ca PLC CP1L Trng thi ca cc n LED ch th


n POWER (Mu xanh) RUN (Mu xanh) ERROR/ALARM () Trng thi Bt Tt Bt Tt Bt Nhp nhy Tt INH (Vng ) PRPHL (Vng) BKUP Bt Tt Bt Tt Bt Chc n ng PLC ang c cp in PLC khng c cp in PLC ang hot ng ch RUN hay MONITOR. PLC ang ch PROGRAM PLC gp l i nghim trng (PLC ngng chy) PLC gp l i khng nghim trng (PLC tip tc chy ch RUN) PLC hot ng bnh thng khng c l i Bit A500.15 c bt, cc ng ra ch OFF PLC ang ch bnh thng Cng truyn thng Peripheral Port ang hot ng Cc trng thi khc Chng trnh c vit/c t th nh Chng trnh c c t th nh Chng trnh, tham s, gi tr nh ang c lu tr khi PLC ang ON Cc trng thi khc

(Vng)

Tt

66

Gii thiu cc tnh nng ca PLC CP1L - Chc Nng ca cc Dip Switch trn CPU.

Khi SW1 On, th d liu sau s c bo v : - Chng trnh trong PLC ( Use program) - Vng nh trong PLC setup.

67

Gii thiu cc tnh nng ca PLC CP1L


S b tr v chc n ng c a cc chn trn bo truyn thng RS-232C

68

Gii thiu cc tnh nng ca PLC CP1L


S b tr v chc n ng c a cc chn trn bo truyn thng RS-422/485

69

Gii thiu cc tnh nng ca PLC CP1L


Chc n ng c a cc Dip switch trn bo truyn thng RS-422/485

70

Gii thiu cc tnh nng ca PLC CP1L

S b tr cc u ni ng vo, u ni cp ngun cho PLC hot ng

S b tr cc u ni ng ra, u ni ngun 24VDC xut ra t PLC.

71

Cch u dy ng vo PLC 1.9.1 Cch u dy ng vo/ ra ca PLC CP1L/1H


S S n n ii dy dy Input Input // Output Output
100-240 VAC

B1

+ COM

B2
0

11

CP1L

COM

COM

COM

COM

24VDC Output

Ng vo PLC cho php cp ngun (+) hoc (-), cng lc, vi iu kin l phi c 2 ngun cp khc nhau B1 & B2 . 72

Cch u dy ng vo PLC
1. Ng vo PLC l Sensor 2 dy s d ng ngun AC 220V

Relay

220VAC

~
Loi AC 220V

24VDC

COM

01

02

PLC

Khi u vo ca PLC l c m bin 2 dy ra, th bt but phi gn thm vo mt r le trung gian

73

Cch u dy ng vo PLC
1. Ng vo PLC l Sensor 2 dy s d ng ngun DC 24V

24VDC
Relay

COM

01

02

Loi DC 24V

PLC

Khi u vo ca PLC l c m bin 2 dy ra, th bt but phi gn thm vo mt r le trung gian


74

Cch u dy ng vo PLC
1. Ng vo PLC l Sensor 3 dy ng ra Transistor NPN

out

24VDC 01 02

COM

PLC
Ng ra ca Sensor ni trc tip vo u vo trn PLC, khi Sensor On ( C ni sang E), th ng vo s c cp ngun (-), v v y COM s c ni vi ngun (+)

75

Cch u dy ng vo PLC
1. Ng vo PLC l Sensor 3 dy ng ra Transistor PNP

out

24VDC

COM
01 02

PLC Loi DC 3 dy PNP


Ng ra ca Sensor ni trc tip vo u vo trn PLC, khi Sensor On ( C ni sang E), th ng vo s c cp ngun (+), v v y COM s c ni vi ngun (-).

76

Cch u dy ng vo PLC
1. Ng vo PLC cng mt lc c 2 loi Sensor ng ra Transistor NPN & PNP

NPN
out

Battery 1, 24VDC

PLC
01 02

COM

PNP

out

Battery 2, 24VDC

Ch : khi u vo ca PLC cng lc l 2 loi sensor NPN v PNP, th bt but phi c 2 ngun ring cung c p cho 2 sensor
77

Cch u dy ng ra PLC
1. Ni dy ng ra PLC

78

Cch xc nh a ch u vo/ra.
1.9.2 Cch xc nh a ch u vo ra trn tng CPU ca PLC h CP1L/1H Cc u vo ra (I/O) trn PLC u c nh (assign) mt a ch b nh xc nh trong vng nh CIO tham chiu trong chng trnh. Cc u ni vo ra ny c nh s sn v c nh a ch theo bng di y Bng a ch b nh cc u vo ra PLC hay CP1L (14,20,30,40 I/O) S lng u vo/ ra trn module 14 20 30 u vo ra m rng u n i trn module CPU 8 u vo : 0.00 n 0.07 12 u vo : 0.00 n 0.11 18 u vo : 0.00 n 0.11 1.00 n 1.05 24 u vo : 0.00 n 0.11 1.00 n 1.11 8 u vo : 0.00 n 0.11 1.00 n 1.11 2.00 n 2.11 6 u ra : rle / transistor 100.00 n 100.05 8 u ra : rle / transistor 100.00 n 100.07 12 u ra : rle / transistor 100.00 n 100.07 101.00 n 101.03 16 u ra : rle / transistor 100.00 n 100.07 101.00 n 101.07 6 u ra : rle / transistor 100.00 n 100.07 101.00 n 101.07 102.00 n 102.07 M s lng u m u: vo : (m = 8, hoc (m=8 hoc 12 24 ty hoc 26 ty module) module) Word (i+1) Word (k+1),
CP1L-L14DR-A CP1L-L14DR-D CP1L-L20DR-A CP1L-L20DR-D CP1L-M30DR-A CP1L-M30DR-D CP1L-M30DT-D CP1L-M40DR-A CP1L-M40DR-D CP1L-M40DT-D CP1L-M60DR-A CP1L-M60DT-D CP1L-M36DT1-D

Model N0

40

60

79

Cch xc nh a ch u vo/ra.
Trong : K = word input cui ca CPU hoc word c phn cho Expansion Unit k trc, nu nh Expansion Unit ny ni i= word output cui ca CPU hoc word c phn cho Expansion Unit k trc, nu nh Expansion Unit ny ni Bng Cc khi m rng cho php v s lng I/O t i a ca cc Unit PLC CPU Unit Input area 14 I/O 20 I/O 30 I/O 40 I/O (add 10060 I/O) Word 0 Word 0 Word 0, Word 1 Word 0, Word 1 Word Output area Word 100 Word 100 Word 100, Word 101 Word 100, Word 101 S lng khi m rng (I/O) cho php 1 khi (54 I/O) 1 khi (60I/O) 3 khi (150 I/O) 3 khi (160 I/O)

V d: Khi ta s dng CPU 40 I/O u vo chi m hai word: word0, word1; v u ra chim hai word: word100, word101. nu ta kt ni CPU ny vi cc khi m rng th u vo ca cc khi m rng bt u t word2 tr i, v u ra ca cc khi m rng bt u t word 102 tr i. 80

Truyn thng gia PLC vi cc Thit b khc.


TRUYN THNG :

1. Kt Ni My Tnh
PLC CP1L/1H Tch hp sn 1 cng USB cho php kt ni tr c tit t PLC ti my tnh. Download hoc Upload chng trnh, dng phn m m CX-Programmer ( CX-One)

81

Truyn thng gia PLC vi cc Thit b khc


Kt ni PLC vi my tnh.

Cng USB cho php ni trc tip PLC vi my tnh. Khng cn ph i qua b chuyn i.

-Cp USB rt ph bin trn th trng hin nay,

Cn phi ci t Driver ca cng USB vo my tnh. Trc khi kt ni vi phn mm CX-Programmer

82

Truyn thng gia PLC vi cc Thit b khc.


2. Kt ni thit b thng qua cng RS232/RS485.
- CP1L/1H trang b sn 2 khe cm cng truy n thng truyn (option) cho php gn thm cng RS232 hoc RS422/485.

RS422/485 RS232C
83

Truyn thng gia PLC vi cc Thit b khc


Cc Kt Ni thng qua cng R232 Kt ni vi mn hnh cm ng. Kt ni vi b iu khi n nhit

RS232C ( Max 15m)

RS232C ( Max 15m)

Kt ni vi my tnh ( nu khng dng cng USB

RS232C ( Max 15m)

84

Truyn thng gia PLC vi cc Thit b khc


Cc Kt Ni thng qua cng R422/485
- Kt ni vi Inverter - Kt ni vi cc b iu khin nhit .

Modbus RTU CompoWay/F CompoWay/F

Temperature Controller
- Truy n thng ni tip gi a cc PLC theo kiu PLC Linh (1:8)

CJ1M PLC Serial Link 1:N

CP1H
85

Truyn thng gia PLC vi cc Thit b khc


c bit CP1L c h tr ch c nng l p trnh Function Block cho php kt ni tr c ti p t HMI=>PLC=>Inverter m khng phi l p trnh ph c t p, bng cch s dng cc FB trong th vi n ca PLC & HMI

CXCX-Programmer Development tools with FBL

NS with SAP

Tch hp sn th vin FB v truyn thng: Th Th d : Truyn thng thng gi gim s st hoc iu khin bin tn

RS 422/485

FB

86

Cc chc nng trn B Training Kit CP1L & HMI 1 2 3 4

17 16

6 7 8

15 14 13

- Mt trc ca B training Kit PLC & HMI

10

11

12
87

Cc chc nng trn B Training Kit CP1L & HMI


-Mt sau ca B training Kit PLC & HMI

18 19 20 21

23

24 22

88

Cc chc nng trn B Training Kit CP1L & HMI


Cc ch c nng trn b th c hnh PLC & HMI S th t 1 2 3 Ch c nng cng t c ngun chnh Cng truy n thng RS232C Cng truy n thng RS422/485 Mn hnh cm ng (HMI) h NP Input LED cng t c ng vo ( Input A) Cc cc ni ( Input B) Output LED (OUTPUT A) Bt / Tt ngun cho training kit Cng truyn thng RS232C, dng kt ni vi cc thit b khc theo chun truyn RS232C. khong cch ti a 15 m Cng truy n thng RS422/485, dng kt ni vi cc thit b khc theo chun truyn RS422/485, khong cch ti a 50 m Mn hnh cm ng h NP, kch thc 5 Inch. Cc n LED ch th trng thi On/Off ca cc ng vo, c 12 n LED tng ng cho 12 ng vo, n ch sng khi s dng ch INPUT A. Dng bt t t (gi l p) cc ng vo PLC, c 12 cng t c tng ng cho 12 ng vo. ( ch c tc dng khi chn INPUT A) Dng u dy tr c ti p t sensor, cng t c vo ng vo trn PLC, khi chuyn sang ch Input B.( lc ny cc cng t c v n LED (Input A) s khng cn tc dng. Cc n LED ch th trng thi ng ra, c 8 n LED tng ng cho 8 ng ra. Cc n LED ny ch sng khi chn ch OUTPUT A. 89 M t

4 5 6 7

Cc chc nng trn B Training Kit CP1L & HMI

Cc ni ng ra ( OUTPUT B) Ngun 24 VDC Ng vo Analog (0~10) Nt iu ch nh (0~10V) cng t c la chn cho ng vo Analog cng t c cho Mn hnh. Cng truy n thng RS232 ca Mn hnh Cng truy n thng RS485 ca Mn hnh

Khi chuyn sang ch Output B, th cc cc ni ny s c ni tr c ti p vo cc ng ra trn PLC. Cho php ni tr c tip n cc thit b khc nh rle trung gian, contactor, van kh nn y l ngun cp 24 VDC, 1.5A, dng cp ngun cho cc thit b khc bn ngoi nh sensor, relay. . Dng cp ngun analog 0~10V t bn ngoi vo PLC. ( ch c tc dng khi bt cng t c Analog External Adjust ln On. Nm iu ch nh 0~10 V , dng gi l p chongo4 vo Analog. Ch c tc dng khi bt cng t c Analog External Adjust xung Off. Dng l c chn ch cho ng vo Analog - On: Khi cn a tnh hi u analog 0~10V t bn ngoi vo - Off: Khi cn gi l p tn hiu analog tng nm ch nh ( Analog Adjust) Dng bt t t ngun cho mn hnh cm ng. Cng truy n thng RS232 ca mn hnh, dng kt ni mn hnh vi PLC hoc vi my tnh.. Cng truy n thng RS485 ca mn hnh, dng kt ni mn hnh vi cc thit b khc.

10,11 12 13 14

15 16 17

90

Cc chc nng trn B Training Kit CP1L & HMI


18 19 L a chn kt ni ng vo A. (Input A) L a chn kt ni ng vo B. (Input B) Khi cng 25 chn ni vo v tr Input A, th cc ng vo trn PLC s c ni tr c ti p n cc cng t c, dng bt t t ( gi l p) u vo PLC Khi cng 25 chn ni vo v tr Input B, th cc ng vo trn PLC s c ni tr c ti p n cc cc ( Input B) , dng kt ni tr c ti p vi cc thit b khc bn ngoi nh Sensor. cng t c. ( lc ny cc cng t c s khng cn tc dng) Khi cng 25 chn ni vo v tr Output A, th cc ng ra trn PLC, s c ni n cc n LED, dng gim st trng thi cc ng ra. Khi cng 25 chn ni vo v tr Output B, th cc ng ra trn PLC, s c ni n cc cc trn Output B, dng ni trc tip n cc thit b khc bn ngoi nh contactor, van kh nn..( lc ny cc n LED trn Output A s khng cn tc dng) Cho php kt ni tr c tip t mn hnh n my tnh, Download hoc Upload chng vi phn mm l p trnh NP-Designer. Dng cp ngun cho b training Kit Cu ch 5A , AC220V

20 21

L a chn kt ni ng ra A ( Output A) L a chn kt ni ng ra B ( Output B)

22 23 24

Cp USB ca mn hnh. AC 100~240 V Fuse

91

Cc Khi nim c bn v PLC

92

Cc Lnh c Bn PLC (CP1L/1H)

93

Cc Lnh c Bn PLC (CP1L/1H)

1. Lnh Load, And , Or, Not, And Not


Cc l nh ny ch sng dng khi l p trnh bng bn phm (Programming console) dng ngn ng l p trnh Mnemonics, khi l p trnh bng phn m m CX-Programmer ( vi ngn ng l p trnh bt thang (Ladder) th y l cc ti p i m thng ng, thng h, ni tip, song song . Gi n bt thang (Ladder)

Lp trnh bng bn phm dng ngn ng Mnemonics ( Tng ng)

94

Cc Lnh c Bn PLC (CP1L/1H)

2. Lnh Set- Reset Bit

Trong : - B: l mt bit thuc cc vng nh IO, H, A, W, IR. - Khi iu ki n ng vo On, th l nh SET s bt Bit B On v gi lun. - Bit B ch Off khi iu ki n ng vo ca lnh Reset ON.

95

Cc Lnh c Bn PLC (CP1L/1H)

- Lnh Set- Reset Bit


Bi tp v d:
Click vo biu tng new PLC instruction (I) gi lnh Set, hoc reset.

- Gn gi tr cho Bit B l a ch 100.00 ( ng ra Output 0 trn PLC). - Khi u vo 0.00 On, th bit B (100.00) s On v gi lun, Khi 0.00 Off th bit B vn On - Bit B (100.00) ch Off khi u vo 0.01 bt ON.

96

Cc Lnh c Bn PLC (CP1L/1H)

3. Lnh KEEP : KEEP(11) S


KEEP(11)

Trong : - S : l chn SET Bit - R : Chn Reset Bit - B : L mt bit thuc cc vng nh (IO, H, A, W, IR) - Cng Dng : Dng gi l i trng thi On ca mt bit - Hot ng : Khi iu kin ng vo ca chn SET bt On, lnh KEEp (11) s bt bit B On v gi lun, cho d ng vo c On hay Off , th bit B vn gi On. Bit B ch Off khi iu ki n ng vo ca chn R ( Reset) bt On.

97

Cc Lnh c Bn PLC (CP1L/1H)

- Lnh KEEP : KEEP(11)

Trong : - S : u vo 0.00 l chn Set Bit - R : u vo 0.01 l chn Reset Bit - B : a ch 200.00 l Bit thuc vng nh IO Khi iu kin ng vo chn Set bit 0.00 bt On, th bit 200.00 s On theo v gi lun. Bit 200.00 ch Off khi iu kin ng vo ca chn Reset bit 0.01 On.

98

Cc Lnh c Bn PLC (CP1L/1H)

4. Lnh Timer TIM( On-delay)

TIM N SV
Trong : - N: s ca timer N=0~4095 - S: gi tr t SV=#0~9999. s BCD. - C th t SV cho timer theo word ca cc vng nh. - C th ch nh inh gi tr ca timer bng cch thay i gi tr ca word A642 thng qua vi c s dng nt ch nh Analog c tch hp sn trn CP1L Lu : nu gn gi tr cho timer l mt hng s th phi c du (#) ph trc hng s . Ex: # 100 => 100 x 0.1s ( phn gi i 100ms = 0.1s) , th gi tr t ca timer trn th c t l 10s. 99

phn gii ca Timer l 100ms. Khi gi tr t ca Timer l SV=#000.0~999.9s

Cc Lnh c Bn PLC (CP1L/1H)

Bi tp v d
=> Click vo biu tng New PLC instruction (I) gi lnh Timer.

Gi tr tc thi (PV)

- Khi u vo 0.01chuyn t Off ln On th timer bt u nh thi, gi tr PV s gim dn t SV xung. - Khi gi tr PV=0 th Timer bit s bt ln On. - Khi u vo c a Timer Off th timer c Reset ng thi ng ra c ng Off theo.
100

Cc Lnh c Bn PLC (CP1L/1H)

5. Lnh High Speed Timer TIMH (On- Delay)

TIMH(015) N S
Trong : - N: s ca timer N = 0~4095 - SV: gi tr t S = #0~9999 ( s BCD) - C th t SV cho timer theo word ca cc vng nh - C th ch nh gi tr ca timer bng cch thay i gi tr ca word A642 thng qua vi c s dng nt chnh Analog c tch hp sn trn CP1L/1H - phn gi i ca Timer l 10ms. Khi gi tr t ca Timer l SV=0~99.99s

101

Cc Lnh c Bn PLC (CP1L/1H)


Lnh High Speed timer

Gi tr tc thi(PV)

- Khi u vo 0.01 chuy n t Off ln On th timer bt u nh thi, gi tr PV s gi m dn t gi tr ca SV v 0. - Khi gi tr PV=0 th Timer Bit s bt ln On v gi lun. - Khi u vo ca Timer Off th timer c Reset ng thi Timer Bit cng Off theo. 102

Cc Lnh c Bn PLC (CP1L/1H)

6. Lnh Long Timer : TIML (542)/TIMX(543)


Cng dng :
- Lnh TIML (452) / TIMX(543), cho php t o ra mt timer c thi gian nh thi lu hn, c phn gi i l 100ms. Cho php ci t c thi gian ti a l 115 ngy vi loi BCD (TIML (542) , hoc 4,971 ngy vi loi Binary (TIMX(543). chnh xc 0~0.01s.
BCD BINARY

TIML(542) D1 D2 S
Trong : - D1 c nh Completion ( Timer Bit) - D2 : Gi tr PV - S : Gi tr t

TIMX(543) D1 D2 S

103

Cc Lnh c Bn PLC (CP1L/1H) Lnh Long Timer : TIML (542)/TIMX(543)


Din gii : - D1: C nh Completion ( Timer Bit) . Bit 0 ca D1 c ch c nng nh mt c nh honh thnh. Khi gi tr trong D2 gi m v = 0 , th bit ny s On
15 D1 0

Khng s dng

Completion Flag ( Timer Bit)

- D2 : l gi tr hin t i ca Timer : D2 & D2+1 , gm 2 word c 8 s , PV c gi tr t : #00000000 ~#99999999 (loi BCD TIML(542)), hoc t #00000000 ~#FFFFFFFF (t c t : &0 ~&4294967290 s thp phn) cho loi Binary TIMX(543)
D2+1 D2 D2

- S : l gi tr t ca Timer : S & S+1 , gm 2 word c 8 s , ch a gi tr t t : #00000000 ~#99999999 (loi BCD TIML(542)), hoc t #00000000 ~#FFFFFFFF (tc t : &0 ~&4294967290 s thp phn) cho loi Binary TIMX(543
S+1 S S

104

Cc Lnh c Bn PLC (CP1L/1H)

Bi Tp V D:

Hot ng ca TIML (542) nh sau: - Khi iu ng vo ca l nh TIML(542) On, Bit 0.00 =>On - Th timer s bt u nh thi, lc ny gi tr PV ca timer word W0 s gi m dn t gi tr ca S v 0. - Khi gi tr ca PV ca timer (Word W0=0, th c completion (bit H0.00) s On . - Khi iu kin ng vo ca TIML(542) Off ( Bit 0.00=> Off), th timer s b reset v c Completion (H0.00) cng Off theo.

105

Cc Lnh c Bn PLC (CP1L/1H)

7. Lnh Counter (CNT) (m xung)


CP R

CNT N SV

Trong : - Counter input: ng vo kch hot counter m. (tc ng cnh ln) - Reset input: ng vo Reset counter - N: s ca counter N =0~4095 - SV: gi tr t SV= # 0~9999

- C th t SV cho counter theo word ca cc vng nh - C th ch nh gi tr ca counter bng cch thay i gi tr ca word A642 thng qua vi c s dng nt chnh Analog c tch hp sn trn CP1L/1H.

106

Cc Lnh c Bn PLC (CP1L/1H)

Bi tp v d

Gi tr tc thi (PV)

- Khi iu kin ng vo ca Counter bit 0.01 chuyn t Off tr.

On counter s gim t SV xung 1 gi

- Khi gi tr PV=0 th counter bit s On v gi lun, lc ny counter s khng tc ng khi u vo On hoc Off. - B m s Reset PV v gi tr t SV khi u vo Reset chuyn t Off ln On
107

Cc Lnh c Bn PLC (CP1L/1H)

8. Lnh Reversible Counter (CNTR(12))


II DI R

CNTR (12)

N SV

Trong : - II : u vo m t ng - DI : u vo m gi m - R : u vo Reset - N : s ca counter N=0~4095 - SV : gi tr t SV= #0~9999 ( s BCD)

- C th t SV cho Reversible counter theo word ca cc vng nh sau :

108

Cc Lnh c Bn PLC (CP1L/1H)

Bi tp v d

Gi tr PV

-Khi u vo II (Increment input) bit 0.00, chuyn t Off => On B m s tng gi tr ca PV ln 1 . - Khi u vo DI ( Decrement input) bit 0.01, chuyn t Off => On. B m s gim gi tr ca PV xu ng 1. - Lc m tng, Counter Bit s On khi gi tr PV ca counter chuyn t gi tr SV => 0. - Lc m gim, Counter Bit s On khi gi tr PV ca counter chuyn t 0 => SV. - Reversible counter s m xoay vng t 0=>SV, hoc t SV=> 0. ty theo kiu m tng hay m gim. - B m s Reset PV v 0 khi u vo R chuyn t Off ln On. 109

Cc Lnh c Bn PLC (CP1L/1H)

9. Lnh DIFU/DIFD DIFU (013)

Input

Cycle time

DIFU

DIFD (014)

DIFD
Cng Dng: - Lnh DIFU s bt Bit B On trong mt chu k qut chng trnh, khi iu kin ng vo tc ng c nh ln. - Lnh DIFD s bt Bit B On trong mt chu k qut chng trnh, khi iu kin ng vo tc ng c nh xung.
110

Cc Lnh c Bn PLC (CP1L/1H)

Lnh DIFU/DIFD

DIFU (14)

- B: l mt Bit - B: C th t a ch ca cc vng nh sau: IO, W, A, H, IR.

111

Cc Lnh c Bn PLC (CP1L/1H)


Bi Tp V d: -Khi iu ki n ng vo ca Bit 0.00 chuyn t Off=> On. L nh Differentiate Up s bt Bit 200.00 ln On trong 1 chu k qut chng trnh (khong 0.5 ms), sau Off lun. V vy ta khng th thy c trang thi thi On ca bit 200.00, thy c trng thi On ca bit 200.00 , ta dng l nh Keep => l nh Keep s bt bit 200.02 On khi Bit 200.00 On v cht l i. - Ngc l i l nh DIFU, khi bit 0.00 chuyn t Off=> On, l nh DIFD s khng tc ng . Nh ng khi bit 0.00 chuyn t On => Off l nh DIFD mi bt bit 200.01 ln On trong 1 chu k qut ca chng trnh ( khong 0.5 ms), sau Off lun. Lc ny l nh Keep s bt bit 200.03 On ln v cht l i..

112

Cc Lnh c Bn PLC (CP1L/1H)

10. Lnh Interlock_Interlock Clear

IL (02) ILC (03)


Cng Dng :

Lnh Interlock

Lnh Interlock Clear

- Hai lnh ny lun i km vi nhau, dng kha t t c cc ng ra nm gia IL(02) v ILC(03) khi iu kin thc hin lnh OFF. - Lnh IL v ILC lun i km vi nhau. - Khi iu kin th c hin ca lnh IL l On th on ch ng trnh t IL (02) n ILC(03) vn c thc hin bnh thng nh ch ng trnh chnh. - Khi iu kin th c hin ca lnh ny l Off, tt c cc cc ng ra theo sau lnh IL(02) cho n lnh ILC(03) s Off, Timer s b Reset, Counter gi nguyn gi tr, tt c cc lnh khc s khng th c hin.

113

Cc Lnh c Bn PLC (CP1L/1H)


Bi Tp v d: - Khi 0.01 On => th on chng trnh t IL(02) n ILC (03), s lm vi c bnh thng. - Khi 0.01 Off => th on chng trnh IL(02) n ILC (03), s khng lm vi c, t t c cc ng ra s Off. Timer s b reset . Ring on chng trnh t IL(02) tr ln v t ILC(03) tr xung s khng b anh hng.

- ng dng ca lnh ny l chuyn ch Auto hoc Manual cho h thng.

114

Cc Lnh c Bn PLC (CP1L/1H)


-Lu : -C th dng nhiu lnh IL(02) trong mt chng trnh, nhng ch cn mt lnh ILC(03) m thi.

C php ng

C php sai 115

Cc Lnh c Bn PLC (CP1L/1H)

11. Lnh JUMP_JUMP END Jump- End

JMP (004) N
Trong :

Jump

JME (005) N

N: S ca b c nh y (N=0000~00FF( tng ng vi s thp phn 0~255) N: c th gn gi ca N theo cc vng nh sau :CIO, A, H, W, IR - L nhJump s c dng theo tng cp ring r JMP(004) v JME(005), c s N t = 0000 n 00FF (&0~&255 s thp phn). - Khi iu kin ng vo ca l nh JMP(004) => On. Th on chng trnh t JMP n JME s hot ng bnh thng. - Khi iu kin ng vo ca l nh JMP(004) => Off. Th chng trnh s th c hi n nhy bc t JMP(004) n JME(005) vi s N tng ng . Lc ny t t c cc ng ra trong chng trnh t JMP => JME ny s c gi nguyn trng thi. Timer ti p t c hot ng cho n khi PV=0, nhng ti p im ca n s khng ON . Counter th gi nguyn gi tr, t t c cc ln khc s khng th c hin. 116

Cc Lnh c Bn PLC (CP1L/1H)


Bi Tp V d : -Khi iu ng vo l nh JMP(04) bit 0.00 =>On, on chng trnh t JMP #01 => JME #01, s lm vi c bnh thng - Khi iu kin ng vo ca 0.00 => Off. Th chng trnh s th c hin nhy bc t JMP #01 => JME #01, khi t t c ng ra trong on chng trnh ny s c gi nguyn trang thi. -Timer s ti p t c nh thi, nh ng timer Bit s khng On, Counter th c gi nguyn gi tr - Tt c cc l nh khc s khng th c hin

- Lu : JMP (04) & JME (05), lun i theo tng cp ring l . Tc n u c JMP(04) N=#01, th phi c JME(05), N=#01

117

Cc Lnh c Bn PLC (CP1L/1H)

12. Lnh so snh COMPARE: CMP(20)


CMP(20) CP1 CP2
Trong : - CP1 : L d li u so snh 1 - CP2 : l d li u so snh 2 => CP1 & CP2 c th l mt hng s, l gi tr PV ca Timer, counter, hoc gi tr ca mt word bt k thuc cc vng nh sau: IO, H, W, A, D, *D, C, T, #, &, DR, IR 1. 2. S c 5 c nh cho 5 trng hp so snh sau: Khi CP1>CP2, c nh P_GT( bit CF005) => ON. Khi CP1>= CP2 , c nh P_GE (bit CF000)=> ON. 3. 4. 5. Khi CP1=CP2, c nh bng P_EQ(bit CF006) => ON. Khi CP1< =CP2, c nh P_LE (bit CF002) => ON. Khi CP1<CP2 , c nh P_LT (bit CF007) => ON. 118
D liu so snh 1 D liu so snh 2

Cc Lnh c Bn PLC (CP1L/1H)


Bi tp v d: -Trong bi t p - CP1 = C0, - CP2 = D0 - Khi bit 0.03 =>On, lnh compare s thc hin so snh ni dung ca 2 word C0 & D0 , tha iu ki n no th c nh tng ng s On. -Lu : - Do trong chng trnh ta c th c hng trm php so snh, nh ng phi s dng chung 5 c nh. - V vy cc c nh t chung vi Rung ca l nh compare no, th ch c tc dng cho lnh compare , cn cc c nh nm cc Rung ca l n compare khc s khng b nh hng.

119

Cc Lnh c Bn PLC (CP1L/1H)

Lu : - Cc c nh so snh phi c t chung Rung vi ln CMP (20). Nu t khc Rung th c nh s so snh sai. Trong trng hp dng nhi u l n so snh trong chng trnh. Hnh bn cc c nh t sai v tr. Do khc Rung vi l nh CMP(20).

Cc c nh t sai v tr.

120

Cc Lnh c Bn PLC (CP1L/1H)

13. Lnh copy d liu MOVE Word : MOV(021)


MOV(21) S D - Trong : - S : L word ngun - D : L Word n Cng Dng : Lnh Mov thc hin copy ni dung ca S b vo D => Khi lnh MOVE c iu kin thc hin l On, lnh ny s copy ni dung ca word S b vo trong word D. ni dung ca word ngun S khng thay i khi thc hin lnh ny.
121
Word ngun Word n

Cc Lnh c Bn PLC (CP1L/1H) Lnh Move : MOV(21)


Bi Tp V D:

- Khi iu kin ng vo ca lnh MOV(21), Bit 0.00 => On. Lnh Mov(21) s th c hin copy ni dung ca S=#55 , sau b vo word D= D0 , ni dung ca D s thay i cn ni dung ca S v n gi nguyn.

122

Cc Lnh c Bn PLC (CP1L/1H)

14. Lnh Move Digit : MovD (083)


MovD(83) S C D
Control word: C - Trong : - S: Word ngun - C: Word iu khin - D: Word n - Lnh Move Digit s thc hin copy ni dung ca cc digit t S b vo D. a ch ca cc digit cn copy s c ch nh trong word C. Khng s dng Ch nh Digit u tin cn b vo trong D (0~3) Ch nh Digit u tin cn coppy trong S(0~3) Ch nh s lng Digit cn copy 0: coppy 1 Digit 1: coppy 2 Digit 2: coppy 3 Digit 3: coppy 4 Digit 123

Cc Lnh c Bn PLC (CP1L/1H)

- Lnh Move Digit : MovD (083)


V D 1 :

A B C D B C
t: C=#0011

V D 2 :

A B C D C D
t: C=#0110

V D 3 :

A B C D D A B C
t: C=#0330

V D 4 :

A B C D B C D A
t: C=#0033

V D 5 :

A B C D B C D A
t: C=#0332

V D 6 :

A B C D D A B C
t: C=#0031

124

Cc Lnh c Bn PLC (CP1L/1H) Lnh Move Digit : MovD(83)

Bi Tp V D :

- Khi iu kin ng vo bit 0.00 =>On. L nh MovD (83) s th c hin copy ni dung ca cc Digit trong S b vo D. Theo ch nh ca ni dung trong word C.

C= #0332 .

A B C D B C D A

125

Cc Lnh c Bn PLC (CP1L/1H)

15. Lnh Move Bit : MovB (82)

MovB(82) S C D
Trong : - S : L Word Ngun - D : L Word n - C : L word ch nh (S Hex 0~f) => Lnh MovB (82) s th c hi n copy ni dung ca mt bt trong S b vo D. a ch ca Bit cn copy trong S v v tr Bit cn b vo trong D s c ch nh trong word C 15
m Word ngun Word ch nh Word n

8 7
n

0 C Ch nh s th t ca Bit cn copy trong S (0~F) Ch nh s th t ca Bit cn b vo trong D (0~F) 126

Cc Lnh c Bn PLC (CP1L/1H)

Lnh Move Bit: MovB(82)

m
15 14 0 13 0

n
12 0 11 0 10 0 9 1 8 0 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 0

Bi tp V d :

S=H0

D=W0

- Khi iu kin ng vo ca lnh MovB(82) (Bit 0.00) => On. Lnh MovB (82) s copy ni dung ca bit 09 trong word S , dau b vo bit 05 trong word D.

127

Cc Lnh c Bn PLC (CP1L/1H)

16. Lnh Block Transfer: XFER (70)

XFER(80) N S D
Trong : - N : l s lng word cn copy. - S : l word u tin ca khi ngun. - D : l word u tin ca khi n. Cng Dng : - Lnh Block transfer cho php copy cng mt lc nhi u word t khi S v b vo khi D. S lng word copy s do N quyt nh 128
S lng word cn copy Word u tin ca khi ngun Word u tin ca khi n

Cc Lnh c Bn PLC (CP1L/1H)

Lnh Block Transfer: XFER(80)


Bi Tp v D: H000 H010 - Khi iu ki n ng vo bit 0.00 => On. L nh XFER(70) s th c hi n copy ni dung ca 10 words (N=#10), bt u t H3 ca khi S, v b vo khi D, bt u t D10.
0010 BBBB 0011 CCCC 0012 DDDD 0013 0020 0014 0021 0015 0016 0017 ABCD AAAA

D00010

0013

0014

0015

0016

0017

ABCD

AAAA

BBBB

CCCC

DDDD

129

Cc Lnh c Bn PLC (CP1L/1H)

17. Lnh Block SET: BSET(71)

BSET(71) S St E
Trong : - S : l word ngun - St: l word u tin ca khi - E: l word cui cng ca khi, Cng Dng : Dng t nhiu word cng lc theo mt gi tr no , c t trc trong word ngun S. ( Thng c dng xa vng nh) 130 ( St E, St & E phi cng mt vng nh)
Word ngun Word u tin ca khi Word cui cng ca khi

Cc Lnh c Bn PLC (CP1L/1H)

Lnh Block SET: BSET(71)


(S=H0) Bi Tp V d : A B C D (St+1 = D1) A B C D A B C D (St = D0)

- Khi iu ki n ng vo bit 0.00 => On. L nh BSET (71) s th c hin copy ni dung ca S b vo khi t St n E. N i dung ca S s khng thay i.

(E = D100)

H0

131

CC LNH D CH D LIU

18. Lnh Shift Register: SFT(10)


D liu vo (I)

SFT(10) St
Word bt u dch Word kt thc

Ng vo d ch (P)

Ng vo reset (R)

Trong : - I : D liu ng vo : Nu I: Off, d ch s 0. I: On d ch s 1. - P : Ng vo d ch : M i khi P chuyn t Off => On, th SFT(10) s d ch c khi t St => E , sang tri mt bit - R : Ng vo Reset : Khi R On, s reset t t c cc Bit t St => E =0 - St: L Word bt u d ch - E : l word kt thc ( St E, St & E phi cng mt vng nh) 132

Cc Lnh c Bn PLC (CP1L/1H)

Lnh Shift Register: SFT(10)


Mt 1 1 1 1 1

I
1

Cng Dng - D ch ton b ni dung ca khi ( t St => E) sang tri 1 bit, khi iu ki n ng vo ca chn P chuyn t Off => On. - N u iu ki n I = On, th l nh SFT(10) s d ch s 1 vo bit 0 cua word St , n u I= Off s d ch s 0 vo bit 0 ca word St. - N i dung ca bit cui cng trn word E ( bit 15) s d ch ra bn ngoi v s b mt i.

Bi tp v d : -Trong v d bn th : - I : l Bit 00 - P : l Xung 1 s - St = E =100 , y l word 100 ca vng nh IO ( word Output trn PLC), Khi

133

Cc Lnh c Bn PLC (CP1L/1H)

19. Reversible Shift Register: SFTR(084)


C: Word iu khi n

SFTR(084) C St E
Trong : - C : l word iu khi n - St : Word bt u d ch - E : Word Kt Thc, Cng Dng :

15 14 13 12

- Ch nh chi u d ch chuy n: - Ng vo d li u : - Ng vo d ch - Ng vo Reset

On: D ch Tri Off: D ch phi

On: D ch S 1 Off: D ch S 0

(St E, St & E phi cng mt vng nh)

Lnh ny cho php d ch cng lc nhi u word t St n E, sang tri hoc sang phi mt Bit, ty theo trang thi ca word iu khin C.

134

Cc Lnh c Bn PLC (CP1L/1H)

Reversible Shift Register: SFTR(084)


Trong v d ny : - Bit H0.12 s xc nh chi u d ch chuy n : On D ch t tri sang phi, Off d ch t phi sang tri. - Bit H0.13 : S xc nh d liu d ch : Off d ch s 0, On d ch s 1. - Bit H0.14 : Ng vo D ch, mi khi H0.14 chuy n t Off => On, th l ch s th c hin d ch 1 bit. - Bit H0.15 : l bit reset, khi bot ny On th t t c d liu t St => E s b xa v 0

135

Cc Lnh c Bn PLC (CP1L/1H)


Gim st vng nh Data memory t word D100 ~D105, xem qu trnh d ch d li u. - Khi Bit H0.12 On = > L nh s d ch t tri sang phi bt u t :bit 0 ca word D00100 ~ bit 15 ca D00105

H01.3

Mt

- Khi Bit H0.12 Off = > Lnh s d ch t phi sang tri bt u t: bit 15 ca word D00105 ~ bit 0 ca D00100.

Mt

H01.3

136

Cc Lnh c Bn PLC (CP1L/1H)

20. Word Shift : WSFT (016)


WSFT(016) S St E
Trong : - S : l word ngun - St : l word bt u d ch - E : l word kt thc d ch , St E, St & E phi cng Cng dng : D ch ni dung ca c word t tri sang phi bt u t St, v kt thc word E.. N i dung ca S s d ch vo St , ni dung ca E s d ch ra bn ngoi v b mt i. S
15

----------

E Mt
15

St
0 15

----------

----------

--------------

15

----------

137

Cc Lnh c Bn PLC (CP1L/1H)


Bi tp v d : - Lnh word shift : WSFT (016). - Khi iu kin ng vo bit 0.00 On, lnh WSFT (016), s th c hi n sang tri 1 Word, ni dung ca worh H000=ABCD s c d ch vo D00100, ni dung ca E s d ch ra ngoi v mt i. - K hi u @ ng trc lnh WSFT, nhm cho php mi chu k qut lnh th c hin mt l n khi in ng vo tc ng cnh ln.

H0000 Mt
D00110 D00109 D00108 D00107 D00106 D00105 D00104 D00103 D00102 D00101 D00100 ABCD

138

Cc Lnh c Bn PLC (CP1L/1H)

21. One Digit Shift Left: SLD (074)


SLD(074) St E
Trong : - St: Word bt u d ch - E : Word kt thc d ch St E, St & E phi cng mt vng nh. Cng Dng: Lnh SLD (074) s th c hi n d ch cng mt lc 4 bit ( 1 Digit) t phi sang tri, bt u t St => E.

15

14

13

12

11

10

3 1

2 1

1 1

0 1 0 0 0 0

Mt

139

Cc Lnh c Bn PLC (CP1L/1H)


Bi tp v d : - Lnh One Digit shift Left :SLD(074) - Khi iu ki n ng vo bit 0.00 On, lnh SLD (074) s th c hin d ch sang tri 1 digit, bt u t St, s 0 s d ch vo digit 1 ca St, ni dung ca digit 3 trong E s d ch ra bn ngoi v mt i.

0|0|0|0

Mt

140

Cc Lnh c Bn PLC (CP1L/1H)

22. One Digit Shift Right: SRD (075)


SRD(075) St E
Trong : - St : Word bt u d ch - E : Word kt thc d ch St E, St & E phi cng mt vng nh. Cng Dng: Lnh SRD (075) s th c hi n d ch cng mt lc 4 bit ( 1 Digit) t tri sang phi, bt u t E=> St.
15 0 0 0 0 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Mt

141

Cc Lnh c Bn PLC (CP1L/1H)


Bi tp v d : - Lnh One Digit shift Right :SRD(075) - Khi iu ki n ng vo bit 0.00 On, lnh SRD (075) s th c hin d ch sang phi 1 digit,bt u t E, v kt thc St, s 0 s d ch vo digit 3 ca E, ni dung ca digit 1 trong St s d ch ra bn ngoi v mt i.

Mt

0|0|0|0

142

Cc Khi nim c bn v PLC

143

Lnh cng BCD (404) +B (404) Au Ad R

-Au: word c cng -Ad: word cng -R : word kt qu -Khi c iu kin thc hin lnh l On, lnh cng ni dung trong Au v Ad sau gn kt qu ra R

144

Bi tp v d
Lnh DIFU c dng nhm lm cho W0.00 ch On mt ln thc hin lnh cng bn di.

Gi tr 100 c cng vo vng nh D6 ng thi gn kt qu ra D6

Nu ta Force On bit 0.03 th timer bt u nh thi (gi tr trong D6)

145

Lnh tr BCD (414) -B (414) Mi Su R


-Mi: word b tr -Su: word tr -R : word kt qu -Khi c iu kin thc hin lnh l On, lnh tr ni dung trong Su cho Mi sau gn kt qu ra R
146

Bi tp v d
Lnh DIFU c dng nhm lm cho W0.00 ch On mt ln thc hin lnh tr bn di.

Khi c iu kin thc hin lnh l On, lnh tr c thc hin v kt qu (50) c gn ra D10

Nu ta Force On bit 0.01 th timer bt u nh thi (gi tr trong D10)

147

Lnh nhn BCD (424) *B (424) Md Mr R


-Md: word b nhn -Mr: word nhn -R : word kt qu -Khi c iu kin thc hin lnh l On, lnh thc hin vic nhn ni dung trong Md cho Mr sau gn kt qu ra R
148

Bi tp v d

Trt khi lnh nhn c thc hin CP1<CP2 nn c nh nh hn P_LT (CF007) On do ng ra 100.00 On

149

Bi tp v d

Khi bit 0.00 On. Lnh nhn c thc hin. Kt qu ca php nhn c gn cho D20 (80). Lc ny CP1>CP2 nn c nh ln hn P_GT (CF005) On do ng ra 100.01 On
150

Lnh chia BCD (434) /B (434) Dd Dr R


-Dd: word b chia -Dr: word chia -R : word kt qu -Khi c iu kin thc hin lnh l On, lnh thc hin vic chia ni dung trong Dd (word b chia) cho Dr (word chia) sau gn kt qu ra R
151

Bi tp v d

Trt khi lnh chia c thc hin CP1<CP2 nn c nh nh hn P_LT (CF007) On do ng ra 100.00 On

152

Bi tp v d

Khi bit 0.00 On. Lnh chia c thc hin. Kt qu ca php chia c gn cho D30 (80). Lc ny CP1=CP2 nn c nh ln hn P_EQ (CF006) On do ng ra 100.01 On
153

Cc Khi nim c bn v PLC


Lnh c gi tr PV ca High Speed Counter

154

Cc Khi nim c bn v PLC

155

Cc Khi nim c bn v PLC

156

Cc Khi nim c bn v PLC

157

Lnh Mode Control :

@INI (880) P C NV

P: Ch nh c ng pht xung, hoc ng vo


m tc c cao

C: Word iu khin NV: Word u tin cha gi tr hin thi


NV & NV+1: Cha gi tr PV mi, khi C= 0002 Hex ( Change the PV)
158

Lnh INI (880) ch thc hin theo cc iu kin sau:

C=0000 Hex : Start comparision : Lnh INI(880) bt u so snh gi tr PV ca high speed counter. Theo bng ng k trong lnh (CTBL(882) C=0001 Hex : Stop comparision : Lnh INI(880) dng so snh gi tr PV ca high speed counter. Theo bng ng k trong lnh (CTBL(882) Ghi Ch : cc gi tr c n so snh ny phi c ng k trong bng so snh ca lnh CTBL (882), nh vy trong khi C=0000 Hex, hoc C=0001 Hex, lun lun phi km theo lnh CTBL(882) C=0002 Hex: cho php thay i gi tr PV ca cc lnh pht xung, High speed counter, hoc ng vo ngt.
159

Khi C=0003 Hex : Lnh INI (880) thc hin ngt ng ra pht xung ca cc port 0000 n 0003, hoc 1000 & 1001, ty theo gi tr ci t.

Cng pht xung 0000 Ch dng pht xung

Lnh Speed s thc hin pht xung, khi iu kin ng vo ca lnh INI(880) On, th ng ra pht xung 0000 ( a ch 100.00) s b ngt.
160

Lnh SPEED OUT:

=> Lnh ny dng pht xung, cho php ci t tn s xung pht ra.

@SPED(885) P M F

, a ch 100.00 CW, 100.01 CCW , a ch 100.02 CW, 100.03 CCW , a ch 100.04 CW, 100.05 CCW , a ch 100.06 CW, 100.07 CCW

P : Ch nh c ng pht xung, M : Ci t ch pht xung F : Word u tin ci t tn s xung pht.

161

- ch : Continue Mode : Xung s c pht lin tc cho n khi dng ch ng trnh. - Ch : Independent Mode: Xung s c pht ra lin tc cho n khi s lng pht xung pht ra bng s l ng xung ci t lnh SET SPULSE (PULS(881)). Xung s khng pht ra nu khng ci t lnh PULS(881) tr c.

Cng pht xung 0000 Independent Mode.

Cng pht xung 0000

Ci t s lng xung pht ra.


162

Lnh SET PULSE:

=> Lnh ci t s lng xung pht ra. cho lnh SPED hoc ACC ch Independent

@PULS(886) P T N
P : Ch nh c ng pht xung, T : Ci t loi xung pht F : Word u tin ci s lng xung pht ra.

163

Cc Khi nim c bn v PLC

164

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