ECEN 665 (ESS) : RF Communication Circuits and Systems

Low Noise Amplifiers

Prepared by: Heng Zhang
Part of the material here provided is based on Dr. Chunyu Xins and Dr. Xiaohua Fans dissertation
Analog and Mixed-Signal Center, TAMU 1

What is an LNA?

Amplifier S matrix:

s11 s21 S = [ ] s s 12 22

Source reflection coefficient: Load reflection coefficient: L Input reflection coefficient:

S
s12 s21 L 1 s22 L

in = s11 +

s12 s21 S s = + 22 Output reflection coefficient: out 1 s

11

Analog and Mixed-Signal Center, TAMU

LNA Requirements

Gain(10-20dB)

to amplify the received signal; to reduce the input referred noise of the subsequent stages

Good linearity

Handling large undesired signals without much distortion

Low noise

for high sensitivity

Max power gain Preceding filters require 50 termination for proper operation Can route the LNA to the antenna which is located an unknown distance away without worrying about the length of the transmission line
Analog and Mixed-Signal Center, TAMU 3

Input matching

LNA Metrics: Gain

Defines small signal amplification capability of LNA For IC implementation, LNA input is interfaced off-chip and usually matched to specific impedance (50 or 75). Its output is not necessary matched if directly drive the on-chip block such as mixer. This is characterized by voltage gain or transducer power gain by knowing the load impedance level. Transducer power gain: Power delivered to the load divided by power available from source. 2 2
GT = 1 S 1 s11 S
2

s21

1 L

For unilateral device: (i.e. s12 = 0)

1 s22 L

Analog and Mixed-Signal Center, TAMU

LNA Metrics: Nonlinearity Model

f1 f2
off-band signal

f 1- f 2

2 f 1- f 2

2 f 2- f 1 2f1

f 1+ f 2 2f2 f
f 1 f2

2f 2 f 1

in-band signal

Output signal spectrum with f1 and f2

Nonlinear System (up to 3rd order):

Two tone input signal:

Yt = a0 + a1 X t + a2 X t 2 + a3 X t 3

X t = A cos( w1t ) + A cos( w2t )

Usually distortion term: 2f1-f2, 2f2-f1 fall in band. This is

characterized by 3rd order non-linearity. Large in-band blocker can desensitize the circuit. It is measured by 1-dB compression point.
Analog and Mixed-Signal Center, TAMU 5

LNA Metrics: Linearity measurement

1dB compression: Measure gain compression for large input signal IIP3/IIP2: Measure inter-modulation behavior Relationship between IIP3 and P1dB: For one tone test: IIP3-P1dB=10dB For two tone test: IIP3-P1dB=15dB

Analog and Mixed-Signal Center, TAMU

LNA Metrics: Noise Figure

Noise factor is defined by the ratio of output SNR and input SNR. Noise figure is the dB form of noise factor. Noise figure shows the degradation of signals SNR due to the circuits that the signal passes.

Sensitivity = Noisefloor (dBm) + SNR + NFtot 1442443

174 dBm +10log BW

Noise factor of cascaded system:

LNAs noise factor directly appears in the total noise factor of the system.

LNAs gain suppress the noise coming from following stages

Analog and Mixed-Signal Center, TAMU 7

MOS Amp Noise Figure Calculation

the current gain of the MOS amp is given by:

io = g m vgs = g m vs Rs + Rg + 1 jCgs 1 jC gs

gm gm = vs vs ; T = Cgs jCgs ( Rs + Rg ) 1 + jCgs ( Rs + Rg )

Analog and Mixed-Signal Center, TAMU 8

gm

Noise Figure by Current Gain

io = Gm ( ) vs

T 1 Gm ( ) = j Rs + Rg

the total output noise current is given by:

2 2 2 2 2 io = G v + v + i ,T m g s d

the noise figure can be easily computed:

F=
2 g

2 io ,T

2 o

2 io ,T

G v
2 s

2 2 m s

= 1+

2 vg

v
2 d

2 s

2 id

G v

2 2 m s

v = 4kTRg , v = 4kTRs , i = 4kT g m

Analog and Mixed-Signal Center, TAMU 9

Noise Figure Calculation(cont.)

Substitution of the the various noise sources leads to :

2 gm Rg 2 + F = 1+ ( Rs + Rg ) Rs Rs T 1+ + g m Rs Rs T Rg

2

This expression contains both the channel noise and the gate induced noise 1 is a good approximation Rg = R poly +
5gm
Analog and Mixed-Signal Center, TAMU 10

Minimum Noise for MOS Amp

the optimal value of Rs :

Rg F = 2 + gm = 0 Rs T Rs
2

Rs ,opt

T = Rs =

Rg gm

Thus the minimum Noise Figure is:

Fmin

= 1 + 2 g m Rg T
Analog and Mixed-Signal Center, TAMU 11

F vs. Rs

For an LNA operating at 5.2GHz in 0.18 m CMOS process, according to experience and published literatures, we can choose Rg = 2, = 3, = 0.75, T = 2*56GHz, gm = 50mA/V and plot F vs. Rs:
Rg
2

+ F = 1+ g m Rs Rs T

Analog and Mixed-Signal Center, TAMU

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MOS Amp Example

Find Rs ,opt for a typical amplifier. Assume fT = 75GHz f = 5GHz , ( ) = 2 , R poly is minimized by proper layout, thus intrinsic gate resistance is given by: 1 1 Rg = R poly + 5gm 5gm
Rg 10 = 0.1 g m = = 40mS Rs ,opt 119, Fmin = 1.08 5Rs Rs

To make the noise contribution from this term 0.1:

In practice, itll be difficult to get such a low Noise figure and get useful gain with the simple common source due to the bad power match Conflict of minimum noise vs. optimum matching Thats why we need input matching schemes for LNA!
Analog and Mixed-Signal Center, TAMU 13

LNA Metrics: Input Matching

Why do we need it? We have learned how to choose optimum source impedance for minimum noise figure One important requirement for LNA is 50 ohm matching The input of a common source amplifier is primarily capacitive and provides very poor power match! * Maximum power transfer: Z in = Z s
Pin _ LNA _ max Vs 2 Z in V12 = = Z in ( Z in + Z s

Vs 2 P = = in 2 Re( Z s ) 2

What should we do to have both good NF and good power match?

Analog and Mixed-Signal Center, TAMU 14

LNA Input Matching Topologies

Wideband LNA:
Resistive termination Common Gate Resistive shunt-feedback

Narrowband LNA:
Inductive degenerated Resistive terminated

Analog and Mixed-Signal Center, TAMU

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Resistive Termination LNA

VDD

Since the input of a CS MOS devices is primarily capacitive then we can terminate the input with a resistor Rm=Rs to match the input (at low frequencies)
Vb

RD

Zout M2 I dc M1 Rm Z in

Vout

It can be used in both narrowband and the wideband application. But its high NF(usually NF>6dB) characteristic limits its application.

V in

Rs

Analog and Mixed-Signal Center, TAMU

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Noise Analysis
Output noise due to source resistor Rs:

Vn2, s = KTRs Av2 = KTRs ( g m1 RD ) 2

where

Vout
2 * Vn,D

Av g m1 RD and RD << Z out

Z out

RD

ro2

2 in,M2

- gm2Vx
+

Output noise due to matching resistor Rm(=Rs):

Vgs2
-

C gs2

Vn2,m = KTRs ( g m1 RD ) 2
Output noise due to thermal noise of M1:
2 n , m1

V in i = 4 KT g m1 Output noise due to the load resistor, RD: Vn2,s = KTRD

Rs

V *

2 n,s
+

2 2 * V n,m i g1

C gs1 V1
-

Z in

Rm

gm1V1

ro1

i n,M1

Output noise due to thermal noise of M2: 2 2 sC sC gm2 gs 2 gs 2 2 2 in gm2 = in m , m 2 = 4 KT , 1 g + sC g + sC g gs 2 m1 m 2 gs 2 m2

Analog and Mixed-Signal Center, TAMU 17

Noise Analysis
The noise factor of the LNA is:
V + Vn , m + Vn ,m1 + Vn , D + Vn ,m 2 total output noise F= n,s noise due to the source resistor Vn2,s
2 2 2 2 2

Noise from RD is attenuated by LNA gain. The noise transfer function of

M2 is smaller due to source degeneration. Both are ignored for simplicity: 2 Rm 4 4 F = 1+ 2 + = 2+ Rs g m1 Rs g m1 Rs Therefore, even when gmRs>>4, Fmin>2 (NF>3dB) Resistor termination provides a good power match but greatly degrades the NF The terminating resistor adds its own noise It also drops the gain by 6dB (compared to CS with no termination). As a result the input referred noise of the device and those of the following stages increase by the same factor
Analog and Mixed-Signal Center, TAMU 18

Common Gate(CG) LNA

Input impedance:

1 Z in = g m + jCgs g 1 if Cgs << g m << m << T Z in gm Cgs Noise Figure:

ignoring poly gate resistance, gate noise, and ro, the output current noise is:
2 2 2 ino = ino + i ,ind no , Rs

2 ino ,ind : drain current noise

2 ino , Rs : output noise current due to source resistance
2 ino , Rs =

( Rs + Rin )

2 ens

gm 2 = ens 1 + g m Rs

Analog and Mixed-Signal Center, TAMU

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Noise Analysis
io = ind + g m vgs ind Rs vgs = ( ind + g m vgs + jCgs vgs ) Rs vgs = 1 + g m vgs + jCgs vgs
1 + jCgs Rs

1 io = ind ind , ( assume Cgs Rs << 1) 1 + g m vgs + jCgs Rs 1 + g m Rs

Notice that if gm=1/Rs (power match) then only half of drain current noise goes to the output
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Analog and Mixed-Signal Center, TAMU

Noise Analysis
Noise Factor:

1 i + g R 1 gd 0 m s = 1+ 2 F = 1+ 2 g m Rs gm 2 ens + g R 1 m s
2 nd

Under the input matching condition: Rs=1/gm we have:

F = 1+

gd 0
gm

5 = 2.2dB Long channel = 1+ = 3 3 = 4.8dB Short channel

Analog and Mixed-Signal Center, TAMU 21

Resistive Shunt-feedback LNA

The negative feedback network is used to implement the input matching
The input impedance is determined by open loop gain and the resistor values (Rf, RL), which are easily controlled. The resistor is a noise component and the LNA has moderate noise performance. Voltage gain:

Av =

RL (1 g m1 R f R f + RL

)
Rf

RL Vout
Z out

Input impedance: Z in =

R f + RL 1 + g m1 RL

//

1 sC gs1

RS
V in
Z in

Cf M1 Cgs1

Output impedance: Z out = RL / /

Rs + R f 1 + g m1 Rs

Analog and Mixed-Signal Center, TAMU

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Noise Analysis

Noise Factor:
2 2 2 2 2 4 iR 4 i Z Z R 4 id RL out f 1 Z out out s F = 1+ + + 2 2 2 2 Vn , Rs Av Vn , Rs Av Vn2, Rs Av2 2

R f 1 + g m1 Rs = 1+ Rs 1 g m1 R f

1 R f + Rs + RR s L 1 g m1 R f

g m1 R f + Rs + R s 1 g m1 R f

Analog and Mixed-Signal Center, TAMU

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Inductive degenerated LNA

Input impedance behaves like a series RLC circuit, gate inductor Lg is added to tune the resonant frequency to align with the operating frequency:

Z in = s ( Lg + Ls ) +

g L 1 + m s sC gs C gs

Matching occurs when:

Z in ( j0 ) = Rs

o2 =

g L 1 , and Rs = m s = T Ls C gs ( Lg + Ls ) Cgs

Rs = L Ls can be selected by: s T

if this value is too small to be practical, a capacitor can be inserted in shunt with Cgs to artificially reduce T
Analog and Mixed-Signal Center, TAMU 24

Input impedance-non-idealities
Z in = s ( Lg + Ls ) +
o =
1 ( Lg + Ls ) Cgs / / 1 T RLs
Rg = R poly , shW 12n 2 L
Rg , NQS = 1 5gm

1 1 + T Ls + + RLg + Rg + RLs + Rg , NQS 1 sC gs s T RLs

Z in ( j0 ) = T Ls + RLg + Rg + RLs + Rg , NQS

Inductance loss RLg : offset Zin RLs : offset Zin and w0 Gate resistance Rg : offset Zin NQS gate resistance Rg,NQS : offset Zin
Analog and Mixed-Signal Center, TAMU 25

Q Boosting
At resonance we get Q boosting effect: 1 1 Q= = ( Rs + LsT ) Cgs0 2 Rs Cgs0

1 T id = g m vgs = Qg m vs = vs { 2 Rs 0 Gm 1 4 24 3
Gm

vgs = Q vs

Need to watch out for linearity as vgs is Q times larger than the input signal Short channel devices operating in velocity saturation regime (i.e., large overdrive voltage) are more forgiving as their gm is relatively constant.
Analog and Mixed-Signal Center, TAMU 26

Equivalent input network

From the source, the amplifier input(ignoring Cgd) is equivalent to:

At resonance, the complete circuit is as follows:

Analog and Mixed-Signal Center, TAMU

27

Noise Analysis

The output noise current due to Rs and Rg is simply calculated by multiplying the voltage noise sources by Gm The calculation of output noise current due to drain noise is more 2 involved: id flows partly into the source of the device, it activates the 2 gm of the transistor which produces a correlated noise in shunt with id

1 2 2 2 2 2 = + + = i G v v i G , m Rs Rg d , out m Output noise current: no 2 Rs

Analog and Mixed-Signal Center, TAMU

T o
28

Noise Analysis: Drain Noise

The noise component flowing into the source is given by the current divider:

vgs = ( g m vgs + id ) = ( g m vgs + id )

j Ls 1 1 j Ls + + j Lg + Rs jC gs jC gs g m vgs = id 2

j Ls 1 (at resonance) Rs jC gs

Note that we are not including Rg in the small signal model

Analog and Mixed-Signal Center, TAMU

29

Total Output Noise

Lets first ignore the correlation of the gate noise and drain current noise. Notice only of the drain noise flows to output

i =G
2 no

2 m

(v

2 Rs

+v

2 Rg

1 2 + id 4

1 Gm = 2 Rs

T o
2

F=

2 no

2 2 Gm vRs

o = 1+ + g m Rs Rs T Rg

Note that the Noise figure at resonance is the same as CS amplifier w/o inductive degeneration. Inductive degeneration did not raise Fmin but matched the input !

Analog and Mixed-Signal Center, TAMU

30

Total Output Noise(cont.)

If we consider the correlation of the gate noise and drain current noise then one can show (*) 2 Rg F = 1+ + g m Rs o Rs T

= 1 + 2 c QL
QL = QCgs

o ( Lg + Ls ) 1 = = o Rs Cgs Rs

2 2 2 + 1 + QL ( ) 5 5

Optimal Noise figure happens for a particular QL. Possible to obtain a noise and power match
* D.K. Shaeffer, T.H. Lee, A 1.5V 1.5GHz CMOS Low Noise Amplifier, JSSC, Vol. 32, No. 5. May 1997
Analog and Mixed-Signal Center, TAMU 31

Optimal QL
If we try to optimize the noise figure while power dissipation is kept constant then: QL,opt will be independent from the frequency and around 4.5 Fmin is not too sensitive to QL and only changes by less than 0.1dB for QL between 3.5 and 5.5 Smaller QL results in larger bandwidth and smaller inductors, while a larger QL results in narrower bandwidth and larger inductors
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Analog and Mixed-Signal Center, TAMU

Linearity
Linearity of a MOS transistor in saturation region:

2 IIP 3, strong MOS

Veff

4 Veff 8 Veff 2 + Veff )(1 + Veff ) > = ( 3 3 1 = Vgs Vth = Esat L

Esat ~ 1V/m for L~0.35 m-0.18 m

IIP3 is independent of W
2 2 VIIP 3, LNA (V ) =

16 P 3 P

2 D 2 2 o

( 2 + ) 1 +

= Veff

3 vsat Esat Po = VDD 2 o Rs

MOS transistors IIP3 v.s. gate drive voltage

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Analog and Mixed-Signal Center, TAMU

Design Recipe for Inductive degenerated LNA

Step 1: Choose QL for optimal NF Cgs Width(W)

(Q

= 1 o Rs Cgs )

Step 2: Determine the current(Id) from power budget Step 3: From W & Id gm and Veff Step 4: From gm and Veff T and Fmin Step 5: Select Ls and Lg for the input network

Ls = Rs T

2 Lg = (1/ o C gs ) Ls

Analog and Mixed-Signal Center, TAMU

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Design Recipe: Iterations

NF is not low enough?

Increase T by increasing Id (with fixed device size) For fixed current density, increasing Q will reduce device size thus reduce total power - NF will increase

Linearity doesnt meet spec?

Reduce Q (in short channel devices the improvement is limited) Burn more current (not gaining much due to velocity saturation) Apply proper linearization techniques

Need to increase gain?

Larger QL Larger gm Larger Load(ZL)

Analog and Mixed-Signal Center, TAMU 35

Design Example:

Specs:
Frequency S11 S21 NF IIP3 Current Supply Process 2.4GHz <-10dB >15dB <2dB >-10dBm <10mA 1.8V 0.18m CMOS

Step 1: Choose QL = 4.5. then

C gs = 1 2QLo Rs = 147 fF

Choose minimum length L = 0.18m W = 110m Step 2: Choose the current Id = 9mA Step 3: From W & Id gm = 52mA/V Step 4: From gm and Cgs fT = 56GHz Step 5: Select Ls and Lg for the input network:

Ls = Rs T = 0.14nH

2 Lg = 1 o Cgs Ls = 31nH

Step 6: S21 requirement ZL = 24

36

Analog and Mixed-Signal Center, TAMU

Simulation Results: S21, S11, NF

Analog and Mixed-Signal Center, TAMU

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Simulation Results: IIP3

Analog and Mixed-Signal Center, TAMU

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Summary:

Parameters:
Calculated Simulated 110m/0.18 m 110 m/0.18 m 20nH 0.28nH 8.6mA 26

Performance:
Specs Frequency S11 S21 NF IIP3 Current Supply 2.4GHz <-10dB >15dB <2dB <10mA 1.8V Simulation 2.4GHz -32dB 15.7dB ~0.62dB 8.6mA 1.8V

M1 110m/0.18 m 110 m/0.18 M2 Lg Ls Id ZL m 31nH 0.14nH 9mA 24

>-10dBm -6.85dBm

Analog and Mixed-Signal Center, TAMU

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Effect of RL on input match

We ignored the effect of load impedance on input impedance in previous derivations. Lets revisit it: It can be shown that:

2 Ls ) ( ro 1 + jLs + Z in = LsT + jCgs ro + RL + jLs r o

ro 1 + jLs + [ LsT ] jCgs ro + RL

RL can be large and it can drop the real part of the input impedance when we use resonators at output Notice that the output impedance influenced the input impedance even in the absence of Cgd!
Analog and Mixed-Signal Center, TAMU 40

Differential v.s. Single-ended LNA

Differential reject common mode noise and interferer shield the bond wire x double area and current x need balun at input x common-mode stability x linearity limited by bias current Single-ended compact layout size less power for same NF and linearity x susceptive to bond wire and PCB trace x drive single-balance mixer; or use output balun to drive doublebalance mixer

Analog and Mixed-Signal Center, TAMU

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Differential LNA Common-mode Stability Issue

Z in ,com = j ( Lg + Ls ) + g m Ls gm + 2 C1 C1C2
Real part: Rin ,com =
gm 1 L s 2 C2 C1

C1 + C2 jC1C2

Typical differential LNA

Common-mode half circuit

For passive termination, the real part of the source impedance will always be positive. IF Rin,com happens to be negative and cancel the real part of source impedance, oscillation MAY occur.
Analog and Mixed-Signal Center, TAMU 42

Variant of Inductive Degenerated LNA

nMOS-pMOS shunt input Current reuse to save power Larger area due to two degeneration on chip inductor NF: 2dB, Power gain: 17.5dB, IIP3: -6dBm, Id: 8mA from 2.7V power supply

Single-ended version of current reuse LNA (bias not shown)

F. Gatta, E. Sacchi, et al, A 2-dB Noise Figure 900MHz Differential CMOS LNA, IJSSC, Vol. 36, No. 10, Oct. 2001 pp. 1444-1452

Analog and Mixed-Signal Center, TAMU

43

Variant of Inductive Degenerated LNA

Inter-stage inductor with parasitic capacitance form impedance match network between input stage and cascoded stage boost gain lower noise figure. Input match condition will be affected
Single-ended version of current reuse LNA (bias not shown)

Chunyu Xin, and Edgar Snchez-Sinencio, A GSM LNA Using Mutual-Coupled Degeneration, IEEE Microwave and Wireless Components Letters, VOL. 15, NO. 2, Feb 2005

Analog and Mixed-Signal Center, TAMU

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Comparison of LNA Architectures

Resistive Termination Noise Figure Gain Sensitivity to Parasitic Input Matching Linearity Power Highlight >6dB 10~20dB Less Easy -10~10dBm 1~50mW Effortless input matching Large NF Common Gate 3~5dB 10~20dB Less Easy -5~5dBm ~5mW Easy input matching Shunt Feedback 2.8~5dB 10~20dB Less Easy -5~5dBm >15mW Broadband input/out matching Stability Inductive Degeneration ~2dB 15~25dB Large Complex -10~0dBm >10mW Good narrowband Matching, small NF Large area
45

Drawback

Large NF

Analog and Mixed-Signal Center, TAMU

Substrate Noise

A MOS device is in fact a 4 terminal device. The 4th terminal is the substrate. The bulk-source potential modulates the drain current with a transconductance of gmb which has the same polarity as gm (i.e., increasing the bulk potential increases the drain current) The substrate has a finite (nonzero) resistance and therefore has thermal noise To reduce Rsub we should put many substrate contacts close to the device 4kTRsub 2 2
ino , sub = 1 + ( RsubCb )
2

f g mb

Substrate noise characterization: John T. Colvin et.al: Effects of

Substrate Resistances on LNA Performance and a Bondpad, JSSC Sep. 1999
46

Analog and Mixed-Signal Center, TAMU

Substrate Noise(cont.)

Solution: Place as many substrate contact as possible! Pros:

Reduces possibility of latch up issues Lowers Rsub and its associated noise(Impacts LNA through backgate effect (gmb) Absorbs stray electrons from other circuits that will otherwise inject noise into the LNA

Cons: takes up a bit extra area

Analog and Mixed-Signal Center, TAMU 47

Package Parasitics

As interface to the external world, the LNA must transit from the silicon chip to the package and board environment, which involves bondwires, package leads, and PCB trace.
Analog and Mixed-Signal Center, TAMU 48

Package Parasitics(cont.)

Two effects from bondwire and package inductance:

Value of degeneration inductor is altered Noise from other circuits couples into LNA

Analog and Mixed-Signal Center, TAMU 49

Package Parasitics(cont.)

Some or all of the degeneration inductor Ls can be absorbed into the bondwire inductance These parasitics must be absorbed into the LNA design. This requires a good model for the package and bondwires. It should be noted that the inductance of the input loop depends on the arrangement of the bondwires, and hence die size and pad locations. Many designs also require ESD protection, which manifests as increased capacitance on the pads.
For more details, please read:
1. B. Razavi, Design of Analog CMOS Integrated Circuits (chapter 18) McGraw-Hill, New York 2001. 2. Andrzej Szymaski et.al: Effects of package and process variation on 2.4 GHz analog integrated circuits, Microelectronics and Reliability, Jan. 2006
Analog and Mixed-Signal Center, TAMU 50

Cadence Simulation for LNA

Characterization of the major Figure of merit of an LNA in Cadence S-parameter simulation input and output match noise figure gain Periodic steady state (pss) simulation/SPSS IIP2/IIP3, 1dB point Please refer to Lab 3 manual
Analog and Mixed-Signal Center, TAMU 51

LNA Testing: S parameter

Before doing the measurement: Calibrate two lines. Adjust the power level

Analog and Mixed-Signal Center, TAMU

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LNA Testing: Linearity(IIP3/IIP2)

RF IN

Output Signal
Analog and Mixed-Signal Center, TAMU 53

LNA Testing: Noise Figure

Spectrum Analyzer

Noise Source

Analog and Mixed-Signal Center, TAMU

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