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1. INTRODUCTION.................................................................................................................. 3 2. TUNER................................................................................................................................... 3 1.1 General description of TDTC-G101D: .................................................................. 3 1.2 Features of TDTC-G101D: .................................................................................... 3 1.3 Pin Configuration ...................................................................................................

4 3. AUDIO AMPLIFIER STAGE WITH TPA3101 ................................................................... 4 3.1 General Description of TPA3101................................................................................. 4 3.2 Features of TPA3101 .................................................................................................. 4 3.3 Pin Configuration of TPA3101 .............................................................................. 5 4. MICROCONTROLLER (MSTAR)....................................................................................... 6 4.1 Genaral Description..................................................................................................... 6 4.2 Features .................................................................................................................. 6 5. INTEGRATED DVB-T RECEIVER (CHEERTEK) ............................................................ 7 5.1 General Description...................................................................................................... 7 5.2 Features .................................................................................................................. 8 6. 4MX16 BIT SYNCHRONOUS DRAM (SDRAM) ............................................................ 10 6.1 General Description.................................................................................................... 10 6.2 Features ...................................................................................................................... 10 6.3 Pin Configuration ...................................................................................................... 11 7. 512K CMOS SERIAL FLASH MX25L512 ..................................................................... 12 7.1 General Description.................................................................................................... 12 7.2 Features ...................................................................................................................... 12 8. 16MX16 BIT SYNCHRONOUS DRAM (SDRAM) .......................................................... 14 8.1 General Description.................................................................................................... 14 8.2 Features ...................................................................................................................... 14 9. SAW FILTER ...................................................................................................................... 14 9.1 IF Filter for Audio Applications Epcos K9656M ................................................... 14 9.1.1 Standarts .................................................................................................................. 14 9.1.2 Features ................................................................................................................... 15 9.1.3 Pin Configuration .................................................................................................. 15 9.1.4 Frequency Response................................................................................................ 15 9.2 IF Filter for Video Applications Epcos K3958M.................................................... 16 9.2.1 Standarts .................................................................................................................. 16 9.2.2 Features ................................................................................................................... 16 9.2.3 Pin Configuration .................................................................................................... 16 9.2.4 Frequency Response................................................................................................ 17 10. POWER STAGE ................................................................................................................ 17 11. IC SPECIFICATIONS ....................................................................................................... 18 11.1 32K Smart Serial EEPROM 24C32 ..................................................................... 18 11.2 TL062 ...................................................................................................................... 19 11.3 PI5V330 ................................................................................................................... 20 11.4 74HCT4053............................................................................................................. 21 11.5 FMS6145................................................................................................................. 22 11.6 LM1117................................................................................................................ 23 11.7 ST24LC21 ............................................................................................................... 24 11.8 24LC02.................................................................................................................... 25 11.9 MAX810............................................................................................................... 26 11.10 TDA1308............................................................................................................... 27 11.11 MP1583 .................................................................................................................. 27 11.12 MP2112 ............................................................................................................ 29

11.13 IRF7314............................................................................................................ 29 12. BLOCK DIAGRAMS ........................................................................................................ 30 12.1 General Block Diagram............................................................................................ 30 12.2 Integrated DVB-T Receiver Block Diagram............................................................ 32 12.3 MSTAR Block Diagram....................................................................................... 33

1. INTRODUCTION
17MB25 mainboard is based on MSTAR concept IC. This IC is capable of handling audio processing, video processing, scaling-display processing, 3D comb filter, OSD and text processing, 8 bit dual LVDS transmitter. TV supports PAL, SECAM, NTSC colour standards and multiple transmission standards as B/G, D/K, I/I, and L/L including German and NICAM stereo. Sound system is able to supply 2x10W (10%THD) audio output power for stereo speakers. Supported peripherals are: The analog part of the moard can support DVD module which is connected to mainboard through a cable. The USB feature is supported through digital part of the mainboard. 1 RF input VHF1, VHF3, UHF @ 75Ohm(Common) 1 Side AV (SVHS, CVBS, HP, R/L_Audio) (Common) 1 SCART socket(Common) 1 YPbPr (Common) 1 PC input(Optional) 2 HDMI (Common) 1 Stereo audio input for PC(Common) 1 Line out(Common) 1 S/PDIF output(Common) 1 Side S-Video(Optional) 1 Headphone(Common) 1 Common interface(Optional) 1 Digital USB(Opional) 1 RS232(Optional)

2. TUNER
A horizontal mounted and Digital Half-Nim tuner is used in the product, which covers 3 Bands(From 48MHz to 862MHz for COFDM, from 45.25MHz to 863.25MHz for CCIR CH). The tuning is available through the digitally controlled I2C bus (PLL). Below you will find info on the Tuner in use.

1.1 General description of TDTC-G101D:


The Tuner covers 3 Bands(from 48MHz to 862MHz for COFDM, from 45.25MHz to 863.25MHz for CCIR CH). Band selection and Tuning are performed digitally via the I2C bus.

1.2 Features of TDTC-G101D:


Digital Half-NIM tuner for COFDM Covers 3 Bands(From 48MHz to 862MHz for COFDM, From 45.25MHz to 863.25MHz for CCIR CH)

Including IF AGC with SAW Filter Bandwidth Switching (7/8 MHz) possible DC/DC Converter built in for Tuning Voltage Internal(or External) RF AGC, Antenna Power Optional

1.3 Pin Configuration

3. AUDIO AMPLIFIER STAGE WITH TPA3101


3.1 General Description of TPA3101
The TPA3101D2 Rev.A evaluation module consists of a single 10-W, class-D, stereo audio power amplifier complete with a small number of external components mounted on a circuit board that can be used to directly drive a speaker with an external analog audio source as the input. The gain of the amplifier is controlled by two gain select pins. The gain selections are 20, 26, 32, 36dB. The outputs are fully protected against shorts to GND, Vcc and output to output shorts with an auto recovery feature and monitor output.

3.2 Features of TPA3101


10-W/ch into an 8- Load From a 13-V Supply 9.2-W/ch into an 8- Load From a 12-V Supply Operates from 10 V to 26 V 87% Efficient Class-D Operation Eliminates Need for Heat Sinks Four Selectable, Fixed Gain Settings 4

Differential Inputs Thermal and Short-Circuit Protection With Auto Recovery Feature Clock Output for Synchronization With Multiple Class-D Devices Surface Mount 7 mm 7 mm, 48-pin QFN Package Surface Mount 7 mm 7 mm, 48-pin HTQFP Package

3.3 Pin Configuration of TPA3101

4. MICROCONTROLLER (MSTAR)
4.1 Genaral Description
The MST6WB7GQ-3 is a high performance and fully integrated IC for multi-function LCD monitor/TV with resolutions up to full HD (1920x1080). It is configured with an integrated triple-ADC/PLL, an integrated DVI/HDCP/HDMI receiver, a multi-standard TV video and audio decoder, two video de-interlacers, two scaling engines, the MStarACE-3 color engine, an on-screen display controller, an 8-bit MCU and a built-in output panel interface. By use of external frame buffer, PIP/POP is provided for multimedia applications. Furthermore, 3-D video decoding and processing are fulfilled for high-quality TV applications. To further reduce system costs, the MST6WB7GQ-3 also integrates intelligent power management control capability for green-mode requirements and spreadspectrum support for EMI management.

4.2 Features
LCD TV controller with PIP/POP display functions Input supports up to UXGA & 1080P Panel supports up to full HD (1920x1080) TV decoder with 3-D comb filter Multi-standard TV sound demodulator and decoder 10-bit triple-ADC for TV and RGB/YPbPr 10-bit video data processing Integrated DVI/HDCP/HDMI compliant receiver High-quality dual scaling engines & dual 3-D video de-interlacers 3-D video noise reduction Full function PIP/PBP/POP MStarACE-3 picture/color processing engine Embedded On-Screen Display (OSD) controler engine Built-in MCU supports PWM & GPIO Built-in dual-link 8/10-bit LVDS transmitter 5-volt tolerant inputs Low EMI and power saving features 296-pin LQFP NTSC/PAL/SECAM Video Decoder Supports NTSC M, NTSC-J, NTSC-4.43, PAL (B,D,G,H,M,N,I,Nc), and SECAM Automatic TV standard detection Motion adaptive 3-D comb filter for NTSC/PAL 8 configurable CVBS & Y/C S-video inputs Supports Teletext level-1.5, WSS, VPS, Closed-caption, and V-chip Macrovision detection CVBS video output

Video IF for Multi-Standard Analog TV Digital low IF architecture Stepped-gain PGA with 26 dB tuning range and 1 dB tuning resolution Maximum IF analog gain of 37dB in addition to digital gain Programmable TOP to accommodate different tuner gain to optimize noise and linearity performance Multi-Standard TV Sound Decoder Supports BTSC/NICAM/A2/EIA-J demodulation and decoding FM stereo & SAP demodulation L/Rx4, mono, and SIF audio inputs L/Rx3 loudspeaker and line outputs Supports sub-woofer output Built-in audio output DACs Audio processing for loudspeaker channel, including volume, balance, mute, tone, EQ, and virtual stereo/surround Optional advanced surround available (Dolby1, SRS2, BBE3 etc) Digital Audio Interface I2S digital audio input & output S/PDIF digital audio input & output HDMI audio channel processing capability Programmable delay for audio/video synchronization Analog RGB Compliant Input Ports Three analog ports support up to UXGA Supports HDTV RGB/YPbPr/YCbCr Supports Composite Sync and SOG (Sync-on-Green) separator Automatic color calibration DVI/HDCP/HDMI Compliant Input Port Two HDMI input ports with built-in switch Supports TMDS clock up to 225MHz @ 1080P 60Hz with 12-bit deep-color resolution Single link on-chip DVI 1.0 compliant receiver High-bandwidth Digital Content Protection(HDCP) 1.1 compliant receiver

5. INTEGRATED DVB-T RECEIVER (CHEERTEK)


5.1 General Description
CT216T is a highly integrated single chip for DVB-T compliant STB solution. Compared with Cheertek's previous generations of STB receiver devices. CT216T further interates COFDM demodulator USB 2.0 HS host controller, memory card reader, 1/2-bit SPIFlash interface, audio DAC, PWM in/out and SAR-ADC functions. In additiont special enhangements are provided such as MPEG-4 video decoding, 16-bit OSD with anti-flickering,

HW JPEG decoding, flesh tone and black-white extensions, and improvement of small video quality. CT216T includes COFDM demodulator transport stream de-multiplexer, DVB-CSA compliant de-scrambler, RISC MPUs, MPEG-1/2/4 AV decoder, digital T\/ encoder, audio DACs, USB 2.0 HS host controller, memory card reader, smart card reader, CI controller and other peripherals. Cli216T is designed in focus on the market of single tuner input product which makes, it a cost effective solution. Supports include free to air, conditional access for SC (Smart card) and CI portable devices, PVR, LCD TV, and other DVB-T applications.

5.2 Features
COFDM Demodulator ETSI EN 300 744 DVB-T NorDig Unified 1.0.3, and D-book compliant Automatic spectral inversion, detection Integrated ADC Direct IF (36.167 MHz or 43.75 MHz) or low IF (4.57 MHz) supported Single IF AGC or dual RF/lF AGC controls with modulabon Impulsive noise cancellation Carrier acquisition range: 400 kHz (extensible to 600 kHz in 8MHz BW) Adjacent channel interference (ACI) filter,for supporting 6, 7, and 8MHz channels with one 8MHz analog filter Co-channel interterence (CCl) supression RF signal strength monitor MPU Three 32-bit RISC MPU run up to 166MHz with total 448DMIPS 8KB I-Cache and 8KB D-Cache Two general purpose timers Watchdog timer DSU for source level debug Memory 6-bit SDRAM controller supports up to 32MB (16MB for l28-pin) Unified memory architecture Parallel flash (216-pin only) 1/2-bit SPI flash Transport De-multiplexing TS, PES, and ES demultiplexing OneTS path CI CAM interface (216-pin only) 32 general purpose PID filters 32 Section filters CRC-32 accelerator DVB-CSA de-scramblers

Video Decoding and Processing MPEG-2 MP@ML MPEG-4 SP&ASP PAL/NTSC format conversion 3:2 pull down Zoom in/out from 1/16X to 16X HW JPEG decode 4/8/16-bit OSD with anti-flickering On chip NTSC/PAL TV encoder CVBS, S-VHS, and component video VBI insertion for Teletext, CC and WSS ITU-R BT.601 and ITU-R BT.656 outputs Flesh tone extension Black/white extension, Audio Decoding and Processing MPEG-1: layer 1/2/3 MPEG-2: layer 1/2 Decode MPEG-2 and MPEG-1 audio at sampling frequency of 16K, 22.05K, 24K, 32K, 44.1K, and 48KHz Decode CU-DA at sampling frequency of 44.1 KHz SPDIF out for AC-3 by-pass Embedded 2 channels audio DAC for L/R outputs Digital mute control and volume adjustment OSD(On Screen Display) There are total 9 display planes: border; background. video. RS1 (Rectangle Strip 1), RS2, OSD, RS3, RS4, and cursor. 4/8l16-bit OSD with anti-flickering and anti-flutter Support alpha-blending per color Adjustable brightness control in window Bitmap OSD Support horizontal pixel duplication to enlarge bitmap automatically Support sub-region redraw to facilitate bitmap display. Digitnal TV Encoder NTSC-M, PAL-B, D, G, H, I, Nc, M encoding Four video DACs to provide 6 configuration output: modes Support CVBS, S-VHS. and component video outs VBI insertion for Teletext, CC and WSS Color burst amplitude control Programmable sync. level On chip, color-bar generator High Speed I/O USB 2.0 HS host controller 9

Memory card reader with SD, MMC, and MS interfaces Compliant with SD spec. 1.1 and MMC spec. 4.0 with 1-bit & 4-bit modes. Compliant with Memory Stick Pro format spec. 1.02 and Memory stick format spec 1.43 with 1-bit and 4-bit modes.

Peripherals Up to 3 full duplex UART with 16-byte FIFO 2-wire serial (2WS) in master mode .. . Up to 2 IS0-7816 compliant SC (1 in 128-pin, can also be used as UART) 5 digits 7-Segrnent LED control 5x3 two-dimension key scan 2 SAR-ADC input 4 PWM input/output 1 HW IR command decode GPIO Electrical and Physical Characteristics Capable of using single 27MHz clock input crystal 1.8V and 3.3V dual power supply Power standby mode PQFP-128 (CT216T-Z) or LQFP-216 (CT216T-R) package

6. 4MX16 BIT SYNCHRONOUS DRAM (SDRAM)


6.1 General Description
The EM638165 SDRAM is a high-speed CMOS synchronous DRAM containing 64 Mbits. It is internally configured as 4 Banks of 1M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The EM638165 provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications.

6.2 Features
Fast access time from clock: 4.5/5/5.4 ns Fast clock rate: 200/166/143 MHz Fully synchronous operation Internal pipelined architecture 1M word x 16-bit x 4-bank Programmable Mode registers

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CAS Latency: 2, or 3 Burst Length: 1, 2, 4, 8, or full page Burst Type: interleaved or linear burst Burst stop function Auto Refresh and Self Refresh 4096 refresh cycles/64ms CKE power down mode Single +3.3V 0.3V power supply Interface: LVTTL 54-pin 400 mil plastic TSOP II package Pb free and Halogen free 60-ball 6.4mm x 10.1mm VFBGA package Pb free

6.3 Pin Configuration

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7. 512K CMOS SERIAL FLASH MX25L512


7.1 General Description
The MX25L512 is a CMOS 524,288 bit serial Flash memory, which is configured as 65,536 x 8 internally. The MX25L512 feature a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device is enabled by CS# input. The MX25L512 provide sequential read operation on whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on page (256 bytes) basis, and erase command is executes on chip or sector (4K-bytes). To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. When the device is not in operation and CS# is high, it is put in standby mode and draws less than 10uA DC current. The MX25L512 utilize MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.

7.2 Features
General Serial Peripheral Interface (SPI) compatible -- Mode 0 and Mode 3 524,288 x 1 bit structure 16 Equal Sectors with 4K byte each Any Sector can be erased individually Single Power Supply Operation 2.7 to 3.6 volt for read, erase, and program operations Latch-up protected to 100mA from -1V to Vcc +1V Low Vcc write inhibit is from 1.5V to 2.5V Performance

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High Performance Fast access time: 85MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load) Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page) Fast erase time: 60ms(typ.) and 120ms(max.)/sector (4K-byte per sector) ; 1s(typ.) and 2s(max.)/chip(512Kb) Low Power Consumption Low active read current: 12mA(max.) at 85MHz, 8mA(max.) at 66MHz and 4mA(max.) at 33MHz Low active programming current: 15mA (max.) Low active erase current: 15mA (max.) Low standby current: 10uA (max.) Deep power-down mode 1uA (typical) Minimum 100,000 erase/program cycles

Software Features Input Data Format 1-byte Command code Block Lock protection The BP0~BP1 status bit defines the size of the area to be software protected against Program and Erase instructions. Auto Erase and Auto Program Algorithm Automatically erases and verifies data at selected sector Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first) Status Register Feature Electronic Identification JEDEC 2-byte Device ID RES command, 1-byte Device ID Hardware Features SCLK Input Serial clock input SI Input Serial Data Input SO Output Serial Data Output WP# pin Hardware write protection HOLD# pin pause the chip without diselecting the chip PACKAGE 8-pin SOP (150mil) All Pb-free devices are RoHS Compliant

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8. 16MX16 BIT SYNCHRONOUS DRAM (SDRAM)


8.1 General Description
The EM63A165 SDRAM is a high-speed CMOS synchronous DRAM containing 256 Mbits. It is internally configured as 4 Banks of 2M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a BankActivate command which is then followed by a Read or Write command. The EM63A165 provides for programmable Read or Write burst lengths of 1, 2, 4, 8, or full page, with a burst termination option. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either Auto or Self Refresh are easy to use. By having a programmable mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications.

8.2 Features
Fast access time from clock: 5/5.4 ns Fast clock rate: 166/143 MHz Fully synchronous operation Internal pipelined architecture 4M word x 16-bit x 4-bank Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: interleaved or linear burst - Burst stop function Auto Refresh and Self Refresh 8192 refresh cycles/64ms CKE power down mode Single +3.3V power supply Interface: LVTTL 54-pin 400 mil plastic TSOP II package - Pb free and Halogen free

9. SAW FILTER
9.1 IF Filter for Audio Applications Epcos K9656M 9.1.1 Standarts
B/G D/K I L/L

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9.1.2 Features
TV IF audio filter with two channels Channel 1 (L) with one pass band for sound carriers at 40,40 MHz (L) and 39,75 MHz (L- NICAM) Channel 2 (B/G,D/K,L,I) with one pass band for sound carriers between 32,35 MHz and 33,40 MHz

9.1.3 Pin Configuration


1 Input 2 Switching input 3 Chip carrier - ground 4 Output 5 Output

9.1.4 Frequency Response


Frequency Response of Channel 1:

Frequency Response of Channel 2:

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9.2 IF Filter for Video Applications Epcos K3958M 9.2.1 Standarts


B/G D/K I L/L

9.2.2 Features
TV IF filter with Nyquist slopes at 33.90 MHz and 38.90 MHz Constant group delay

9.2.3 Pin Configuration


1 Input 2 Input - ground 3 Chip - carrier ground 4 Output 5 Output

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9.2.4 Frequency Response

10. POWER STAGE


The DC voltages required at various parts of the chassis and inverters are provided by an external power supply unit or produced on the chassis if an adapter is used for the supply. The 12V dc voltage is switched by IRF 7314 power mosfet in TV sets with mechanical switch to produce the required standby voltage. Also regulators and mosfets generate 1.8V, 3.3V and 5V and 1.26V voltages for other different parts of the chassis.

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11. IC SPECIFICATIONS
11.1 32K Smart Serial EEPROM 24C32
General Description The Microchip Technology Inc. 24C32 is a 4K x 8 (32K bit) Serial Electrically Erasable PROM. This device has been developed for advanced, low power applications such as personal communications or data acquisition. The 24C32 features an input cache for fast write loads with a capacity of eight 8-byte pages, or 64 bytes. It also features a fixed 4K-bit block of ultra-high endurance memory for data that changes frequently. The 24C32 is capable of both random and sequential reads up to the 32K boundary. Functional address lines allow up to eight 24C32 devices on the same bus, for up to 256K bits address space. Advanced CMOS technology makes this device ideal for low-power non-volatile code and data applications. The 24C32 is available in the standard 8-pin plastic DIP and 8-pin surface mount SOIC package. Features Voltage operating range: 4.5V to 5.5V Peak write current 3 mA at 5.5V Maximum read current 150 A at 5.5V Standby current 1 A typical Industry standard two-wire bus protocol, I2C compatible Including 100 kHz and 400 kHz modes Self-timed write cycle (including auto-erase) Power on/off data protection circuitry Endurance: 10,000,000 Erase/Write cycles guaranteed for High Endurance Block, 1,000,000 E/W cycles guaranteed for Standard Endurance Block 8 byte page, or byte modes available 1 page x 8 line input cache (64 bytes) for fast write loads Schmitt trigger, filtered inputs for noise suppression Output slope control to eliminate ground bounce 2 ms typical write cycle time, byte or page Up to 8 chips may be connected to the same bus for up to 256K bits total memory Electrostatic discharge protection > 4000V Data retention > 200 years 8-pin PDIP/SOIC packages Temperature ranges: Commercial (C): 0C to +70C, Industrial (I): -40C to +85C

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Pin Configuration

11.2 TL062
General Description Low-power JFET-input operational amplifier Features Very Low Power Consumption Typical Supply Current . . . 200 A (Per Amplifier) Wide Common-Mode and Differential Voltage Ranges Low Input Bias and Offset Currents Common-Mode Input Voltage Range Includes VCC+ Output Short-Circuit Protection High Input Impedance . . . JFET-Input Stage Internal Frequency Compensation Latch-Up-Free Operation High Slew Rate . . . 3.5 V/s Typ

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Pin Configuration

11.3 PI5V330
General Description Pericom Semiconductor.s PI5V series of mixed signal video circuits are produced in the Company.s advanced CMOS low-power technology, achieving industry leading performance. The PI5V330 is a true bidirectional Quad 2-channel multiplexer/demultiplexer that is recommended for both RGB and composite video switching applications. The VideoSwitch. can be driven from a current output RAMDAC or voltage output composite video source. Low ON-resistance and wide bandwidth make it ideal for video and other applications. Also this device has exceptionally high current capability which is far greater than most analog switches offered today. A single 5V supply is all that is required for operation. The PI5V330 offers a high-performance, low-cost solution to switch between video sources. The application section describes the PI5V330 replacing the HC4053 multiplier and buffer/amplifier. Features High-performance, low-cost solution to switch between video sources Wide bandwidth: 200 MHz Low ON-resistance: 3 Low crosstalk at 10 MHz: .58 dB Ultra-low quiescent power (0.1 A typical) Single supply operation: +5.0V Fast switching: 10 ns High-current output: 100 mA Packages available: 16-pin 300-mil wide plastic SOIC (S) 16-pin 150-mil wide plastic SOIC (W) 16-pin 150-mil wide plastic QSOP (Q)

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Pin Configuration

11.4 74HCT4053
General Description The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3. VCC and GND are the supply voltage pins for the digital control inputs (S1 to S3 and E). The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4053 and 4.5 V to 5.5 V for 74HCT4053. The analog inputs/outputs (nY0 and nY1, and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground). Features Low ON resistance: 80 W (typical) at VCC - VEE = 4.5 V 70 W (typical) at VCC - VEE = 6.0 V 60 W (typical) at VCC - VEE = 9.0 V Logic level translation: To enable 5 V logic to communicate with 5 V analog signals Typical break before make built in Complies with JEDEC standard no. 7A ESD protection: HBM EIA/JESD22-A114-C exceeds 2000 V, MM EIA/JESD22A115-A exceeds 200 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C

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Pin Configuration

11.5 FMS6145
General Description The FMS6145 Low-Cost Video Filter (LCVF) is intended to replace passive LC lters and drivers with a low-cost integrated device. Five 4th-order lters provide improved image quality compared to typical 2nd or 3rd-order passive solutions. The FMS6145 may be directly driven by a DC-coupled DAC output or an AC-coupled signal. Internal diode clamps and bias circuitry may be used if AC-coupled inputs are required. The outputs can drive AC- or DCcoupled single (150) or dual (75) loads. DC coupling the outputs removes the need for output coupling capacitors. The input DC levels are offset approximately +280mV at the output. Features Five 4th-order 8MHz (SD) lters Drives single,AC- or DC-coupled, video loads (2Vpp, 150) Drives dual, AC- or DC-coupled, video loads (2Vpp, 75) Transparent input clamping AC- or DC-coupled inputs AC- or DC-coupled outputs DC-coupled outputs eliminate AC-coupling capacitors 5V only Robust 8kV ESD protection Lead-free TSSOP-14 package

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Pin Configuration

11.6 LM1117
General Description The LM1117 is a series of low dropout voltage regulators with a dropout of 1.2V at 800mA of load current. It has the same pin-out as National Semiconductors industry standard LM317. The LM1117 is available in an adjustable version, which can set the output voltage from 1.25V to 13.8V with only two external resistors. In addition, it is also available in five fixed voltages, 1.8V, 2.5V, 2.85V, 3.3V, and 5V. The LM1117 offers current limiting and thermal shutdown. Its circuit includes a zener trimmed bandgap reference to as-sure output voltage accuracy to within 1%. The LM1117 series is available in SOT- 223, TO-220, and TO-252 D-PAK packages. A minimum of 10F tantalum capacitor is required at the output to improve the transient response and stability.

Features
Available in 1.8V, 2.5V, 2.85V, 3.3V, 5V, and Adjustable Versions Space Saving SOT-223 Package Current Limiting and Thermal Protection Output Current 800mA Line Regulation 0.2% (Max) Load Regulation 0.4% (Max) Temperature Range LM1117 0C to 125C LM1117I -40C to 125C

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Pin Configuration

11.7 ST24LC21
Description The ST24LC21 is a 1K bit electrically erasable programmable memory (EEPROM), organized by 8 Bits.This device can operate in two modes: Transmit Only mode and I2C bidirectional mode. When powered, the device is in Transmit Only mode with EEPROM data clocked out from the rising edge of the signal applied on VCLK. The device will switch to the I2C bidirectional mode upon the falling edge of the signal applied on SCL pin. The ST24LC21 cannot switch from the I2C bidirectional mode to the Transmit Only mode (except when the power supply is removed). The device operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available. Features 1 Mllon Erase/Wrte Cycles 40 Years Data Retenton 2.5v To 5.5v Sngle Supply Voltage 400k Hz Compatblty Over The Full Range Of Supply Voltage Two Wre Seral Interface I2c Bus Compatble Page Wrte (Up To 8 Bytes) Byte, Random And Sequental Read Modes Self Tmed Programmng Cycle Automatc Address Incrementng Enhanced Esd/Latch Up Performances

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Pin Configuration

11.8 24LC02
Description The Microchip Technology Inc. 24AA02/24LC02B (24XX02*) is a 2 Kbit Electrically Erasable PROM. The device is organized as one block of 256 x 8-bit memory with a 2-wire serial interface. Low-voltage design permits operation down to 1.8V, with standby and active currents of only 1 A and 1 mA, respectively. The 24XX02 also has a page write capability for up to 8 bytes of data. The 24XX02 is available in the standard 8-pin PDIP, surface mount OIC, TSSOP and MSOP packages and is also available in the 5-lead SOT-23 package. Features Single supply with operation down to 1.8V Low-power CMOS technology - 1 mA active current typical - 1A standby current typical (I-temp) Organized as 1 block of 256 bytes (1 x 256 x 8) 2-wire serial interface bus, I2C compatible Schmitt Trigger inputs for noise suppression Output slope control to eliminate ground bounce 100 kHz (24AA02) and 400 kHz (24LC02B) compatibility Self-timed write cycle (including auto-erase) Page write buffer for up to 8 bytes 2 ms typical write cycle time for page write Hardware write-protect for entire memory Can be operated as a serial ROM Factory programming (QTP) available ESD protection > 4,000V 1,000,000 erase/write cycles Data retention > 200 years 8-lead PDIP, SOIC, TSSOP and MSOP packages 5-lead SOT-23 package Pb-free finish available Available for extended temperature ranges:

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- Industrial (I): -40C to +85C - Automotive (E): -40C to +125C Pin Configuration

11.9 MAX810
General Description The MAX809 and MAX810 are cost-effective system supervisor circuits designed to monitor VCC in digital systems and provide a reset signal to the host processor when necessary. No external components are required. The reset output is driven active within 10 _sec of VCC falling through the reset voltage threshold. Reset is maintained active for a timeout period which is trimmed by the factory after VCC rises above the reset threshold. The MAX810 has an active-high RESET output while the MAX809 has an active-low RESET output. Both devices are available in SOT-23 and SC-70 packages. The MAX809/810 are optimized to reject fast transient glitches on the VCC line. Low supply current of 0.5 _A (VCC = 3.2 V) makes these devices suitable for battery powered applications. Features Precision VCC Monitor for 1.5 V, 2.5 V, 3.0 V, 3.3 V, and 5.0 V Supplies Precision Monitoring Voltages from 1.2 V to 4.9 V Available in 100 mV Steps Four Guaranteed Minimum Power-On Reset Pulse Width Available (1 ms, 20 ms, 100 ms, and 140 ms) RESET Output Guaranteed to VCC = 1.0 V. Low Supply Current Compatible with Hot Plug Applications VCC Transient Immunity No External Components Wide Operating Temperature: -40C to 105C Pb-Free Packages are Available

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Pin Configuration

11.10 TDA1308
Description The TDA1308 is an integrated class AB stereo headphone driver contained in an SO8 or a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications. Features Operating temperature range: -40 to +85 C No switch ON/OFF clicks Short-circuit resistant signal-to-noise ratio: 110 dB total harmonic distortion: 0.001 %

Pin Configuration

11.11 MP1583
General Description The MP1583 is a step-down regulator with a built in internal Power MOSFET. It achieves 3A continuous output current over a wide input supply range with excellent load and line regulation. Current mode operation provides fast transient response and eases loop stabilization. Fault condition protection includes cycle-by-cycle current limiting and thermal

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shutdown. Adjustable soft-start reduces the stress on the input source at turn-on. In shutdown mode the regulator draws 20A of supply current. The MP1583 requires a minimum number of readily available external components to complete a 3A step down DC to DC converter solution. Features 3A Output Current Programmable Soft-Start 100m Internal Power MOSFET Switch Stable with Low ESR Output Ceramic Capacitors Up to 95% Efficiency 20A Shutdown Mode Fixed 385KHz frequency Thermal Shutdown Cycle-by-Cycle Over Current Protection Wide 4.75 to 23V operating Input Range Output Adjustable From 1.22 to 21V Under Voltage Lockout Available in 8 pin SOIC Package 3A Evaluation Board Available Pin Configuration

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11.12 MP2112
General Description The MP2112 is a 1MHz constant frequency, current mode, PWM step-down converter. The device integrates a main switch and a synchronous rectifier for high efficiency without an external Schottky diode. It is ideal for powering portable equipment that powered by a single cell Lithium-Ion (Li+) battery. The MP2112 can supply 1A of load current from a 2.5V to 6V input voltage. The output voltage can be regulated as low as 0.6V. The MP2112 can also run at 100% duty cycle for low dropout applications. The MP2112 is available in a space-saving 6-pin QFN package. Features High Efficiency: Up to 95% 1MHz Constant Switching Frequency 1A Available Load Current 2.5V to 6V Input Voltage Range Output Voltage as Low as 0.6V 100% Duty Cycle in Dropout Current Mode Control Short Circuit Protection Thermal Fault Protection <0.1A Shutdown Current Space Saving 3mm x 3mm QFN6 Package Pin Configuration

11.13 IRF7314
General Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques.

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Pin Configuration

12. SERVICE MENU SETTINGS


In order to reach service menu, First Press MENU Then press the remote control code, which is 4725. In DTV mode, first press MENU and select TV SETUP. Then, press 4725.

12.1. Video Setup


Panel Info <..................................> 32_LC_SAC1 Blue Background <.....> If Menu selected, Blue Background item is seen in Feature menu. If Yes selected, Blue Background is on and not seen in Feature menu Film Mode <.....> If Yes selected, Film Mode feature is active. Dynamic Contrast <.....> If Yes selected, Dynamic Contrast feature is active. Game Mode <...........> If Yes selected, Game Mode feature is active SRGB For PC <...........> If Yes selected, PCs can use SRGB option. Dynamic Noise Reduction<...........> If Yes selected, Dynamic Noise Reduction feature is active WSS Option<...........> If Yes selected, WSS Option can be used

12.2. AudioSetup
BG<.....> Europe

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New Zelland Australia No DK<.....> I<.....> L<.....> Equalizer <.....> If Yes selected, Equalizer item is seen in Sound menu. Headphone <.....> If Yes selected, Headphone item is seen in Sound menu. Power On/Off Melody <.....> If Yes selected, when power on/off conditions, the power on/off melody can be heard. Dynamic Bass <.....>Value between 0 to 12 Effect<.....> Value between 0 to 7 Audio Delay ,offset <.....> Value between 0 to 190 Audio Setup Cont...2 Carrier mute<.......> Value between 0 to 28 Headphone Sound Select <.......> Always Active Select Always Inactive Select Menu Always Main Menu Always PIP/PAP Window Sound Mode Detect Time <.......> Value between 0 to 255 Noise Reduction Threshold <.......> Value between 0 to 255 Noise Reduction Time <.......> Value between 0 to 15 AVL Attack Time <.......> Value between 0 to 255 AVL Release Time <.......> Value between 0 to 255 Prescales ( AVL On) FM Prescale<.......> Value between 0 to 255 AM Prescale <.......> Value between 0 to 255 NICAM Prescale <.......> Value between 0 to 255 SCART Prescale <.......> Value between 0 to 255 FAV Prescale <.......> Value between 0 to 255 DTV Prescale <.......> Value between 0 to 255 HDMI Prescale <.......> Value between 0 to 255 YPbPr/PC Prescale <.......> Value between 0 to 255 An. USB Prescale <.......> Value between 0 to 255 Dig. USB Prescale <.......> Value between 0 to 255 Prescales ( AVL Off) FM Prescale<.......> Value between 0 to 255 AM Prescale <.......> Value between 0 to 255 NICAM Prescale <.......> Value between 0 to 255 SCART Prescale <.......> Value between 0 to 255 FAV Prescale <.......> Value between 0 to 255 DTV Prescale <.......> Value between 0 to 255 HDMI Prescale <.......> Value between 0 to 255 YPbPr/PC Prescale <.......> Value between 0 to 255

An. USB Prescale <.......> Value between 0 to 255 Dig. USB Prescale <.......> Value between 0 to 255 Clipping Levels ( AVL On) FM Clipping <.......> Value between 0 to 255 AM Clipping <.......> Value between 0 to 255 NICAM Clipping <.......> Value between 0 to 255 SCART Clipping <.......> Value between 0 to 255 FAV Clipping <.......> Value between 0 to 255 DTV Clipping <.......> Value between 0 to 255 HDMI Clipping <.......> Value between 0 to 255 YPbPr/PC Clipping <.......> Value between 0 to 255 An. USB Clipping <.......> Value between 0 to 255 Dig. USB Clipping <.......> Value between 0 to 255 Clipping Levels ( AVL Off) FM Clipping <.......> Value between 0 to 255 AM Clipping <.......> Value between 0 to 255 NICAM Clipping <.......> Value between 0 to 255 SCART Clipping <.......> Value between 0 to 255 FAV Clipping <.......> Value between 0 to 255 DTV Clipping <.......> Value between 0 to 255 HDMI Clipping <.......> Value between 0 to 255 YPbPr/PC Clipping <.......> Value between 0 to 255 An. USB Clipping <.......> Value between 0 to 255 Dig. USB Clipping <.......> Value between 0 to 255

12.3. Service Scan/Tuning Setup


First Search for L/L <.......> ATS Delay Time (ms) <.......> Value between 0 to +200 Main Tuner Setup Tuner Type LC_TDTC_GXX1D Thomson DTT7543X Philips TD1318AF-3 Samsung DTOs403LH172A Generic ( Analog Only) Control Byte <.......> Value between 0 to +255 BSW1 <.......> Value between 0 to +255 BSW2 <.......> Value between 0 to +255 BSW3 <.......> Value between 0 to +255 Low-Mid Low Byte <.......> Low-Mid High Byte <.......> Mid-High Low Byte <.......> Mid-High High Byte <.......> S Band TOP <.......> VIF TOP <.......> Value between 0 to +15 VIF TOP SECAM <.......> Value between 0 to +15 VIF TOP DK<.......> Value between 0 to +15 Synch Threshold<.......> Value between 0 to +40

16.4. Options
Options-1 Power Up Standby Last state TV Open Mode Source 1st TV Last Tv First APS <.......> If Yes selected, first time TV opens by asking APS. APS Volume <.......> Value between 0 to +63 Burn In Mode <.......> If Yes selected, TV opens with Burn-In mode. This mode is used in manufacturing. APS Test Autostore <.......> If Yes selected, Channel is automatically stored. Unicode Enabled <.......> If Yes selected,Unicode characters can be read in the USB Files. Options-2 Source List menu <.......> If Yes selected, Sorce List Menu appears on the screen when press source button. RS232 for B2B <.......> If Yes selected, Remote Control commandsthe TV via RS232 and vice versa. RC Select <.......> RC Group 1 RC Group 2 RC Group 3 RC Group 4 RC Group 5 RC Group 6 Double Digit Key <.......> If Yes selected, Double Digit Button on RC activates. Protection <.......> If Yes selected,short circuit protection activates. Led Type <.......> 1 Led 1 Color 1 Led 2 Color 2 Led 2 Color 1 Led 3 Color 2 Led 3 Color 200 Programme <.......> If Yes selected, totaly 200 programmes can be used. TouchPad <.......> If Yes selected, TouchPad can be used.

Teletext Options TXT Darkness <.......> Value between 0 to +63 TXT Type <.......> Fasttext&Toptext No Default Fastext Toptext TXT Language <.......> Menu West East Cyrillic Turk/Gre Arabic Persian Auto No Txt Warning <.......> If Yes selected, No Txt Transmission warning appears on the screen when pressing txt button from RC. Txt Subtitle <.......> If Yes selected, Teletext subtitles can be seen. Optional Features Default Zoom <.......> Menu 16:9 4:3 Panaromic 14:9 Zoom Menu Timeout <.......> Menu 15 Sec 30 Sec 60 Sec No Time Backlight <.......> If Yes selected, Backlight feature is active. 100 Step Slider <.......> If Yes selected, 64 step sliders will become 100 step sliders. Analog USB Enabled <.......> If Yes selected, Analog USB option is active. Menu Double Size <.......> If Yes selected, menu sizes increases. CEC Enable <.......> If Yes selected, CEC feature is active. Digital USB Hotplug <.......> If Yes selected, Digital USB Hotplug feature is active.

PIP Options Pip <......> AV PIP No PIP PC PIP Hotel Options <......> Hotel TV <......> If Yes selected, Hotel TV feature is active. IR Smartloader <......> If Yes selected, IR Smartloader feature is active.

16.5. External Source Settings


TV <.......> DTV <.......> Ext 2 <.......> Ext 2 S <.......> FAV <.......> BAV <.......> S-Video <.......> HDMI 1 <.......> HDMI 2 <.......> HDMI 3 <.......> HDMI 4 <.......> YPbPr <.......> PC <.......>

16.6. Preset
User Ad.j ADC Adj. Service Adj. All Adj. Init Factory Channels.

16.7. NVM Edit


NVM-edit addr. (hex) NVM-edit data (hex) NVM-data dec

16.8. Programming
HDMI DDC Update Mode <.......> HDCP Key Update Mode <.......> Software Bypass <.......> If On selected, speaker effects are bypassed. LVDS Clock Step <.......> Value between 0 to +255 Memory Clock Step <.......> Value between 0 to +255 DTV Download <.......> If On selected, DTV software can be updated from SCART.

DSUB9 Download <.......> If On selected, DTV software can be updated from DSUB9.

16.9. Diagnostic
Eeprom I2C Tuner I2C IF I2C HDMI I2C DTV RS232

16.10.

Product Info

13. SOFTWARE UPDATE DESCRIPTION


13.1 17MB25 Analog Part Software Update With Bootloader Procedure
1.1 The File Types Used By The Bootloader All file types that used by the bootloader software are listed below: 1. The Binary File : It has .bin extension and it is the tv application. Its size is 1920 Kb. 2. The Config Binary File : It has .cin extension and it is the config of the tv application. Its size may be 64 Kb or a few times 64 Kb. 3. The Test Script File : It has .txt extension and it is the test script that is parsed and executed by the bootloader. It dont have to be any times of 64 Kb. 4. The Test Binary File : It has .tin extension and it is used and written by the test groups. It is run to understand the problem part of the hardware. Alltough a file that is used by the bootloader can be had any one of these extensions, its name has to be VESTEL_S and it has to be located in the root directory of the usb device. 1.2 Usage of The Bootloader 1. The starting to pass through : The chassis is only powered up. 2. The starting to download something : When chassis is powered up the menu key has to be pushed.Before the chassis is powered up and if any usb device is plugged to the usb port, the programme is downloaded from usb firstly. Any usb device is plugged to usb port , user must open hyperterminal in the pc and connect pc to chassis via Mstar debug tool and any one of scart,dsub9 or I2c connectors. Serial connection settings are listed below: Bit per second: 115200 Data bits: 8

Parity: None Stop bits: 1 Flow control: None

In this case the bootloader sofware puts C character to uart. After repeating C characters are seen in the hyperterminal user can send any file to chassis by selecting Transfer -> Send File menu item and choosing 1K Xmodem from protocol section.

Figure 1. The Sample Output Before Sending The File

2. EEProm update
To Update eeprom content via uart scart,dsub9 or i2c with Mstar tool can used. Serial connection settings are listed below: Bit per second: 9600 Data bits: 8 Parity: None Stop bits: 1 Flow control: None

Programming menu item is choosed in the service menu and switch HDCP Key Update Mode from off to on.

Figure 2. The Programming Service Menu After then you must see Xmodem menu in the hyperterminal.To download hdcp key press k or to download eeprom content press w.

Figure 3. Xmodem Menu If the repeated C characters are seen you can transfer file content via select Transfer>Send File and choose Xmodem protocol and click the Send button.

Figure 4. The Starting To Send

16.2 17MB25 HDCP key upload procedure.


1) Turn on TV set. 2) Open a COM connection using fallowing parameters and select ISP COM Port No Baud Rate: 9600 bps Data Bits: 8 Stop Bits: 1 Parity: None Flow Control: None 3) Enter service menu by pressing 4 7 2 5 consecutively while main menu is open 4) Select 9. Programming 5) Select HDMI HDCP Update Mode yes. 6) On Hyper Terminal Window press k 7) Click on send file under Transfer Tab. 8) Select Xmodem and choose the HDCP key to be uploaded. 9) Press send button 10)Restart TV set

13.3 17MB25 Digital Software Update From SCART


Adjusting DTV Download Mode: 1. Power on the TV. 2. Exit the Stby Mode. 3. Enter the Tv Menu. 4. Enter 4725 for jumping to Service Settings. 5. Select 8. Programming step. 6. Change 6. DTV Download to On. 7. Switch to the Stby mode. Adjusting HyperTerminal: 1. Connect the MB25 SCART Interface to SCART1 (bottom SCART plug). 2. Also connect the MB25 SCART Interface to PC. 3. Open HyperTerminal. 4. Determine the COM settings listed and showed below. Bit per second: 115200 Data bits: 8 Parity: None Stop bits: 1 Flow control: None

COM Properties Window

6. Click OK.

Software Updating Procedure 1. In the HyperTerminal Menu, click the Connect button. 2. Exit the Stby Mode. 3. The Space button on the keyboard must be pressed, when the following window can be seen.

Selection Window

4. Press the 2 button on the keyboard for choosing 2. Upgrade Application with Xmodem. 5. Repeating C characters are seen in the HyperTerminal menu.

The Sample Output Before Sending The File

6. Click the Send button on the HyperTerminal 7. Select the Filename xxxx_slot1.img using Browse. 8. Choose the 1K Xmodem from Protocol option.

Selection of File

File and Protocol Selection Window

Note: In the Software updating Procedure section, when the first C character is seen, the filename selection process must be finished before 10 seconds. If the process can not be finished, the file sending operation will be cancelled. The following figure shows this situation.

Capture of Receving Data Failing

9. When sending the file the following window must be seen.

Capture of Sending Process

10. After the sending process the following HyperTerminal window must be seen.

Capture of End of The Sending Process

11. For sending second program file, the Software Updating Procedure must be repeated from the step X. Select the Filename xxxx_slot2.img using Browse. 12. After sending the second program file, the Software Updating Procedure will be succesful. Note: After the File Sending Process, 1. Upgrade Application with FUM 2. Upgrade Application with Xmodem, options must be seen.

End of The Sending Process

Checking Of The New Software 1. Turn off and on the TV. 2. Enter the Setup submenu in the DTV Menu. 3. Choose the Configuration option. 4. For controlling new software, check the Receiver Upgrade option.

13.4 17MB25 Digital Software Update From USB


Software upgrade is possible via USB disk by folowing the steps below. 1. Copy the bin file, including higher version than the software loaded in flash, into the USB flash memory root directory. This file should be named up.bin. 2. Insert the USB disk. 3. Digital module performs version and CRC check. If version and CRC check is successful, then a message prompt appears to notify user about new version. If the user confirms loading of new version, upgrade.bin file is written into flash unused slot. 4. Digital module disables the previous software in the flash and then a system reset is performed. 5. After the reset, digital module starts with new software. Revert operation: With revert operation, it is possible to downgrade the software. Revert operation is very similar to upgrade process. In the revert operation, file name should be f_up.bin. Also user confirmation is not asked. 1. Copy the bin file into the USB flash memory root directory. This file should be named force_upgrade.bin. 2. Insert the USB disk. 3. A lower version than the software in flash can be loaded with revert operation. Digital module performs only CRC check. If CRC check is successful, then force_upgrade.bin file is written into flash unused slot. 4. Digital module disables the previous software in the flash. 5. A message prompt is displayed to notify user about end of revert process. 6. Power off/on is required to start digital module with the new software. For controlling new software, check the Receiver Upgrade option.

New Zelland Australia No DK<.....> I<.....> L<.....> Equalizer <.....> If Yes selected, Equalizer item is seen in Sound menu. Headphone <.....> If Yes selected, Headphone item is seen in Sound menu. Power On/Off Melody <.....> If Yes selected, when power on/off conditions, the power on/off melody can be heard. Dynamic Bass <.....>Value between 0 to 12 Effect<.....> Value between 0 to 7 Audio Delay ,offset <.....> Value between 0 to 190 Audio Setup Cont...2 Carrier mute<.......> Value between 0 to 28 Headphone Sound Select <.......> Always Active Select Always Inactive Select Menu Always Main Menu Always PIP/PAP Window Sound Mode Detect Time <.......> Value between 0 to 255 Noise Reduction Threshold <.......> Value between 0 to 255 Noise Reduction Time <.......> Value between 0 to 15 AVL Attack Time <.......> Value between 0 to 255 AVL Release Time <.......> Value between 0 to 255 Prescales ( AVL On) FM Prescale<.......> Value between 0 to 255 AM Prescale <.......> Value between 0 to 255 NICAM Prescale <.......> Value between 0 to 255 SCART Prescale <.......> Value between 0 to 255 FAV Prescale <.......> Value between 0 to 255 DTV Prescale <.......> Value between 0 to 255 HDMI Prescale <.......> Value between 0 to 255 YPbPr/PC Prescale <.......> Value between 0 to 255 An. USB Prescale <.......> Value between 0 to 255 Dig. USB Prescale <.......> Value between 0 to 255 Prescales ( AVL Off) FM Prescale<.......> Value between 0 to 255 AM Prescale <.......> Value between 0 to 255 NICAM Prescale <.......> Value between 0 to 255 SCART Prescale <.......> Value between 0 to 255 FAV Prescale <.......> Value between 0 to 255 DTV Prescale <.......> Value between 0 to 255 HDMI Prescale <.......> Value between 0 to 255 YPbPr/PC Prescale <.......> Value between 0 to 255

An. USB Prescale <.......> Value between 0 to 255 Dig. USB Prescale <.......> Value between 0 to 255 Clipping Levels ( AVL On) FM Clipping <.......> Value between 0 to 255 AM Clipping <.......> Value between 0 to 255 NICAM Clipping <.......> Value between 0 to 255 SCART Clipping <.......> Value between 0 to 255 FAV Clipping <.......> Value between 0 to 255 DTV Clipping <.......> Value between 0 to 255 HDMI Clipping <.......> Value between 0 to 255 YPbPr/PC Clipping <.......> Value between 0 to 255 An. USB Clipping <.......> Value between 0 to 255 Dig. USB Clipping <.......> Value between 0 to 255 Clipping Levels ( AVL Off) FM Clipping <.......> Value between 0 to 255 AM Clipping <.......> Value between 0 to 255 NICAM Clipping <.......> Value between 0 to 255 SCART Clipping <.......> Value between 0 to 255 FAV Clipping <.......> Value between 0 to 255 DTV Clipping <.......> Value between 0 to 255 HDMI Clipping <.......> Value between 0 to 255 YPbPr/PC Clipping <.......> Value between 0 to 255 An. USB Clipping <.......> Value between 0 to 255 Dig. USB Clipping <.......> Value between 0 to 255

16.3. Service Scan/Tuning Setup


First Search for L/L <.......> ATS Delay Time (ms) <.......> Value between 0 to +200 Main Tuner Setup Tuner Type LC_TDTC_GXX1D Thomson DTT7543X Philips TD1318AF-3 Samsung DTOs403LH172A Generic ( Analog Only) Control Byte <.......> Value between 0 to +255 BSW1 <.......> Value between 0 to +255 BSW2 <.......> Value between 0 to +255 BSW3 <.......> Value between 0 to +255 Low-Mid Low Byte <.......> Low-Mid High Byte <.......> Mid-High Low Byte <.......> Mid-High High Byte <.......> S Band TOP <.......> VIF TOP <.......> Value between 0 to +15 VIF TOP SECAM <.......> Value between 0 to +15 VIF TOP DK<.......> Value between 0 to +15 Synch Threshold<.......> Value between 0 to +40

16.4. Options
Options-1 Power Up Standby Last state TV Open Mode Source 1st TV Last Tv First APS <.......> If Yes selected, first time TV opens by asking APS. APS Volume <.......> Value between 0 to +63 Burn In Mode <.......> If Yes selected, TV opens with Burn-In mode. This mode is used in manufacturing. APS Test Autostore <.......> If Yes selected, Channel is automatically stored. Unicode Enabled <.......> If Yes selected,Unicode characters can be read in the USB Files. Options-2 Source List menu <.......> If Yes selected, Sorce List Menu appears on the screen when press source button. RS232 for B2B <.......> If Yes selected, Remote Control commandsthe TV via RS232 and vice versa. RC Select <.......> RC Group 1 RC Group 2 RC Group 3 RC Group 4 RC Group 5 RC Group 6 Double Digit Key <.......> If Yes selected, Double Digit Button on RC activates. Protection <.......> If Yes selected,short circuit protection activates. Led Type <.......> 1 Led 1 Color 1 Led 2 Color 2 Led 2 Color 1 Led 3 Color 2 Led 3 Color 200 Programme <.......> If Yes selected, totaly 200 programmes can be used. TouchPad <.......> If Yes selected, TouchPad can be used.

Teletext Options TXT Darkness <.......> Value between 0 to +63 TXT Type <.......> Fasttext&Toptext No Default Fastext Toptext TXT Language <.......> Menu West East Cyrillic Turk/Gre Arabic Persian Auto No Txt Warning <.......> If Yes selected, No Txt Transmission warning appears on the screen when pressing txt button from RC. Txt Subtitle <.......> If Yes selected, Teletext subtitles can be seen. Optional Features Default Zoom <.......> Menu 16:9 4:3 Panaromic 14:9 Zoom Menu Timeout <.......> Menu 15 Sec 30 Sec 60 Sec No Time Backlight <.......> If Yes selected, Backlight feature is active. 100 Step Slider <.......> If Yes selected, 64 step sliders will become 100 step sliders. Analog USB Enabled <.......> If Yes selected, Analog USB option is active. Menu Double Size <.......> If Yes selected, menu sizes increases. CEC Enable <.......> If Yes selected, CEC feature is active. Digital USB Hotplug <.......> If Yes selected, Digital USB Hotplug feature is active.

PIP Options Pip <......> AV PIP No PIP PC PIP Hotel Options <......> Hotel TV <......> If Yes selected, Hotel TV feature is active. IR Smartloader <......> If Yes selected, IR Smartloader feature is active.

16.5. External Source Settings


TV <.......> DTV <.......> Ext 2 <.......> Ext 2 S <.......> FAV <.......> BAV <.......> S-Video <.......> HDMI 1 <.......> HDMI 2 <.......> HDMI 3 <.......> HDMI 4 <.......> YPbPr <.......> PC <.......>

16.6. Preset
User Ad.j ADC Adj. Service Adj. All Adj. Init Factory Channels.

16.7. NVM Edit


NVM-edit addr. (hex) NVM-edit data (hex) NVM-data dec

16.8. Programming
HDMI DDC Update Mode <.......> HDCP Key Update Mode <.......> Software Bypass <.......> If On selected, speaker effects are bypassed. LVDS Clock Step <.......> Value between 0 to +255 Memory Clock Step <.......> Value between 0 to +255 DTV Download <.......> If On selected, DTV software can be updated from SCART.

DSUB9 Download <.......> If On selected, DTV software can be updated from DSUB9.

16.9. Diagnostic
Eeprom I2C Tuner I2C IF I2C HDMI I2C DTV RS232

16.10.

Product Info

17. SOFTWARE UPDATE DESCRIPTION


16.1 17MB25 Analog Part Software Update With Bootloader Procedure
1.1 The File Types Used By The Bootloader All file types that used by the bootloader software are listed below: 1. The Binary File : It has .bin extension and it is the tv application. Its size is 1920 Kb. 2. The Config Binary File : It has .cin extension and it is the config of the tv application. Its size may be 64 Kb or a few times 64 Kb. 3. The Test Script File : It has .txt extension and it is the test script that is parsed and executed by the bootloader. It dont have to be any times of 64 Kb. 4. The Test Binary File : It has .tin extension and it is used and written by the test groups. It is run to understand the problem part of the hardware. Alltough a file that is used by the bootloader can be had any one of these extensions, its name has to be VESTEL_S and it has to be located in the root directory of the usb device. 1.2 Usage of The Bootloader 1. The starting to pass through : The chassis is only powered up. 2. The starting to download something : When chassis is powered up the menu key has to be pushed.Before the chassis is powered up and if any usb device is plugged to the usb port, the programme is downloaded from usb firstly. Any usb device is plugged to usb port , user must open hyperterminal in the pc and connect pc to chassis via Mstar debug tool and any one of scart,dsub9 or I2c connectors. Serial connection settings are listed below: Bit per second: 115200 Data bits: 8

Parity: None Stop bits: 1 Flow control: None

In this case the bootloader sofware puts C character to uart. After repeating C characters are seen in the hyperterminal user can send any file to chassis by selecting Transfer -> Send File menu item and choosing 1K Xmodem from protocol section.

Figure 1. The Sample Output Before Sending The File

2. EEProm update
To Update eeprom content via uart scart,dsub9 or i2c with Mstar tool can used. Serial connection settings are listed below: Bit per second: 9600 Data bits: 8 Parity: None Stop bits: 1 Flow control: None

Programming menu item is choosed in the service menu and switch HDCP Key Update Mode from off to on.

Figure 2. The Programming Service Menu After then you must see Xmodem menu in the hyperterminal.To download hdcp key press k or to download eeprom content press w.

Figure 3. Xmodem Menu If the repeated C characters are seen you can transfer file content via select Transfer>Send File and choose Xmodem protocol and click the Send button.

Figure 4. The Starting To Send

16.2 17MB25 HDCP key upload procedure.


1) Turn on TV set. 2) Open a COM connection using fallowing parameters and select ISP COM Port No Baud Rate: 9600 bps Data Bits: 8 Stop Bits: 1 Parity: None Flow Control: None 3) Enter service menu by pressing 4 7 2 5 consecutively while main menu is open 4) Select 9. Programming 5) Select HDMI HDCP Update Mode yes. 6) On Hyper Terminal Window press k 7) Click on send file under Transfer Tab. 8) Select Xmodem and choose the HDCP key to be uploaded. 9) Press send button 10)Restart TV set

16.3 17MB25 Digital Software Update From SCART


Adjusting DTV Download Mode: 1. Power on the TV. 2. Exit the Stby Mode. 3. Enter the Tv Menu. 4. Enter 4725 for jumping to Service Settings. 5. Select 8. Programming step. 6. Change 6. DTV Download to On. 7. Switch to the Stby mode. Adjusting HyperTerminal: 1. Connect the MB25 SCART Interface to SCART1 (bottom SCART plug). 2. Also connect the MB25 SCART Interface to PC. 3. Open HyperTerminal. 4. Determine the COM settings listed and showed below. Bit per second: 115200 Data bits: 8 Parity: None Stop bits: 1 Flow control: None

COM Properties Window

6. Click OK.

Software Updating Procedure 1. In the HyperTerminal Menu, click the Connect button. 2. Exit the Stby Mode. 3. The Space button on the keyboard must be pressed, when the following window can be seen.

Selection Window

4. Press the 2 button on the keyboard for choosing 2. Upgrade Application with Xmodem. 5. Repeating C characters are seen in the HyperTerminal menu.

The Sample Output Before Sending The File

6. Click the Send button on the HyperTerminal 7. Select the Filename xxxx_slot1.img using Browse. 8. Choose the 1K Xmodem from Protocol option.

Selection of File

File and Protocol Selection Window

Note: In the Software updating Procedure section, when the first C character is seen, the filename selection process must be finished before 10 seconds. If the process can not be finished, the file sending operation will be cancelled. The following figure shows this situation.

Capture of Receving Data Failing

9. When sending the file the following window must be seen.

Capture of Sending Process

10. After the sending process the following HyperTerminal window must be seen.

Capture of End of The Sending Process

11. For sending second program file, the Software Updating Procedure must be repeated from the step X. Select the Filename xxxx_slot2.img using Browse. 12. After sending the second program file, the Software Updating Procedure will be succesful. Note: After the File Sending Process, 1. Upgrade Application with FUM 2. Upgrade Application with Xmodem, options must be seen.

End of The Sending Process

Checking Of The New Software 1. Turn off and on the TV. 2. Enter the Setup submenu in the DTV Menu. 3. Choose the Configuration option. 4. For controlling new software, check the Receiver Upgrade option.

16.4 17MB25 Digital Software Update From USB


Software upgrade is possible via USB disk by folowing the steps below. 1. Copy the bin file, including higher version than the software loaded in flash, into the USB flash memory root directory. This file should be named up.bin. 2. Insert the USB disk. 3. Digital module performs version and CRC check. If version and CRC check is successful, then a message prompt appears to notify user about new version. If the user confirms loading of new version, upgrade.bin file is written into flash unused slot. 4. Digital module disables the previous software in the flash and then a system reset is performed. 5. After the reset, digital module starts with new software. Revert operation: With revert operation, it is possible to downgrade the software. Revert operation is very similar to upgrade process. In the revert operation, file name should be f_up.bin. Also user confirmation is not asked. 1. Copy the bin file into the USB flash memory root directory. This file should be named force_upgrade.bin. 2. Insert the USB disk. 3. A lower version than the software in flash can be loaded with revert operation. Digital module performs only CRC check. If CRC check is successful, then force_upgrade.bin file is written into flash unused slot. 4. Digital module disables the previous software in the flash. 5. A message prompt is displayed to notify user about end of revert process. 6. Power off/on is required to start digital module with the new software. For controlling new software, check the Receiver Upgrade option.

12. BLOCK DIAGRAMS


12.1 General Block Diagram

31

12.2 Integrated DVB-T Receiver Block Diagram

32

12.3 MSTAR Block Diagram

33

LG
AIF 12 11 10 9 8 7 OVER_CUR_DETECT B2 SDA SCL RF_AGC B1 6 5 4 3 2 1 5V_TUN SDA_TUNER SCL_TUNER RF_AGC 33V_TUNER ACT_ANT DIGITAL_IF_N
2 2 1

TUNER SUPPLY OPSION


ANALOG_IF DIGITAL_IF_N
1

ACTIVE ANTENNA
R482 4R7 2R1 5V_TUN
1 2

A TU102 TDTC-G101D

DIF1 DIF2 IF_AGC AS NC

A
2

DIGITAL_IF_P IF_AGC_DVB_IN ADDRESS_SEL_TUNER

F116 8V_VCC 5V_TUN


1 2

U123 LM1117 3 IN
1

OUT 2 VOUT 4
2

5V_TUN R408 330R C360 10u 10V


2

330R
2

TH101

C600 47u 16V

GND 1

R501 10k

R502 10k

F234 330R
3

C134 100n 10V Near Tuner supply pin

R460 1k

2 2

1 1

R622 1k

S105

ANT_PWR

R504 10k

TP151
1

!!!En az 1.8 cm2 altta ve stte soutma alan braklmal.


3 2 1

Q102 FDN336P ACT_ANT C359 10u 10V

BC848B Q115
1

R503 10k

ANT_CTRL Connect if "33V Integrated Tuner" is used!

AGC

AND I2C SWITCH PART B


1

S102

5V_VCC C675
2

L117

47p 50V

Samsung/Thomson
IFOUTIFOUT+ VT 11 10 9 8 7 6 5 4 3 2 1

1u

33V_TUNER C532 1u 50V

R624 1k

5V_TUN

C128 D121
1 2 1 2

DIGITAL_IF_P 33V_TUNER IF_AGC_DVB_IN N.C.


2

RF_AGC_A
1

TU101 DTOS403LH172A

IF_AGC +5V AIF_OUT SDA SCL SAS RF_AGC BA

1N4148 R111 12k C448 47u 16V


1

IF_AGC_DVB_IN
2

R505 10k

IF_AGC_DVB

T_AGC

10V 100n C136

100n U115 10V

74HCT4053
SCL_TUN_DVB SCL RF_AGC_DVB RF_AGC RF_AGC_A 10V 100n C137 NEAR THE TUNER
1 2 1

5V_TUN ANALOG_IF SDA_TUNER SCL_TUNER ADDRESS_SEL_TUNER


1

This part must be placed near the tuner


SCL_TUNER
2 1

S103

R126 47R C586 47p 50V


1

SCL_TUN

1 2 3 4 5 6 7 8

2Y1 2Y0 3Y1 3Z 3Y0 E VEE GND

VCC 2Z 1Z 1Y1 1Y0 S1 S2 S3

16 15 14 13 12 11 10 9

SCL_TUN SDA_TUN SDA_TUN_DVB SDA S101


1 1

R254 4k7

5V_VCC

RF_AGC

S104

SDA_TUNER
2 1

ACT_ANT

R127 47R C587 47p 50V


1

SDA_TUN

Q116 BC848B
1

R595 22k

IDTV_SW

5V_TUN

5V_TUN

WARNING!!! Saw filter outputs must be close the chip

C467 C132
1 2

R473 6k8

R231 3k3

C654 220u 6V3

C133 220n 10V

C597 220p 50V

C676

100p 50V 62 63

U138
AVDD_MPLL VR27 VR12 AVDD_RXS GND_RXS SIFP SIFM VIFM VIFP GND_RXV AVDD_RXV TAGC
4

10u 10V 100n WARNING!!! This part must be close to chip 10V C363 C131
1 2 1 2 1 2

F187 3V3_STBY
1 2

MST6WB7GQ-3

330R

C546
1 2

Z101 BA782
2 1 2

R474 6k8

10n 16V 8V_VCC R380 75R


2 1

D145 5V_TUN

1 IN1 OUT1 4 K9656M OUT2 5 2 IN2 GND 3

SIFP SIFM

10u 10V

100n 10V F184 3V3_VCC


1 2

64 65 C364 C130 100n 10V


2

330R

10u 10V

R252 4k7

C135 100n 10V

C520 47u 16V

66 67 68 69 70 71 72 73

1 1 1

L114

R735 680R

1u

SIFP SIFM VIFM C361


1 2

R594 22k

R483 1k2

R125 47R

SIF_CTL Q144 BF799

R209 100k

Q140
2 1 3 2

L111 ANALOG_IF
1 2

C545
1 1 2

1u

10n 16V
2

R210 100k

R680 56R

BSN20

C129
1 2

VIFP

N.C. VIFM
2

F185 3V3_VCC 5V_TUN


1 2

10u 10V F186


2 1

100n 10V 4k7 R253

R623 1k

R384 10R

330R
1

C547
1 2

Z102 1 IN1 OUT1 4 K3958M OUT2 5 2 IN2 GND 3 L104 2u2 N.C.

330R
2 1

10n 16V

C510 100n 10V

T_AGC WARNING!!! This part must be close to chip

VIFP

VESTEL PROJECT NAME :


SCH NAME :ANALOG IF DRAWN BY :NDER GEN

17MB25

A3

SHEET:1 OF:11 4-28-2008_16:47

AX M

1
D106 5 4 2 NUP4004M5

7
5V_TUN
1

8
D146 BAV70
1

TP101
2 2 2 2

D112
2 1

C105

220p 50V

R506 10k R507 10k R511 10k

C640

C5V6 C106
1 1 2

10u 25V

21

R120 10k D115

20 19 18 17 16 15 14 C104 50V 220p


2 1 1

SC1_CVBS_IN

220p 50V

C658 220n 25V 12 PROG_EN 11

!
FS101
1 2

VGA CONNECTOR
3 1

C138 100n 10V

D102 5 4 2 NUP4004M5

TP240 C18V D176

VGA_DDC_5V

3 1

15
12V_VCC R861 10k
1 2

SC1_CVBS_OUT
2

50V 220p 75R R640


2 2 1 2

C5V6 D111
1

75R R644

C15V
1 2

4A/24VDC R872 22k

14
2

R584 100R 8 R1 1 7 R2 2 6 R3 3
1 1 1 1 1

8 VCC 7 WP 6 SCL 5 SDA

A0 1 A1 2 A2 3 GND 4
1

U112 ST24LC21

3V3_VCC

D117
2 1

10 F242 9 TX/SDA_SC 8
1 1 2

D163 C648
1 2

13
DVD_SENSE
1

C103
2

C5V6 47R R128

SC1_FB
2

C5V6 75R R641


1

DVD_C_IN

600R F243
2

R805 4k7

12
2

11 10
1

5 R4 4 TP102 TP104 TP103 TP105

R711 2k2 R712 2k2

SC1_R

7 50V 220p
2 1

600R F244
1 2

27p C649 50V


1 2

C628 DVD_Y_IN
2

SCART LT1

13 12

6 5

SC101

600R F245 SC1_G 4 3


1 1 2

27p 50V C650


1 2

DVD_IR

100n 10V

9 8 7

VGA_DDC_5V R349
1

VGA_VSNC
100R
2

VGA_HSNC

C107 11 10
1 2

600R R596 22k D140 C15V C140 50V 220p F196


1 2 2 1

27p C651 50V


1 2

DVD_AUD_R_IN

6
2

C439

C437

C438

50V

50V

9
2

SC1_PIN8
1

2 1 CN111

600R
1

8 7 6 5 4 SC1_B

R255 4k7

C5V6
2

R129 47R

4
DVD_SPDIF

27p 50V
1

3 2 1

50V

27p

27p

27p

75R R643

RX/SCL_SC D116

F246

27p C652 50V

DVD_AUD_L_IN

VGA_B VGA_G VGA_R 5 D101 4 NUP4004M5 2 3 1

220p 50V

C114

R642 75R

50V 1n
1 2

100n 10V F198


1 2

VGA

INPUT

600R

C108

C477

600R F197
1 2 1

SC1_AUD_L_IN R219 100R

CN118

DVD CONNECTION
2

3 2

SC1_AUD_L_OUT

C478
1 2

600R

C484

1 5 D103 4 NUP4004M5 2 3 1 F195


1

1n 50V

F194
1 2

600R
2 1

SC1_AUD_R_IN

1n 50V S_VIDEO_C_IN
4 1
2

C
JK102

S-VIDEO INPUT
3 2
2

600R

R213 100R C475


2 1 2

S_VIDEO_Y_IN C5V6 220p 50V D114 C112


1

SC1_AUD_R_OUT

SCART1

INPUT

C5V6 C111

D113

220p 50V

1 2

1n 50V

D169

C5V6

D168

C5V6

F216
2 1

27p
2 1

600R F211
1 2

C473 50V 1n
2 1

JK101 SAV_AUD_R_IN RED 6 5 4 3 2 1 C441


1

C442 RCA_PR R683 33k 75R R637 75R R638 R639 75R C440
2 1
2 2

600R

JK106 RED 6 5
1

5V_VCC

WHT

4 3 2 1 D105 5 4 2 NUP4004M5

600R

SAV_AUD_L_IN GRN SAV_CVBS C113 220p 50V


1

F207
2 1

50V 1n
1 2

YLW 50V 220p


1 2

3 1

600R F204
1 2 1

27p

600R JK105 4 RED 3 F205


1 2

C488 R217 100R


2

50V
D173
2 1

C115 LINE_R_OUT JK104 BLK 6 5 4 3 2 1 F210


1 2

SPDIF_OUT_COAXIAL

C489
1 2

600R F208
1 2

C5V6

SIDE AV INPUT
YPBPR_AUD_R_IN C479
1 2

YPBPR

INPUT
E

2 WHT 1
2 2

600R

WHT C5V6 D159 C5V6 D158

F209
1 2

1n 50V YPBPR_AUD_L_IN C480


1 2

600R
2

F215

600R

2 1

LINE OUTPUT SUBWOOFER OUTPUT

C5V6 D170
2 1

R804 4k7

D172

1n 50V

5V_SPDIF

1n R216 50V 100R

RED LINE_L_OUT

600R

C5V6

COAXIAL SPDIF OUTPUT YPBPR/PC LINE INPUT

C627
1 1 2

R400 1k

Q117 BC848B
1

R464 100R

SPDIF_OUT

C229 SPDIF_OUT_COAXIAL
1 2 1

R242 4k7

100n 10V

F118 5V_VCC
1 2

S216

2 1

5V_SPDIF C366
2

10u 10V

100n 10V

330R

R682 33k

50V 1n

50V

RCA_PB BLU
1 2

D
RCA_Y

F212
2

C474

C365
1 2

10u 10V

50V

2 1

27p

C5V6

D171

220p 50V

C116

1 2

SPDIF OUTPUT INTERFACE

VESTEL PROJECT NAME : 17MB25


SCH NAME :A/V INTERFACE DRAWN BY :ONDER GENC

A3

SHEET:2 OF:11 4-28-2008_15:57

AX M

3
AVDD_AU

4
C148
2 1

8
AUDIO INPUT VOLTAGE DIVISION AND DC BLOCK Place close to Paulo

VIDEO TERMINATIONS AND DIFFERENTIAL TRACING Place 75R termination resistors close to Paulo reference GNDs
16V 47n
2 1 2

U138 MST6WB7GQ-3
VGA_HSNC VGA_VSNC C152 19
1 2

17 18

HSYNC1
2

AVDD_AU_1 GND5 AUVRM AUVRP AUVAG AVDD_AU_2 LINE_IN_0L LINE_IN_0R LINE_IN_1L LINE_IN_1R AUCOM LINE_IN_2L LINE_IN_2R LINE_IN_3L LINE_IN_3R

74 75 76 77 78

100n 10V

10V 10u
2 1

10V 10u SC1_AUD_R_OUT


2 1

C512
2 1 2

F217
1

C340
1

600R

VSYNC1 VCLAMP REFP REFM BIN1P SOGIN1 GIN1P RIN1P BIN0M BIN0P GIN0M GIN0P SOGIN0 RIN0P

C375

C121
1 2 2

100n 16V R692 33k


1

8V_VCC R691 33k


2

10V 10u
2 1

LINE_IN_0L SC1_AUD_L_OUT
1

R607 22k

SC1_AUD_L_IN

A
DVD_C_IN
1 1

R143 47R

10V 10u C369


2 1

C0

75R R651 R650 75R

C432 C434
2 1 2

100n 10V

C151 20
1 2

100n 10V Y0 BIN1P SOGIN1 GIN1P C1 RIN1P


1

C150 21
1 2

C368 C344 SC_1_R 1u 16V

220p 50V R678 82k

C120
1 2

C374

1u 16V R513 10k C341

C493
2 1 2

A
2

1 OUT1 2 IN1-

VDD 8 OUT2 7 IN2- 6 IN2+ 5 V+


1

C332
1

DVD_Y_IN

R142 47R

R739 20k

U118
2

220p 50V R677 82k

LINE_IN_0R
2

1n 50V R606 22k


1

SC1_AUD_R_IN

100n 10V

22 23 24 25

79 80 81 82 83

AVDD_AU

47n 16V
1

1u 16V

TL062
V+ 3 IN1+ 4 VSS
1

R738 20k

C335
2

SC1_L 1u 16V LINE_IN_1L

1u 16V R514 10k C338 1u 16V R515 10k C339

C492
2 1 2

LINE_IN_0L LINE_IN_0R LINE_IN_1L LINE_IN_1R C149


1 1 2

R653 75R

16V 47n
1

1n 50V R605 22k


1

DVD_AUD_L_IN

S_VIDEO_C_IN

47R R145

1 2

C423 C422
2 1 2

R133 47R

C420
2 1 2

C495
2 1 2

26 47n 16V C419 27 28


1 2

R652 75R

S_VIDEO_Y_IN

R144 47R

BIN0P Y1
1

84 85 86 87 88 89 90 91 92 93 94 95 96 97
1

S106

B
1

47n 16V R654 75R GIN0P


2

R134 47R

100n 10V

LINE_IN_2L LINE_R_OUT

C424
1

47n 16V SOGIN0

10V 10u
2 1 1

R690 33k

2 1

33k R689 R153 47R

LINE_IN_1R
1

1n 50V R603 22k


1

DVD_AUD_R_IN

29 30 31

LINE_IN_2R LINE_IN_3L LINE_IN_3R R686 33k


2

R155 47R 50V 220p


1 2

2 1

F219 8V_VCC
2 1

10V 10u
1 2 2 1

SC1_CVBS_IN

47R R146

CVBS1 RIN0P AVDD_33 SOGIN0

C372
3

LINE_L_OUT
3

1u 16V R516 10k C336

C494
2 1 2

C511600R
1 2

C371 50V 220p


1 2

47n 16V C612


2 1 2

R773 470R

32 C143 33
1 2

AVDD_33_3 LINE_IN_MONO GND3 HSYNC0 VSYNC0 VSYNC2 BIN2P SOGIN2 GIN2P RIN2P C1 LINE_OUT_3L LINE_OUT_3R LINE_OUT_2L LINE_OUT_2R LINE_OUT_1L LINE_OUT_1R LINE_OUT_0L LINE_OUT_0R

POP_MUTE
1

R522 10k
2

BC848B Q121
1 1

1n
2

DSP_CH2_L DSP_CH2_R

R802 3k3

C119 R676 82k

100n 16V
2

BC848B Q120
1

R521 10k

LINE_IN_2L
1

1n 50V R601 22k


1

YPBPR_AUD_L_IN

POP_MUTE
1 1

1 OUT1 2 IN1-

VDD 8 OUT2 7 IN2- 6 IN2+ 5 V+


1

U117 TL062
C331 R737 20k V+
2

R649 75R

SAV_CVBS R664 75R

R141 47R

50V C433
2 1 2

100n 10V CVBS2 SC1_FB


1

34 35

C118 R675 82k

3k3 R801

1u 16V R517 10k C337

C497
2 1 2

DSP_CH4_L DSP_CH4_R DSP_CH1_L

3 IN1+ 4 VSS

R736 20k

C330
2

LINE_OUT_L 1u 16V

LINE_IN_2R 1u 16V R518 10k C343

1n 50V R600 22k


1

YPBPR_AUD_R_IN

DVB_CVBS

R140 47R

47n 16V C435


2 1 2

R687 33k

LINE_OUT_R 1u 16V

36 37 38 39 40 41 42 43 44 45 46 47

C496
2 1 2

CVBS3

BIN2P SOGIN2 GIN2P

C
2

R665 75R

47n 16V
1 1

DSP_CH1_R DSP_CH3_L DSP_CH3_R

LINE_IN_3L 1u 16V R519 10k C342 V+


1

1n 50V R599 22k


1

SAV_AUD_L_IN

SC1_B

R137 47R

C421
2 1 2

BIN0P RIN2P C1 GIN0P Y1 C0 Y0


1

C498
2 1 2

47n 16V
1

AVDD_AU

SC1_G
2

R138 47R

C418
2

Y1 C0 Y0 CVBS3 CVBS2 CVBS1 VCOM1 CVBS0 VCOM0 AVDD_33_4 CVBSOUT1 CVBSOUT0 GND4

R667 75R

47n 16V

C327 1u 16V C142 100n 10V

C367

10u 10V

33k R685

8V_VCC

LINE_IN_3R 1u 16V R520 10k

1n 50V R598 22k


1

SAV_AUD_R_IN

R684 33k

C499
2 1 2

AVDD_AU DECOUPLING CAPACITORS

Pin79

R666 75R

CVBS3
1

1n 50V C443

SC1_R

R139 47R

C417
2 1 2

RIN0P

CVBS2 CVBS1
1

C145 100n 10V

D
2

47n 16V R656 75R


1

Pin74
DVB_PR

DVB/YPBPR_SW

R627 1k

10V 100n

SW_PB

R149 47R

C428
2 1 2

BIN2P

F120

330R

47n 16V SW_Y


1

R132 47R R512 10k R131 47R

C425
2 1 2

27p

48 47n 16V 49 50
1 2

50V
1

U129 PI5V330
1 2 1

DVB/YPBPR SWITCH

D
F151
1 2

R661 75R

S109 S110

C416
2

RCA_PR SW_PR DVB_Y C444


2 1
1

R148 47R

C426
2 1 2

AVDD_33 GIN2P C144


2 1

47n 16V

51 52 53 54

RCA_Y
1

S108 S112

3V3_VCC

47n 16V
2

27p
1

1 2 3 4 5 6 7 8

IN S1A S2A DA S1B S2B DB GND

VCC EN S1D S2D DD S1C S2C DC

16 15 14 13 12 11 10 9

C147

5V_VCC

C445
1 2

330R 27p DVB_PB 50V R663 75R


2 1 2

RCA_PB
1

S107

S111

SW_PB

R657 75R

R403 470R

C490
2 1 2

SOGIN2

100n 10V

R662 75R

50V

SW_Y

1n 50V
2

DSP_CH2_L CVBS0_OUT RIN2P F119 5V_TUN BIN1P


1 2 1

R228 100R

HP_L C555 10n 16V DSP_CH1_L


1 1 1

10n 16V

C553

R655 75R

SW_PR

R147 47R

C427
2 1 2

R351 100R

R227 100R

MAIN_L
1

22k R419

E
2

47n 16V R659 75R


1

22k R418

E
MAIN_R

C554

R402 470R

R674 39k

10n 16V

C552

VGA_B

47n 16V VGA_G


1

C326 1u 16V
1

10n 16V

R150 47R

C429

330R

SCART VIDEO OUTPUT AMPLIFIERS


2 2

DSP_CH2_R

R229 100R

HP_R DSP_CH1_R 22k R420


1 1

R226 100R

22k R417

R151 47R

C431
2 1 2

GIN1P

Q146 BC858B
3

2 1

R658 75R

R404 470R

C491
2 1 2

SOGIN1

SC1_CVBS_OUT

R646 75R

R620 300R 75R R879

10u 10V
2

10n 16V

22k R415

10n 16V

CVBS0_OUT

C549

47n 16V

C378 Q119 BC848B

DSP_CH4_L

R224 100R

LINE_OUT_L C550
2

DSP_CH3_L

R223 100R

SC1_L
1

22k R414

R467 15k

1n 50V
2

C548

47n 16V

GAIN_SW1

R806 4k7

Q154 2N7002
3

10n 16V

VESTEL PROJECT NAME : 17MB25


AUDIO OUTPUT FILTERS Place close to Paulo
SCH NAME :A/V INTERFACE DRAWN BY :ONDER GENC

VGA_R

RIN1P

2 2

C551 22k R416

10n 16V

R660 75R

2 1

R152 47R

C430

DSP_CH4_R

R225 100R

DSP_CH3_R
2

R222 100R

R221 100R

SC_1_R
1

LINE_OUT_R

22k R413

A3

SHEET:3 OF:11 4-28-2008_15:57

AX M

HDMI1
CN121
21 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 HDMI Receiver In_B
1

U138 MST6WB7GQ-3
HDMIA_CHDMIA_C+ 1 2 3 RXACKN
1

USB20_REXT 191 AVDD_USB 192 USB20_DM 193 USB20_DP 194 GND11 195 VDDP2 196 GND12 197 VDDP3 216 USB_VBUS 217 USB_DM 218 USB_DP 219 USB_CID 220 ICLK 231 DI[0] 232 DI[1] 233 DI[2] 234 DI[3] 235 VDDP5 236 DI[4] 237 DI[5] 238 DI[6] 239 DI[7] 240 DI[8] 241 DI[9] 242

R119 910R

RXACKP GND1 RXA0N RXA0P AVDD_33_1 RXA1N RXA1P GND2 RXA2N RXA2P HPLUGA AVDD_33_2 REXT DDCDA_SDA DDCDA_SCL

AVDD_USB

R385 10R
2

HDMIB_2+ HDMIA_0HDMIA_5V 4 5 AVDD_33 5V_VCC HDMIA_1HDMIA_1+ 6 7 8 9


2

R386 10R
1

HDMI1

R388 10R
2

10R R387
2

HDMIB_2HDMIB_1+ 5V_VCC HDMIB_1HDMIB_0+ HDMIB_0HDMIB_C+ HDMIB_C1 A0 2 A1 3 A2 4 VSS VCC 8


2

BAV70 D147
1 3

HDMIA_0+

HDMIB_5V

R389 10R
1

10R R394
2

VDDP

TP134

TP106

1 1

S218

CEC
1

R392 10R
1

U110
2

R875 1k

R391 10R

10R R390

C153 100n 10V

R257 4k7
1

VDDP

R808 4k7

10R R393
2

HDMIB_SCL HDMIB_SDA HDMIB_5V HDMIB_HPD

WP 7 SCL 6 SDA 5
1 1

HDMI_WP1 HDMIA_HPD HDMIB_SCL HDMIB_SDA Q162 BC848B


1 3

HDMIA_2HDMIA_2+

10 11 12

24LC02

10R R396

R876 1k

AVDD_33
1

13 R412 390R
2

R491 47k R492 47k

14 15 16

TP133 TP132

HDMIA_SDA C154 HDMIA_SCL


1 2

100n 10V HDMIB_CHDMIB_C+

282 VDDC5 VDDC 283 RXBCKN 284 RXBCKP AVDD_33 285 AVDD_33_5 286 RXB0N 287 RXB0P 288 GND

VDDP

C
HDMIB_0HDMIB_5V HDMIB_0+

HDMI2
CN122
21 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
1

HDMIB_1HDMIB_1+

289 RXB1N 290 RXB1P 291 GND18

R832 10R R834 10R R835 10R R837 10R R839 10R R840 10R

5V_VCC
2

2 3

HDMIA_5V

HDMIA_2+
1

HDMIB_HPD
3

BAV70 D165

R629 1k

HDMIB_2HDMIB_2+
2 1

292 RXB2N 293 RXB2P 294 HPLUGB

R833 10R

TP203
2

TP205

HDMIA_2HDMIA_1+ HDMIA_1HDMIA_0+ HDMIA_0HDMIA_C+ HDMIA_C4 VSS SDA 5

HDMI2

R836 10R R838 10R

1 A0 2 A1 3 A2

VCC 8

R258 4k7

C629 100n 10V

Q123 BC848B
1

R630 1k

R807 4k7
1

HDMIB_SDA HDMIB_SCL

295 DDCDB_SDA 296 DDCDB_SCL

U147
2

WP 7 SCL 6 HDMIA_SCL HDMIA_SDA


1 1

HDMI_WP2 5V_VCC

TP135

TP136

24LC02

S217

CEC
1 1 1 2

R841 10R R843 10R

HDMIA_SCL HDMIA_SDA HDMIA_5V HDMIA_HPD

VDDP TP204 TP206

Pin196
2

Pin216
2

Pin236
2

C155 100n 10V

C156 100n 10V

C157 100n 10V

R493 47k R494 47k

CEC CIRCUIT
1

AVDD_33

Pin6
2

Pin13
2

Pin285
2

S116 Q101 2N7002

C158 100n 10V

C159 100n 10V

C160 100n 10V

CEC

R829 200R

R159 100R

HDMI_CEC 3V3_VCC
1

F124
2

330R
2 1

AVDD_USB C173 100n 10V

R621 27k 3V3_STBY

5V_STBY

VESTEL PROJECT NAME : 17MB25


SCH NAME :HDMI&USB

A3

SHEET:4 OF:11

DRAWN BY :S.SEBNEM TAS & ULAS DERELI 4-28-2008_15:57

AX M

5
3V3_STBY
2

6
R277 4k7 R276 4k7
1

7
2

U138 MST6WB7GQ-3
55 GPIOL[0]
3

N.C. 4k7 R293


1

3V3_STBY KEYBOARD_STBY SC1_PIN8 DVD_SENSE


2

DVD_IR

LED1 3V3_STBY LED2


2

SAR0 204 SAR1 205 SAR2 206 SAR3 207 PWM0 208 PWM1 209 DDCR_SDA 210 DDCR_SCL 211 DDCA_SDA 212 DDCA_SCL 213
2 2

LED
CN119
1

TP241 IR_IN
1 2

BC848B Q124
2 3

56 57

GPIOL[1] GPIOL[2] GPIOL[3] GPIOL[4] XOUT XIN GPIOD[0] GPIOD[1]

R694 4k7

3V3_VCC C447 14.31818MHz R110 1M


1 2 1

S119

3V3_STBY
2 2

R742 20k

SIF_CTL STBY_ON/OFF_NOT R748 3V3_STBY 47R


1 2

58 R267 4k7 59
1

A
OVER_CUR_DETECT
1

S124

R263 4k7

R498 47k

X104

F247S118
1 2

5V_STBY IR_IN

N.C.

27p 50V

C653
1 2

C446
1 2

600R

60 61 98 99

27p 50V
2 3 3 2 2

DVD_IR_ON/OFF

27p 50V
2

R421 10k

Q130 BC848B
1

Q131 BC848B
1

R422 10k

3V3_STBY
2

For Internal CPU Selection BACKLIGHT_DIM 3V3_STBY 4k7 R524For Internal CPU Selection 3V3_STBY R279 10k 4k7 3V3_STBY R287 SDA 4k7 3V3_STBY R286 SCL 4k7 3V3_STBY R289 TX/SDA
2 1 2 1 2 1 2 1

R830 220R

R528 10k
1

R531 10k

R831 220R

USB_DIG_OCD
2

100 GPIOD[2] 101 GPIOD[3]

RX/SCL 4k7 R290


1 1

1 3

3V3_STBY R827 100R

1 3

DVB_RESET 3V3_VCC
1

LED2

INT 214 IRIN 215


2

R265 4k7

Q148
1

Q149
1

4k7 R274

LED1

102 GPIOD[4] 103 GPIOD[5]

IR_IN 3V3_STBY SW_UPDATE_SELECT HP_DETECT

BC858B

BC858B
3

STBY_ON/OFF STBY_ON/OFF_NOT
2

GPIOB[0] 221 GPIOB[1] 222 PWM2 223 PWM3 224 GND14 225 VDDP4 226 GPIOT[0] 227 GPIOT[1] 228 GPIOT[2] 229 GPIOT[3] 230 HWRESET 243 VDDP7 272 GND17 273 GPIOE[3] 274 GPIOE[2] 275
2 1 1

4k7 R294

R608 22k

Q125 BC848B
1

GAIN_SW1 3V3_VCC

R757 4k7

104 GPIOD[6]
2

R165 47R

R382 220R
1

R381 220R
1

3V3_VCC DVB/YPBPR_SW 3V3_VCC

3V3_STBY 5V_STBY

S117 S125

R288 4k7 R268 4k7

105 GPIOD[7]
1

4k7 R275

3V3_VCC

106 GPIOD[8]
1

AMP_MUTE
2

DVB_IRQ VDDP VDDP


2

107 GPIOD[9] 108 VDDP1 109 GND6

4k7 R278

3V3_STBY

VDDP
1

VDDC
1

R905 47R

OPTION2

MECH_SWITCH_ONBOARD

KEYBOARD_ONBOARD

3V3_STBY PIN108
1

R724 100k

IDTV_SW PIN272 PIN226 PIN110 PROTECT NVM_WP C181 3V3_STBY 3V3_STBY DVD_IR_ON/OFF NVM_WP SCL_NVM SDA_NVM
1 2

111 GPIOD[10] 112 GPIOD[11] 113 GPIOD[12]

DVB_RXD R292 4k7 DVB_TXD R356 100R


2

C175 100n 10V

C177 100n 10V

C176 100n 10V

C178 100n 10V

5V_VCC

R269 4k7 R270 4k7

VDDC
1

110 VDDC1

5V_TOLERANT

C
1

C626
1 2

R161 47R R162 47R

R291 4k7

3V3_VCC

C5V6 F250 MECH_SWITCH


1 2

R793 47R

F248
2 1 2

U103 24C32
KEYBOARD_STBY 1 2 3 4 E0 E1 E2 VSS VCC WC SCL SDA 8 7 6 5

600R F249
1 2

100n 10V

115 GPIOD[14] 116 GPIOD[15]


5V_TOLERANT

D167

VDDP

1 R261 4k7 R262 4k7 3V3_STBY SDA_NVM


1

600R CN130

3V3_STBY

600R 1 2 3 4 TK_SUPPLY
1

HDMI_WP1
5V_TOLERANT

117 GPIOD[16] 118 GPIOD[17] 149 GPIOR[0]

TP239

TP111

TP110 TP109 TP108 TP112

HDMI_WP2 HDMI_CEC
5V_TOLERANT

GPIOE[1] 276
2

3V3_STBY SCL_NVM USB_ENABLE 3V3_STBY

GND RST MAX809LTR VCC U130 3 10V 100n


1 2

GPIOE[0] 277 GPIOM[0] 278 GPIOM[1] 279 GPIOM[2] 280 GPIOM[3] 281
2

HDMIB_5V
5V_TOLERANT

PROGRAMMING PART
D
5V_STBY

HDMIA_5V 3V3_STBY PROTECT_PANEL 3V3_VCC ANT_CTRL


2 2

R283 4k7 R264 4k7

R395 1k R877 1k

150 GPIOR[1] 151 GPIOR[2] 152 GPIOR[3]

C183 R760 4k7 5V_VCC

1N4148

220p 50V D160

C630 100n 10V

3V3_VCC

10V 100n C182

C5V6
2

D161

C5V6
2

D162

4k7 R271

114 GPIOD[13]

MAX810

153 GPIOR[4] 154 GPIOR[5] 155 GPIOR[6]

PROG_EN

C180 R281 4k7

UART0_RXD0 1 2 3 4 5 6 7 8

U127 M74HC4052
2Y0 2Y2 2Z 2Y3 2Y1 E VEE GND VCC 1Y2 1Y1 1Z 1Y0 1Y3 S0 S1 16 15 14 13 12 11 10 9

156 GPIOR[7]
1

S122 S121

R282 4k7

100n 10V 5V_STBY

3V3_VCC 5V_VCC

R280 4k7
1 1 2 1 3

157 GPIOR[8]
1

158 GPIOR[9] TX/SDA TX/SDA_SC UART0_TXD0 SW_UPDATE_SELECT


1

RX/SCL_SC RX/SCL Q128 BC848B

159 GPIOR[10]
1

1 2

R233 4k7 C530


1 2

2 2

Q147 BC858B
3

4k7 R284

R745 1k

CN133
2

5V_STBY MECH_SWITCH_ONBOARD 1 3 2 4 KEYBOARD_ONBOARD TK_SUPPLY

MEGA_DCR_OUT S242

E
1 1

220p 50V
3

S123

R352 100R R353 100R R354 100R R355 100R

5V_STBY

N.C. CN110 S120 1


2

BACKLIGHT_DIM S238

S237

R232 4k7 C529


1 2

Q126 BC848B
1 3

DIMMING
2

C383

RX/SCL TX/SDA

R164 47R R163 47R

3 PROG_EN 4

PUSH V+ AND V0 1 HC4052 DISABLE HC4052 ENABLE P+ SW103


3 4

AT THE SAME TIME FOR MENU


KEYBOARD_ONBOARD VOLSW107
3 4 3 4

220p 50V MECH_SWITCH_ONBOARD

Q127 BC848B
1

C531
1 2

PSW104
3 4

VOL+ SW105
3 4

TV/AV SW106

DEBUG SOCKET

220p 50V

SW_UPDATE_SELECT
2 2 2 2

3 2 1 SW101

10u 10V

MEGA_DCR_IN

R234 4k7

F
5 4 R484 1k2 R118 2k7 R397 270R R405 470R R243 3k9
2

0 1

DVB_SW_UPDATE ANALOG_SW_UPDATE

VESTEL PROJECT NAME : 17MB25


SCH NAME :CONTROLLER DRAWN BY :NDER GEN

A3

SHEET:5 OF:11 4-28-2008_15:57

AX M

3
F126 3V3_VCC
1 2

5
VDDM

7
U138 MST6WB7GQ-3
DVB_SPDIF 119 AD[0]
5
2

8
R909 4k7
1

3V3_VCC

330R
2

TP116

TP119

C469 10u 10V

C201 100n 10V

C202 100n 10V

C200 100n 10V

C199 100n 10V

C198 100n 10V

C197 100n 10V

C196 100n 10V R906 4k7


1

DQM0 160 DQS0 161 AVDD_MI_3 162 MDATA[0] 163 MDATA[1] 164 GND9 165 MDATA[2] 166 MDATA[3] 167 AVDD_MI_4 168 MDATA[4] 169 MDATA[5] 170 MDATA[6] 171 MDATA[7] 172 AVDD_MI_5 173 MDATA[8] 174 MDATA[9] 175 GND10 176 MDATA[10] 177 MDATA[11] 178 AVDD_MI_6 179 MDATA[12] 180 MDATA[13] 181 MDATA[14] 182 MDATA[15] 183 AVDD_MI_7 184 DQS1 185 DQM1 186 MCLKZ 187 MCLK 188 MCLKE 189 MVREF 190
1

LDM

3V3_VCC SPDIF_OUT 3V3_VCC


2

TP117

120 AD[1] 121 AD[2] R296 4k7 DVD_SPDIF 122 AD[3] 123 WRZ 124 RDZ
1

A
TP115 TP114 TP113
1

F150
1 2 2

PIN131 3V3_STBY

PIN147

PIN162

PIN168

PIN173

PIN179

PIN184

VDDM MDATA[0] MDATA[1]

R912 4k7

SCZ SDO 3V3_STBY

R367 100R R368 100R R366 100R

U132 MX25L512
1 2 3 4 CS# SO WP# GND VCC HOLD# SCLK SI 8 7 6 5

C184 100n 10V

330R C643 10u 10V

BACKLIGHT_ON/OFF

S244 R907 4k7

R370 100R 100R R369

Q168 BC848B
2

SCK SDI VDDC


2

PANEL_VCC_ON/OFF 3V3_VCC C194 100n 10V


2 1

2 2

2 1

C195 100n 10V

3V3_VCC 3V3_VCC

R295 4k7 R911 4k7 R908 4k7

R357 100R

125 ALE 126 BADR[1] 127 BADR[0]

MDATA[2] MDATA[3] VDDM MDATA[4] MDATA[5] MDATA[6]

R365 100R

BADR[1]
2

BADR[0]
2

TP118

RASZ VDDC

128 RASZ 129 VDDC2 130 GND7

FLASH
B

PIN129

PIN203

VDDM CASZ WEZ MADR[11]

131 AVDD_MI_1 132 CASZ 133 WEZ 134 WADR[11] 135 WADR[10] 136 WADR[9] 137 WADR[8] 138 WADR[7] 139 WADR[6] 140 WADR[5] 141 WADR[4] 142 WADR[3] 143 WADR[2] 144 WADR[1] 145 WADR[0] 146 GND8

B
MDATA[7] VDDM MDATA[8] MDATA[9]

MEMORY
VDD_DMC

8MBU131 SDRAM
MT48LC4M16A2TG8E
1 2 VDD_DMQ 3 4 5 6 7 8 VDD_DMQ MDATA[4] MDATA[5] MDATA[6] MDATA[7] 4 3 2 1 R4 5 R3 6 R2 7 R1 8 100R R587 9 10 11 12 13 VDD1 DQ0 VDDQ1 DQ1 DQ2 VSSQ1 DQ3 DQ4 VDDQ2 DQ5 DQ6 VSSQ2 DQ7 VDD2 DQML WE# CAS# RAS# CS# BA0 BA1 A10 A0 A1 A2 A3 VDD3 VSS3 DQ15 VSSQ4 DQ14 DQ13 VDDQ4 DQ12 DQ11 VSSQ3 DQ10 DQ9 VDDQ3 DQ8 VSS2 NC2 DQMH CLK CKE NC1 A11 A9 A8 A7 A6 A5 A4 VSS1 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 R915 100R 1 R1 8 2 R2 7 3 R3 6 4 R4 5 F163 VDDM MADR[7] MADR[6] MADR[5] MADR[4] C203 100n 10V
2 1 1 2 1 1

MADR[10] MADR[9] MADR[8] MADR[7] MADR[6] MADR[5] 4 3 2 1 R4 5 R3 6 R2 7 R1 8 100R R588 MDATA[15] MDATA[14] MDATA[13] MDATA[12] MADR[4] MADR[3] MADR[2] MADR[1] MADR[0] 4 3 2 1 VDD_DMQ R4 5 R3 6 R2 7 R1 8 100R R589 MDATA[11] MDATA[10] MDATA[9] MDATA[8] 3V3_VCC
1

MDATA[10] MDATA[11] VDDM MDATA[12] MDATA[13] MDATA[14] MDATA[15] VDDM R910 4k7
2

MDATA[0] MDATA[1] MDATA[2] MDATA[3]

4 3 2 1

R4 5 R3 6 R2 7 R1 8 100R R586

VDD_DMQ

3V3_VCC VDDM
2

UDM

VDDM F157
2

147 AVDD_MI_2 148 AVDD_MIPLL C213 100n 10V

MCLK

330R
2 1

MCLKE

D
LDM WEZ CASZ RASZ
1

R535 10k

R499 100R

VDD_DMC R828 100R R104 22R R105 22R R103 22R


2

14 15 16 17 18 19

R536 10k

SPI_SCK 198 R360 100R MCLK R361 100R SPI_SDI 199


2

D
2 1

SCK SDI SCZ SDO

C501 1n 50V

C193 100n 10V

UDM PIN1
2 1

SPI_SCZ 200 F162 PIN14 C208 100n 10V PIN27 VDD_DMC C461 220u 6V3
2 1

SPI_SDO 201 GND13 202 VDDC3 203

MCLKE

VDDM

60R
2

BADR[0] BADR[1]

R900 22R R927 22R

20 21 22 23

R916 100R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

C212 100n 10V

C712 100n 10V

VDDC

MADR[11] MADR[10] MADR[9] MADR[8] PIN3


1

PIN9

PIN43

PIN49 VDD_DMQ

MADR[0] MADR[1] MADR[2] MADR[3]

4 3 2 1

R4 5 R3 6 R2 7 R1 8 100R R917 VDD_DMC

24 25 26 27

60R
2

C462 220u 6V3

C189 100n 10V

C210 100n 10V

C204 100n 10V

C186 100n 10V

WARNING!!!DON'T USE VIA FOR MCLK AND

DATA SIGNALS

VESTEL PROJECT NAME : 17MB25


SCH NAME :MEMORY INTERFACE DRAWN BY :NDER GEN

A3

SHEET:6 OF:11 4-28-2008_15:57

AX M

3
MUTE_HP_R

7
12V_VCC 5V_VCC
1

8
S128 S127 S126
2

HEADPHONE AMPLIFIER

POP NOISE CIRCUIT


2

1N4148

A
F190
1 2

C624 2n2 50V

3V3_VCC VDD_AUDIO

D124

16V 100u
2 1

A
1

1N4148

D127

600R

1N4148 C503
1 2

1N4148
1 2 1

C541
2 2 1 2 2

8V_VCC C625 2n2 50V

R237 20k

C122

220p 50V

1n 50V C472 HP_R C537 2n2 50V


1 1 2

100u 16V

R212 100k

C386 10u 10V

R123 15k

D126

D125 50V 1n C540C502


1 2 1

3 2 1

JK107

1 OUTA 2 INAN 3 INAP 4 VSS

VDD 8 OUTB 7 INBN 6 INBP 5

U128 TDA1308T

F191

600R

R238 20k

C123

220p 50V

600R 100u 16V C471 MUTE_HP_L


2 1 2

MUTE_HP_R
3

BC848B Q134 BC848B Q167


1

R544 10k

C385
1 1 2

1u 16V R211 100k

220n 10V

C538 2n2 50V

AMP_MUTE

R722 10k

BC848B Q133

R729 100k

4k7 R424

HP_L

220n 10V

C350

BC848B C595 100n Q132 16V

R542 10k

R541 10k

R423 4k7

1 2

3 2

F192

AMP_EN R236 3k9

Q150 BC858B

R546 10k

9 8 7

6 5 4

C453

HP_DETECT

5V_VCC

FAULT S236 12V_AUDIO S235 24V_VCC SS33 C711 220u 35V VDD_AUDIO VDD_AUDIO D166 VDD_AUDIO

R904 10k

10u 10V

MUTE_HP_L
3

BC848B Q135
1

R545 10k

POP_MUTE

C
35V 22u ANALOG C710

POWER

POWER

C708 POWER 22u 35V C685 1u 50V POWER R894 100R 1 R1 8 2 R2 7 3 R3 6 4 R4 5 ANALOG

C684 1u 50V

R896 100R 1 R1 8

2 R2 7

3 R3 6

4 R4 5

16V 1u C702 35 34 33 32 31 30

C701 1u 16V 29 28 27 26

36

GND_6

PVCCR_2

PVCCR_1

PGNDR_2

PGNDR_1

VCLAMPR

VCLAMPL

PGNDL_2

PGNDL_1

PVCCL_2

37 C683 1u 25V R_AUDIO_N


2

GND_7 BSRN ROUTN_1 ROUTN_2 ROUTP_1 ROUTP_2 BSRP SHUTDOWN MUTE FAULT

PVCCL_1

GND_5

POWER

POWER C706 1n 50V F251


1

25

ANALOG ANALOG 24 C690 23 22 21 220n 25V

POWER 50V 1n C705 F252


1

POWER C681 1u 25V


2

GND_4 BSLN LOUTN_2 LOUTN_1 LOUTP_2

L121 10u

C697 470p 50V

C691 38 220n 25V 39 40 41

CN115 R_AUDIO_P L_AUDIO_N R_AUDIO_N L_AUDIO_P 1

C698 470p 50V

L119 10u

D
2 3 4

50R

50R F253

L118
1 2

20 19 18 17 16 15 14 13 C689 25V 220n C692 1u 16V ANALOG C699 470p 50V R897 100R 1 R1 8 2 R2 7 3 R3 6 50R

L_AUDIO_P C680 1u 25V POWER

L_AUDIO_N

L120 R_AUDIO_P C682 1u 25V POWER


2 1

F254 42 50R C707 1n 50V R895 100R 1 R1 8 2 R2 7 POWER C700 470p 50V 3 R3 6 4 R4 5 VDD_AUDIO 100k R892 C688 43 220n 25V 44 45 FAULT 46 47
2 1

10u

U150 TPA3101

LOUTP_1 BSLP AGND_2 VBYP VREG MSTR/SLV

10u C704 1n 50V POWER

C703 CLOSE TO PIN R898 100k ANALOG 100n 50V VREG 30000289 10NF ANALOG

GAIN0_1

GAIN0_2

ANALOG

AVCC_1 AGND_1 GND_1 RINN RINP LINP LINN AVCC_2

ROSC GND_2 SYNC GND_3

VREG

10k R887

VDD_AUDIO 50V 1u C687 POWER C709 22u 35V

48

GAIN1

4 R4 5

10

11

AMP_EN

R888 10k

BC848B Q166
1

ANALOG 16V S230 R890 100k 16V 1u C694 CONNECT TO C552 GND 16V 1u C695 ANALOG 1u C693 R893 100k ANALOG POWER

ANALOG

CONNECT TO C553 GND

12

VREG

16V 1u C696

S229 R891 100k

VREG

PIN 1,12,13,24,25,36 AND 37 MUST BE CONNECT TO TERMAL PAD


F

MAIN_R

VREG

MAIN_L

VESTEL PROJECT NAME : 17MB25


SCH NAME :AUDIO DRAWN BY :S.SEBNEM TAS

A3

SHEET:7 OF:11 4-28-2008_15:57

AX M

CI_D4 CI_D5 CI_D6 CI_D7 CI_CE R810 4k7 CI_A10 CI_OE CI_A11 CI_A9 CI_A8 CI_A13 CI_A14 13 14 15
1

3 37 MPEG_TS_IN_D3 MPEG_TS_IN_D4 MPEG_TS_IN_D5 MPEG_TS_IN_D6 MPEG_TS_IN_D7 3V3D_DVB


2

R851 47R 1 R1 8 2 R2 7 3 R3 6
2 1

F CN131
1 35 CI_CD 3V3D_DVB R811 4k7 36 CI_D3 2

8 42 43 44 45 46 47 48 49 16 17 50 51
1

U145

5V_VCC 12 IO3 4 VDD 5 IO4 6

R809 4k7
1 1

USB INTERFACE

F235

MPEG_TS_OUT_VALID F237

19 20 CI_A12
2 1

53 54 21 C656 15p 50V CI_A7 N.C. CI_A6 CI_A5 CI_A4 CI_A3 CI_A2 CI_A1 CI_A0 CI_D0 CI_D1 CI_D2 R864 10k 5V_VCC N.C.
1 2

1 OUT 5 IN U149 2 GND STMP2161 3 FAULT EN 4

55 22 23 24 25 26 27 28 29 30 31 32 33 34 56 57 58 59
1

CI_RST CI_WAIT R816 4k7 60 61 62 63 64 65 66 67 68


2 1

MPEG_TS_OUT_CLK

3V3D_DVB

CI_REG R795 47R MPEG_TS_IN_VALID R850 47R 1 R1 8 MPEG_TS_IN_SYNC


2

2 R2 7 3 R3 6 4 R4 5

MPEG_TS_IN_D0 MPEG_TS_IN_D1 MPEG_TS_IN_D2

1 1

5V_VCC

R862 10k R863 10k

R856 47k

2 2 2

TS_IN

TS_OUT

1 1 3

Q158 BSH103
2 3 1

R857 47k

CI_CONTROL/ DATA&ADDRESS BUS

CI 5V SWITCH CIRCUIT

TS ROUTING

Q160 BC847B

B1

C631 100n 10V


2

C645 10u 10V

CI
1 1 2

TP207

C655 15p 50V

USB_ENABLE

R815 4k7

USB

MPEG_TS_OUT_D7 R791 150R 3V3D_DVB


1 2

R813 4k7

CI_WE R812 4k7 CI_IREQ CI_PWR R814 3V3D_DVB 4k7


2 2

18

52

MPEG_TS_OUT_D4 MPEG_TS_OUT_D5 MPEG_TS_OUT_D6

R884 100k

1
USB_DIG_DM 4 38 39 40 41
1 2

USB_DIG_DP 5 6 7

USB_DIG_OCD 4 R4 5 R794 47R R844 10R R845 10R


1 1

9 10 11

3 IO2

2 GND

1 IO1

AZ099-04S

R855 47k

CI_IORD CI_IOWR MPEG_TS_OUT_SYNC MPEG_TS_OUT_D0 MPEG_TS_OUT_D1 MPEG_TS_OUT_D2 MPEG_TS_OUT_D3 CI_PWR

CI SOCKET

2
3V3D_DVB
2 1 1 1

3V3D_DVB

330R C644 10u 10V 330R


1 2 2

CN128

5V_VCC

3 4 5
CI_PWR_CTRL 3V3_VCC 12V_VCC

MPEG_TS_IN_CLK

4 5

6
SCH NAME :CI DRAWN BY :MB35 HW GROUP

1 1

MPEG_TS_IN

MPEG_TS_OUT

B4

330R
2 1 2

F236

VESTEL PROJECT NAME : 17MB25


7 8
SHEET:8 OF:11 4-28-2008_15:57
AX M

CI_PWR C632 100n 10V

A3 F E D C B A

2
CI_PWR_CTRL CI_IORD CI_IOWR CI_IREQ CI_REG CI_WE CI_OE CI_WAIT CI_RST CI_CD CI_CE 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

3
CI CONTROL SIGNALS

4
ENC_CVBS

5
1 2 3 F138 5V_VCC FUM_EN ENC_Y
1 2

7
14 13
1 2

8
U134 MT48LC4M16A2TG8E

FUM Interface R180


CN109
2 F130 5V_VCC
1 2

DVB VIDEO FILTER&AMPR461


IN1 IN2 IN3 OUT1 OUT2 OUT3 75R C124 390p 50V
2 2 1 2

SDRAM
MD15 MD14 MD13 3V3_SDRAM_DVB MD12 MD11 MD10 MD9 3V3_SDRAM_DVB MD8

MPEG_TS_OUT_D0 MPEG_TS_OUT_SYNC R434 33R R1 8 R2 7 R3 6 R4 5

1 3 5 7

R308 4k7

ENC_PR DVB_IRQ ENC_PB

12 11

R435 33R R1 8 R2 7 R3 6 R436 R4 5 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

4 6 8

330R UART0_TXD0

FUM_EN MPEG_TS_OUT_CLK DSU_TXD0 DSU_RXD0

4 5 6

U139
VCC IN4 IN5 NC1 GND OUT4 OUT5 NC2

R457 75R

DVB_CVBS 3V3_SDRAM_DVB MD0 3V3_SDRAM_DVB MD1 MD2 DVB_PR MD3 MD4 3V3_SDRAM_DVB MD5 MD6 DVB_PB MD7 3V3_SDRAM_DVB MDQM MWE MCAS MRAS MBS0 MBS1 MA10 MA0 MA1 MA2 MA3 3V3_SDRAM_DVB F137 3V3_VCC
1 2

TP121

330R

1 2 3 4

FMS6145
10 9
2

C139
1 2

UART0_RXD0
2

R406 10k

10

390p R458 50V 75R C102


1 1 2

3V3D_DVB 3V3D_DVB MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MDQM MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MCLK_SDRAM C715

R307 4k7

MPEG_TS_OUT_VALID

C278 100n 10V

2 2 1

390p R459 50V 75R C101


1 1 2

DVB_Y

RAM DATA BUS

3V3D_DVB R500 DSU_TXD0 4k7

1 2 3 4

R920 33R R1 8 R2 7 R3 6 R4 5

R921 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

R315 100R

3V3D_DVB R924 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5 1 2 3 4 R925 33R

CHEERTEK
U104 CT216T-R

TP122 TP120 R317 100R

C239 100n 10V DVB_SPDIF

C266 100n 10V

R919 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

33R R186

RAM ADDRESS BUS

10p 50V

MA12 MA11 MA9 MA8 MA7 MA6 MA5 MA4 MWE MCAS MRAS MBS0 MBS1 MA10 MA0 MA1 MA2 MA3 CI_A14 CI_A13 CI_A12 CI_A11 CI_A10 CI_A9 CI_A8 CI_A7 CI_A6 CI_A5 CI_A4 CI_A3 CI_A2 CI_A1 CI_A0

27p 50V

27MHz

C297

R443 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

R922 33R R1 8 R2 7 R3 6 R4 5 1V8D_DVB

R918 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

R926 33R

CI ADDRESS BUS

R326 1k2

R446 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

R444 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

C679 22u 16V

R450 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

R437 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

MD0 MD1 MD2 MD3 MD4 MD5 MD6 MD7 MDQM MD15 MD14 MD13 MD12 MD11 MD10 MD9 MD8 MCLK VDD33_1 VSS_1 MA12/GPOC11 MA11/GPOC10 MA9 MA8 MA7 MA6 MA5 MA4 MWE# VDD18_1 CAS# RAS# BS0 BS1/GPOC12 MA10 MA0 MA1 MA2 MA3 HA14/GPOF14 HA13/GPOF13 HA12/GPOF12 HA11/GPOF11 HA10/GPOF10 HA9/GPOF9 HA8/GPOF8 HA7/PD7/GPOF7 HA6/PD6/GPOF6 HA5/PD5/GPOF5 HA4/PD4/GPOF4 HA3/PD3/GPOF3 HA2/PD2/GPOF2 HA1/PD1/GPOF1 HA0/PD0/GPOF0

MPEG DECODER

GPG0 AVSS_3 AVO3 AVD33_3 AVO2 AVSS_2 AVO1 AVD33_2 AVO0 AVSS_1 FSADJ VREF AVD33_1 AUDIO_DAC_VMID AUDIO_DAC_L AUDIO_DAC_R GPC15/SPDIF GPA0/CLKO/PCMACK HAD8/PD0/GPOE8 HAD9/PD1/GPOE9 VDD18_2 HAD10/PD2/GPOE10 HAD11/PD3/GPOE11 HAD12/PD4/GPOE12 HAD13/PD5/GPOE13 HAD14/PD6/GPOE14 HAD15/PD7/GPOE15 HA19/VSYN/GPOF19 HA18/HSYN/GPOF18 GPA7/PWM3/PCMSD/SCXO GPA6/PWM2/PCMWS/SCXI GPA5/PWM1/PCMCLK/TX2 GPA4/PWM0/PCMACK/RX2 UART0_TX/GPOC0 UART0_RX SAR_ADC_IN1 SAR_ADC_IN0 VDD33_3 VSS_2 OSCI OSCO GPC1/COFDM_ERR GPA12/AGC_RF GPA11/AGC_IF GPA15/SDA GPA14/SCL AVSS_PLL_2 VLFQ AVD33_PLL VLFM AVSS_PLL_1 VCCA VSSA VCCAX

ENC_CVBS 3V3A_DVB ENC_PR ENC_PB 3V3A_DVB ENC_Y


1

CVBS/YPbPr Video Outputs

CN107

R923 33R 1 R1 8 2 R2 7 3 R3 6 4 R4 5

Comm.Port
162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

390p 50V

==>
27MHz VCXO

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

VDD1 DQ0 VDDQ1 DQ1 DQ2 VSSQ1 DQ3 DQ4 VDDQ2 DQ5 DQ6 VSSQ2 DQ7 VDD2 DQML WE# CAS# RAS# CS# BA0 BA1 A10 A0 A1 A2 A3 VDD3

VSS3 DQ15 VSSQ4 DQ14 DQ13 VDDQ4 DQ12 DQ11 VSSQ3 DQ10 DQ9 VDDQ3 DQ8 VSS2 NC2 DQMH CLK CKE NC1 A11 A9 A8 A7 A6 A5 A4 VSS1

54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28

3V3D_DVB DVB_RXD DVB_TXD

1V8D_DVB

1 2 3 4

R454 75R R455 75R R456 75R R462 75R

163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216

GPG1 GPG2 GPG3 GPG4/SD_PWE GPG6/MS_INS GPC13/SD/MMC_PWE GPA10/SD/MMC_WP GPB13/SD/MS_D1 GPB12/SD/MMC_DAT GPC14/SD/MMC_CLK GPB11/SD/MMC_CMD GPB15/SD/MS_D3 GPB14/SD/MS_D2 GPC2/UART1_TX/SC0CLK GPC3/UART1_RX/SC0DAT GPC5/SC0PWR GPC4/SC0RST GPA3/SC0CD GPC6/TX2/SC1CLK GPC7/RX2/SC1DAT GPC9/SC1PWR GPC8/SC1RST GPA13/SC1CD VDD18_3 GPB7/IR GPB5/DSPLYDAT GPB6/DSPLYCLK VDD33_4 GPB0/TX1/DSPLYCM0 GPB1/RX1/DSPLYCM1 GPB2/DSPLYCM2 GPB3/DSPLYCM3 GPB4/USB_DRVVBUS GPB8/USB_DRVVBUS GPB9/HSYN/KEYDET1 GPB10/VSYN/KEYDET2 HALE/GPOF20 HA17/CI1OE#/GPOF17 HA16/CI1IORD#/GPOF16 HA15/GPOF15 HWR#/CIWE# HRD#/CI0OE#/GPOF21 HWAIT/GPF22 GPF26/CI1CD# GPF24/CI0CD# GPF27/CI1CE# GPF25/CI0CE# GPF30/CI0IORD# GPF31/CIIOWR# GPA9/CI1INT# GPA8/CI0INT# GPF23/CIREG GPF29 GPF28

MDQM MCLK_SDRAM 3V3_SDRAM_DVB MA12 MA11 MA9 MA8 MA7 MA6 MA5 MA4

R198 470R

330R
2 1

3V3_SDRAM_DVB C294 10u 10V


2 1

3V3A_DVB

C245 100n 10V

C246 100n 10V

C247 100n 10V

C243 100n 10V

C678 22u 16V

3V3_SDRAM_DVB
1 2 1

C244 100n 10V

C272 100n 10V

C236 100n 10V

C237 100n 10V

1V8D_DVB C716 TP208


1

22p 50V UART0_TXD0 C717


2

100R R913

22p 50V 100R R914 UART0_RXD0


2

1M R789 X102
1 2

F135 3V3_VCC
1 2

C296

27p 50V

330R
1 2

3V3D_DVB

C269 100n 10V

100R R319

RF_AGC_DVB

16V 22u C352

3V3A_PLL_DVB C252 100n 10V

F136 3V3_VCC
1 1 2

330R TP123 R316 100R


1 1

3V3A_ADC_DVB
2

R318 100R C302


1 1 2

R320 100R SDA_TUN_DVB SCL_TUN_DVB


2

10k R348

10k C249R371 100n 10V


1

16V 22u C287

IF_AGC_DVB C248 100n 10V

C253 100n 10V

C303 3V3A_PLL_DVB 1n 50V * Layout Req. 1n 3V3A_ADC_DVB 50V


1 2

R327 1k2

R328 1k2

C250 100n 10V

C277 100n 10V

ADC_VMID VREFP VREFN VINN VINP USB_AVD18 USB_AVSS_2 USB_REF USB_DP USB_DN USB_AVSS_1 USB_AVD33 OSCO1 OSCI1 GPA2/CS2#/TX1/VSYN/PCMCLK GPA1/CS1#/RX1/HSYN/SD_CD# RESET# DSU0_TX/UART0_TX/GPD1 DSU0_RX/UART0_RX/GPD0 TSI_D7/PD7 TSI_D6/PD6 TSI_D5/PD5 TSI_D4/PD4 TSI_D3/PD3 TSI_D2/PD2 TSI_D1/PD1 TSI_D0/PD0 TSI_CLK/CLKO TSI_VLD/VSYN TSI_SYN/HSYN GPD15/TSO_D7 GPD14/TSO_D6 GPD13/TSO_D5 GPD12/TSO_D4 GPD11/TSO_D3 GPD10/TSO_D2 GPD9/TSO_D1 GPD8/FUM/TSO_D0 GPD5/FUM/TSO_CLK GPD7/FUM/TSO_VLD GPD6/FUM/TSO_SYN VDD33_2 SF_DIO/HA20/GPOD2 SF_DO/HA21/GPOD3 SF_CLK/HA22/GPOD4 SF_CS#/FCS# HAD0/GPOE0 HAD1/GPOE1 HAD2/GPOE2 HAD3/GPOE3 HAD4/GPOE4 HAD5/GPOE5 HAD6/GPOE6 HAD7/GPOE7

BC847B R762 4k7


2 2

3V3D_DVB

Q153
1

F132 3V3_VCC
1 2

330R
2 1

3V3D_DVB C288 10u 10V


2 1

3V3D_DVB

C261 100n 10V

C262 100n 10V

C260 100n 10V

C263 100n 10V

IDTV_SW

F133
1 2

C254 108 100n 107 10V 106 105 104 103 102 R325 101 5k6 100 USB_DIG_DP 99 USB_DIG_DM 98 97 96 TP163 95 TP164 94 93 R188 92 33R RESET_DVB 91 DSU_TXD0 90 DSU_RXD0 89 88 87 86 85 84 83 82 81 80 R440 79 33R 1 R1 8 78 2 R2 7 77 3 R3 6 76 R447 4 R4 5 75 33R 74 1 R1 8 73 2 R2 7 72 3 R3 6 R183 71 4 R4 5 33R 1 R1 8 70 2 R2 7 69 3 R3 6 68 67 3V3D_DVB4 R4 5 66 SF_DIO 65 SF_DO 64 SF_CLK R448 63 33R SF_CS 1 R1 8 62 CI_D0 2 R2 7 61 CI_D1 3 R3 6 60 CI_D2 R449 4 5 59 R4 33R CI_D3 1 R1 8 58 CI_D4 2 R2 7 57 CI_D5 3 R3 6 56 CI_D6 4 R4 5 55 CI_D7

3V3_VCC C265 100n 10V


2 2

330R
2 1

3V3A_DVB C289 10u 10V


2 1

C292 10u 10V

3V3D_DVB

C291 10u 10V

C273 100n 10V

C259 100n 10V

C258 100n 10V

C268 100n 10V

R375 10k C251 100n 10V

C300
1 2

SERIAL FLASH
1

SERIAL FLASH
C601 15p 50V
2 1

DVB RESET
2

47p 50V

L115

1u C619

TP124

CI DATA BUS

S214

DIGITAL_IF_P

TP153

1n 50V
2 1

TP154

SF_CS SF_DO

R190 33R 33R R182


2 1

<==

1 2 3 4

CS# SO WP# GND

VCC HOLD# SCLK SI

8 7 6 5

C274 100n 10V

U114 MX25L512

R191 33R
1

330R SF_CLK 33R R192 TP156 TP152


1 2 2

3V3_VCC

F141
1 2

C276 100n 10V

10V 100n C240

390nH
2 1

DVB_RESET
2

33R R185

1 2

1 2

C267 100n 10V

C255 100n 10V

F134 1V8_VCC
1 2

50V 22p C713

330R
2 1

1V8D_DVB C295 10u 10V


2 1

C256 100n 10V

C257 100n 10V

C264 100n 10V

C301

1n 50V
1 2

RESET_DVB
1

MPEG_TS_IN_D7 MPEG_TS_IN_D6 MPEG_TS_IN_D5 MPEG_TS_IN_D4 MPEG_TS_IN_D3 MPEG_TS_IN_D2 MPEG_TS_IN_D1 MPEG_TS_IN_D0 MPEG_TS_IN_CLK MPEG_TS_IN_VALID MPEG_TS_IN_SYNC MPEG_TS_OUT_D7 MPEG_TS_OUT_D6 MPEG_TS_OUT_D5 MPEG_TS_OUT_D4 MPEG_TS_OUT_D3 MPEG_TS_OUT_D2 MPEG_TS_OUT_D1 MPEG_TS_OUT_D0 MPEG_TS_OUT_CLK MPEG_TS_OUT_VALID MPEG_TS_OUT_SYNC

C293 10u 10V F142

S215 C714 22p 50V

DIGITAL_IF_N

R372 10k

R376 10k
1

C275 100n 10V

R373 10k

330R F140
1 2 2

1V8_VCC 3V3_VCC

SF_DIO

MPEG DEC TS OUTPUT

VESTEL PROJECT NAME : 17MB25


SCH NAME :DVB MPEG DECODER & SDRAM DRAWN BY :ULAS DERELI

A3

<==

TP155 TP141

MPEG DEC TS INPUT

C286 10u 10V

330R C285 10u 10V

SHEET:9 OF:11 4-28-2008_15:57

AX M

1
TP196 TP195 R339 4k7 R340 4k7 R341 4k7

2
A/D DIMMING SELECTION 5
2 1

5
Q155 IRF7314

7
12V_STBY

8
12V_VCC
1

!
FS104 8 7
2 1 2 1

F241
2

4
2

12V_PSU
2

1 C667 220n 25V R874 22k C659 220n 25V R873 22k
1 2

TP209

C669

D175

30V_VCC

1 3 6V3 100u
2 1

2 4 6 8 10 12 14 16
1 1

3V3_VCC

JK103

C18V

3 7A/32VDC 2 FS103
1 2

12V_PSU

2 3

6 5

C642 10u 25V

C660 220n 25V

220n 25V R882 33k

CN117

5V_VCC

FS102

R847 10R

7A/32VDC

60R

12V_STBY

Q156 FDC642P

24V_VCC

24V_VCC 6V3 100u


1 2

1 7A/32VDC

12V_INV

MECH_SWITCH

R846 10R

4
2

33k R883

1 2

R798 47R

5 7 9

C519 C506 3V3_VCC TP198 12V_STBY 5V_STBY TP202 12V_VCC TP201 12V_STBY
1 1 2

C507 5V_VCC TP199 12V_STBY


1

MOSFET_CONTROL 100n 10V R244 3k9


1

5V_VCC 5V_STBY
2 1 1

TP197

11 13 15

C668

220n 25V

12V_AUDIO TP200
1

17 19 21 23 25 27

18
1

C662C568 220n 22u 25V 16V

C567 22u 16V

2 1

100n 16V

R865 10k

R880 33k

S211

C358 10n 16V

U137 MP1583
1 2 3 4 BS IN SW GND SS EN COMP FB 8 7 6 5 R878 1k

C599
1 2

R817 4k7 C633 100n 10V


1

12V_AUDIO
2

S245

Q163 BC848B
1

12V_VCC

6 TP210 Q157 FDC642P

5n6 C518NC 50V


2

C635
1 2

3 R797 47R

20 22 24 26 28

R881 33k

TP157

12V_STBY

S227

C670 10n 16V


2

U148 MP1583
1 2 3 4 BS IN SW GND SS EN COMP FB 8 7 6 5 R886 2k
2

C677
1 2

100n 10V
1

R803 3k9

B
R866 10k
2

R790 30k

5n6 C666 50V


1 2 1

D144
1 2 1

L106
2

SS33

15u
2 1

5V_STBY C565C566 22u 22u 16V 16V


2 1

MOSFET_CONTROL

1 2

D164
1 2 1

L116
2

R854 15k

ADAPTER OPTIONS

TP211

17PW26 CONNECTOR

R818 4k7 C634 100n 10V


1

C663 C671 220n22u 25V 16V Q164 BC848B

C674 22u 16V

100n 16V

NC

SS33

15u
2 1

3V3_STBY C673C672 22u 22u 16V 16V


2 1

5V_VCC

20 18 16 14

19 17 15 13 11 9 7 5 3

3V3_VCC 3V3_VCC 12V_STBY 5V_STBY 12V_VCC U122 LM1117 12V_VCC


1 1 1

ADAPTER AND IPS15 OPTIONS

12V_STBY

S222

NC

3V3_STBY

5V_VCC 12V_STBY

17PW26 OPTIONS

C PAULO DECOUPLING CAPACITORS


F146 3V3_STBY
1 2

!
FS105 TP143
2 1

3V3_VCC
1

C5V6

C5V6 D156

D157

3V3_STBY 8V_VCC 4A/24VDC


2

D174

C436

220n 25V

R411 2k

R337 33k

10 8 6 4 2

R336 33k

R345 4k7 R344 4k7 R343 4k7 R342 4k7

C5V6

12V_AUDIO

12

3 IN
1

OUT 2 VOUT 4 C452

TP145

10u 25V

2 2

Q105 FDC642P

DIMMING BACKLIGHT_ON/OFF STBY_ON/OFF

C470 47u 16V

GND 1

330R
1

VDDP
2 1

C307 100n 10V

C408

10u 10V

R378 10k

R476 1k

R796 47R

2 1

F147 1V26_STBY
2

STBY_ON/OFF_NOT MECH_SWITCH

330R
1

VDDC
2 1

D120

C5V6

CN126

C308 100n 10V

C410

10u 10V

3 1

D
Q138 BC848B F145 3V3_STBY
1 2

17IPS17 CONNECTOR
STBY_ON/OFF

S241 MOSFET_CONTROL S243 STBY_ON/OFF_NOT

MOSFET_CONTROL

R338 4k7 C310 100n 10V


1

330R
1

AVDD_33
2 1

C306 100n 10V

C409

10u 10V

PROTECT_PANEL
3

SHORT CCT PROTECTION


BACKLIGHT_ON/OFF PANEL_VCC
2

TP236 R706 33k 10k R569


1

C636 100n 10V

Q137
1

R708 33k 10k R571

INVERTER SOCKET
1

BC848B
1

8V_VCC F169 3V3_VCC


1 2

DIMMING TP237 C664 220n 25V TP149


1

TP238 12V_INV

D135 BAW56

60R F170
1 2

E
3V3_STBY 5V_STBY

S240 S239

C637 100n 10V

C661 220n 25V

C641 10u 25V

E
TP142

CN127

5V_TUN 3V3_VCC 5V_VCC D136 BAW56


1 2

60R F171
2

C455 100u 25V 4 5 6

11

10

R565 10k

60R
2

PANEL_VCC R699 33k L110


2

1 3

F172 12V_VCC 5V_VCC


2 1 2 2

Q104 FDC642P

PROTECT

C618

220n 25V

60R

3V3_STBY

S210

4 VINB C665 220n 25V


2 1

SW 3 GND 2 FB 1

TP150

R249 200k

R705 33k 10k R568 R570 10k 33k R707 33k R709

12V_VCC

C578 22u 16V

C576 22u 16V

MP2112
5 VINA 6 EN

4u7
2 2 1

1V26_STBY C575 22u 16V


2 1

R700 33k

U144

C579 22u 16V

Q151 BC858B
3 3

1 2

R564 10k

D137 BAW56

2 1

2 3

R205 47R

NC
R124 160k 180K olacak
1 2 2

R566 33k

R702 33k

C535
1 2

Q136

R563 10k

S134

2 2

24V_VCC 12V_AUDIO
PANEL_VCC_ON/OFF
2

BC848B
1 2 2

R575 10k C309 100n 10V


1

PANEL SUPPLY SWITCH


Q139 BC848B

F222 3V3_VCC
1 2

U121 LM1117 3 IN C406 GND 1


1

1n 50V TP147
2 1

OUT 2 VOUT 4
1

R562 10k

60R 10u 10V


2

1V8_VCC R721 100R C543 100u 16V R410 47R S228

VESTEL PROJECT NAME : 17MB25


1 2

A3

SCH NAME :MB25 POWER DRAWN BY :ONDER GENC

SHEET:10 OF:11 4-28-2008_15:57

AX M

1
GND15 244
6
2 1

2
C312 100n 10V

U138 MST6WB7GQ-3
VDDC4 245 LVA4P 246

TP212

VDDC

CN103

19" TO 22" FFC OPTIONS


RX_A_3_P RX_A_3_N RX_A_CLK_P RX_A_CLK_N RX_A_2_P RX_A_2_N RX_A_1_P RX_A_1_N RX_A_0_P RX_A_0_N VDDP
2 1

RX_B_0_N RX_B_0_P RX_B_1_N RX_B_1_P RX_B_2_N RX_B_2_P

1
1

CN105
RX_B_0_N TP213
1

LVA4M 247 LVA3P 248 LVA3M 249 LVACKP 250 LVACKM 251 LVA2P 252 LVA2M 253 LVA1P 254 LVA1M 255 LVA0P 256

2 3 4 5 6 7

1 3 TP214
1

2 4 6 8 10 12 14 16 18 20 22
1

LVDS CABLE

RX_B_0_P RX_B_1_N TP215 RX_B_1_P TP216 RX_B_2_N TP217 RX_B_2_P


1 1 1

5 7 9 11 13

RX_B_CLK_N RX_B_CLK_P RX_B_3_N RX_B_3_P RX_A_0_N RX_A_0_P

8 PANEL_VCC TP220 RX_B_CLK_N TP221 RX_B_CLK_P TP222 RX_B_3_N TP223 RX_B_3_P TP224 RX_A_0_N RX_A_0_N 3 5 7 4 RX_A_0_P RX_A_0_P 6 TP225
1 1 1 1 1 1

9 10 11 12 RX_B_3_P 13 14

15 17 19 21 23 25 27

PANEL_VCC

LVA0M 257 VDDP6 258 GND16 259 LVB4P 260 LVB4M 261 LVB3P 262 LVB3M 263 LVBCKP 264 LVBCKM 265

CN108
1 2

B
S132
2

24
2

26 28 30 32 34 36

C311 100n 10V

RX_A_1_N RX_A_1_P

15 8 10 RX_A_1_P RX_A_1_P 11 13 12 14 16 RX_A_2_P RX_A_2_P 17 19 21 23 25 27 18 RX_A_CLK_N RX_A_CLK_N 20 22 24 26 28 MEGA_DCR_IN


1

10k R902 10k R901


1 2

3V3_VCC
1

3V3_VCC MEGA_DCR_OUT

16 RX_A_1_N 9 17

TP226 RX_A_1_N

29 31
1

RX_B_3_P RX_B_3_N RX_B_CLK_P RX_B_CLK_N RX_B_2_P RX_B_2_N RX_B_1_P RX_B_1_N RX_B_0_P RX_B_0_N PANEL_VCC
2 2

S133

RX_A_2_N RX_A_2_P RX_A_CLK_N RX_A_CLK_P RX_A_3_N RX_A_3_P

18 19 RX_A_2_N 20 21 22 RX_A_CLK_P 15

BACKLIGHT_ON/OFF TP235 TP234

TP227 TP233 RX_A_2_N

33
1

BACKLIGHT_ON/OFF S141

35 37 39

38
2

LVB2P 266 LVB2M 267 LVB1P 268 LVB1M 269 LVB0P 270 LVB0M 271

40 S190 42 44 46 48 50 OPTION1 OPTION2 OPTION3


2

OPTION1 OPTION2 OPTION3

23 RX_A_3_N 24

S152

RX_A_3_P
1

RX_A_CLK_P TP230 RX_A_3_N TP229 RX_A_3_P TP228

41
1

43
1

45
1

25 26
2

47 S135 49

S140 S151

29

30

27 28 29 30

PANEL_VCC

PANEL_VCC = 5V D

S191

26" TO 32" FFC OPTIONS


OPTION2 3V3_VCC 3V3_VCC OPTION1

PANEL_VCC

3V3_VCC

3V3_VCC

E
PANEL_VCC

PANEL_VCC

OPTION3

R580 10k R581 10k

PANEL VCC = 5V/12V

PANEL_VCC = 5V/12V

RX_A_CLK_P

RX_A_CLK_N

RX_A_3_P

RX_A_3_N

RX_A_2_P

RX_A_2_N

RX_A_1_P

RX_A_1_N

RX_A_0_P

RX_A_0_N

R903 10k S153

R577 10k
2

S148
1

S146
1

R582 10k
2

3V3_VCC 330R

F149

PANEL_VCC

S149
1

S150
1

S147
1

R578 10k R579 10k

330R

F148

CN102

30

29

28

27

26

25

24

23 30

22 29

21 28

20 27

19 26

18 25

17 24

16 23

15 22

14 21

13 20

12 19

11 18

10 17

9 16

8 15

7 14

6 13

5 12

4 11

3 10

2 9

CN101

VESTEL PROJECT NAME : 17MB25


SCH NAME :LVDS INTERFACE DRAWN BY :ONDER GENC

A3

SHEET:11 OF:11 4-28-2008_15:57

AX M

OO
1
1 2

SW106 SW103 CN133 F236 C632


2 1

SW104
2 1 2 1 2 1
2 1

SW105
2

SW107 R484
4
1

R118
2
3 2 1
2 2 1 1 1 2 1 2

R397 Q158 C645


3 4 3

R405
2

R243
3 4 3 4

SW101
1 1

2
8 7 6 5 8 7 6 2 2 2 5 2 2 1 1

F132

1
1 2 3 1 2 3

F248 C630 R793

D162

1 2 2 7 6 8 5 1

F249 R856 C631 R857

R707 R709 C565 R570 R705 C566

D161

F137 C272

2 1

C261 C256

1
1 2 4 2 2 1 1 1 1 5 6 7 8 2 1 2 1 1 1 1 2 1

CN130
33
1 2

R865
1
1 54
2 2 2 1 1

R568

F133

R790 R878 C518 C599 R244 C519


1 3
2 1

5 4 3
2 1 1 4 3 2 1 1 2 1

1 1
31
2 53 52 51
2
215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164

R563 R565
67 32 66
1

Q160
1 2 1

C243 C715 R315 C245 R923


4 4

1
2

F134

34

68

Q136
1

C288

C295

C289

D137
1

D136 R564 Q151 R562 C294 Q153 R326 R348 R371 C248 R436

R434

4
1
1 2 1

6 7
4
2 5 6 7 8 2

C358

2
30
216

2
64 63
1

R410 R721
65
3 5 6
4 3 2 1

R435 U104
2
2

C671

D164 S239 S240

29
49 48
1
2 3 4 5 6 7 156 155 154 153 152 151 150 149 148 147 146 145 144 8 9 10 11 12 13 14 15 16 17 18 19 157 158 159 160 161

L106

U134 R920

3
2 1

L116
50
1 2

D160

2
162
2 1 1 5 6 7

2
2

27 61
8

1
8 9
2

28
7 47 46 45 44
2 1

62

C257 1
163

C259 C273
1 2

R198 C266 C258 C239 R317 C264 R913 R914 C269 R319 C262

C674

U121

C406

R862 S228 R863 R864 R816 R815 C656 C601 R307


25
12
1

59
43 42
1 2 2 4 1 2 2 1 5 1 3 6 1 2 7 8 2 1 2 1

11

S211 C567 C568

CN126
2
1 2 2

2
2
2 1

2
24
13 14 15 16
1
21 142 141 140 138 137 136 135 139 22 23 25 26 27 28 24

C670

C663 U148
58 57
40 39 37
3 2

F250

1
1 2 1 1 2 2

1
22 21
18

1
56 55 20
20
1 2 1 2 1
30 133 132 31

1
3

C246 C236 C247 C244

4
2
2 8 7 8 2 1 1 1 2 2 2 2 1 7 6
33 130 129 128 127 34 35 36 32 131

25
1
1 2 2 1 2 1 1 2 1 1 2

26 3
1
35 34
3
29 134

D174
2

54 53
21
6 5 2 3 4 5 1 2 2 1 2 1

19
1 2

36

S222 S227

6
1 2

23
4

24 5

1
1
2 1

2
19
22 23 24 25
1
37 38 125 126

R925

33 32 31 30
8 7 1 1 6
40 41 42 43 44 45 46 47 48 49 50 51 52 53 110 111 112 113 114 115 116 117 118 119 120 121 122 123 39 124

8
2
2
1 2

21
1
1 6

22 7

F222

R818

3
2 5

R265 S241 R267 S243 R343 R608 R817 R883 R798 R882
23
17
1 2 1 1 2

41

R186

1
2 1

1 1 U137 D144 C662

2
26
10

60

R919 F
1
2

2
1
20 143

27
2

28 1

1
38

C634
1
2 1

16
26
2 2 3 4 2 5 1 2

Q163

R443

R342 D156
1 1 2 2

2
1 2

FS105

10
3
1 2

19
4

20 9

D176
2

R854
15 49
27 28

R336 C302
1 1
1 2 1 2

C543

3
1

2 1 1 2 3 4 5 6 7 8 2 1 8 7 6 5

C633

1 2
2 1

12
2 1

17
3

18 11

14 13
2 3 1 2 3 4 5 1 1 2 1 2 1 8 6 7 8 4

48 47

R924

Q164

2
2 1

R881
1

1 2 1 2 1 2 1
1

F241

C297 C303
2 2

2
1 1 4 4
97 98 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 99 100 101 102 103 104 105

55

106

C383 R355 R354

C642

2
5 2 2 3 2 6 7 2 2 1 2

F171

18
1 8

11
2 1
2 1

17 12
1
1
6 1

1
9
107

2
43
108

R437 R444

C679 2 X102 C252 F135 R320

2 3 5

3
3 2 6

C665
10 44

R308 R810 R814 R124 R811 R813 R812


2 1

16
2 2 7

13

14 15

C668 R880 C436


2 2 1 1 1
8 42
54 109

1
2
4 3 2 1 2 2

1
4 3 2 1
1

R450 R446

R702

2
3
2 2 5 6 7

R797

FS104 C660 C618

1
2
8 1 2 2 1 2 2 1 2 1 1 2 2 2 1 1

R448
1
1 1 2

C277 C301C254 C274


1

4 1 2

C265

C293

20

10 19

41

1 R190 R182
2 2

F170 Q157
3

R232R234 C529C531 S210

1 2
2 2

C263

S245

R700
1
1 1 1 1 8 3 4 2 1 7 6 5 5 6 7 5 6 7 8 8

Q126
2 1 1

1
1
1

R205

4 38
1 1 2 5 6 7 8 2 3 4 1 2 1 1 2 1 2 2 1 2 2 1

Q155

C507 C506

Q139
2

R183 R447
2

C300 R325

1
5 2

2
3 37

Q147
2 2

F162

R566
3
2

F142

2
1

C292

R345 R344 C636


4 3

R791 C655

1
5

1
1
2 1

2
2
1 2 2 2 1 1 1 2 1 1 2 2 1 2 2 1 2 1 2 1 1 2 3

R192 R191

2
36 35
4

Q168 L110 R449


2
1 2 2 1

R850
2
1
1 2 2 3 1 4

C713 C268

C291 C352 C253 C287 R316 C267R318

CN117

1
1
2

2
2 2

C575 R249 U144 R757 R274

11 1 2
1 2 2 2

R847

C637
2 2 1 1
1 1 1

R339

R341

F157 F163 F147 C579

C240

8
2 2 1 1 1 2

2
1

1 1
2

C175 C149 C178 S106 C308 R180 F140


1
2

2
1 1
1 2 2 1

R686
2 2

C276 C714 F141 C619 L115

F146 C408 R373


1 2
2
3
2 2

7
2 1 2 1 1

R846 C711 C203


2
1 1 1 1 1 1 2 1 2 1 2 2 1 2 2 2 2

C286 C275 C285

R372 R376

10

CN131

R340 U114 R440

C667 C410
1

C664 C659 R699 Q104 R851

C255

1
5 39

1
2

2
2
2

R794

C576 C578 C535


6 40

R918

S122 Q127 S121


12 11 45 46

R795

TOP

3
2

4
1
2 1 1 1 1 1 2 1 8 1 1 1 1 1 1 1 1 1 1 1 2 1 1 2 7 2 1 2 2 2 2 2 2 2 2 2 2 2 6 2 2 2 1 2 2 5 2 2 1 1 2 2 1 1 2 1 1 2

1
1 1 1 1 1 1 1 1

R571

2
2 3

FS103 R845
1
2 2 2 2 2 2 2 2

C212

R911 R908 R927R900 C368 C369 C363 C364 C361


1
1 1 1 1

R516

R517

R514

R519

R518

R357 R295 R906

C189 R353 C530 R352 R233 S123 R745

R104

CN107

Q137 R708
4

1 1 1 1 1 1 7 2 2 2 1 6 2 2 2 2 2 2 5 2 1 2 1 1 1 1 1 1 1 1 2 8

C641 C661

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

S149 S150
1
2

1
3

2 2 2

2 2
2
2 1 2 1 2 2 1 1 2 1 1 2 2 1 2 1

2 2

10

S235
1 2 1 2

1 1 2

C717 C716
3 2
1 1 2 1 2

S236
1 2 3 2 4

C201 C194 R296 S244 R271 R270

S135

S151 S140

R587
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76

R909 R915R916

S147

A
131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100

C343 C336 C338 C340 C342 C337 C339 C341


75

147

146

145

144

143

142

141

140

139

138

137

136

135

134

133

U131
148
132

C344
2 2 1 1 1 1 2

R809
2

TOP

CN127

R917

R844

C213
2 2 2 2 2 2 2 2

F237

C208 D166 R103 R105 R828 C712 C204

C202

R520

R515

R513

1
1
2

2
1
3 5 7 9

C309 R575

C307 R907

1
1 1 1

R874 R283 R873

D157

FS102
2

C455

C462

C461

S214 S215 R188 R328 R375 R327 C251 R185

R288 R268

CN128

4
4 5 6

S148

30 50
1 1 2 3 4 1 2 2

C142

49 29
2
5 4
1
150 73

C145

CN108

28 48

47 27

C510 CN109 R406 C131 C130 C129R253 R210 R500 C547 Q140 C546 C654 C467
2 2

149

74

U145

Z102
3

C148

3
2

1 5 2 1
151 72

2 2 1
152 71

26 46
1

45 25 1
1

S152
1
1
153 70 69

1 1

154

F120 F185 F184 C132 F186 R474 R473 R231

44 24
1 2

43 23
2

5 3
1

4 2
1

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

157 158 65 64 63 62 159 160 161

66

2
2

2 1

CN101

20 40
2
2

39 19

R884 R855 U149

F235

22 42
155 156 67 68

41 21

2
1

18 38
1 1 2 2

37 17

CN102

R586 C200

1
162 61

L104

16 36
163 60

35 15
164 165 166 167 168 169 170 53 54 55 56 57 58 59

5
2 1 1 2 1 1 2 2 1 2 1 2

R360 R910

C210

C676

2 4 3 2 1 1 1 1
171 172 173 50 51 52

1 2 2 2 2 1 1 2 2 1 2 1

F150
1
174 49

C198
2

Z101 R748 C447 R110 C446 C144 R683


2
2 1

26 6
175 176 177 178 179 44 180 43 45 46 47 48

25 5
1
5 6 7 8

C278

R456 R462

C643
1 8 2 1

28 8

27 7

30 10

29 9

R454 R455

12 32
1 2

31 11

C186

R589

C644

1 1

34 14

33 13

C199

R131

D145 F187

R209 F138 R594 F130

R338 R886 C310 R866 Q138 C666 C677 R803 C635

C416 C425 R512 R132


1 2 1 2 2 1 2 2 1

24 4 1
1
181 182 183 184 185 186 37 187 36 38 39 40 41 42

23 3
2 2 1

R682 R627 1
1 2 3 4 5
1 2 1

R420 R212 C350 R211


2 1

22 2

21 1

2
2 1 1 2 1 2 2

18
2 2 2 1 2 1 2 1 1
189 34

17
1 1

15
1 1
190 191 192 193 30 194 29 31 32 33

A
8
2 2 1 2 2 1 1 2 1 1 2 1 1 2

X104
2 2 1 2 1 2 1

C445

R458 C102

R361
1
195 196 197 26 25 24 23 22 27 28

R663

13 3
1 2 1 2

2
2 1 2

7 6
1
1 2 1 1 2

R119
188 35

15 14 13 12

6
1 1

3
1 1

11
2

7
8 9 10 11 12 13 14
2 2 1 2 2 1

2 8
1 2 1 2

C173

7
1
199 200 201

198

CN103 S153 R903

R367

CN105

206 207 208 15 209 14 16

17

R658
2 2 1 1 2 1

8
1

U139 C139 R457 R238 R424 C123 C471

1
1
205 18

30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

30 29 28 27 26 25 24 30 23 29 22 28 21 20 27 26 19 25 18 17 24 16 23 22 15 21 14 20 13 19 12 18 11 10 17 16 9 15 8 14 7 6 13 12 5 11 4 10 3 9 2 8 1 7 6 5 4 3 2 1

2 1

204

19

7
2

10

3
203 20

202

21

2 1 2

2
1
210 211 212 213 214 215 216 7 6 5 217 218 8 9 10 11 12 13

2
2 2 1 1 2 2 1 2 1 2 2 1 2 1 2 2 1 2 1 2 1 2 1 2 1

R293

C420 C151
2
1
1 1 2 2 1

D125
1
2

D126 S108 C101 R459


1

C386 U129
1

R896
1
1 2 1 2 1 2 1 2 1

16 R577 14 R582 12 S146 10 S190 8 S191 6 S141 4 S133 2 R901 R902 S132 L121 4
2 1 2 1 2 1 2 1 2 2 1 2 1 2

1
2 1
220 3 2 221

1 2

C491 C429
2
2 2 2 1 1

C706
219 4

R223 C549 R222 C548 R227 C553 R226 C552 R224 C550 R225 C551 R228 C555 R229 C554 R366 R365 U132 R368

C683

F149

F148

2
1 2
224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294

1
223
295

C697

F251
2 1 2 1

R581 S242 R580 S238 R905 F126


1

C700
296
1 2 2 2 1 1 2 1 2

C409

R895
1 2 2 1 2 1 2 2 2 2 1 1 2 1 2 1 1 1

1 2
1 2 3

C158 C160

C625

C177

S107 R662 C444 R661 S109 C443 S111 S110

C311

-------U138 R760
1

C306

F145

C448

C435 C427 C426 C490 C428 C433 C422 C423


1
2

R140 R147 R148 R403 R149 R141 R144 R145 CN122

R664 R655 S112 R657 R656 R649 R652 R653

C540 C502

C682 F254
4

C709

2
2 1

C707
1

CN115 C687 C688 R892


2 1

R351 C154

CN121

S102 C128

C118 F219

1
1
2 2 2 2 2 2 2 2 2

C710

R839 R838

R835 R834

R391 R390

R279 R524 C155 C176 R291R161 R287 R165 C312 R292 R162 R286 R827 R289 R275 R290 D C511 R294 R802 R801 R153 Q133 R522 R521 R689 R888 U117 R542 R675 R729 C453 R736 C488
2

R278 R722

R388 R387

1
2
2 2

C691
1
3
2 2 2 2 2 2 2 2 2 1 1

16 2
1 1 1 1 1 1 1 1 1

R254 R269

160708

F192

R395 R877

15 3
1

C385
2 2

C137

R904 Q167

L120 L118 C694


2
2 1

3
1 1 1 1 1 1 1 1

R417
1
1

14 4
1
2 2 2 2 2

1
1

3
1

2
2

48

47

46

45

44

43

42

41

40

39

38

37

C684

1 2 2 2 2 2 2 2 1

4
2
1

3
2 1

S101

R595

5 4
1 1 1 1 1 1 1

5
2 1 2 2 1 1 1 1 1 2 1 1

12
1

2
6
1

2
1

2 35 2 33 4

1
1 36 34 2 1 1 2

6 3 2
1 1 1 2 2 2 2 2 1 1 2 1

11
2
2

R773 R264

C702
2
1 2

3 5 32

7
2 1

7 8

10
3

C695 C696
6 7 30 29 31

C704

R389 R394

R386 R385

C708 Q132

12 25 1 2

U130
2

S218

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F:\MENTOR_SASELER\17mb25-1\pcb\pcb.pcb - Page 1 of 1 pages.

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F:\MENTOR_SASELER\17mb25-1\pcb\pcb.pcb - Page 1 of 1 pages.

CN119

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