Garrod, S.A.R.

D/A and A/D Converters

The Electrical Engineering Handbook
Ed. Richard C. Dorf
Boca Raton: CRC Press LLC, 2000
2000 by CRC Press LLC
32
I[A and A[I Converfers
32.1 D/A and A/D Ciicuits
D/A and A/D Conveitei Peifoimance Ciiteiia D/A Conveision
Piocesses D/A Conveitei ICs A/D Conveision Piocesses A/D
Conveitei ICs Giounding and Bypassing on D/A and A/D
ICs Selection Ciiteiia foi D/A and A/D Conveitei ICs
Dga|-o-ana|og (D/) tonerson is the piocess of conveiting digital codes into a continuous iange of analog
signals. na|og-o-Jga| (/D) tonerson is the complementaiy piocess of conveiting a continuous iange of
analog signals into digital codes. Such conveision piocesses aie necessaiy to inteiface ieal-woild systems, which
typically monitoi continuously vaiying analog signals, with digital systems that piocess, stoie, inteipiet, and
manipulate the analog values.
D/A and A/D applications have evolved fiom piedominately militaiy-diiven applications to consumei-
oiiented applications. Up to the mid-1980s, the militaiy applications deteimined the design of many D/A and
A/D devices. The militaiy applications iequiied veiy high peifoimance coupled with heimetic packaging,
iadiation haidening, shock and vibiation testing, and militaiy specifcation and iecoid keeping. Cost was of
little concein, and low powei" applications iequiied appioximately 2.8 W. The majoi applications up the mid-
1980s included militaiy iadai waining and guidance systems, digital oscilloscopes, medical imaging, infiaied
systems, and piofessional video.
The applications iequiiing D/A and A/D ciicuits in the 1990s have diffeient peifoimance ciiteiia fiom those
of eailiei yeais. In paiticulai, low powei and high speed applications aie diiving the development of D/A and
A/D ciicuits, as the devices aie used extensively in batteiy-opeiated consumei pioducts. The piedominant
applications include cellulai telephones, hand-held camcoideis, poitable computeis, and set-top cable TV
boxes. These applications geneially have low powei and long batteiy life iequiiements, and they may have high
speed and high iesolution iequiiements, as is the case with the set-top cable TV boxes.
32.1 D]A and A]D Circuits
D/A and A/D conveision ciicuits aie available as integiated ciicuits (ICs) fiom many manufactuieis. A huge
aiiay of ICs exists, consisting of not only the D/A oi A/D conveision ciicuits, but also closely ielated ciicuits
such as sample-and-hold amplifeis, analog multiplexeis, voltage-to-fiequency and fiequency-to-voltage con-
veiteis, voltage iefeiences, calibiatois, opeiation amplifeis, isolation amplifeis, instiumentation amplifeis,
active flteis, dc-to-dc conveiteis, analog inteifaces to digital signal piocessing systems, and data acquisition
subsystems. Data books fiom the IC manufactuieis contain an enoimous amount of infoimation about these
devices and theii applications to assist the design engineei.
The ICs discussed in this chaptei will be stiictly the D/A and A/D conveision ciicuits. Table 32.1 lists a small
sample of the vaiiety of the D/A and A/D conveiteis cuiiently available. The ICs usually peifoim eithei D/A
oi A/D conveision. Theie aie seiial inteiface ICs, howevei, typically foi high-peifoimance audio and digital
signal piocessing applications, that peifoim both A/D and D/A piocesses.
Susan A.R. Carrod
Purdue Inverry
2000 by CRC Press LLC
D]A and A]D Cunverter Perlurmance Criteria
The majoi factois that deteimine the quality of peifoimance of D/A and A/D conveiteis aie reso|uon, sam|ng
rae, seeJ, and |neary.
The reso|uon of a D/A ciicuit is the smallest change in the output analog signal. In an A/D system, the
iesolution is the smallest change in voltage that can be detected by the system and that can pioduce a change
in the digital code. The iesolution deteimines the total numbei of digital codes, oi quan:aon |ee|s, that will
be iecognized oi pioduced by the ciicuit.
The reso|uon of a D/A oi A/D IC is usually specifed in teims of the bits in the digital code oi in teims of
the least signifcant bit (LSB) of the system. An n-bit code allows foi 2
n
quantization levels, oi 2
n
- 1 steps
between quantization levels. As the numbei of bits incieases, the step size between quantization levels decieases,
theiefoie incieasing the accuiacy of the system when a conveision is made between an analog and digital signal.
The system iesolution can be specifed also as the voltage step size between quantization levels. Foi A/D ciicuits,
the iesolution is the smallest input voltage that is detected by the system.
The seeJ of a D/A oi A/D conveitei is deteimined by the time it takes to peifoim the conveision piocess.
Foi D/A conveiteis, the speed is specifed as the se|ng me. Foi A/D conveiteis, the speed is specifed as the
tonerson me. The settling time foi D/A conveiteis will vaiy with supply voltage and tiansition in the digital
code; thus, it is specifed in the data sheet with the appiopiiate conditions stated.
A/D conveiteis have a maximum sam|ng rae that limits the speed at which they can peifoim continuous
conveisions. The sampling iate is the numbei of times pei second that the analog signal can be sampled and
conveited into a digital code. Foi piopei A/D conveision, the minimum sampling iate must be at least two
times the highest fiequency of the analog signal being sampled to satisfy the Nyquist sampling ciiteiion. The
conveision speed and othei timing factois must be taken into consideiation to deteimine the maximum
sampling iate of an A/D conveitei. Nyquist A/D converters use a sampling iate that is slightly moie than twice
TABLE 32.1 D/A and A/D Integiated Ciicuits
Multiplying
D/A Conveitei ICs Resolution, b vs. Fixed Refeience Settling Time, s Input Data Foimat
Analog Devices AD558 8 Fixed iefeience 3 Paiallel
Analog Devices AD7524 8 Multiplying 0.400 Paiallel
Analog Devices AD390 Quad, 12 Fixed iefeience 8 Paiallel
Analog Devices AD1856 16 Fixed iefeience 1.5 Seiial
Buii-Biown DAC729 18 Fixed iefeience 8 Paiallel
DATEL DAC-HF8 8 Multiplying 0.025 Paiallel
National DAC0800 8 Multiplying 0.1 Paiallel
A/D Conveitei ICs Resolution, b Signal Inputs Conveision Speed, s Output Data Foimat
Analog Devices AD572 12 1 25 Seiial & paiallel
Buii-Biown ADC803 12 1 1.5 Paiallel
Buii-Biown ADC701 16 1 1.5 Paiallel
National ADC1005B 10 1 50 Paiallel
TI, National ADC0808 8 8 100 Paiallel
TI, National ADC0834 8 4 32 Seiial
TI TLC0820 8 1 1 Paiallel
TI TLC1540 10 11 21 Seiial
A/D and D/A Inteiface ICs Resolution, b On-Boaid Filteis Sampling Rate, kHz Data Foimat
TI TLC32040 14 Yes 19.2 (piogiammable) Seiial
TI 2914 PCM codec & fltei 8 Yes 8 Seiial
2000 by CRC Press LLC
the highest fiequency in the analog signal. Oversampling A/D converters use sampling iates of N times this
iate, wheie N typically ianges fiom 2 to 64.
Both D/A and A/D conveiteis iequiie a voltage iefeience in oidei to achieve absolute conveision accuiacy.
Some conveision ICs have inteinal voltage iefeiences, while otheis accept exteinal voltage iefeiences. Foi high-
peifoimance systems, an exteinal piecision iefeience is needed to ensuie long-teim stability, load iegulation,
and contiol ovei tempeiatuie uctuations. Exteinal piecision voltage iefeience ICs can be found in manufac-
tuieis` data books.
Measuiement accuiacy is specifed by the conveitei`s |neary. Inegra| |neary is a measuie of lineaiity ovei the
entiie conveision iange. It is often defned as the deviation fiom a stiaight line diawn between the endpoints and
thiough zeio (oi the offset value) of the conveision iange. Integial lineaiity is also iefeiied to as re|ae atturaty.
The o[[se value is the iefeience level iequiied to establish the zeio oi midpoint of the conveision iange. D[[erena|
|neary is the lineaiity between code tiansitions. Diffeiential lineaiity is a measuie of the monoonty of the
conveitei. A conveitei is said to be monotonic if incieasing input values iesult in incieasing output values.
The accuiacy and lineaiity values of a conveitei aie specifed in the data sheet in units of the LSB of the
code. The lineaiity can vaiy with tempeiatuie, so the values aie often specifed at -25C as well as ovei the
entiie tempeiatuie iange of the device.
D]A Cunversiun Prucesses
Digital codes aie typically conveited to analog voltages by assigning a voltage weight to each bit in the digital
code and then summing the voltage weights of the entiie code. A geneial D/A conveitei consists of a netwoik
of piecision iesistois, input switches, and level shifteis to activate the switches to conveit a digital code to an
analog cuiient oi voltage. D/A ICs that pioduce an analog cuiient output usually have a fastei settling time
and bettei lineaiity than those that pioduce a voltage output. When the output cuiient is available, the designei
can conveit this to a voltage thiough the selection of an appiopiiate output amplifei to achieve the necessaiy
iesponse speed foi the given application.
D/A conveiteis commonly have a fxed oi vaiiable iefeience level. The iefeience level deteimines the switching
thieshold of the piecision switches that foim a contiolled impedance netwoik, which in tuin contiols the value
of the output signal. Fixed reference D/A converters pioduce an output signal that is piopoitional to the digital
input. Multiplying D/A converters pioduce an output signal that is piopoitional to the pioduct of a vaiying
iefeience level times a digital code.
D/A conveiteis can pioduce bipolai, positive, oi negative polaiity signals. A foui-quadiant multiplying D/A
conveitei allows both the iefeience signal and the value of the binaiy code to have a positive oi negative polaiity.
The foui-quadiant multiplying D/A conveitei pioduces bipolai output signals.
D]A Cunverter ICs
Most D/A conveiteis aie designed foi geneial-puipose contiol applications. Some D/A conveiteis, howevei,
aie designed foi special applications, such as video oi giaphic outputs, high-defnition video displays, ultia
high-speed signal piocessing, digital video tape iecoiding, digital attenuatois, oi high-speed function geneiatois.
D/A conveitei ICs often include special featuies that enable them to be inteifaced easily to miciopiocessois
oi othei systems. Miciopiocessoi contiol inputs, input latches, buffeis, input iegisteis, and compatibility to
standaid logic families aie featuies that aie ieadily available in D/A ICs. In addition, the ICs usually have lasei-
tiimmed piecision iesistois to eliminate the need foi usei tiimming to achieve full-scale peifoimance.
A]D Cunversiun Prucesses
Analog signals can be conveited to digital codes by many methods, including integiation, succesive approxi-
mation, paiallel (ash) conveision, delta modulation, pulse code modulation, and sigma-delta conversion.
Two of the most common A/D conveision piocesses aie successive appioximation A/D conveision and paiallel
oi ash A/D conveision. Veiy high-iesolution digital audio oi video systems iequiie specialized A/D techniques
that often incoipoiate one of these geneial techniques as well as specialized A/D conveision piocesses. Examples
2000 by CRC Press LLC
of specialized A/D conveision techniques aie pulse code modulation (PCM), and sigma-delta conveision. PCM
is a common voice encoding scheme used not only by the audio industiy in digital audio iecoidings but also
by the telecommunications industiy foi voice encoding and multiplexing. Sigma-delta conveision is an ovei-
sampling A/D conveision wheie signals aie sampled at veiy high fiequencies. It has veiy high iesolution and
low distoition and is being used in the digital audio iecoiding industiy.
Successive appioximation A/D conveision is a technique that is commonly used in medium- to high-speed
data acquisition applications. It is one of the fastest A/D conveision techniques that iequiies a minimum amount
of ciicuitiy. The conveision times foi successive appioximation A/D conveision typically iange fiom 10 to 300
s foi 8-bit systems.
The successive appioximation A/D conveitei can appioximate the analog signal to foim an n-bit digital code
in n steps. The successive appioximation iegistei (SAR) individually compaies an analog input voltage to the
midpoint of one of n ianges to deteimine the value of one bit. This piocess is iepeated a total of n times, using
n ianges, to deteimine the n bits in the code. The compaiison is accomplished as follows: The SAR deteimines
if the analog input is above oi below the midpoint and sets the bit of the digital code accoidingly. The SAR
assigns the bits beginning with the most signifcant bit. The bit is set to a 1 if the analog input is gieatei than
the midpoint voltage, oi it is set to a 0 if it is less than the midpoint voltage. The SAR then moves to the next
bit and sets it to a 1 oi a 0 based on the iesults of compaiing the analog input with the midpoint of the next
allowed iange. Because the SAR must peifoim one appioximation foi each bit in the digital code, an n-bit code
iequiies n appioximations.
A successive appioximation A/D conveitei consists of foui functional blocks, as shown in Fig. 32.1: the SAR,
the analog compaiatoi, a D/A conveitei, and a clock.
FIGURE 32.1 Successive appioximation A/D conveitei block diagiam.
Control
Clock
Control
ShiIt
Register
Successive
Approximation
Register
(SAR)
D/A
Resistor
Ladder
Network
Analog Comparator
Analog Input Voltage
Output
Latch
Digital
Output
Code
Control
Clocking
Signals

2000 by CRC Press LLC

Paiallel oi ash A/D conveision is used in high-speed applications such as video signal piocessing, medical
imaging, and iadai detection systems. A ash A/D conveitei simultaneously compaies the input analog voltage
to 2
n
- 1 thieshold voltages to pioduce an n-bit digital code iepiesenting the analog voltage. Typical ash A/D
conveiteis with 8-bit iesolution opeiate at 20 to 100 MHz.
The functional blocks of a ash A/D conveitei aie shown in Fig. 32.2. The ciicuitiy consists of a piecision
iesistoi laddei netwoik, 2
n
- 1 analog compaiatois, and a digital piioiity encodei. The iesistoi netwoik estab-
lishes thieshold voltages foi each allowed quantization level. The analog compaiatois indicate whethei oi not
the input analog voltage is above oi below the thieshold at each level. The output of the analog compaiatois
is input to the digital piioiity encodei. The piioiity encodei pioduces the fnal digital output code that is stoied
in an output latch.
An 8-bit ash A/D conveitei iequiies 255 compaiatois. The cost of high-iesolution A/D compaiatois escalates
as the ciicuit complexity incieases and as the numbei of analog conveiteis iises by 2
n
- 1. As a low-cost
alteinative, some manufactuieis pioduce modifed ash A/D conveiteis that peifoim the A/D conveision in
two steps to ieduce the amount of ciicuitiy iequiied. These modifed ash A/D conveiteis aie also iefeiied to
as |a|[-[as| A/D conveiteis, since they peifoim only half of the conveision simultaneously.
A]D Cunverter ICs
A/D conveitei ICs can be classifed as geneial-puipose, high-speed, ash, and sampling A/D conveiteis. The
genera|-urose /D tonerers aie typically low speed and low cost, with conveision times ianging fiom 2 s
to 33 ms. A/D conveision techniques used by these devices typically include successive appioximation, tiacking,
and integiating. The geneial-puipose A/D conveiteis often have contiol signals foi simplifed miciopiocessoi
inteifacing. These ICs aie appiopiiate foi many piocess contiol, industiial, and instiumentation applications,
as well as foi enviionmental monitoiing such as seismology, oceanogiaphy, meteoiology, and pollution monitoiing.
FIGURE 32.2 Flash A/D conveitei block diagiam.
5 Volts
Analog Input Voltage
Analog Comparators
Digital
Output
Code
Analog Ground
Resistor Ladder Network
4.375 Volts
1K
1K
1K
1K
1K
1K
1K
1K
3.75 Volts
3.125 Volts
2.5 Volts
1.875 Volts
1.25 Volts
.625 Volts
C
MSB
Octal
Priority
Encoder
Output
Latch
LSB
1
2
3
4
5
6
7
B
A
2000 by CRC Press LLC
Hg|-seeJ /D tonerers have conveision times typically ianging fiom 400 ns to 3 s. The highei speed
peifoimance of these devices is achieved by using the successive appioximation technique, modifed ash
techniques, and statistically deiived A/D conveision techniques. Applications appiopiiate foi these A/D ICs
include fast Fouiiei tiansfoim (FFT) analysis, iadai digitization, medical instiumentation, and multiplexed
data acquisition. Some ICs have been manufactuied with an extiemely high degiee of lineaiity, to be appiopiiate
foi specialized applications in digital spectium analysis, vibiation analysis, geological ieseaich, sonai digitizing,
and medical imaging.
Flash A/D conveiteis have conveision times ianging typically fiom 10 to 50 ns. Flash A/D conveision
techniques enable these ICs to be used in many specialized high-speed data acquisition applications such as
TV video digitizing (encoding), iadai analysis, tiansient analysis, high-speed digital oscilloscopes, medical
ultiasound imaging, high-eneigy physics, and iobotic vision applications.
Sam|ng /D tonerers have a sample-and-hold amplifei ciicuit built into the IC. This eliminates the need
foi an exteinal sample-and-hold ciicuit. The thioughput of these A/D conveitei ICs ianges typically fiom 35
kHz to 100 MHz. The speed of the system is dependent on the A/D technique used by the sampling A/D
conveitei.
A/D conveitei ICs pioduce digital codes in a seiial oi paiallel foimat, and some ICs offei the designei both
foimats. The digital outputs aie compatible with standaid logic families to facilitate inteifacing to othei digital
systems. In addition, some A/D conveitei ICs have a built-in analog multiplexei and theiefoie can accept moie
than one analog input signal.
Pu|se toJe moJu|aon (PCM) ICs aie high-piecision A/D conveiteis. The PCM IC is often iefeied to as a
PCM toJet with both encodei and decodei functions. The encodei poition of the codec peifoims the A/D
conveision, and the decodei poition of the codec peifoims the D/A conveision. The digital code is usually
foimatted as a seiial data stieam foi ease of inteifacing to digital tiansmission and multiplexing systems.
PCM is a technique wheie an analog signal is sampled, quantized, and then encoded as a digital woid. The
PCM IC can include successive appioximation techniques oi othei techniques to accomplish the PCM encoding.
In addition, the PCM codec may employ nonlineai data compiession techniques, such as companding, if it is
necessaiy to minimize the numbei of bits in the output digital code. Companding is a logaiithmic technique
used to compiess a code to fewei bits befoie tiansmission. The inveise logaiithmic function is then used to
expand the code to its oiiginal numbei of bits befoie conveiting it to the analog signal. Companding is typically
used in telecommunications tiansmission systems to minimize data tiansmission iates without degiading the
iesolution of low-amplitude signals. Two standaidized companding techniques aie used extensively: A-law and
-law. The A-law companding is used in Euiope, wheieas the -law is used piedominantly in the U.S. and
Japan. Lineai PCM conveision is used in high-fdelity audio systems to pieseive the integiity of the audio signal
thioughout the entiie analog iange.
Dga| sgna| rotessng (DSP) techniques piovide anothei type of A/D conveision ICs. Specialized A/D
conveision such as aJae J[[erena| u|se toJe moJu|aon (ADPCM), sgma-Je|a moJu|aon, seet| su|-
|anJ entoJng, aJae reJte seet| entoJng, and seet| retognon can be accomplished thiough the use
of DSP systems. Some DSP systems iequiie analog fiont ends that employ tiaditional PCM codec ICs oi DSP
inteiface ICs. These ICs can inteiface to a digital signal piocessoi foi advanced A/D applications. Some
manufactuieis have incoipoiated DSP techniques on boaid the single-chip A/D IC, as in the case of the
DSP56ACD16 sigma-delta modulation IC by Motoiola.
Inegrang /D tonerers aie used foi conveisions that must take place ovei a long peiiod of time, such as
digital voltmetei applications oi sensoi applications such as theimocouples. The integiating A/D conveitei
pioduces a digital code that iepiesents the aveiage of the signal ovei time. Noise is ieduced by means of the
signal aveiaging, oi integiation. Dual-slope integiation is accomplished by a countei that advances while an
input voltage chaiges a capacitoi in a specifed time inteival, T. This is compaied to anothei count sequence
that advances while a iefeience voltage dischaiges acioss the same capacitoi in a time inteival, T. The iatio
of the chaiging count value to the dischaiging count value is piopoitional to the iation of the input voltage to
the iefeience voltage. Hence, the integiating conveitei piovides a digital code that is a measuie of the input
voltage aveiaged ovei time. The conveision accuiacy is independent of the capacitoi and the clock fiequency
since they affect both the chaiging and dischaiging opeiations. The chaiging peiiod, T, is selected to be the
2000 by CRC Press LLC
peiiod of the fundamental fiequency to be iejected. The maximum conveision iate is slightly less than 1/(2T)
conveisions pei second. While this limits the conveision iate to be too slow foi high-speed data acquisition
applications, it is appiopiiate foi long-duiation applications of slowly vaiying input signals.
Gruunding and Bypassing un D]A and A]D ICs
D/A and A/D conveitei ICs iequiie coiiect giounding and capacitive bypassing in oidei to opeiate accoiding
to peifoimance specifcations. The digital signals can seveiely impaii analog signals. To combat the electio-
magnetic inteifeience induced by the digital signals, the analog and digital giounds should be kept sepaiate
and should have only one common point on the ciicuit boaid. If possible, this common point should be the
connection to the powei supply.
Bypass capacitois aie iequiied at the powei connections to the IC, the iefeience signal inputs, and the analog
inputs to minimize noise that is induced by the digital signals. Each manufactuiei specifes the iecommended
bypass capacitoi locations and values in the data sheet. The 1-F tantalum capacitois aie commonly iecom-
mended, with additional high-fiequency powei supply decoupling sometimes being iecommended thiough
the use of ceiamic disc shunt capacitois. The manufactuieis` iecommendations should be followed to ensuie
piopei peifoimance.
Se!ectiun Criteria lur D]A and A]D Cunverter ICs
Hundieds of D/A and A/D conveitei ICs aie available, with piices ianging fiom a few dollais to seveial hundied
dollais each. The selection of the appiopiiate type of conveitei is based on the application iequiiements of the
system, the peifoimance iequiiements, and cost. The following issues should be consideied in oidei to select
the appiopiiate conveitei.
1. What aie the input and output iequiiements of the system: Specify all signal cuiient and voltage ianges,
logic levels, input and output impedances, digital codes, data iates, and data foimats.
2. What level of accuiacy is iequiied: Deteimine the iesolution needed thioughout the analog voltage
iange, the dynamic iesponse, the degiee of lineaiity, and the numbei of bits encoding.
3. What speed is iequiied: Deteimine the maximum analog input fiequency foi sampling in an A/D system,
the numbei of bits foi encoding each analog signal, and the iate of change of input digital codes in a
D/A system.
4. What is the opeiating enviionment of the system: Obtain infoimation on the tempeiatuie iange and
powei supply to select a conveitei that is accuiate ovei the opeiating iange.
Final selection of D/A and A/D conveitei ICs should be made by consulting manufactuieis to obtain theii
technical specifcations of the devices. Majoi manufactuieis of D/A and A/D conveiteis include Analog Devices,
Buii-Biown, DATEL, Maxim, National, Phillips Components, Piecision Monolithics, Signetics, Sony, Texas
Instiuments, Ultia Analog, and Yamaha. Infoimation on contacting these manufactuieis and otheis can be
found in an IC Maser Caa|og.
Dehning Terms
Companding: A piocess designed to minimize the tiansmission bit iate of a signal by compiessing it piioi
to tiansmission and expanding it upon ieception. It is a iudimentaiy data compiession" technique that
iequiies minimal piocessing.
Delta modulation: An A/D conveision piocess wheie the digital output code iepiesents the change, oi slope,
of the analog input signal, iathei than the absolute value of the analog input signal. A 1 indicates a iising
slope of the input signal. A 0 indicates a falling slope of the input signal. The sampling iate is dependent
on the deiivative of the signal, since a iapidly changing signal would iequiie a iapid sampling iate foi
acceptable peifoimance.
Fixed reference D/A converter: The analog output is piopoitional to a fxed (nonvaiying) iefeience signal.
2000 by CRC Press LLC
Flash A/D: The fastest A/D conveision piocess available to date, also iefeiied to as paiallel A/D conveision.
The analog signal is simultaneously evaluated by 2
n
- 1 compaiatois to pioduce an n-bit digital code in
one step. Because of the laige numbei of compaiatois iequiied, the ciicuitiy foi ash A/D conveiteis
can be veiy expensive. This technique is commonly used in digital video systems.
Integrating A/D: The analog input signal is integiated ovei time to pioduce a digital signal that iepiesents
the aiea undei the cuive, oi the integial.
Multiplying D/A: A D/A conveision piocess wheie the output signal is the pioduct of a digital code multiplied
times an analog input iefeience signal. This allows the analog iefeience signal to be scaled by a digital code.
Nyquist A/D converters: A/D conveiteis that sample analog signals that have a maximum fiequency that is
less than the Nyquist fiequency. The Nyquist fiequency is defned as one-half of the sampling fiequency.
If a signal has fiequencies above the Nyquist fiequency, a distoition called a|asng occuis. To pievent
aliasing, an ana|asng f|er with a at passband and veiy shaip ioll-off is iequiied.
Oversampling converters: A/D conveiteis that sample fiequencies at a iate much highei than the Nyquist
fiequency. Typical oveisampling iates aie 32 and 64 times the sampling iate that would be iequiied with
the Nyquist conveiteis.
Pulse code modulation (PCM): An A/D conveision piocess iequiiing thiee steps: the analog signal is sampled,
quantized, and encoded into a fxed length digital code. This technique is used in many digital voice and
audio systems. The ieveise piocess ieconstiucts an analog signal fiom the PCM code. The opeiation is
veiy similai to othei A/D techniques, but specifc PCM ciicuits aie optimized foi the paiticulai voice oi
audio application.
Sigma-delta A/D conversion: An oersam|ng A/D conveision piocess wheie the analog signal is sampled at
iates much highei (typically 64 times) than the sampling iates that would be iequiied with a Nyquist
conveitei. Sigma-delta modulatois integiate the analog signal befoie peifoiming the delta modulation.
The integial of the analog signal is encoded iathei than the change in the analog signal, as is the case
foi tiaditional delta modulation. A digital sample iate ieduction fltei (also called a digital decimation
fltei) is used to piovide an output sampling iate at twice the Nyquist fiequency of the signal. The oveiall
iesult of oveisampling and digital sample iate ieduction is gieatei iesolution and less distoition compaied
to a Nyquist conveitei piocess.
Successive approximation: An A/D conveision piocess that systematically evaluates the analog signal in n
steps to pioduce an n-bit digital code. The analog signal is successively compaied to deteimine the digital
code, beginning with the deteimination of the most signifcant bit of the code.
Re!ated Tupic
15.1 Coding, Tiansmission, and Stoiage
Relerences
Analog Devices, na|og Detes Daa Conerson ProJuts Daa Boo|, Noiwood, Mass.: Analog Devices, Inc.,
1989.
Buii-Biown, Burr-Brown InegraeJ Crtus Daa Boo|, Tucson, Aiiz.: Buii-Biown, 1989.
DATEL, DTEL Daa Conerson Caa|og, Mansfeld, Mass.: DATEL, Inc., 1988.
W. Diachlei, and M. Bill, New high-speed, low-powei data-acquistion ICs," na|og Da|ogue, vol. 29, no. 2,
pp. 3-6, Noiwood, Mass.: Analog Devices, Inc., 1995.
S. Gaiiod and R. Boins, Dga| Logt. na|yss, |taon anJ Desgn, Philadelphia, Pa.: Saundeis College
Publishing, 1991, Chap. 16.
J.M. Jacob, InJusra| Conro| E|etronts, Englewood Cliffs, N.J.: Pientice-Hall, 1989, Chap. 6.
B. Keisei and E. Stiange, Dga| Te|a|ony anJ Newor| Inegraon, 2nd ed., New Yoik: Van Nostiand Reinhold,
1995.
Motoiola, Mooro|a Te|etommuntaons Daa Boo|, Phoenix, Aiiz.: Motoiola, Inc., 1989.
National Semiconductoi, Naona| SemtonJutor Daa tquson Lnear Detes Daa Boo|, Santa Claia, Calif.:
National Semiconductoi Coip., 1989.
2000 by CRC Press LLC
S. Paik, Prnt|es o[ Sgma-De|a MoJu|aon [or na|og-o-Dga| Conerers, Phoenix, Aiiz.: Motoiola, Inc.,
1990.
Texas Instiuments, Texas Insrumens Dga| Sgna| Protessng |taons w| |e TMSJ20 Fam|y, Dallas,
Tex.: Texas Instiuments, 1986.
Texas Instiuments, 1989. Texas Insrumens Lnear Crtus Daa tquson anJ Conerson Daa Boo|, Dallas,
Tex.: Texas Instiuments, 1989.
Further Inlurmatiun
Analog Devices, Inc. has edited oi published seveial technical handbooks to assist design engineeis with theii
data acquisition system iequiiements. These iefeiences should be consulted foi extensive technical infoimation
and depth. The publications include na|og-Dga| Conerson HanJ|oo|, by the engineeiing staff of Analog
Devices, published by Pientice-Hall, Englewood Cliffs, N.J., 1986; Non|near Crtus HanJ|oo|, TransJuter
Iner[atng HanJ|oo|, and Synt|ro anJ Reso|er Conerson, all published by Analog Devices Inc., Noiwood,
Mass.
Engineeiing tiade jouinals and design publications often have aiticles desciibing iecent A/D and D/A ciicuits
and theii applications. These publications include EDN Maga:ne, EE Tmes, and IEEE Setrum. Reseaich-
ielated topics aie coveied in IEEE Transatons on Crtus anJ Sysems, and also the IEEE Transatons on
Insrumenaon anJ Measuremen.