RMIT University

School of Electrical and Computer Engineering Electronic circuit (EEET2097) Assignment #2

Lecturer: James Scott

Group members: Students Names: Shuai Liu Students Names: Zar Chi Myint Soe Students Numbers: 3340909 Students Numbers: 3350595

Figure 1 Push-pull MOSFET power amplifier circuit Part 1 First we know from the question that these two MOSFETs are matched, the circuit is in symmetrical situation which is , and , so when Vin=0V, we can assume that there is no output voltage or current. The current just goes from the bottom all the way to the top.

Now, we can treat the Source terminal as the common point (ground). Then we can work out the VGS,P, VGS,N, VDS,P and VDS,N.

Because of we can simply get ( )(

, so both transistors are in the saturation mode, then from the formula which is ) ( ) .

and we can use the same way to work out

So it can be proved that there is no output.

Figure 2 showing the drain current direction for both MOSFET at bias point From above calculation, we can easily define this circuit is a class AB power amplifier based on there is current flow through the circuit without putting the input signal.

Part 2 Now, we need to keep both transistors in saturation mode to work out the limitation of the Vout. First, we start with the N-type: From the formula: , we know: Simplify it, we can get So Which is same as

When , we firstly assume the P-type MOSFET is switched off. So the current go through the N-type MOSFET will all go across the load resistor.

Use the formula in the saturation mode be written as ( )(

( )( ) ------- (1) ( ) and

) which also can

From the circuit we know that So plug (2) and (3) to (1), we can get the

( )

Note: we actually get two results from the quadratic equation, but the one has been removed is not suitable for the situation. It can be easily proved that the Vout based on that one is even bigger than the VSS.

Figure 3 The drain current direction at Vmax

Then, we consider the P-type: , then ( )

So

which can prove that the p-type MOSFET has been switched off.

Note: if u assume there is current go through the P-type MOSFET, it will cause the Vout smaller than 2.972, hence the , so p-type MOSFET is definitely switched off.

Finally, because of the symmetry of these circuit and also the MOSFET, we can use the same method to get the Part3 ( ) where and f=1kHz so ( mode for both transistors and ( ( )) ) ( ) which is the maximum input to be in saturation

Hence we get the sine wave output with peak voltage is 2.972V, we can get: ( ) ( )

To calculate the power dissipation on the two transistors, we can do it based on circuit on the bias point:

Because the symmetry, we can get:

So the total power dissipation on two transistors is:

Then, we just add dissipation power and output power to get the total DC input power:

Finally, the efficiency should be:

Pspice simulation Part 1

Figure 4 the push pull MOSFET amplifier at bias point on Pspice The above figure 4 shows the drain current of NMOS and PMOS which are the same at bias point that means no current is flow through the load. The figure below represents the simulation of VGS and VDS of both MOSFET at bias point.

Figure 5 simulations of VGS and VDS on Pspice

Part 2

Figure 5 simulations of Vin,max and Vout,max on Pspice

Figure 6 the drain current of PMOS is conducting while NMOS is turned off and vice versa

Figure 7 The power dissipation of each MOSFET

Figure 8 Simulation for the power dissipation in the load resistor To get the power dissipation in the load on Pspice, we use the formula RMS(V(out))*RMS(I(R1)).