PhasorMeasurementUnit

Project7
ECE445Spring2013
FinalReport
KentaKirihara,BogdanPinte,AndyYoon
TA:JustineFortier
May1,2013
1
TableofContents
1. Introduction 3
2. Design
2.1BlockDiagram 4
2.2BlockDescriptions 5
2.3PreliminarySimulationsforAC/DCConverterandVoltageDividerCircuit 6
2.4GPSSimulation 8
2.5NILabVIEWProgramming 10
3. RequirementsandVerification
3.1TestingProcedures 13
3.2QuantitativeResults 16
3.3DiscussionofResults 17
3.4ToleranceAnalysis 18
4. Cost/Schedule
4.1Labor 18
4.2Parts 18
4.3TotalProjectCost 19
5. Conclusion
5.1Accomplishments 19
5.2Uncertainties 20
5.3EthicalConsideration 20
5.4FutureWork/Alternatives 21
6. References 21
7. Appendix 22
2
1INTRODUCTION
ACpowergridsproposecomplexitywhendistributing.PhasorMeasurementUnits(PMUs)are
deviceswhichmeasurethevoltagetomonitorthestateofthegrid.
ExistingPMUshaveproventobecostlyandspaceconsumingdevices.Oneofthereasonsfor
thehighcostandlargesizeisduetotheirabilitytotakethreephasemeasurements.Anotherfactor
comesfromthefactthatexistingPMUsaremadetobecompatiblewithrelaystobeableto
automaticallycorrectforerrorswithinthegrid.
Thisproject,however,focusesonbuildingaunitthatcanbemoreeconomicalandcompact,
withfunctionalityoptimizationinsteadofthreephasemeasurements,byimplementingonlyonephase
voltagemeasurement,theimportantfunctionalityofthePMUisnotcompromisedwhilekeepingthecost
low.
Withlowerpriceandmorecompactsize,thedistributionofPMUsacrosstheU.S.powergrid
cangreatlyincrease.Ultimately,relevantindustrieswillbeabletomonitorthestatusofthegrid,
potentiallyincreasingitsstability.
MostusefuldatacollectedbythePMUwillbewhatiscalledasynchrophasordata.A
synchrophasorisdefinedasthemagnitudeandangleofasinusoidalfunctionasreferencedtoan
absolutepointintime.Thiscanbetakenbyhavinganabsoluteclockreferenceforalldevices.Thereare
threemeasurementsthataretakenateachsynchrophasormeasurement:magnitude,phase,and
frequency.Thedifferenceinwavemagnitudesatdifferentpointsdownthetransmissionanddistribution
systemindicateslossesthedifferenceinfrequencyindicatesinstabilityandthephasedifference
betweenvoltagewaveswithrespecttoanabsolutepointintimeindicatespowertransfer:thereisa
breakdownvaluewhichthephasedifferencemustnotreachinordertokeepthesystemstable.
Thus,thisprojecthasalargeimpactontheadvancementofpowergrids.Realtimemonitoring
ofthestateonthepowergridwillenableavoidanceofblackouts.Theabilitytobedeployed
worldwideduetocostandsizebenefitswillnotonlyadvancethegridintheUnitedStates,butinthe
othercountriesaswell.
ThefunctionofthisparticularPMUisasfollows:samplevoltageatarateof50kHzandreport
frequency,magnitude,andphaseatarateof10framespersecondtoawebserverfromthesampled
3
voltage.ThegoalwastoproduceaPMUcostinglessthan$14000,whichisthecostoftheexisting
PMUs.
Bylimitingfunctionality,thepriceofthePMUcanbegreatlyreduced.Table1showsa
comparisonofexistingPMUsandthePMUbuiltinthisproject.
Table1.PMUComparison[1]
CurrentPMUs OurPMU
Price $10,000$15,000 ~$1,500
Sample 3phasevoltage,3phasecurrent 1phasevoltage
Build Incorporatedintoprotectiverelays
andotherdevices
standaloneproduct
Location Substations SelectedHouseholds
Asshown,thepriceofthePMUproducedhereisamagnitudelowerthantheexistingPMU.
TheprimaryreasonforthisisbyunincorporatingtheprotectiverelaysandPMU.SincethisPMUis
incorporatedintothedistributionlevel,meaninghousehold,thenecessityofimplementingarelayislow
circuitbreakersareineachhouseholdalready.
2DESIGN
2.1BlockDiagram
Figure1showstheblockdiagramoftheoriginaldesignforthePMU.
Figure1.OriginalDesignBlockDiagram
4
DuetosomedifficultieswiththeconfigurationofthesbRIO9632,however,themicrocontrollerhadto
bechangedtoanothermodelwhichledtominordesignchanges.Theblockdiagramforthemodified
designisshowninFigure2.
Figure2.ModifiedDesignBlockDiagram
2.2BlockDescriptions(ModifiedDesign)
2.2.1WallOutlet
Anywalloutletisaviablesourceofdatasampling.Itwillconnecttoatransformerviamodified
NEMA515(ACpowerplugs).
2.2.2VoltageDividerCircuit
Tworesistorswillbeusedtostepdownthewallvoltagetoavoltagethatcanbesampledfrom
thecompactRIO.Desiredtransformerwillstepdown120VRMSto5VRMS.
2.2.3Transformer
Atransformerwillbeusedforthepurposeofsteppingdownthewallvoltagefrom120VRMSto
22VRMStoactasaninputfortheAC/DCconverter.
2.2.4GPS
TheGPSwilloutputNationalMaritimeElectronicsAssociation(NMEA)GPRMCdata
sentence,alongwitha5Vpulseeachsecond.BothdatawillbeinputstothecompactRIO.
5
2.2.5cRIO(CompactReconfigurableI/O)
CRIOwilltakeGPSdata,GPSpulse,andsteppeddownwallvoltagetocalculateRMSvalue,
frequency,andphasewithprecisetimestamp.Thedatawillbeoutputasatextfile.Servessame
functionalitytothatofsbRIO9632exceptthecRIOisbiggerinsize,heavier,andabout$5000more
expensivethanthesbRIO9632(sbRIOis$900).
2.2.6WebServer
DatageneratedfromthecRIOwillbeuploadedtoawebserver.Thiswillallowforthedatato
beobservedfromanywhere.
2.2.7AC/DCConverter
Thisblockwillconvert22VRMSfromatransformertoa24VDC.
2.3PreliminarySimulationResultsforAC/DCConverterandVoltageDividerCircuit

Figure3.PowerSupply
Therearetwopartstothepowersupply.TheV_SampleandV_FPGA.Eachcomponentwas
calculatedoutwithcertainrequirements.
V_FPGAistheconstraintforthemainpartofthedesign.V_FPGAisvoltagegoingtothe
sbRIOorcRIOandisnottheactualvoltagethatgoesintotheFPGAchip.Initially,thevoltageatthe
FPGAwaschosenas24V.Sinceat60Hz,capacitivefilteringwouldrequireaverylargecapacitorfora
trueripplelessvoltage,a4.7mFcapacitorwasdecidedtobeusedalongsidewiththeUA7824voltage
regulator.Bydoingthis,theV_rippleisfoundtobefairlylarge,asshownin(1),butsmallenoughfor
6
thisapplication.Fromthelinearregulatorspecification[2],thelinearregulatorinputcanbefoundby(2)
withtheconstraintof(3)and(4).Thecalculationin(2)assumesthevoltagedropof1N4001as0.6V
each[3].
59V V
ripple
=
2f C
I
load
=
P
2Vf C
=
7.75
2 24 4700 10
* * *
6
= . (1)
.2 V
regin
= V
secondary
1
2
V
ripple
(2)
7V 27V < V
regin
< 3 (3)
5V V
regin
= V
cap
< 3 (4)
Usingtheseproperties,theV_secondaryissolvedforasarangein(5).
1.5V 30.9V < V
secondary
< 3 (5)
Fromthiscalculatedresult,V_secondaryischosenas31Vtosolveforthetransformerturnsratioas
11:2.
FortheV_Sample,atfirst,itwasproposedthatastepdowntransformerwouldbeanelegant
solutiontostepdownthewallvoltage.However,itwasdeterminedthattransformersnotonlyare
bulky,costly,andheavy,butalsocouldproducevaryinglossesiftherearevariationsinwallRMS
voltageorwallfrequency.
Therefore,itwasdeducedthatusingasimplevoltagedividerrulecouldprovetobeamore
elegantsolutionbecauseitislesscostly,smaller,andlighter.V_SampleinFigure3showstheproposed
circuit.
Sincetherangeofwallvoltagearegivenas112~128V
RMS
andsbRIOanaloginputislimited
byarangeof10~10V[4],calculationsweredonetofindtheappropriateratiofortworesistorsused
inthevoltagedividercircuit.NotethatR
2
istheresistorwiththevoltagethatwillbesampledbythe
cRIO.
7
(6)
(7)
Asaresult,itwascalculatedthattheratioforthevoltagedividercircuitshouldbelessthan0.055243.
Then,choosing5MforR
1
,itcanbeconcludedthatR
2
shouldhaveavalueof276katmost.
FurthercalculationscanbedonetoprovethatpowerdissipatedinR
1
willbeverysmallaswell.
Using128V
RMS
(higherlimit)forwallvoltageand276kforR
2
,itcanbecalculatedthatpowerlost
throughR
1
isatmostshown
(8)
Itisconcludedthatstandardquarterwattresistorsaresufficientforthecircuit.
Figure4showsthesimulationresults.TheresultsshowthatV_FPGAisstableat24V,and
V_Sampleisanundistortedsinewave.Thiswouldpowertheboardandallowsamplingtobemade.
Figure4.Simulationresults
2.4GPSSimulation
TheGarmin18xLVCprovidestiminginformationthatenablesdatasynchronizationforthe
8
project.AsampleoftheGPS1pulsepersecondsignalisshownintheoscilloscopescreenshotat
Figure5.Thesignalhighis5Vandlowis0V.Thedistinctpulseleadingedgemarksthestartofeach
secondaccurateupto1s.AsampleoftheNationalMaritimeElectronicsAssociation(NMEA)
standardsentenceGPRMCisshowninFigure6,whichprovidestheexactdateandtimestamp.
ThesetwoformthetimereferenceforthePMU.
Figure5.GPSPulseSignal
Figure6.GPSDataSentenceforDateandTime[5]
Alternativemethodcouldbetouseanatomicclockradioreceiver,sincetheatomicclockradioreceiver
isproventobemorestableundervariousweatherconditionscomparedtotheGPSreceiver.
9
2.5NILabVIEWProgramming
2.5.1GeneralFunctionality
WhenthePMUisfirstpluggedintothewall,thePMUwillwaitfortheGPSpulse,whichis
transmittedeverysecond.Whenthepulseisdetected,thecRIOcollectsvoltagedataandinsertsthe
datainaFIFO,whichisatypeofdatastoragestructure.Then,every0.1second,thecollecteddatais
extractedfromtheFIFOandavoltagewaveformisbuilt.Fromthebuiltwaveform,frequency,phase,
andRMSvoltagedataiscalculatedanduploadedtothewebserver.
2.5.2ControlVI
Figure7showsthecodewrittenforthesbRIO.ThisVIcontrols2subVIs:FPGAVIandGPS
VI.ControlVIcontrolstheoveralloperationforthePMU.IttakesdatareadbyFPGAsubVIalong
withGPSsubVItocalculatefrequency,RMSvoltage,andphaseofthewaveformandoutputscorrect
datawithprecisetimestamp.Timestampdatacollectedeverysecondisdividedinto6partsandare
assignedtocorrespondinggroupofvoltagemeasurementsandcalculations.Inthissimulation,calculated
dataisoutputaswaveformeachtimetheFIFOfillsup,asshowninFigure11.LEDandwebserver
controlwillbeaddedtothismainVI.Figure11isshownonthenextpage.
10
Figure7.ControlVI
11
2.5.3FPGAsubVI
FPGAsubVIisoperatedbycontrolVItocollectdataatthestartofpulsegivenbytheGPS.
CollecteddatapointsareputintoaFIFOforcontrolVItoutilize.
Figure8.FPGAsubVI
2.5.4GPSsubVI
ThissubVIcollectsGPSsentenceinastringformandoutputsyear,month,date,andtimeexact
toasecond.TheoutputisusedbythecontrolVItostamptimetoacquiredvoltagedata.
Figure9.GPSsubVI
2.5.5WebServer
AspareLinuxmachinerunningDebianwassetupasanApachewebserverthatcanbe
accessedatpmu.ece.illinois.edu.FTP(FileTransferProtocol)methodwasusedtoaccessthe
webserverfromthecRIO.TheLabVIEWcodeusedtodothisisshowninFigure10.ItusestheFTP
putbuffer.vifunctioninLabVIEW.
12
Figure10.WebServerAccessLabVIEWCode
3RequirementsandVerification
3.1TestingProcedures
Requirements Verification
WallOutlet
1. Sinusoidalvoltagewavewith120V
RMS
6.667%providedbytheutility
company.
1. Testedusingavoltageprobeandan
oscilloscope.
GPS
1. Itmustaccuratelygenerateasquare
wavewitharisingedgeatthebeginning
ofeachsecond.Thepulsehas5+0.6
V
DC
.
2. Therisingedgerepresentsthebeginning
ofeachsecondandisaccuratetowithin
1saccordingtoitsspecifications.The
accuracytakesintoaccounttheeffectsof
risetime.
1. TheGPSsignalwillbeverifiedusingan
oscilloscope
2. Theaccuracywillnotbetestedsincethe
specificationsareassumedtobetrue.
CompactRIO
1. TheFPGAinsidethecRIOmultipliesthe
analoginputbythetransformerstep
downconversionfactor.
1.
a. Programmaticallymultiplythe
analogsignalbythetransformer
conversionfactor
b. Plottheresultingwaveformin
LabVIEW
c. CalculateitsRMSvalue
d. Itmustbewithin48mVofthe
13
2. Writecodetocalculatethefrequencyof
thevoltagewave.
3. Thevoltagewavewillthenbesampled
andeachpointwillbetimestamped
usingtheGPSsignal.
4. Ittransmitsdatatoawebserver
wallvoltage.
2. Theresultingfrequencymustbethesame
asthefrequencyofthewavedisplayed
ontheoscilloscope.
3.
a. Displaytimestampeddata
b. Comparetimestampwithofficial
time
c. Checktheaccuracytobewithin
1us.
4.
a. Writecodetotransmitdatatoa
server
b. Testthecodebygivingitdatato
storeonline
c. Checkthewebservertomake
suredatawassuccessfullystored
WebServer
1. Continuouslyreceiveddatafromthe
cRIO,aslongascRIOispoweredon
andnoerrorinthecodeappear
1.
a. Turneverythingon
b. Checkthewebservertoseeif
dataisstoredonthewebsite
c. Introduceanerrorbyremoving
theGPSsignal
d. Checkthewebservertomake
surenodataisstoredwiththe
GPSsignalmissing.
AC/DC
1. TheAC/DCconverteruseswallvoltage
topowerthecRIOandGPSunit,
thereforeitmustbedesignedtooperate
overtheentirewallvoltagerange.
1.
a. Powertheconverterusing112
V
RMS
b. MeasuretheconverterDC
voltageusinganoscilloscope
14
2. cRIOinputvoltagefromconvertermust
be25VDCwitharipplelessthan20mV
andcurrentof0.31Awitharippleof25
mA
3. GPSmustbepoweredbythecRIO
USBport
c. Itmustbe25VDC+20mV
d. Incrementthevoltageintothe
converterby1V
RMS
.
e. MeasuretheconverterDC
voltage
f. Itmustbe25V
DC
+20mV
g. Repeatstepsd.ande.until128
V
RMS
isattheinputofthe
converter
h. Asteadyconverteroutputover
theentireinputvoltagerangewill
verifyitscorrectoperation
2.
a. Adda70ohmloadattheoutput
oftheAC/DCconverter.This
willdraw0.36A,whichisover
therequiredlimitof0.31A.
b. Measurethevoltageandits
rippleusinganoscilloscope
c. Checkifvoltageiswithin
requiredlimits
d. Measurecurrentintotheload
usinganoscilloscope
e. Checkcurrenttomakesureitis
0.36A
f. Letitrunningforhalfanhour
g. Voltageandcurrentvaluesand
ripplesmustnotchangevalue
overtime
h. Makesurecomponentsdonot
meltorbecomehotwhile
operatingforalongperiodof
time
3.
a. PlugtheGPSintotheUSBport
ofthecRIOandverifythatthe
pulsesignalispresent
15
3.2QuantitativeResults
3.2.1AC/DCConverterandVoltageDivider
Figure11showstheDCvoltagereceivedfromtheAC/DCconverteroutput.Thevoltageis
steadyandconstantat24.2Vwith400mVripplehowever,thisrippleiscausedbynoiseintheprobe
itself,andtheconvertersuccessfullypoweredtheboard.Also,whenthecircuitwasbuiltandtestedwith
R
1
andR
2
valuesof5Mand256kforthevoltagedividercircuitrespectively,resultasshownin
Figure12wasobtained:itisverifiedthatwitharmswallvoltageof123V,outputofthevoltagedivider
circuitiswithintherangeof10Vto10V.

Figure11:V_FPGA Figure12:V_Sample(ch2)
3.2.2Webserver
Figure13.Webserversnapshot
16
TheGPStakesafewsecondstocalibrate,thereforethefirstsetofdatawillnothaveaccuratetime
stamps.ThiscanbeseenindataabovethehorizontallineofFigure13.OncetheGPScalibrates,the
cRIOsuccessfullysends10samplespersecondtothewebserver.Thisisillustratedbythedatabelow
thehorizontallineofFigure13.
3.3DiscussionofResults
ThetimestampobtainedfromtheGPSwasverifiedbyusingtheinternettochecktheofficial
UTCtime.Asaresult,thetwotimeswereobservedtoagreecompletely.TheRMSvoltagecalculated
bythecRIOwasalsosuccessfullyverifiedbyusingamultimeteronthewallvoltage.
ThefrequencyofthevoltagecalculatedbythecRIOwasverifiedbycomparingittothe
frequencyofthevoltagebeingdisplayedonanoscilloscopethefrequencieswerethesame.
Furthermore,thecRIOallowedforamoreprecisemeasurementoffrequencybecauseitdisplayed
moresignificantdigitswhencomparedtotheoscilloscope.
Figures14through16showthewaveformsobtainedbyplottingthedatageneratedbythe
cRIO.
Figure14.VoltageWaveformfromcRIOData
Figure15.CalculatedVoltageFrequency Figure16.CalculatedVoltagePhase
17
Sincethefrequencyofthevoltageishigherthan60Hz,asillustratedinFigure15,thefirst6cyclestake
alittlelessthanatenthofasecondtocompletethisisillustratedinFigure14andgivesrisetoaphase.
Inotherwords,thephasewouldbezeroifthefrequencywasexactly60Hz.
3.4ToleranceAnalysis
TheNationalElectricalCode(NEC)saysthestandardforthewallvoltageis120V5%.This
givesarangeof114Vto126V.However,inordertoaccommodateoutliers,wewilldesignour
powerconvertertooperatefromavoltagesourcerangeof112Vto128V.ThesbRIO9632user
guidedictatesthatthepowersupplyripplemustbelessthan20mV.
SincethereisastepdownofvoltagefromthewalloutlettotheanaloginputoftheFPGA,an
errorfactornaturallyexist.Theaccuracyofthevoltagemeasurementisessential.However,sincethe
FPGAisaccurateupto6220Vatthehighestvoltagerange(10Vto10V),thiswouldmeanthatthe
FPGAcantheoreticallybeaccurateupto0.06%.Tobringtheerrorfactortolowaspossible,an
AgilentTechnologiesoscilloscopewillbeusedtomakesurethatthisvoltageisaccurateupto0.1%.
4Cost
4.1Labor
Name Rate Hours Total Totalx2.5
AndyYoon $40/hr 100 $4,000 $10,000
BogdanPinte $40/hr 100 $4,00 $10,000
KentaKirihara $40/hr 100 $4,000 $10,000
Total:$30,000
4.2Parts
Description Manufacturer Vendor Cost/Unit # TotalCost
cRIO9225+2analog
modules
National
Instruments
National
Instruments
$6795 1 $0
(Donated)
18
LinearRegulator
UA7824
Texas
Instruments
Digikey $0.91 1 $0.91
MetallicBase Menards Menards $3.26 1d $3.26
Capacitor
UVZ1H472MRD
Nichicon Digikey $3.07 1 $3.07
PCB ECEMachine
Shop
ECEMachine
Shop
$40.00 1 $0(Donated)
Diode
1N4007
VishayS.D.D. Digikey $0.43 4 $0
(University)
5PortEthernetSwitch Linksys ECESore $35.33 1 $35.33
STANCORP8180
Transformer
STANCOR ECEStore $13.23 1 $13.23
VariousElectrical
cables
Tensility
International
Corp.
ECEStore $5.00 1 $5.00
GPS18xLVC Garmin gpscity $60.00 1 $0
(donated)
4.3TotalProjectCost
TotalLaborCost TotalPartsCost TotalProjectCost
$30,000 $60.8 $30,060.8
*Totalprojectcostistobe$36,956.2(countingdonatedandexistingparts)
*IfthesbRIOisusedasfirstintended,thetotalpartscostwillbe$31,061.2
5Conclusion
5.1Accomplishments
Insummary,theprojectwasasuccessinmanyways.NotonlydoesthePhasorMeasurement
Unitsuccessfullysampledataat50kHZasintended,correctfrequency,phase,andvoltagedatawere
alsocalculatedanduploadedtothewebserver.
19
5.2Uncertainties
Whenthetransformerwasacquiredandtestedforfunctionality,thesecondaryvoltagewas
higherthanwhatitsspecificationhadstated,whichwastoohighhighforthelinearregulator.However,
afterrectifyingandfilteringthetransformeroutputwithdiodesandcapacitors,respectively,thevoltage
wassufficientforthelinearregulator.
AnotherproblemthegrouphasencounteredwasfromthesbRIO9632.Whentheboardwas
firstacquired,configurationproblemspersisted.Atfirst,itwassuspectedthesoftwareonthecomputer
thatisusedtoconfiguretheboardhadproblems.However,uponreceivinghelpfromnotonlyNational
Instrumentssupportengineers,butalsoanothergroupthathashadsuccessinconfiguringtheirboard,it
wasdeterminedthattheproblemexistedintheboarditself.However,whenanotherboardwas
acquiredandtestedfor,sameproblemexisted.
Lastly,thesoftwareranintoabufferoverflowproblems.SinceaFIFOisutilizedinthesoftware
portionofthePMU,therateofdataextractedfromFIFOmustbeequaltotherateofdatainsertedto
theFIFO.Iftheextractionrateisfasterthantheinsertionrate,bufferunderflowwillhappen.Ifthe
extractionrateisslowerthantheinsertionrate,FIFOwillbecomefullandbufferwillbeoverflowed.
Thebufferoverflowproblemdidnotexistwithoutthewebserverimplementation.However,withthe
codetouploadthedatatothewebserver,theextractionofdataseemedtodelaywithinconsistenttime,
dependingonthestabilityofthenetworkconnection.Thisproblemcanbesolvedbywritingacodeto
allowdynamicdelayswithintheprogramtheamountoftimedelayduetowebserveruploadcanbe
measuredandusedforincreasingordecreasingtherateofdatainsertion.Also,thesizeofFIFOcanbe
increasedtoallowsomeleewaywithdelay.
5.3EthicalConsideration
OurteamagreestoadheretotheIEEECodeofEthicsincludedinAppendix[A].Furthermore,
thefollowingportionsoftheIEEECodeofEthicsaredirectlypertinenttoourproject:
1. tobehonestandrealisticinstatingclaimsorestimatesbasedonavailabledata[6].
20
OurPMUmustnotoperateoutsideoftheclaimederrors.Itsdatamustbeasreliableaswe
claimittobe.
2. toimprovetheunderstandingoftechnologyitsappropriateapplication,andpotential
consequences[6].
OnemainreasontobuildthePMUwastoaidinacademicresearchbyimprovingthe
understandingoftheiroperation.
5.4Futurework/Alternatives
Inthefuture,intentionsaretoinviteoneoftheNationalInstrumentsfieldengineersforhandson
assistanceforsbRIOconfiguration.Afterasuccessfulconfiguration,planistoreplacethecRIOwiththe
sbRIO,asthegroupfirstenvisioned.Asdiscussedinsection5.2,bufferoverflowwillbedealtwith.
Lastly,thelabVIEWcodeswillbeimplementedtoallowfortheboardtobeabletorunautomatically
whenpluggedin,insteadofacomputerhavingtotelltheprogramwithintheboardtostartacquiring
data.
6Reference
[1]GeneralElectricDigitalEnergyStore,L60LinePhaseComparisonRelay,[cited28April2013],
Website:http://store.gedigitalenergy.com/viewprod.asp?Model=L60
[2]Sparkfun,PositiveVoltageRegulators,[OnlineDocument].2003,[cited29April2013],
AvailableHTTP:https://www.sparkfun.com/datasheets/Components/LM7805.pdf
[3]FairchildSemiconductor,1N40011N4007GeneralPurposeRectifiers,[OnlineDocument],2009,
[cited29April2013],AvailableHTTP:
http://pdf1.alldatasheet.com/datasheetpdf/view/427579/FAIRCHILD/1N4007.html
[4]NationalInstruments."NIsbRIOUserGuide,"[OnlineDocument],10June2008,[cited29
April2013],AvailableHTTP:http://www.ni.com/pdf/manuals/375052c.pdf
[5]K.Reinhard,FinalProjectReport:PhasorMeasurementUnit,Dec9,2011
21
[6]Section7.8IEEECodeofEthics,IEEE."IEEECodeofEthics,"IEEE.Web.25Feb.2013.
<http://www.ieee.org/about/corporate/governance/p78.html>.
7Appendix
[A]Section7.8IEEECodeofEthics
We,themembersoftheIEEE,inrecognitionoftheimportanceofourtechnologiesinaffectingthe
qualityoflifethroughouttheworld,andinacceptingapersonalobligationtoourprofession,itsmembers
andthecommunitiesweserve,doherebycommitourselvestothehighestethicalandprofessional
conductandagree:
1. toacceptresponsibilityinmakingdecisionsconsistentwiththesafety,health,andwelfareof
thepublic,andtodisclosepromptlyfactorsthatmightendangerthepublicortheenvironment
2. toavoidrealorperceivedconflictsofinterestwheneverpossible,andtodisclosethemto
affectedpartieswhentheydoexist
3. tobehonestandrealisticinstatingclaimsorestimatesbasedonavailabledata
4. torejectbriberyinallitsforms
5. toimprovetheunderstandingoftechnologyitsappropriateapplication,andpotential
consequences
6. tomaintainandimproveourtechnicalcompetenceandtoundertaketechnologicaltasksfor
othersonlyifqualifiedbytrainingorexperience,orafterfulldisclosureofpertinentlimitations
7. toseek,accept,andofferhonestcriticismoftechnicalwork,toacknowledgeandcorrect
errors,andtocreditproperlythecontributionsofothers
8. totreatfairlyallpersonsregardlessofsuchfactorsasrace,religion,gender,disability,age,or
nationalorigin
9. toavoidinjuringothers,theirproperty,reputation,oremploymentbyfalseormaliciousaction
10. toassistcolleaguesandcoworkersintheirprofessionaldevelopmentandtosupportthemin
followingthiscodeofethics.
ChangestotheIEEECodeofEthicswillbemadeonlyafterthefollowingconditionsaremet:
ProposedchangesshallhavebeenpublishedinTHEINSTITUTEatleastthree(3)monthsin
advanceoffinalconsiderationbytheBoardofDirectors,witharequestforcomment,and
AllIEEEMajorBoardsshallhavetheopportunitytodiscussproposedchangespriortofinalaction
bytheBoardofDirectors,and
AnaffirmativevoteoftwothirdsofthevotesofthemembersoftheBoardofDirectorspresentat
thetimeofthevote,providedaquorumispresent,shallberequiredforchangestobemade.
22
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