Mitsubishi V17 Training Manual

V17 V17
Projection Television
Technical Training Manual
MITSUBISHI ELECTRIC
MITSUBISHI DIGITAL ELECTRONICS AMERICA, INC.
Features Alignments
Service Procedures Circuit Descriptions
Block Diagrams Troubleshooting
www.mitsubishi-tv.com
V17 V17+ V17++
WS-55807 WS-55857 WS-55907
WS-65807 WS-65857 WS-65907
WT-46807 WS-73907
MODELS
NTSC
480p
1080i
T
2000
ECHNICAL
RAINING
Projection Television
Technical Training Manual
Features Alignments
Service Procedures Circuit Descriptions
Block Diagrams Troubleshooting
Copyright 2000 Mitsubishi Digital Electronics America, Inc.
All Rights Reserved
T
2000
ECHNICAL
RAINING
V17 V17+ V17++
WS-55807 WS-55857 WS-55907
WS-65807 WS-65857 WS-65907
WT-46807 WS-73907
MODELS
MITSUBISHI ELECTRIC
MITSUBISHI DIGITAL ELECTRONICS AMERICA, INC.
Table of Contents
Introduction ........................................................................................ I
Chapter 1 - Service Procedures ...................................................... 1-1
Disassembly ............................................................................................................................................ 1-3
PCB Functions and Locations ............................................................................................................ 1-10
Self Diagnostics .................................................................................................................................... 1-12
Servicing the Lightbox Assembly ....................................................................................................... 1-13
Chapter 2 - Alignment Procedures ................................................ 2-1
Menu Access Codes Quick Reference .................................................................................................. 2-2
Test Equipment and Signals ................................................................................................................. 2-3
Initial Setup ............................................................................................................................................ 2-4
Circuit Adjustment Mode ..................................................................................................................... 2-5
Convergence Adjustment Mode ........................................................................................................... 2-7
List of Adjustment Items ...................................................................................................................... 2-9
Chapter 3 - Power Supply............................................................... 3-1
Standby Supply Regulator .................................................................................................................... 3-3
Switched Supply Regulator................................................................................................................... 3-6
CRT Filament Supply............................................................................................................................ 3-8
HV Circuit 12V Supply ......................................................................................................................... 3-8
Troubleshooting Tips ............................................................................................................................. 3-9
Chapter 4 - Control Circuit ............................................................ 4-1
Overall Control Circuit ......................................................................................................................... 4-3
PC Operational Requirements ........................................................................................................... 4-4
Input Commands ................................................................................................................................... 4-5
Data Lines............................................................................................................................................... 4-6
Parallel Inputs/Outputs ......................................................................................................................... 4-8
A/V Network / IR Blaster Drive ......................................................................................................... 4-10
Chapter 5 - Video-Color Circuitry.................................................. 5-1
Signal Sources and Formats.................................................................................................................. 5-3
Overall Block Diagram.......................................................................................................................... 5-4
NTSC Signal ........................................................................................................................................... 5-6
YCbCr Signal ......................................................................................................................................... 5-9
Multi Component Processor ............................................................................................................... 5-13
On Screen Display................................................................................................................................ 5-14
PCB-2HDW.......................................................................................................................................... 5-16
Bitmap Circuitry.................................................................................................................................. 5-17
Chapter 6 - Sync, Deflection and High Voltage ............................ 6-1
Overall Block Diagram.......................................................................................................................... 6-3
Sync Block Diagram .............................................................................................................................. 6-4
Deflection Drive ..................................................................................................................................... 6-6
Vertical Deflection.................................................................................................................................. 6-8
Horizontal Deflection............................................................................................................................. 6-8
High Voltage ......................................................................................................................................... 6-10
Chapter 7 - Convergence Circuitry ................................................ 7-1
Convergence Signal Path ...................................................................................................................... 7-4
Convergence Output Circuitry............................................................................................................. 7-5
Convergence Control Circuitry ............................................................................................................ 7-7
Chapter 8 - Sound Circuitry ........................................................... 8-1
Sound Signal Path.................................................................................................................................. 8-3
Audio Output Amplifier........................................................................................................................ 8-5
Page I
Introduction
Features
Specifications
Page II
Page III
V17 Features
The V17 Chassis is Mitsubishis third generation of
HDTV Upgradeable Projection Televisions. Like pre-
vious generations, it offers the highest analog perfor-
mance available and can be upgraded to a true High-
Definition television. All models and sizes of the V17
chassis have a 16:9 aspect ratio.
Among other high end features, V17 features that are
either new or upgraded include:
DTV Receiver Inputs
Component Video Inputs (2 sets)
VGA Input (V17+, V17++)
STB Input (V17+, V17++)
3rd Generation Diamond Digital Pixel
Multiplier
TM
Motion Adaptive 3D-Y/C Comb Filter
Multiple Image System with additional 480p and
1080i capabilities.
Film Mode
Picture Format (5 modes)
High Speed Velocity Scan Modulation
Bitmapped Graphics Processor (V17+, V17++)
System 4 Home Theater Control (V17+, V17++)
The High Definition Interface for the HD-1080 DTV
receiver, that was featured on VZ6, V15 and V16
models, is not included in the V17 line.
The DTV Inputs have the ability to accept High-Defi-
nition Component Video (Y, Pr, Pb) or High-Definition
RGB Video. The RGB Video inputs can have either
Sync on Green or separate H and V Sync inputs. These
inputs can be in the 480i, 480p or 1080i video signal
format. This allows a variety of components to be used
as a SD or HD source.
The Component Video inputs offer a high performance
analog interface. These inputs consist of three discrete
connections, Luminance (Y), and the Cr (Pr) and Cb
(Pb) color difference signals. It is the interface of choice
when using a DVD player. Compared to S-Video,
Component Video provides increased color bandwidth,
resulting in sharper color detail and transitions.
Many DVD players are now capable of outputting a
progressive scan format. To accommodate this high
performance output, the V17 chassis DVD Compo-
nent Video inputs can process signals in either the 480p
or 480i format.
The VGA Input allows connection of a PC or digital
set-top box for displaying a standard VGA 640X480
60 Hz image. Note: The VGA capability is meant for
occasional use only. It is not meant to view static or
odd shaped images for extended periods of time. The
PC or digital set-top box must have its screen saver
activated to prevent damage to the CRT phosphors.
Y
G
Pb
B
Pr
R
V
H
HIGH RESOLUTION INPUT
INPUT
3 PIP
S-VIDEO
VGA
640X480, 60HZ
COMPONENT 480i / 480p
1 (YPrPb) 2 (YPrPb)
DTV (YPrPb/GRBHV)
480i / 480p / 1080i
VIDEO
MONITOR
IR EMITTER HOME THEATER
2 1 STB
OUTPUT
AUDIO-
LEFT/
(MONO)
AUDIO-
RIGHT
AUDIO-
LEFT/
(MONO)
AUDIO-
RIGHT
ANT-B LOOP OUT ANT-A
Figure 1: Back Panel (V17+ and V17++ models)
Page IV
The STB Input on V17+ and V17++ models pro-
vides an additional S-Video Input for a Set Top Box.
Mitsubishis 3rd generation Diamond Digital
Multiplier
TM
enhances analog NTSC, DVD/Compo-
nent, and Standard Definition TV (480i) source mate-
rial through a line doubling process that converts all
480i sources to 480P or 960i (user selectable). Dou-
bling the number of horizontal lines, and the horizontal
scan frequency, results in an image with little or no vis-
ible scan lines. This makes todays analog program
materials appear smoother and more lifelike. The im-
proved 3rd generation pixel multiplier processes more
data and processes it more quickly than previous gen-
erations, for a sharper, clear picture.
Comb filters separate the luminance and the chromi-
nance from a composite NTSC signal. In order to
provide more precise separations, 3D-Y/C comb fil-
ters store both fields of a complete video frame before
they begin their processing. Until now, even the best
comb filters did not provide full 3D-Y/C performance
when the TV picture had fast motion because of the 1/
60th of a second time difference between the two pic-
ture fields. The result was 2D-Y/C-grade performance
whenever there was significant motion. Mitsubishis new
Motion-Adaptive 3D-Y/C Comb Filter actually com-
pensates for any motion that occurs between fields.
Even programming with bright colors and fast action is
displayed with a new level of clarity.
The Multiple Image System takes advantage of the
V17 Chassiss 16:9 aspect ratio to display POP (Pic-
ture-Outside-Picture) images in a variety of ways in-
cluding:
Two pictures side by side.
The Main picture plus 3 smaller images.
The Main picture plus 9 smaller images.
Standard PIP displays are also available. The user can
cycle through the Multiple Image System by repeat-
edly pressing the PIP Button until reaching the desired
display.
Note: Although the V17 includes additional 480p and
1080i capabilities, some limitations do still exist. See
Table 1 for details:
DTV Component 1-2
480i-480p-1080i 480i-480p
Ant-A OK
1
NO OK OK OK OK NO
Ant-B OK OK
1
OK OK OK OK NO
DTV
480i-480p-1080i
OK OK OK
2
OK OK OK NO
Inputs 1-4
OK OK OK OK
2
OK OK NO
Component 1-2
480i-480p
OK OK NO OK OK
2
OK NO
STB OK OK OK OK OK OK
2
NO
VGA NO NO NO NO NO NO NO
Notes: 1 - No POP with same Channel
2 - No POP with same Input
SUB PICTURE
MAIN
PICTURE
Table 1: PIP/POP Capabilities
STB VGA Ant-A Ant-B Inputs 1-4
Figure 2: Multiple Image System
Page V
The Film Mode is special because movie film has a
frame rate of 24 frames per second, while video is re-
corded at 30 frames per second, with each video frame
made up of 2 fields. This makes transferring movies to
video rather complex. The result is that some video
frames consist of fields from two different film frames.
Depending on the amount of motion taking place in the
programming, these video frames can cause the pic-
ture to jitter or flicker. Mitsubishis Film Mode detects
these frames and applies motion adaptive technology
to stabilize the picture. The result is a smoother, more
continuous appearance to video that originated from
film.
The Format feature allows the viewer to zoom in on
and/or stretch the raster to optimize the picture size or
shape for the best possible display.
Displaying images of one size on a screen of another
size presents a technical challenge. Mitsubishi provides
5 ways to fit an image to a widescreen, such that the
user can select the mode that results in the most pleas-
ing picture. The five modes are:
1. Standard- For standard widescreen pictures, that
is, pictures with aspect ratios similar to that of the
TV screen such that they fill the screen. Those
aspect ratios are 1.78:1 (16:9) and 1.85:1. Video
programming with these aspect ratios is often
referred to as anamorphic. Many DVD movie
discs are produced this way.
2. Expand- For letterboxed images, that is,
widescreen images that are superimposed on a
4:3 picture. When displayed on a widescreen TV,
these images contain bars on all 4 sides that take
up about 30% of the screen. The Expand mode
expands the image linearly in both height and
width to fill the screen and maintain geometric
accuracy.
3. Zoom- For images that exceed the width of a
widescreen TV. These images, often referred to
as anamorphic 2.35:1, when displayed in the
Standard mode, contain bars along the top and
bottom. The Zoom mode linearly expands these
images both horizontally and vertically so that the
black bars are eliminated, a small portion of each
side is cut off, and geometric accuracy is main-
tained.
4. Stretch- For conventional TV programming with
a 4:3 aspect ratio. The Stretch mode maintains
geometric linearity in the center and stretches the
extreme left and right sides of the image to fill the
screen. This mode is particularly popular for
programming where most of the viewers attention
is drawn to the center of the screen.
5. Narrow- For conventional TV programming with
a 4:3 aspect ratio where geometric linearity is
required through the image. In this mode, the TV
produces vertical bars along the left and right side
such that the remaining area precisely fits the
images 4:3 aspect ratio.
Velocity Scan Modulation (VSM) actually slows
down the left-to-right scanning of a CRT when the im-
age is complex and speeds it up when the image is
simple. This allows the sharp transitions from black to
white and from white to black to be precise. The ben-
efit is often described as improved edge definition.
Unfortunately, the transition from standard analog TV
(480i) to progressive scan (480P) and HDTV also cre-
ated much faster scan speeds. Ordinary VSM circuitry
couldnt react quickly enough to provide the benefits it
does at 480i. New for this year, Mitsubishi introduces
HVSM, with the speed and precision to provide en-
hanced edge detail even with progressive scan and
HDTV images.
The Bitmapped Graphics Processor in V17+ and
V17++ models gives 3 dimensional depth to the icons
and text displayed on-screen.
The same models include System 4 Home Theater
Control. This enables the customer to remotely con-
trol home theater components through the special TV
IR repeater system.
Page VI
Model WT-46807 WS-55807 WS-65807 WS-55857 WS-65857 WS-55907 WS-65907 WS-73907
Chassis V17 V17 V17 V17+ V17+ V17++ V17++ V17++
Screen Size 46" 55" 65" 55" 65" 55" 65" 73"
Aspect Ratio 16:9 16:9 16:9 16:9 16:9 16:9 16:9 16:9
Special Control Features
Format 5 Mode 5 Mode 5 Mode 5 Mode 5 Mode 5 Mode 5 Mode 5 Mode
IRIS
Auto brightness/contrast control

Color temperature control
high, mid,
low=6500
o
high, mid,
low=6500
o
high, mid,
low=6500
o
high, mid,
low=6500
o
high, mid,
low=6500
o
high, mid,
low=6500
o
high, mid,
low=6500
o
high, mid,
low=6500
o
Video/Film Image Type
Digital Convergence 64 point 64 point 64 point 64 point 64 point 64 point 64 point 64 point
V-Chip w/Lock by Time
VIDEO
Detail Enhancements
Comb filter 3D Y/C 3D Y/C 3D Y/C 3D Y/C 3D Y/C 3D Y/C 3D Y/C 3D Y/C
Horizontal Resolution (lines) 1200 1200 1200 1200 1200 1200 1200 1200
Dynamic Beam Forming
Velocity Scan Modulation
Dynamic black level
expansion

3rd Generation Diamond
Digital Pixel Multiplier

Optical System
CRT size 7" 7" 7" 7" 7" 7" 7" 9"
Multi-coated Lens system
5 element
Hybrid
5 element
Hybrid
5 element
Hybrid
5 element
Hybrid
5 element
Hybrid
5 element
Hybrid
5 element
Hybrid
6 element
Hybrid
Black Diamond, black matrix
Lenticular screen

Thin fresnel lens
Screen Pitch (mm) 0.52 mm 0.52 mm 0.72 mm 0.52 mm 0.72 mm 0.52 mm 0.72 mm 0.72 mm
Front reflective surface mirror
Multi-step focus
Contrast, Brightness, Room
Viewing

Horizontal Viewing angle 110
o
110
o
110
o
110
o
110
o
110
o
110
o
120
o
Vertical Viewing angle 34
o
34
o
34
o
34
o
34
o
34
o
34
o
34
o
Contrast ratio - dark Room 50:1 50:1 50:1 50:1 50:1 50:1 50:1 50:1
Contrast ratio - bright room
(250 lux)
27:1 27:1 27:1 27:1 27:1 27:1 27:1 27:1
INPUTS
Antenna (RF) inputs 2 2 2 2 2 2 2 2
Front A/V Composite/S-Video 1 1 1 1 1 1 1 1
Rear A/V Composite/S-Video 3 3 3 3 3 3 3 3
Rear STB S-Video - - - 1 1 1 1 1
Component Video inputs
YCrCb 480i 480p
2 sets 2 sets 2 sets 2 sets 2 sets 2 sets 2 sets 2 sets
HDTV Video inputs selectable
RGBHV/YPrPb 480i 480p 1080i
1 set 1 set 1 set 1 set 1 set 1 set 1 set 1 set
VGA inputs 640x480 60HZ - - - 1 set 1 set 1 set 1 set 1 set
OUTPUTS
Cable Loop (RF) output
Monitor A/V output
(fixed/variable audio)
1 1 1 1 1 1 1 1
PIP Audio output
IR blaster port Home Theater 1 1 1 3 3 3 3 3
Active AV Network 1 1 1 Sys 4 Sys 4 Sys 4 Sys 4 Sys 4
GENERAL
Dimensions (approx. in.)
Height 37-13/32 51-9/16 61-7/16 51-9/16 61-7/16 51-9/16 61-7/16 65-3/4
Width 41-9/16 50-9/16 58-7/32 49-7/8 58-7/32 49-7/8 58-7/32 65-3/16
Depth 27-15/16 28-5/16 28 28-5/16 28 28-5/16 28 29-15/16
Height on Matching base 50-13/32 - - - - - - -
Weight (approx. lbs.) 121 250 323 244 322 256 348 405
Table 2: Features and Specfications
V17 Specifications
Page 1-1
Cabinet and Light Box Disassembly Procedures
Cabinet Separation Procedure
PCB Functions
PCB and Major Parts Locations
Self Diagnostics
Servicing the Lightbox Assembly
Chapter 1
Service Procedures
Page 1-2
Page 1-3
CABINET DISASSEMBLY (FRONT VIEW)
WT-46807
*Refer to the Parts List for Part Numbers
1a. Front Cabinet Disassembly
1. Remove the Speaker Grille by pulling forward.
2. Remove 2 screws (b) to remove the Control Panel.
3. Remove the Board Front by removing 4 screws (a).
4. Remove the 4 screws (c) holding the Screen Assembly.
5. Lift the Screen Assembly up and away from the cabinet.
Figure 1-1
Page 1-4
WS-55807 / WS-65807
1b. Front Cabinet Disassembly
2. Remove the Board Front by removing 4 screws (a).
3. Remove the 5 screws (b) holding the Screen Assembly.
Figure 1-2
Page 1-5
WS-55857 / WS-65857
1c. Front Cabinet Disassembly
2. Remove 2 screws (a) to remove the Control Panel.
3. Remove the Board Front by removing 4 screws (b).
Figure 1-3
Page 1-6
WS-55907 / WS-65907 / WS-73907
1d. Front Cabinet Disassembly
1. Remove the Cover Front, the two Speaker Grilles and Cover Control by pulling forward.
2. Remove 2 screws (a) to remove the Control Panel.
3. Remove the Board Front by removing 4 screws (b).
Figure 1-4
Page 1-7
CABINET DISASSEMBLY (REAR VIEW)
WT-46807
2a. Rear Cabinet Disassembly
1. Remove 15 screws (a) holding the Back Board.
2. Remove the 13 screws (b) holding the Back Cover.
3. Remove the 3 screws (d) securing each Board Shelf.
3. Remove the 4 screws (c) securing the Light Box Assembly.
4. Slide the Light Box out the rear of the Cabinet.
Figure 1-5
Page 1-8
CABINET DISASSEMBLY (REAR VIEW)
WS-55807 / WS-55857 / WS-55907 / WS-65807 / WS-65857 / WS-65907 / WS-73907
2b. Rear Cabinet Disassembly
1. Remove 12 screws (a) holding the Back Board.
2. Remove the 4 screws (c) holding each Board Shelf.
3. Remove the 4 screws (b) securing the Light Box Assembly.
4. Slide the Light Box out the rear of the Cabinet.
Figure 1-6
Page 1-9
CABINET SEPARATION PROCEDURE
MODELS: WS-65807, WS-65857, WS-65907, WS-73907
The cabinets for the above models are assembled in two pieces. The two pieces may be separated to allow easier
delivery and setup. The following instructions show how to safely separate and re-attach the cabinets.
Note: The guide pins under the cabinet top are prone to breakage if mishandled. Be sure to keep the
cabinet top straight when removing, setting down and re-installing, being careful not to tilt backward
or forward on the guide pins.
1) Remove the lower screw from each side of the TV back. On both sides, pull off the two plastic caps, and
remove the two exposed screws.
2) Lift the cabinet top straight up until the guide pins clear the holes in the bottom cabinet. DO NOT use the
screen frame when lifting the cabinet top.
3) Carefully place the cabinet top onto the floor.
4) When reassembling, set the cabinet top on the bottom. Be sure the guide pins align with the holes in the
cabinet bottom. Keep your fingers clear of the edges being joined. Replace the caps and screws that were
removed in step 1.
Step 1
Step 4 Step 3
Step 2
Figure 1-7
Page 1-10
PCB Functions and Locations
Figure 1-9 shows the location of all PCBs attached to
the main chassis. The primary functions performed by
each PCB are listed below.
PCB-SIGNAL
NTSC Tuning
uPC Control
Video-Color Signal Processing
Interface for stand-up PCBs.
PCB-3DYC/MD
NTSC Luminance/Chroma Separation
NTSC Chrominance Demodulation
Matrix to Y, Cr, Cb
PCB-TERMINAL
Audio and Video Inputs
DTV Inputs
Audio/Video Switch
Audio signal processing
PCB-2HDW
PIP/POP Processing
Picture Size and Aspect Ratio Control (Format)
Line Doubling
PCB-BITMAP (V17+, V17++)
Graphic OSD Generation
PCB-CONV-GEN
Convergence and Raster Geometry Correction
Signal Generation
High Voltage Adjustment Generation
Dynamic Focus Signal Generation
Cross Hatch OSD Generation
PCB-POWER
Power Supplies
Convergence Output Amps
Audio Output Amp
PCB-MAIN
Vertical Deflection
Horizontal Deflection
High Voltage
Interface for stand up PCBs
PCB-DEFL-JUNGLE
Horizontal and Vertical Deflection Drive
PCB-DBF
Corner Focus Correction
Chassis Removal
Refer to Figure 1-9
1) Remove the 3 screws a
securing the rear of the
chassis.
2) Pull up slightly of the 2
front chassis locks b.
3) Disconnect all intercon-
necting cables.
4) Carefully slide the
chassis out the rear of
the cabinet.
Page 1-11
Figure 1-9: PCB Locations
Figure 1-10: Main Component Locations
Page 1-12
Self Diagnostics
The V17 Chassis features Self Diagnostics to aid in troubleshooting problems that may cause the set to
automatically turn off or shut down. The Timer/Power ON LED provides an indication of the sets opera-
tion, and the possible cause of a malfunction.
1. Initial Control Circuitry Check
Immediately after the TV is connected to an AC power source:
The LED flashes three times ... indicating the Microprocessor has initialized and is functioning
properly.
If the LED does not flash ... the Microprocessor is NOT functioning.
2. Error Code Operational Check
To activate the Error Code Mode, while the set is OFF, press the front panel INPUT and MENU buttons
at the same time and hold for 5 seconds. The LED will flash denoting a two digit Error Code.
Note: The Front Panel buttons must be used, NOT those on the Remote Control.
The number of flashes indicates the value of the MSD (tens digit) of the Error Code.
The flashing then pauses for approximately 1/2 second.
The LED then flashes indicating the value of the LSD (ones digit) of the Error Code.
The Error Code is repeated a total of 5 times.
Example: For Error Code is 24, the LED will flash 2 times, pause, and then flash 4 times.
3. Error Codes
The Error Code designations indicating a malfunction, or no malfunction, are listed below:
12 ... indicates no error has occurred.
21 ... X-Ray Protect circuit.
22 ... Short Protect circuit.
23 ... Horizontal Deflection failure.
24 ... Vertical Deflection failure.
Page 1-13
Servicing the Lightbox Assembly
Like previous versions of Mitsubishi PTVs, the V17
chassis uses a lightbox assembly that can be com-
pletely removed from the cabinet for service. As such,
it is fully operational, even if the front control and input
PCBs are not included. However, without these PCBs,
the remote control must be used to enter all commands
and the self diagnostics are not usable.
Servicing the lightbox assembly outside the cabinet is
advantageous for several reasons.
One person can remove the assembly for return
to the shop.
The cabinet stays in the customers home, avoid-
ing possible damage due to handling.
Since the room decor is not disturbed, the cus-
tomer is less likely to have objections.
PCBs are far easier to access for troubleshoot-
ing purposes. See Figures 1-11 and 1-12.
Lightbox service can be simplified by placing the as-
sembly sideways on a mobile cart. See Figure 1-11.
Figure 1-11: Lightbox placed on cart with
crosshatch patten displayed.
Note: Since the HV Block is mounted outside
the lightbox on the V17 Chassis, place the as-
sembly on the cart with the HV side up.
Once the chassis is operational, position the assembly
so the face of the lenses are perpendicular to a wall,
about 3 to 4 feet back. With a signal applied or a menu
selected, a reasonably good picture can be obtained
by moving the assembly back and forth from the wall
to obtain the best focus, then rotating the cart left to
right slightly to obtain the best raster geometry. See
Figure 1-12.
Note: Adjustments such as focus, convergence
and raster geometry should not be performed
while the lightbox is removed from the cabinet.
After repair, reassemble the set before perform-
ing final alignments. Be aware that defects that
only cause the picture to be slightly degraded
may not lend themselves to troubleshooting with
the lightbox removed.
Figure 1-12: MENU display.
Notice easy access to bottom of chassis.
Page 1-14
Page 2-1
Menu Access Codes
Test Equipment and Signals
Option Menu and Initial Setup
Circuit Adjustment Mode
Convergence Adjustment Mode
List of Adjustment Items.
Chapter 2
Alignment Procedures
Page 2-2
ADJUSTMENT MENU ACCESS CODES
QUICK REFERENCE
Chassis
Type Option Menu Adjustment Mode Convergence Mode
VZ6 / V15 MENU-1-3-7-0 MENU-2-3-5-7 MENU-2-3-5-9
V16N / V16W MENU-1-2-7-0 MENU-1-2-5-7 MENU-1-2-5-9
V17 / + /++ MENU-8-2-7-0 MENU-8-2-5-7 MENU-8-2-5-9
Menu Type
Table 2-1
Adjustment Menu Access Codes
Page 2-3
Monoscope SignaI
ELECTRICAL ADJUSTMENTS
Note: Perform only the adjustments required.
Do not attempt an alignment if proper equipment is not available.
1. Test Equipment
Oscilloscope (Unless otherwise specified, use 10:1 probes)
Signal Generator (both SD and HD capable)
Frequency Counter
Direct Current Voltmeter
Direct Current Power Supply
Multiplex Audio Signal Generator
Direct Current Ampere Meter
2. Test Signals
A. Monoscope Signal
When called for, use the NTSC or HD 1080i
monoscope signal shown.
NOTE: HD 1080i signal source can be RGBHV,
YPrPb or RGB (Sync on Green). Be sure to
specfy the source type in the customer menu.
MENU>SETUP>INPUT ASSIGNMENT>DTV>
(YPrPb or RGB)
B. Color Bar Signal
Use the color bar signal shown,
unless specified otherwise.
1H
40%
40%
100%
75%
SpIit-FieId CoIor Bars (100% window)
Page 2-4
B. Default Settings
Memorize Channels ANT A Input ANT A SD Video Format 480P
Language English Channel 3 Video Mute On
Memory Deleted Black Level Expansion On
Clock Setting Auto Name N/A
Time Zone Eastern SQV N/A Volume 30%
Daylight Savings Applies Bass 50%
Clock Time N/A Timer Off Treble 50%
Set Day N/A Set Time 12:00PM Balance 50%
Set Day Everyday Surround Off
AV Network OFF Input ANT A Listen to Stereo
External Audio System NO Channel 3
AV Receiver at Input 1 None Level Sound Off
Audio Output Variable TV Rating Off
FV-Fantasy Violence N/A Iris Off
Antenna A On D-Sexual Dialog N/A Contrast 100%
Antenna B On L-Adult Language N/A Brightness 50%
DTV YPrPb S-Sexual Situation N/A Sharpness 50%
Input 1 Input-1 V-Violence N/A Color 50%
Input 2 Input-2 Program not Rated N/A Tint 50%
Input 3 Input-3 Movie Rating N/A Color Temp. High
Input 4 Input-4 Video Noise Reduction
Component 1 Comp. 1 V-Chip Start Time N/A PIP/POP
component 2 Comp. 2 V-Chip Stop Time N/A Source Ant A Ch 3
Lock by Time Off PIP Position Lower Right
Closed Captions With Mute Lock Time N/A POP Position Right Half
CC Background Gray Unlock Time N/A Format Standard
PIP/POP Format Dble. Window
CAPTIONS
CHANNEL EDIT
TIMER
V-CHIP PARENT LOCK
V-CHIP LOCK BY TIME
SETUP
CLOCK
AV CONNECTION
INPUT ASSIGNMENT
AUDIO SETTINGS
VIDEO SETTINGS
MAIN MENU DEFAULT SETTINGS
ADVANCED FEATURES
3. Initial Setup
A. Option Menu Setup
Follow the steps below for the initial set-up:
1. Select the "MENU" display by pressing the "MENU" button once.
2. Press the number buttons "8", "2", "7", "0" in sequence to
select the "OPTION MENU" display.
3. Press the "ADJUST" button to select "INITIAL."
4. Press "ENTER."
NOTE: At this time channel 3 is automatically selected.
(MENU-8-2-7-0)
OPTION MENU
Initial
Power restore :OFF
DTV Port :Auto
Page 2-5
A/V Memory ANT-A/B DTV INPUTS 1-4 DVD-1/2
Iris
Contrast Max. Max. Max. Max.
Brightness Center Center Center Center
Auto Picture
Sharpness Center Center Center Center
Color Center Center Center Center
Tint Center Center Center Center
Color Temp. High High High High
Video Noise Normal Normal Normal Normal
Bass Center Center Center Center
Treble Center Center Center Center
Balance
Surround OFF OFF OFF OFF
Listen To
Level Sound OFF OFF OFF OFF
Stereo
A/V RESET DEFAULT SETTINGS (By Input)
OFF
OFF
Center
C. A/V Memory
Each of the external inputs has its own Audio/Video Memory. A change in an A/V setting at a specific input
is stored in memory for that specific input.
A/V Reset
1. The front panel AV Reset button intializes all A/V Memories.
2. The AV Reset in the users menu initializes only the selected inputs A/V Memory.
4. Circuit Adjustment Mode
A. Activating the Circuit Adjustment Mode
The current signal source determines if the
activated Adjustment Mode is NTSC or HD.
1. Select the signal source (NTSC or HD).
2. Press the "MENU" button on a remote hand unit.
3. Press the number buttons "8", "2", "5", "7" in sequence.
The screen will change to the Adjustment Mode.
Note: Repeat steps 1 and 2 if the circuit
adjustment mode does not appear
on screen.
Page 2-6
B. Selection of Adjustment Functions and
Adjustment Items
To select an adjustment item in the circuit adjustment mode,
first select the adjustment function that includes the specific
adjustment item to be selected. Then select the adjustment
item.
(Refer to the following pages for the listing of adjustment
functions and adjustment items.)
1. Press the "AUDIO" button on a remote hand unit to select
an adjustment function. Each time the button
is pressed, the Function changes in the following sequence:
2. Press the VIDEO button to select a specific Adjustment Item. The Item number increases each time
the VIDEO button is pressed.
C. Changing Data
After selecting an adjustment Item, use the ADJUST UP/DOWN buttons to change data.
Press ADJUST DOWN to decrease the data value.
Press ADJUST UP to increase the data value.
D. Saving Adjustment Data
Press ENTER to save adjustment data in memory. The character display turns red for approximately
one second in this step.
Note: If the circuit adjustment mode is terminated without pressing ENTER, changes in adjustment
data are not saved.
E. Terminating the Circuit Adjustment Mode
On the remote hand unit, press the MENU button twice or the HOME key once to terminate the
adjustment mode.
Note: The circuit adjustment mode can also be terminated by turning power OFF.
F. Toggle Between Reception Modes
Pressing 3 when in the Adjustment Mode toggles between NTSC, HD, 480P and VGA. However data
changes are not automatically saved. Press ENTER to save data before pressing 3.
START
Video
Chroma
Defl
Jungle
Main
Matrix
HR Iris Audio
Sub
Matrix
Adjustment Functions
Page 2-7
5. Convergence Adjustment Mode
The Convergence mode is used to perform raster geometry correction, and convergence adjustments.
These adjustments must be made in both the SD (NTSC) and HD modes.
A. Convergence Mode Activation
1. Press MENU-8-2-5-9
2. When the Convergence Mode is activated, the
display on the right appears on a Green Crosshatch.
B. Selecting the HD or SD Mode
1. Select the Signal Source before entering the Convergence Mode, either an NTSC or HD source.
2. Enter the Convergence Mode
If the signal source is NTSC, the SD mode is activated.
If the signal source is HD 1080i, the HD mode is activated.
3. Activating the HD mode when no HD signal is available
Activate the Factory Option Menu (MENU-8-2-7-0)
Use the Adjust keys to select DTV Port and press the Enter key three times to change the
setting to 1080i. Sequence = AUTO-480i-480p-1080i. Note: Ignore any loss of sync
while changing modes.
Exit the Option Menu (Press MENU twice or HOME once)
Select the DTV Inputs as the signal source (INPUT button)
Activate the Convergence Mode ... the Convergence mode will be in the HD mode and the
internal crosshatch is displayed.
4. After adjusting Convergence, be sure to set the DTV Port back to AUTO.
Select an analog Input as the signal source (INPUT button)
Activate the Factory Option Menu (MENU-8-2-7-0)
Use the Adjust keys to select DTV Port and press the Enter key once to change the setting
from 1080i to AUTO.
Exit the Option Menu (Press MENU twice or HOME once)
C. Convergence Mode Functions
In the Convergence Mode there are three main Functions (Categories).
Pressing 6 activates CONV MISC
Pressing 5 activates COARSE CONV
Pressing 4 activates FINE CONV
D. CONV MISC (Press 6)
This mode is used to preset data values controlling the Convergence Generator, and to perform the HV
Regulation adjustment.
1. Use the VIDEO button to select an item.
2. Use the ADJUST buttons to change data.
NOTE: When Item 0 HVOL is selected the screen goes black except for the data display. This occurs
since a black screen is required when making the HV Regulation adjustment.
Page 2-8
E. COARSE CONV (Press 5)
There are four Sub Functions in the Coarse mode, COARSE GREEN, COARSE RED, COARSE BLUE
and DF.
COARSE GREEN .... used to make Coarse Raster Geometry Adjustments.
COARSE RED ... used to make Coarse Red Convergence Adjustments.
COARSE BLUE ... used to make Coarse Blue Convergence Adjustments.
DF ... used to preset data values controlling the Dynamic Beam Focus circuit drive signal.
1. Use AUDIO button to select a Sub Function
2. Use the VIDEO button to select an Adjustment Item.
3. Use the ADJUST buttons to change data.
F. FINE CONV (Press 4)
Sub Functions
This mode is used to perform Fine Raster Correction, and Fine Red and Blue Convergence Adjustments.
There are three Sub Adjustment Functions, selected with the AUDIO button:
FINE GREEN .... a Green Crosshatch is displayed, to make Fine Raster Corrections.
FINE RED .... a White Crosshatch is displayed, to make Fine Red Convergence Adjustments.
FINE BLUE .... a White Crosshatch is displayed, to make Fine Blue Convergence Adjustments.
Cursor
In the Fine mode a Cursor is added to
the Crosshatch. The ENTER button
toggles the Cursor between two
modes:
MOVE (blinking Cursor) ....
use the ADJUST buttons to
select any of 64 points on the
Crosshatch.
ADJUST (Non blinking
Cursor) .... the ADJUST
buttons adjust the active
color at the current Cursor
position, horizontally or
vertically.
Cursor Coordinates
Specific intersections in the Cross-
hatch are assigned vertical and
horizontal coodinates. These are shown in the adjacent diagram. The Cursor can only be moved to
those positions that have coordinates assigned. If the Cursor is at coordinates outside the screen area,
the Cursor will not be visible. Use the ADJUST buttons to move the Cursor to an intersection on the
screen.
Display
The on-screen display changes in the Fine mode, as shown at
the right. The display shows the vertical and horizontal data
for the current Cursor Position, and the horizontal and vertical
coordinates for that position.
G. Saving Data and Exiting the Convergence Mode
Press MENU twice or HOME once to exit the Convergence mode, data is automatically saved.
123 H1 V1 234
HORIZ HORIZ VERT VERT
DATA COORD COORD DATA
SD FINE GREEN
DIGIT DESIGNATION
Page 2-9
E2PROM Replacement
IC7C01 and IC7C02 store the adjustment data. After replacing the IC, set the data to the values given in the
following tables. If good performance is not obtained, perform the Adjustments Procedures given in the
Notes column.
List of Adjustment Items.
DEFL JUNGLE Function IC4A01
Function Display Adjustment Data 46" Only 55/65/73" Notes
Item # Abbrev. Description Range HD NTSC HD NTSC
1 HWID Horizontal Width 0~63 38 44 33 29 Width
(73 inch Only) 47 57
2 HKEY Horizontal Keystone 0~63 30 25 31 31 Preset
3 EWPT EW-PCC on top 0~63 31 25 26 31 "
5 EWPB EW-PCC on bottom 0~63 27 20 26 20 "
7 VHGT Vertical Height 0~63 21 31 31 38 Height
*8 VLIN Vertical Linearity 0~15 0 0 9 9 Preset
9 VSCN Vertical S-Correction 0~15 7 7 0 0 "
20 VPOS Vertical Position 0~63 0 63 31 31 "
73" Only
VIDEO / CHROMA Function IC2V00
Function Display Adjustment Data Initial Data Notes
Item # Abbrev. Description Range NTSC HD 480P VGA
1 SCT Picture Gain Control 0~63 42 Sub Contrast
2 SBRT Sub Brightness 0~63 18 Black Level
3 SCOL Sub Color 0~15 2 2 2 2 Preset
4 STIN Sub Tint 0~15 7 7 7 7 "
5 SCON Sub Contrast 0~15 2 2 2 2 "
6 RDRH R-Drive (high) 0~63 42 42 White Balance
7 GDR G-Drive 0~63 50 50 Preset
8 BDRH B-Drive (high) 0~63 42 42 White Balance
9 CTRH R-Cutoff (high) 0~63 15 15 "
10 CTGH G-Cutoff (high) 0~63 50 50 Preset
11 CTBH B-Cutoff (high) 0~63 15 15 White Balance
12 RDRL R-Drive (low) 0~63 50 "
13 BDRL B-Drive (low) 0~63 25 "
14 CTRL R-Cutoff (low) 0~63 23 "
15 CTGL G-Cutoff (low) 0~63 50 "
16 CTBL B-Cutoff (low) 0~63 10 "
17 GMMA Gamma control 0~15 8 4 5 5 Preset
18 BRT Brightness control 0~63 31 User
19 COL Color Gain control 0~63 28 User
(73" only) 27
21 CONT Picture Gain control 0~63 42 Preset
56 CRO1 CR Offset 1 0~15 9 9 9 9 Cb Cr Offset
57 CBO1 CB Offset 1 0~15 10 10 10 10 Cb Cr Offset
() Automatically goes to the value on the left
Indicates 73" Only
Page 2-10
AUDIO Function IC3A01
Function Display Adjustment Data Initial Notes
Item # Abbrev. Description Range Data
1 INP Input Level Alignment 0~15 8 Input Level
3 WDE Wideband Separator Align. 0~31 3 Separation
4 SPC Spectral Separator Align. 0~31 3 "
HR Function
Item
Number
Abbrev.
Name
Description Data
1 HR Display horiz. Centering (NTSC) 128
2 HRHD Display horiz. Centering (HD) 128
MAIN MATRIX Function IC6M00
1 TNTM Main Tint 0~63 30 Preset
2 COLM Main Color 0~63 19 "
3 YDRM Main Gain Control 0~31 12 Main Y Level
DYNAMIC FOCUS MENU-8-2-5-9
Item
Number
Abbrev.
Name
Description
Data
SD&HD
0 DFH Dynamic Focus Horizontal 175
1 DFV Dynamic Focus Vertical 100
IRIS Function
1 0T1 Lower thresh hold voltage setting 0-255 60 Preset
SUB MATRIX Function IC6P00
1 TNTS Sub Tint 0~63 30 Sub Picture Tint
2 COLS Sub Color 0~63 30 Sub Color
3 YDRS Sub Gain Control 0~31 12 Sub Y Level
4 VPDS Sub-V Pedestal DC Control 0~15 7 Preset
5 UPDS Sub-U Pedestal DC Control 0~15 7 "
Page 2-11
CONV MISC Items (MENU-8-2-5-9-6)
Item Abbrev. Description Data Notes
Number Name SD HD
0 HVOL High Voltage Control HV Adj.
3 STLN Horiz. Correction Start Line Number 55 81 Preset
4 FPHS Fine H-Phase of Correction Signal 200 200 "
7 TPHS Test Pattern H-Phase 70 70 "
* Do not change "0 HVOL" if it has been previously set.
128
CONV GREEN Items (MENU-8-2-5-9-5)
Item Abbrev. Description Notes
Number Name 46" 55-65-73"
0 HSTA* Horizontal Position -35/-35 -35/-35 Centering
1 SPCC Side Pincushion Correction 0/0 0/0 Geo. (Conv)
2 HWID Width 0/0 0/0 Geo. (Conv)
(0/+30)73"
3 SKEW Skew (Y axis rotation) 0/0 0/0 Geo. (Conv)
4 VSTA* Vertical Position -35/-35 -35/-35 Centering
5 VKEY Vertical Keystone Correction 0/0 0/0 Geo. (Conv)
6 TBPC Top/Bottom Pincushion Correction -220/-200 -220/-200 Geo. (Conv)
7 TILT Horizontal Tilt (X axis rotation) 0/0 0/0 Geo. (Conv)
*HSTA and VSTA must not exceed 200
CONV RED Items (MENU-8-2-5-9-5)
0 HSTA* Horizontal Position +75/+75 +40/+50 Static Conv.
1 HLIN Horiz. Linearity -225/-210 -210/-200 Coarse Conv.
2 SKEW Skew (Y axis rotation) +5/+5 +10/+10 Coarse Conv.
3 HWID Width +15/+20 -25/-5 Coarse Conv.
4 HSBW Horiz. Side Bow Correction +30/+30 +30/+30 Coarse Conv.
5 VST* Vertical Position -20/-20 -20/-20 Static Conv.
6 VKEY Vertical Keystone Correction -115/-85 -100/-85 Coarse Conv.
7 TILT Horizontal Tilt (X axis rotation) 0/0 0/0 Coarse Conv.
CONV BLUE Items (MENU-8-2-5-9-5)
0 HSTA* Horizontal Position -75/-75 -40/-40 Static Conv.
1 HLIN Horiz. Linearity +240/+215 +240/+220 Coarse Conv.
2 SKEW Skew (Y axis rotation) 0/0 -10/-10 Coarse Conv.
3 HWID Width -15/-20 -20/-5 Coarse Conv.
4 HSBW Horiz. Side Bow Correction -45/-45 -45/-45 Coarse Conv.
5 VST* Vertical Position -5/-5 -10/-10 Static Conv.
6 VKEY Vertical Keystone Correction +115/+105 +115/+115 Coarse Conv.
7 TILT Horizontal Tilt (X axis rotation) 0/0 0/0 Coarse Conv.
Data (SD/HD)
Data )SD/HD)
Data )SD/HD)
Page 2-12
Page 3-1
Basic Block Diagram
Standby Supply Regulator
Standby Supplies Power Distribution
Switched Supply Regulator
Switched Supplies Power Distribution
CRT Filament Supply
HV 12 Volt Supply
Troubleshooting Tips
Chapter 3
Power Supply
Page 3-2
Page 3-3
A Basic Block Diagram of the Power Supply circuitry
in the V17 chassis is shown above. It is comprised of
two Switch Mode Regulators, one for Standby Sup-
plies and one for Switched Supplies. A single Bridge
Rectifier supplies power to the two Switch Mode
supplies.
Since the Bridge Rectifier connects directly to the
AC line, the primary circuits of both Regulators are
referenced to a Hot Ground. An isolation trans-
former must be used when servicing these circuits.
IC9A20 is the Standby Supply Regulator and is ac-
tive as long as the set is connected to an AC source.
It generates the Standby 12 Volt and Standby 5 Volt
supplies. IC9A20 also generates the initial startup
voltage for IC9A50, the Switched Supplies Regula-
tor.
When the set is switched On, the On/Off circuit di-
rects startup voltage to IC9A50 activating the
Switched Supply Regulator. The On/Off circuitry
also activates the Switched 12 Volt supply, which is
derived from the Standby 12 Volt supply.
When activated, IC9A50 generates seven Switched
Supplies:
220 Volts
Audio Output Supply (18 Volts)
Positive and negative 24 Volt supplies
SW 5 Volts
110 Volts
32 Volts
Power Supply
Page 3-4
Standby Supply Regulator
Figure 3-1 illustrates the Standby Switch Mode Regu-
lator circuitry. Its operation is basically the same as
those used in earlier models. The internal FET is
supplied DC voltage (170V) from D9A01 through
the primary winding of T9A20.
Startup
Startup voltage is derived from the rectified voltage
at one of the AC inputs to D9A01, and directed
through R9A22 to pin 4 of IC9A20. Oscillation starts
at approximately 16VDC. The voltage at pin 4 will
start to drop due to the increased current drain. If the
voltage drops below 11 volts the oscillator shuts
down. To prevent this, the signal induced in the sec-
ondary winding at pin 2 of T9A20 is rectified and
added to the voltage at pin 4 of the IC.
The signal from pin 2 of the transformer serves two
additional purposes:
1) It provides feedback to pin 5 of IC9A20, to
stabilize the oscillators operation.
2) Is rectified by D9A27, providing the startup
voltage source for the Switched Regulator.
Regulation
Monitoring the STBY 5V secondary supply provides
feedback for regulation. It is compared to a refer-
ence in IC9A21, and a correction voltage is gener-
ated at the (K) output. The correction voltage con-
trols the conduction of Photo Coupler PC9A20 which
determines the amount of feedback to pin 5 of
IC9A20.
Over Current and Voltage Protection
Pins 4 and 5 of IC9A20 are dual purpose inputs. Pin
4 is the VIN and OVP (Over Voltage Protection) in-
put. If the voltage at pin 4 exceeds 20.5 volts the
oscillator shuts down.
Page 3-5
Pin 5 is both the feedback and OCP (Over Current
Protection) input. The ground return for the internal
FET is through R9A27 at pin 2 of the IC. The volt-
age across R9A27 is proportional to the FETs cur-
rent. A sample of this voltage is feed to pin 5 through
R9A26. If the voltage at pin 5 is excessive, the oscil-
lator is automatically shut down.
Standby Supplies
The Standby Supplies are generated at the remaining
secondary windings of T9A20. The signal from pin
13 of T9A20 is rectified by D9A33 producing the
STBY 5V supply. The signal from pin 12 is rectified
generating the STBY 12V supply. All other Standby
supplies are derived from these two supplies.
AC OFF
The signal from pin 12 is also rectified by D9A31
producing a 12 Volts. The negative 12 volts holds
Q9A22 on which holds the AC-OFF line negative. If
power is lost, the loss of 12 Volts turns Q9A22 Off,
allowing the AC-OFF line to go High, informing the
PC that power has been lost.
Current Limiting
The current limiting resistor, R9A02, is in series with
the AC line to D9A01. When the set is switched On,
the P-ON command turns On Q9A51, energizing re-
lay K9A50 and shorting out the current limiting re-
sistor.
Standby Supplies Power Distribution
Figure 3-2 illustrates the Standby Supplies Power Dis-
tribution. The Standby 12 Volts supplies power for
the Horizontal Drive circuitry, On/Off circuit and
through IC9C03 provides 9 volts for the Antenna
Relay.
The Standby 5 Volt supplies power to the Control
circuitry, Remote Preamp and is the source for the
Switched 5 Volt Supply. It also provides 3.3 Volts,
through IC7C06, to the Control circuitry. In the V17+
and V17++ chassis it provides power for Preamp 2,
and to IC7C07, a 3.3 Volt Regulator supplying power
to the Bitmap circuitry.
Page 3-6
Switched Supply Regulator
The Switched Supply Regulator, IC9A50, is shown
in Figure 3-3. Although it is a different generic type
IC, and its pin number designations differ, the basic
operation is similar to the Standby Regulator.
1) 170 VDC is applied to the internal FET
through the primary winding of T9A50.
2) Startup voltage is applied to pin 4, which is
also the OVP input.
3) The Feedback and OCP input is at pin 1.
4) The 110V supply is monitored to provide
regulation feedback.
5) The FET ground return is through R9A55
and R9A54 at pin 2 of the IC.
The Start, Shut Down and OVP voltages at pin 4 are
the same as those for IC9A20.
On/Off Circuitry
The On/Off circuitry does differ from that in previ-
ous models. The Startup voltage source is from
D9A27 in the Standby Regulator circuit, refer to Fig-
ure 3-1. It is applied to pin 4 of PC9A50 and the
collector of Q9A50.
When the set is switched On, the P-ON line from the
Control circuitry goes High, driving Q9A51 into con-
duction. The initial conduction of Q9A51 starts the
turn On sequence:
1) Activating K9A50, shorting out the current
limiting resistor to the Bridge Rectifier.
2) Pulls pin 2 of PC9A50 Low, lighting the
LED and driving the Photo Transistor into
conduction.
Page 3-7
3) The Photo Transistor drives the base of
Q9A50 positive, turning the transistor On
and supplying startup voltage to pin 4 of
IC9A50.
4) Rectification of the signal at pin 3 of T9A50
adds to the startup voltage at the collector
of Q9A50, maintaining oscillation.
Switched Supplies
Five Switched Supplies are generated at the second-
ary windings of T9A50, 220V, Audio (18V) Supply,
positive and negative 24 Volts, and 110 Volts. A 32
Volt supply is also generated from the 110 Volt sup-
ply.
When the SW +24V is generated it is applied to the
gates of two FETs, Q9A23 and Q9A20, turning On
both FETs. Q9A23 supplies the SW 5V supply, from
the STBY 5V supply, and Q9A20 outputs the SW
12V supply from the STBY 12V supply.
Switched Supplies Power
Distribution
Figure 3-4 illustrates the Switched Supplies Power
Distribution. Note that there are four additional regu-
lators (five in the V17+ and V17++ chassis).
IC9C02 provides a 3.3 Volts for the
2HDW circuitry.
IC9C05 provides 9 Volts for the Sub
Decoder, 3DYC, Signal Switch, MCP and
RGB circuitry.
IC9C01 generates 9 Volts for the Tuners,
A/V Switch and MCS circuitry.
Q5A08 supplies 12 volts to the HV Drive
Circuitry.
IC7C06 provides 3.3 Volts for the Bitmap
circuitry (V17+ and V17++ only).
Page 3-8
CRT Filament Supply
The CRT Filament supply is not generated by either
Switch Mode Regulator. It is generated in the collec-
tor circuit of the Horizontal Output transistor, Q5A31,
as shown in Figure 3-5. The horizontal drive signal
induced in the secondary winding of T5A31 is recti-
fied by D5A33, and regulated by Q5A36, using
IC5A05 as the reference.
HV Circuit 12 Volt Supply
It was stated that the 12 Volt supply for the HV Drive
circuitry (IC5A00) was derived from the +24 Volt
supply. Figure 3-6 shows this circuit in more detail.
The 10 Volt reference for the circuit is derived from
the Protect circuitry. A comparator in IC5A01 com-
pares a sample of the voltage from the emitter of
Q5A08 to the reference. The output of the com-
parator controls the conduction of Q5A08 to main-
tain a constant 12 volts.
Note that the 12 Volts supply is routed through the
DK (HV Block) connector to pin 9 of IC5A00. This
removes HV drive if the DK connector is unplugged,
protecting the circuitry from excess HV.
If the 24 Volt supply is lost, the immediate symptom
is no HV. The 24 Volt supply also supplies power for
the Vertical and Convergence Output ICs. A defect
in either of these circuits can blow the 24V Supply
fuse, F9A04, and the symptom appears as no HV.
Before spending time troubleshooting a no HV prob-
lem, we suggest checking the 24 Volt supply to make
sure it is not a Vertical or Convergence Problem.
Page 3-9
Troubleshooting Tips
Troubleshooting the Switching Mode Regulators in
the V17 is similar to that in previous models.
Dead Regulator
1) Check for DC (170V) at Drain pin of the
IC.
2) Check for Startup voltage at the VIN input
of the IC, it takes 16 Volts to start the
oscillator.
Dead Regulator (may have a Clicking Sound)
OVP may have shut down the oscillator. When this
occurs, the oscillator will not start again until the volt-
age at the OVP input drops below 6 Volts. This usu-
ally occurs in just a few seconds.
Before condemning the IC, measure the voltage at
the OVP input, if it is 6 Volts or higher, try resetting
the circuit.
To reset the circuitry:
1) Remove AC power from the set.
2) Use a 100 Ohm resistor to discharge the
capacitor at the VIN input. C9A23 for
IC9A20, and C9A51 for IC9A50.
3) Reconnect the AC power, the problem may
be solved.
Regulator Cycles On and Off
1) Additional DC voltage to maintain oscilla-
tion may be missing.
2) Check the additional DC source, D9A22 for
IC9A20 and D9A54 for IC9A50.
No Regulator Output and a Chirping Sound
1) Usually indicates excessive load.
2) Check each of the secondary supplies for
excessive current drain (the 110V supply
load is the most likely cause).
To help isolate the problem, a 60W lamp can be used
to replace the 110V load.
Page 3-10
Page 4-1
Overall Block Diagram
Basic PC Requirements
Input Commands
SDA5 Data Line Path
CSDA / SDA3 / 3 Line System
PC Parallel Inputs
PC Parallel Outputs
A/V Network / IR Blaster Drive
Chapter 4
Control Circuitry
Page 4-2
Page 4-3
Figure 4-1 illustrates an Overall Block Diagram of
the Control Circuitry. The circuitry consists mainly
of a PC, two E2PROMs and a Port Expander. User
commands, from the front panel buttons or the re-
mote are input to the PC.
The PC controls the TV using four I
2
C bidirectional
data lines, and one three line system using conven-
tional data lines.
The main functions of the I
2
C lines are:
E2SDA writes and reads data to and from the
E2PROMs, mainly user programmed data and ser-
vice adjustment data.
SDA5 Controls most of the TVs operation, the
Port Expander, Tuners, Main Decoder, Sub Decoder,
Multi Channel Sound (MCS), Y Signal Enhancement,
Multi Component Processor and the A/V Switch cir-
cuits.
CSDA Controls the Convergence circuitry and
performs HV Regulation Adjustment.
SDA3 Controls the 2HDW (2H Double Window)
line doubling and POP/PIP circuitry.
Of course a Serial Clock line is generated for each
I
2
C Data line to time data transfer.
Control Circuitry
Page 4-4
The three line directional system consists of:
D-OUT transfers PC data to the con-
trolled circuits.
D-IN returns data from the controlled
circuits to the PC.
CLK times the transfer of data on the D-
OUT and D-IN lines.
The D-OUT line controls Timing in the 2HDW cir-
cuit, and in the V17+ and V17++ chassis, controls
the Bitmap circuitry.
The Port Expander, is controlled by SDA5 and out-
puts eight SW (Switch) signals. These signals are
used to select Y, Cb and Cr signals for the main and
sub (PIP) pictures. Table 4-1 lists the function of
each SW signal from the Port Expander.
PC Operational Requirements
The Basic Operational Requirements for the PC are
a 3.3 Volt DC supply, a Timing Signal, Ground Re-
turns for the internal circuitry and a method of Re-
setting the PC. Figure 4-2 shows how the require-
ments are met in the V17 chassis.
DC Supply a Standby 3.3 Volt supply is gener-
ated by IC7C07 and applied to pins 7, 32 and 77 of
the PC.
Timing Signal generated by the Crystal Controlled
4 mHz Clock Oscillator at pins 75 and 76 of the PC.
Ground Returns pins 37 and 74 of the PC sup-
ply ground returns.
Reset provided by the Watch Dog IC, IC7C08.
The IC serves two purposes:
1) When power is initially applied to the TV
C7C40 delays the High applied the Reset
input of the PC, pin 5. This sets the PC
to its nominal starting point, preventing
computer lock up.
Control
Signal
Origin
(IC7C05)
IC
Control
Pins
Selects
Main/Sub
From
SW1 Pin 9 IC2Y08 9,10,11 Main(1H) Main Decoder / (DVD/DTV)
SW2 Pin 10 IC2Y10 " Sub(1H) SUB Decoder / (DV/DTV)
SW3 Pin 11 IC2Y04 " BMP Bit Map Circuit (V17+/V17++ Only)
SW4 Pin 12 IC2Y06 " Sub(1H) DVD / DTV
SW5 Pin 13 IC2X08 " Main(2H) 2HDW / (DTV/DVD)]
SW6 Pin 14 IC2Y02 " Sub(1H) DVD-1 / DVD-2
SW7 Pin 15 IC2Y07 " Main Sync NTSC / (DVD/DTV)
SW8 Pin 16 IC2Y09 " Sub Sync NTSC / (DVD/DTV)
Table 4- 1: Y, Cb, Cr Signal Select Control
Page 4-5
2) Automatically resets the PC if lock up
occurs during operation. When the PC is
functioning properly, pulses from AMDP-
CS output keep resetting IC7C08 so a PC
reset does not occur. If lock up occurs, no
pulses are output from the AMDP-CS
output and IC7C08 will automatically reset
the PC.
The AMDP-CS output also serves as the Chip Select
signal for the AMDP (2HDW) circuit.
The logic at pin 11 sets the operational mode of the
PC, Low for V17 models, and High for V17+ and
V17++ models. R7B11 is only used in the (+) and
(++) models.
Input Commands
Figure 4-3 illustrates the Input Command circuitry.
Commands originate from two sources, the Remote
Control or the front panel buttons. Signals from the
Remote are amplified by the Preamp and directed to
pin 72 of the PC.
The front panel buttons are connected in a two col-
umn resistive ladder array. Each column connects to
a KSC input of the PC, KSC0 or KSC1. When a
button is pressed, the analog voltage at that columns
KSC input changes. The analog voltage denotes that
specific command. The PC responds by generating
signals to perform that specific command.
Page 4-6
There are differences in the front panel button con-
figurations between the V17 chassis, and the V17+/
V17++ chassis. Both configurations are shown in
Figure 4-3. The V17 models do not have Channel
and Volume Up/Down buttons on the front panel.
SDA5 Data Line Path
It was stated earlier that the SDA5 I
2
C line controls
most of the TV. Figure 4-4 shows the SDA5 path to
each of the controlled circuits.
On the PCB-SIGNAL the SDA5 line is directed to
IC7C05 (Port Expander), Main and Sub Tuners,
IC6P00 (Sub Decoder), IC3A01 (MCS/Audio Con-
trol), IC2X06 (Y Enhancement) and IC2V00 (Multi
Component Processor).
The SDA5 line is routed though the JA connector to
the two A/V SW ICs, IC2L01 and IC2KO1. Two
ICs are required in the V17 due to the increased num-
ber signal inputs.
SDA5 is also directed to IC6M00 (Main Decoder)
and IC2C01 (3DYC Comb Filter) on the PCB-3DYC/
MD.
To control the Deflection circuitry, the SDA5 line is
directed through PCB-POWER, and PCB-MAIN to
IC4A01 (Deflection Jungle) on PCB-JUNGLE.
Page 4-7
CSDA / SDA3 / 3 Line System
Figure 4-5 illustrates the paths of the data and clock
lines to the Convergence, 2HDW and Bitmap cir-
cuitry. The CSDA line is routed through PCB-
POWER to IC8A00, the Convergence Waveform
Generator. It controls raster geometry, convergence
and HV adjustments.
The SDA3 line goes to IC7H02, the Main 2HDW
Processing IC. The three line system is connected
to IC7H07, the 2HDW timing IC. The CLK, AMDP-
CS and D-OUT signals are all buffered by IC7A01
before being applied to IC7H07.
In the V17+ and V17++ chassis the D-OUT line also
controls IC8S01, the Main Bitmap IC. Return data
is directed back to the PC over the D-IN line.
The MS-32CS output of the PC is the BMP Chip
Select signal. It controls when data can be trans-
ferred to and from IC8S01. When High, the output
of the two OR gates in IC8M02 are at a constant
High so no data transfer takes place. When Low, the
output of the OR gates is determined by D-OUT and
D-IN lines, enabling data transfer.
Page 4-8
PC Parallel Inputs
There are several parallel Inputs/Outputs on the PC,
most of them are single function. Table 4-2 lists the
Parallel Inputs and their main function. Most of the
inputs are not new, but five of them may require fur-
ther description.
SD1 ... Main picture horizontal pulses, informing the
PC that signal is present. From the frequency of
the pulses the PC also determines if the source sig-
nal is 480i or 480p format.
SD2 ... Serves the same purpose as SD1, but for the
Sub Picture signal source.
CVBS1 ... Sub Picture NTSC Video signal, used for
V-Chip signal processing in the PC.
CVBS0 ... Main Picture Video, or Y signal. Used
for V-Chip and Closed Caption signal processing.
HD24HZ ... Informs the PC when the HD signal is
in the 24p format. This is not a compatible format in
the V17 chassis, and the user is informed of this.
PC Parallel Outputs
Table 4-3 lists the Parallel Outputs and their func-
tions. Most of these have also been used in the past
and need no explanation. However, four of the out-
puts may require further explanation.
M32-CS ... This is the Chip Enable signal enabling
data transfer between the PC and the Bitmap cir-
cuitry (V17+ and V71++ Only).
M32-RST ... Resets the Bitmap circuitry when power
is switched On (V17+ and V17++ models only).
FREERUN ... The Freerun mode is automatically
activated when no signal is detected at the Main Sig-
nal source, internally generated sync is used. For
instance, when the HD Mode is forced, with no sig-
nal at the DTV inputs, Freerun is activated.
SUB FR ... Freerun mode for the Sub Picture, acti-
vated when no signal is detected.
FH1 (NTSCSW) ... used when the Main Picture
source is NTSC. If the signal is Separate Y/C it di-
rects the Y signal directly to the Main Decoder, by-
passing the 3DYC circiut. When the signal is com-
posite video it directs the Y signal from the 3DYC
circuit to the Main Decoder.
NOTES:
Page 4-9
Pin # Abbrev. Description
2 VSYNC Vert. Pulse from Vert. Output IC4B01 #4
9 SYS1A Remote input for IR Blaster circuit (V17 Only)
12 HSYNC Horiz. Pulse from Horiz. Output Q5A31
16 SD1 Main Picture source horiz. sync,
17 SD2 Sub Picture source horiz. sync.
35 CVBS1 Sub Video for V-chip processing
38 CVBS0 Main Video for V-chip & Closed Caption processing
44 HD24HZ Vert. Sync - Informs PC if an HD signal is 24P format
51 C-BUSY Busy signal from Convergence
52 C-ACK Command acknowledgement from Convergence
53 AC-OFF Informs PC when power is lost
58 X-RAY A Low turns the set Off, from the Protect circuit
62 V-BLANK Informs the PC when deflection is lost
64 SHORT Low indicates a short on +24V or -24V lines
65 AFT1 Main Tuner AFT voltage
66 AFT2 Sub Tuner AFT voltage
67 AI From Auto Iris
Table 4-2: PC Parallel Inputs
Pin # Abbrev. Description
3 ANTB Selects Antenna A or B
8 YS With YM times OSD insertion
11 SYS-3 IR Blaster drive (V17 Only)
13 SUB-MUTE Mutes sound from Sub Audio Output Jacks
15 SUB-CONT Reduces CRT drive to during Sub Contrast adjustment
22 M32-RST Resets the Bitmap circuitry at power On (V17+/V17++ Only)
23 YM With YS times OSD insertion
24 B OSD Blue On Screen Display signal
26 G OSD Green On Screen Display signal
27 R OSD Red On Screen Display signal
29 MUTE2 Mutes sound in A/V Switch IC2K01
42 P-ON Power On command
43 M32-CS Chip Select for the Bitmap circuit (V17+ / V17++ Only)
45 3DRST Resets the 3DYC Comb Filter
48 C-E2RESET Convergence E2RESET
49 C-MUTE Disables Convergence during On/Off, Input changes, etc.
50 C-RESET Convergence Reset
54 KIL Removes Color output from 3DYC
55 FREERUN Removes sync from the input of the Main Decoder
58 MUTE 3 Mutes sound from the Audio Output, IC3E01
60 BLANK 2 Removes video drive to the CRT
61 SUB FR Removes sync from the input of the Sub Decoder
79 FH1 Selects Y signal on the PCB-3DYC (NTSCSW)
84 LED LED Drive Signal
Table 4-3: PC Parallel Outputs
Page 4-10
A/V Network / IR
Blaster Drive
This circuitry differs be-
tween V17 models, and
V17+/V17++ models. In
the V17 models, there is one
A/V Network output, and
one IR Blaster output.
In V17+ and V17++ mod-
els there is no A/V Network
feature, but there are three
IR Blaster outputs.
Figure 4-6 illustrates the AV
Network and Blaster Drive circuitry in V17 models.
The Remote Control signal from the Pre Amp is buff-
ered by Q7B2 and is directed over three paths:
1) To the main Remote input at pin 72 of the
PC.
2) To the SYS1A input of the PC, this is the
source signal for the Blaster drive circuitry.
3) Through Q7B09 to the A/V Network Jack.
This signal may be connected via a cable to
other Mitsubishi products, such as VCRs,
DVDs, Audio equipment, etc.
The SYS3 output from the PC is the Blaster drive
signal. It is amplified by Q7B11 and Q7B10 and ap-
plied to the IR-Home Theater Jack.
Figure 4-7 shows the circuitry in V17+ and V17++
models. The Remote signal from the Pre Amp is still
applied to RMIN and SYS1A inputs of the PC.
However the SYS1A input is not used.
The SYS3 output is now held at a constant High from
the 3.3 Volt supply, through R7B11. The High sets
the PC operational mode for the V17+ and V17++
models.
A second Remote Pre Amp has been added to the
V17+ and V17++ models. The output of Pre Amp 2
is amplified by Q7A01 and Q7A02 and directed to
the three IR Home Theater Blaster Output Jacks.
IR Remote Controls have a carrier frequency between
30 kHz and 110 kHz, depending on the
specific manufacturer. Pre Amp 2 is a
wide band amplifier that passes all fre-
quencies in that range. Therefore, Pre
Amp 2 is basically a repeater, amplify-
ing remote signals and outputting them
at the three IR Blaster Outputs.
Page 5-1
Chapter 5
Video / Color Circuitry
Signal Formats
NTSC Signal Select Circuit
NTSC Signal Processing
Main Y, Cb, Cr Signal Select Circuitry
Sub Y, Cb, Cr Signal Select Circuitry
Multi Component Processor
On Screen Display Circuitry
PCB-2HDW Block Diagram
Bitmap Block Diagram
Page 5-2
Page 5-3
Signal selection in the Video/Color circuitry of the
V17 chassis is more complex than that in the V15
and V16 chassis. The complexity is due to two rea-
sons:
1) Increased number of External Inputs, four
Video / S-Y/C Inputs, two DVD Inputs,
DTV Inputs, and on the V17+ and V17++ a
Set Top Box Input (Y/C) and a VGA Input.
2) Increased signal formats compatibility.
Besides NTSC, 480i and 1080i (HD) for-
mats, the V17 accepts the 480p format.
The NTSC and 480i formats are conventional inter-
lace scanning, with a horizontal scanning rate of 15.75
kHz. In the following text and diagrams these sig-
nals are denoted as (1H).
The 480p format signals may be from the DVD and
DTV inputs. This is a progressive scan 60 frame
format, therefore the horizontal scanning rate is
doubled. 480p signals are denoted as (2H).
In V17+ and V17++ models, the Set Top Box (STB)
signal is a conventional NTSC signal. The VGA in-
put signals are a 640x480 pixels 60 Hz frame format
and are processed as a 480p signal. Table 5-1 lists
the possible signal sources in the V17, the signal for-
mats and the specific Input Jacks.
Some of the Video/Color circuitry is condensed com-
pared to that in previous chassis. The Line Dou-
bling and PIP/POP circuits have been replaced with
Video/Color Circuitry
Page 5-4
an Advance Multi-media Display Processor
TM
(AMDP
TM
). This circuitry is denoted in the sche-
matics as 2HDW (2H Double Window). The cir-
cuitry performs both the line doubling and the PIP/
POP functions. The circuitry is on a single replace-
able plug in board, PCB-2HDW.
The V17+ and V17++ chassis also feature Bitmap
Menu Displays, adding additional circuitry. How-
ever the Bitmap circuitry is also on a separate plug
in PCB which helps when troubleshooting.
Figure 5-1 illustrates an Overall Block Diagram of
the Video/Color circuitry. The NTSC Signal Select
circuit selects the Main and Sub Picture sources from
the Tuners, or an External Video or S-Y/C input.
The selected Main NTSC signal is directed through
a Comb Filter, separating the Y and C signals if the
source is composite video.
The Main Decoder converts the Y/C signals to the
YCbCr format. The signals are then applied to the
Main YCbCr Select circuit, which selects the main
signals applied to the 2HDW circuitry inputs.
The selected NTSC Sub Video signal is directed to
the Sub Decoder which separates the Y and C sig-
nals, converts them to the YCbCr format and directs
them to the Sub YCbCr Select circuit. The Sub
YCbCr Select circuit selects the sub picture signals
applied to the 2HDW circuitry.
The Main and Sub YCbCr Select circuits select ei-
ther the NTSC source signals or those from the DVD
or DTV Inputs.
SOURCE TYPE TYPE INPUTS
Main Tuner NTSC RF (Ant A or B)
Sub Tuner " RF (Ant B)
Ext-1 " Video & S-Y/C
Front " Video & S-Y/C
DVD-1 480i / 480p Y, Cb, Cr
DVD-2 480i / 480p Y, Cb, Cr
DTV 480i / 480p Y, Cb, Cr
1080i Y, Cb, Cr / RGB
*STB NTSC S-Y/C
*VGA 480p RGB
*V17+ & V17++ Only
Table 5-1: Signal Sources & Formats
Page 5-5
The Main and Sub DVD/DTV Select circuits select
DVD-1, DVD-2 or the DTV input. The selected
signals are applied to the Main or Sub YCbCr Select
circuits. The selected signals from the two YCbCr
Switches are applied to the 2HDW circuitry.
The 2HDW circuitry is capable of processing NTSC,
480i, 480p and 1080i (HD) signal formats.
Line doubling on NTSC and 480i signals.
Main picture PIP/POP signal processing
Sub picture PIP/POP signal processing
PIP insertion
Generates the display format, Standard,
Expand, Zoom, Stretch or Narrow.
All signal formats must be processed by the 2HDW
circuitry to generates the PIP single insert, or the
POP second window. However, 480p and 1080i
formats do not require line doubling. Therefore,
2HDW processing is not used on 480p and 1080i
main picture signals in the Standard format:
When no PIP/POP is activated.
When the single insert PIP is activated.
Under these conditions, the (2H) Signal Select cir-
cuit, following 2HDW, selects main 480p and 1080i
signals directly, by passing the 2HDW circuit. In the
single insert mode the output of the 2HDW circuit is
only the single insert, is inserted in the main picture
later in the signal path.
For a reference, Table 5-3 shows PIP/POP combina-
tions available for each of the signal sources and the
various formats:
Empty white square ... indicates all PIP/
POP functions are possible.
POP ... POP cannot be activated. The
Control circuitry will not allow the same
source to be selected for the main and sub
pictures in the POP mode.
N/A ... that signal is not available for the sub
picture source. For instance, if the main
picture is 480i from the DTV inputs, there
can be no 480p or 1080i signal at the DTV
inputs.
Blnk ... the PIP insert will be a blank.
None ... PIP/POP is not possible for this
main signal input. This is the case for the
VGA input.
The selected (2H) signals, from the 2HDW circuit,
or from the DTV/DVD inputs, are applied to a HD/
2H Select circuit. The following PIP Insert circuit,
inserts the single PIP in 480p or 1080i signals. The
signals are then converted to RGB and directed to
the CRT Drive circuitry.
PIP ANT-A ANT-B STB VGA
MAIN NTSC NTSC 480i 480p 1080i 1 2 3 4 480i 480p 480i 480p NTSC *
ANT-A POP Blnk Blnk
ANT-B POP "
(480i) POP N/A N/A "
DTV (480p) N/A POP N/A "
(1080i) N/A N/A POP "
EXT-1 POP "
EXT-2 POP "
EXT-3 POP "
EXT-4 POP "
DVD-1 (480i) DTV DTV DTV POP N/A "
DVD-1 (480p) DTV DTV DTV N/A POP "
DVD-2 (480i) DTV DTV DTV POP N/A "
DVD-2 (480p) DTV DTV DTV N/A POP "
STB POP "
VGA None
= PIP & POP OK N/A = Not Available
POP = No POP Blnk = Blank Insert
Table 5-2: POP / PIP Display Matrix
DTV EXTERNAL DVD-1 DVD-2
Page 5-6
NTSC Signal Select Circuit
Figure 5-2 show a simplified drawing of the Main
and Sub Picture NTSC Signal Selection Circuit (A/
V SW). The circuitry is located on the PCB-TER-
MINAL and consists of two A/V Switch ICs, IC2K01
and IC2L01.
The External 2, 3, and 4 (Front) inputs, and in the
V17+/V17++ models, the Set Top Box Input signals
are input to IC2L01. IC2L01 selects the main and
sub picture signals from these inputs and directs them
to IC2K01.
The Main Tuner, Sub Tuner and External 1 signals
are also input to IC2K01. IC2K01 selects the main
and sub signals from the Tuners, External 1 Input, or
the signals from IC2L01.
The main picture signals are routed through the PCB-
SIGNAL to the PCB-3DYC/MD, and the sub pic-
ture signals are applied to the Sub Decoder on the
PCB-SIGNAL.
The DVD-1, DVD-2, DTV and VGA inputs are on
the PCB-TERMINAL. Signals from these inputs are
directed to Select circuitry on the PCB-SIGNAL.
Page 5-7
NTSC Signal Processing
Figure 5-3 illustrates the NTSC signal processing
circuitry. The main picture signals from the A/V
Switch circuitry are either composite video or sepa-
rate Y/C. The signal(s) are directed to the PCB-
3DYC/MD. When the signal is composite video it is
applied to pin 88 of IC2C01, the 3DYC Comb Fil-
ter.
The Comb Filter separates the Y and C components
of the video signal. The C signal is applied directly
to pin 32 of IC6M00, the Main Decoder. The Y
signal is selected by IC2C04 and directed to pin 34
of IC6M00.
When the Main signals are separate Y/C, only the C
signal passes through the Comb Filter, for noise re-
duction. The Y signal is selected by IC2C04 and
applied to pin 34 of the Main Decoder.
The Main Decoder converts the Y and C signals to
the YCbCr format and directs them to Main Picture
YCbCr Select circuitry on the PCB-SIGNAL.
The Sub Picture NTSC Signal processing is also
shown in Figure 5-3. The sub picture NTSC signal
from the A/V Switch circuitry is composite video.
The signal is directed to IC6P00, on the PCB-SIG-
NAL. IC6P00 is the Sub Decoder, which separates
the Y and C signals and converts them to the YCbCr
format. The signals then are directed to Sub Picture
YCbCr Select circuitry.
Page 5-8
Page 5-9
Main YCbCr Select Circuitry.
The Main Picture YCbCr Signal Select Circuitry
is illustrated in Figure 5-4. It consists of four Switch
ICs and the Select circuitry in IC2V00, the Multi
Component Processor. The function of each of the
ICs is given in Table 5-3, along with the signal con-
trolling that IC.
The individual Switch ICs are controlled by SW (1-
8) logic, from the Port Expander in the Control Cir-
cuitry. IC2V00 is controlled by the SDA5 data line,
an I
2
C line from the Control PC.
IC2Y08 selects (NTSC) or (DVD/DTV) as the main
signals input to the 2HDW circuitry.
DVD-1, DVD-2 or DTV signals are selected by the
Select circuitry in IC2V00, and directed through
IC2Y04 to IC2Y08. In the V17+/V17++ models,
when the "MENU" button is pressed, IC2Y04 se-
lects Bitmap signals as the main picture source and
directs them through IC2Y08 to the 2HDW circuitry.
During a Bitmap Menu display, the Sub YCbCr se-
lects the normal main signal as the sub picture source
and the 2HDW circuitry inserts it in the Bitmap Menu
Display.
The circuitry on the PCB-2HDW performs line dou-
bling on 1H type signals, and when activated the PIP/
POP signal processing. The output YCbCr (2H) sig-
nals are applied IC2X06, the Y Enhancement IC on
the PCB-SIGNAL. In the IC, Y signal Aperture Im-
provement is performed, and the Cb and Cr signals
are delayed slightly to maintain timing between the
three signals.
From IC2X06, the signals are applied to one set of
inputs on IC2X08. The other set of inputs receives
signals from the Select circuitry in IC2V00, through
IC2Y04. IC2X08 selects the YCbCr (2H) signals
applied to IC2V00. It selects (2H) signals from the
2HDW circuit, or from IC2V00s Select circuit (via
IC2Y04).
HD signals, from the DTV inputs, are selected by
the Select circuitry in IC2V00, output at the Select
Output pins, and directed back to the Select Inputs
of the IC. The internal circuitry in IC2V00 converts
the HD YCbCr signals to RGB which are output at
pins 35, 37 and 39 of the IC.
In the Standard format main picture 480p and 1080i
signals are not processed by 2HDW circuitry, unless
POP is activated. When POP is activated, main 480p
and 1080i signals are routed through IC2Y04 and
IC2Y08 to the 2HDW circuitry. This is necessary to
generate the main POP window. In any other format
besides Standard, the signals are processed by the
2HDW circuitry.
NOTES:
IC SELECTS SW CTL
IC2Y08 (NTSC) or (DVD/DTV) SW1
IC2Y04 (*Bit Map Menu) or (IC2V00 Sel. Output) SW3
IC2V00 (DVD-1) or (DVD-2) or (DTV) SDA5
IC2X08 [2HDW (2H)] or [IC2V00 (2H)] SW5
*V17 and V17++ Only
Table 5-3: Main YCbCr Signal Selection ICs
Page 5-10
Page 5-11
Sub YCbCr Select Circuitry
The Sub Picture YCbCr Selection Circuitry is shown
in Figure 5-5. It also consists of four individual
Switch ICs, and the Select Circuitry in IC2V00. The
function of each of the ICs is given in Table 5-4.
The NTSC Sub Picture YCbCr signals, from the Sub
Decoder, are applied to one set of inputs on IC2Y10,
which selects the sub signal for the 2HDW circuitry.
The second set of inputs on IC2Y10 are either from
the DVD-1, DVD-2 or the DTV Inputs, selected by
IC2Y06.
IC2Y02 selects either DVD-1 or DVD-2 and directs
those signal to IC2Y06. The second set of inputs on
IC2Y06 receives the signals from the Select outputs
of IC2V00.
This circuit configuration allows the selection of a
DVD input for the main picture and the other DVD
input for the sub picture. It also allows a DVD input
to be selected for the sub picture when the main pic-
ture is from the DTV inputs.
However, when the main signal is DVD-1 or DVD-
2, DTV cannot be selected for the sub picture signal.
The Select circuitry in IC2V00 selects DVD input
for main picture, and therefore cannot select DTV
as a sub source. The output signals of IC2Y06 are
directed to IC2Y10, and may be selected for the
2HDW circuitry.
In the 2HDW circuitry, sub signals are processed by
line doubling circuitry, PIP/POP circuitry and inserted
in the main picture signals. The outputs of the 2HDW
circuit are the main picture signal with the PIP/POP
inserted, unless the main signal is 480p or 1080i.
PIP/POP with 480p/1080i Main
When the main signal is 480p or 1080i, it is only
processed by the 2HDW circuitry in the POP mode.
It is routed to the 2HDW circuit via IC2Y04 and
IC2Y08, refer to Figure 5-4.
In the single insert PIP mode, the main signal does
not pass through the 2HDW circuitry. The output
of the 2HDW circuit is only the sub insert picture.
Note that the outputs of IC2X06 take two paths:
1) Through IC2X08 to the Y, Cb and Cr inputs
on IC2V00.
2) To the EY, ECB, ECR inputs of IC2V00.
When the main picture is 480p, IC2X08 selects that
signal instead of the output of the 2HDW circuit.
When the main source is 1080i the internal circuitry
in IC2V00 selects those signals. The insert picture
signals, at pins 62, 63 and 64 of IC2V00 are inserted
in the selected 480p or 1080i main signals in the IC.
Timing for the insertion is provided by the 2HDW-
YS signal for the 2HDW circuitry.
NOTES:
IC SELECTS SW CTL
IC2Y10 (NTSC) or (DVD/DTV) SW2
IC2Y06 (DVD) or (DTV) SW4
IC2V00 DTV may be (1080i, 480p or 480i) SDA5
IC2Y02 (DVD-1) or (DVD-2) SW6
Table 5-4: Sub YCbCr Signal Selection ICs
Page 5-12
Page 5-13
Multi Component Processor
Figure 5-6 illustrates a Simplified Block Diagram of
the circuitry in the Multi Component Processor.
External Input Select Circuit
This part of the IC selects the YCbCr, or RGB sig-
nals, from the External Inputs. These inputs include
DTV, DVD-1, DVD-2, and in V17+/V17++ mod-
els, the VGA inputs.
The video/color signals are usually in the YCbCr
format. The YCbCr signals from Select circuitry are
routed through two switches and output at pins 76
through 78.
However, the VGA signal is RGB. VGA RGB sig-
nals are directed through the two switches directly
to the RGB Select circuit at the input to the RGB
signal processing.
Some ATV Decoders output RGB signals. In this
case, the RGB is converted to the YCbCr format
and directed through the two switches to pins 76-
78.
External horizontal and vertical sync signals are
also selected by the Select circuitry. This are directed
to and External Sync Processing circuit.
Sync may be part of the "G" signal in some ATV
Decoders that output RGB. If the External Sync
Processing circuit does not detect separate horizon-
tal and vertical sync, it closes the switch at pin 25
and G signal is routed to the External Sync circuit.
From the External Sync Processing circuit, the sig-
nals take two paths:
1) To an Int/Ext Sync Select circuit.
2) Out of the IC at pins 79 and 80.
480p and 1080i sync are selected by the Int/Ext Sync
Select circuit and are output at pins 28 and 29.
(1H) sync signals, output at pin 79 and 80, are
doubled by the 2HDW circuit and returned to pins
65 and 66. When the selected signal is (1H), the
(2H) signals at pins 65 and 66 are output at pins 28
29. The signals from pins 28 and 29 are directed to
the Deflection Jungle to synchronize the Deflection
Drive circuitry.
Main Video/Color Signal Path
The main picture source is selected from the (2H)
inputs at pins 67-68, or the HD inputs at pins 73-75.
The signals then pass through an Int/Ext Switch. The
switch is used to insert a single PIP in the picture, if
the initial main source in 480p or 1080i (HD).
The Y, Cb and Cr signals next pass through conven-
tional processing circuits, and are combined in a Color
Matrix to produce RGB signal. The signals then pass
through RGB and CRT Adjustment circuitry and are
output at pin 35, 37 and 39.
Part of the RGB processing includes On Screen Dis-
play (OSD) insertion. Convergence RGB OSD is
input at pins 46-48, and the YS signal at pin 49 times
the OSD insertion.
NOTES:
Page 5-14
OSD RGB from the Control circuitry is input at pins
50-52, and insertion is timed by the YS/YM signal at
pin 49.
On Screen Display Circuitry
Figure 5-7 shows the On Screen Display (OSD) cir-
cuitry in the V17 chassis. This is the same as in that
in the V16 chassis, only component nomenclature
has changed.
Convergence RGB OSD signals are generated in
the Convergence Waveform Generator, and are di-
rected to the Multi Component Processor (IC2V00)
on the PCB-SIGNAL. Timing for OSD insertion is
provided by the YS signal input at pin 45 of IC2V00.
Control circuitry RGB OSD signals are generated in
Control PC and applied to pins 50-52 of IC2V00.
Timing for OSD insertion is provided by the YS and
YM signal from the PC. The combined YS and
YM signals are directed to pin 49 of IC2V00 and
also produces the transparent gray background for
Closed Caption Displays.
Pin 49 is amplitude sensitive, key voltage levels are:
Zero volts ... no OSD or gray background.
1.4 volts ... activates the gray background.
3.2 volts, or higher ... insert the OSD.
IC7C03 and IC7C10 are buffer ICs, increasing the
3.3 volt signals from the PC to 5 volt signals. Both
Page 5-15
ICs are the same type. When the OE input goes
High, the logic at the A input is output at the Y out-
put (pin 4). When the OE input is Low, pin 4 goes to
a high impedance state.
IC7C03 is always enabled from the 5 volt supply.
The output at pin 4 is merely an amplified version of
the YS signal from the PC.
IC7C10 is only enabled when the YM line goes High.
When pin 4 of IC7C10 is at a high impedance state
in has no effect on the YS signal applied to pin 49 of
IC2V00. When IC7C10 is enabled, pin 4 goes Low.
This forward biases D7C03 and D7C04, reducing
the YS signal from IC7C03 down to 1.4 volt, the
gray level.
Figure 5-8 illustrates YS/YM signals for:
(A) just an OSD.
(B) an OSD with a gray background.
With no gray background the YS signal provides the
only timing for OSD insertion, refer to Figure 5-8A.
Figure 5-8B shows the YS/YM signals with a gray
background. The YS line goes High for the dura-
tion of the display on each horizontal line. The YM
line generates the OSD insertion timing signal and
produces the gray background.
The YM line goes High during the background, and
drops Low during OSD insertion. When High pin 4
of IC7C10 goes Low, pulling the YS voltage from
IC7C03 down to 1.4 volts, and the gray background
is generated in IC2V00.
During OSD insertion, pin 4 of IC7C10 goes to a
high impedance state. This allows the YS signal from
IC7C03 to increase to the OSD insertion level.
NOTES:
Page 5-16
PCB-2HDW
Although the PCB-2HDW is considered a replace-
able component, a basic understanding of its' circuitry
may be helpful. Figure 5-9 shows a Simplified Block
Diagram of the 2HDW circuitry.
The Main and Sub YCbCr analog signals are con-
verted to 8 bit digital signals by six A/D Converters.
The Main and Sub Y digital signals are applied di-
rectly to IC7H02. The Main and Sub Cb and Cr
signals are multiplexed (intermixed) then and applied
to IC7H02.
IC7H02 performs line doubling, and when activated
POP/PIP signal processing and sub picture insertion.
The digital output signals from IC7H02 are de-mul-
tiplexed forming separate digital Y, Cb and Cr sig-
nals, at the 2H horizontal rate.
The signals are converted to analog by a three chan-
nel D/A Converter in IC7G01. The analog outputs
are directed back to the PCB-SIGNAL.
IC7H07 is the Timing Control IC, controlling
IC7H02. It receives horizontal and vertical sync from
both the main and sub signals. If the horizontal sync
is at the 1H rate, line doubling is performed. When
the horizontal rate is 2H, there is no line doubling.
Page 5-17
Bitmap Circuitry
The Bitmap circuitry is used on V17+ and V17++
models to produce Menus with high quality 3 dimen-
sional icons and text. Figure 5-10 shows the Bitmap
Main Menu display.
Although the Bitmap Menus stand out more and are
more impressive, the selections in the menu system
are the same as those in V17 models. It should be
noted that the Remote Control response is slightly
slower in models with Bitmap circuitry.
Figure 5-11 illustrates a Basic Block Diagram of the
Bitmap circuitry. The circuitry is similar to that on a
Computers Graphic Board. Only the major ICs are
shown in the diagram:
IC8S01 ... Super I/O routes signals to and
from the CPU, Flash ROM, and IGS ICs.
IC8M01 ... CPU controls the circuits opera-
tion.
ICM03 ... A Flash ROM, storing the data for
the high quality icons.
IC8N00 ... IGS IC, generates the Bitmap
RGB signals and sync pulses.
IC8N01 & IC8N02 ... RAM memory ICs
used during the Bitmap signal generation.
Control
The Bitmap circuitry is controlled by the following
lines:
1) D-OUT ... transfers data from the Control
circuitry PC to the Bitmap circuitry.
2) D-IN ... transfers data from the Bitmap
circuitry to the TV's Control PC.
3) M32-CS ... enables the Bitmap circuitry to
receive data.
4) M32-RST ... Reset signal from the Control
circuit PC. Sets the Bitmap circuitry to its
nominal starting point when the set is turned
On.
5) V-PULSE ... vertical pulse from IC4B01,
used in timing the Bitmap circuits operation.
MAIN PICTURE
Figure 5-10: Bitmap Main Menu Display
Page 5-18
Output Signals
Five output signals are generated by the IGS IC and
directed back to circuitry on the PCB-SIGNAL.
The Y-BMP, Cb-BMP and Cr-BMP signal are di-
rected to Main Picture YCbCr Signal select circuitry.
V-BMP and H-BMP sync signals are routed to the
Sync Selection circuitry on the PCB-SIGNAL.
The Bitmap signals can be considered another video
source, that is selected for the main picture when the
Bitmap is activated.
Troubleshooting
Since the PCB-BITMAP is considered a replaceable
component, troubleshooting is limited to checking
the input signals and DC supplies.
The M32-RST signal should be checked as the TV is
switched On. Normally there is no action on this
line except during turn On.
If the PCB-BITMAP has to be replaced. The TV
will operate without the PCB-BITMAP plugged in.
Normal TV functions will operated, but there will be
no menu displays.
Page 6-1
Sync Signal Path
Vertical Deflection
High Voltage Regulation
High Voltage
Chapter 6
Sync, Deflection
and High Voltage
Page 6-2
Page 6-3
Figure 6-1 shows an overall block diagram of the
Sync, Deflection and High Voltage circuits. Note
that the sync signal path, shown as one line, is actu-
ally separate vertical and horizontal sync in parallel.
The Vertical and Horizontal Sync Signals, sepa-
rated from the selected signal source, can be one of
three different formats.
1H -- Also known as 480i, this format can
originate from any NTSC Input, a DVD
Component Input or the DTV Input. The
horizontal frequency is 15.75 KHZ.
2H -- Or 480p, can originate from the
DVD or DTV Inputs and on V17+/++
models, the VGA Input. The horizontal
frequency is twice the 1H rate, 31.5 KHZ.
HD -- 1080i can be sourced from the DTV
Inputs only. The horizontal frequency is
33.75 KHZ.
The Vertical Sync frequency is 60 HZ for all com-
patible sources.
Three factors determine if the signal is processed by
circuitry on the PCB-2HDW.
1) The original signal format, 1H, 2H or HD.
2) Use of the Format Feature.
3) Use of the POP Feature.
The sync signals parallel the video signals
through the video selection and switching pro-
cess. If the source is NTSC, DVD or DTV 480i
(1H), the signal must be enhanced by Line Dou-
bling. In these instances, the signals are applied to
the PCB-2HWD by SW 7 and the Horizontal Sync
frequency is doubled. This results in a horizontal
sync frequency of 31.5 KHZ (2H). The output for-
mat is customer selectable, 480p or 960i.
If the selected source is 480p (2H) or 1080i (HD),
and the Format and POP features are not being used,
the 2HDW circuitry is bypassed using SW 5. If
the Format or POP feature is selected, the signals
are directed by SW 7 and SW5 for processing by
the 2HDW circuit.
Page 6-4
The Multi-Component Processor, IC2V00, outputs
to the Deflection Jungle either the 2H or HD sync
signals.
The sync signals are then used by the Deflection
Jungle, IC4A01, to synchronize the internal Verti-
cal and Horizontal Drive circuits.
Vertical Drive is applied to conventional Vertical
Output IC circuitry to power the Deflection Yokes.
Horizontal Drive is sent to the Output circuitry, am-
plified, then directed to the Horizontal Deflection
Yokes.
A sample of the Horizontal Deflection drive signal
is coupled to the High Voltage Regulator. Regula-
tion is performed by Pulse Width Modulating the
High Voltage drive signal used to drive the High
Voltage Output MOSFET and Flyback Transformer.
More details on the Sync, Deflection and High volt-
age circuits are provided in this chapter.
Sync Block Diagram
The signal path for vertical and horizontal sync is
much longer than in a conventional TV receiver. In
addition to the switching required by the different
signal sources, timing for the POP, Format and Line
Doubler circuits is provided by the sync signals. A
block diagram of the sync signal path is shown in
Figure 6-2. The sync path for each type of input
will be explained further.
NTSC Sync
Main Picture NTSC signals can be sourced from
the Main Tuner, external Video Inputs 1-4 and in
V17+/++ models, the STB (Set Top Box) Input.
After selection, the Luminance signal, denoted
CVBS/Y-IN, is applied to the sync separation cir-
cuitry in the Main Decoder, IC6M00 located on the
PCB-3DYC/MD.
Sub-Picture NTSC signals can be sourced from the
Sub-Tuner, external Video Inputs 1-4 or the STB
Input. The Sub Decoder, IC6P00, located on the
PCB-SIGNAL performs sync separation to the sub
picture luminance signal shown as V PIP.
The Main and Sub Picture signal path to the De-
coders is explained in Chapter 5.
DVD Sync
DVD sync is separated from the luminance signals
from the DVD 1 and 2 Inputs by IC2X01 and
IC2X02 respectively. The sync signals can be ap-
plied for timing as a Main or Sub picture.
IC2Y01 (SW 6) selects either DVD 1 or 2 if these
inputs are to be used as a Sub Picture. The Multi
Component Processor, IC2V00, is used to select a
DVD source for the Main Picture sync signal.
DTV Sync
DTV sync is applied directly from the inputs on the
PCB-TERMINAL to the Multi Component Proces-
sor. Sync can be in either of three formats:
Sync on Green -- For RGB Sources.
Separate H and V -- For RGBHV
Sources
Sync on Y -- For Y, Pr, Pb Sources
For RGB and YPrPb the same input connector is
used for the Green or Y signal.
Note: Some DTV sources can include both RGB
with sync on green and RGBHV. When configured
with both inputs, timing errors can occur, resulting
in an unstable picture. In such cases, the separate H
and V Inputs should not be used.
VGA Sync
Like DTV sync, VGA sync is applied directly from
the inputs on the PCB-TERMINAL to the Multi
Component Processor.
Page 6-5
Page 6-6
Main Picture Sync Selection
As mentioned, the sync signal path parallels the video
signal path for selection and switching. The Multi
Component Processor outputs either DVD, DTV
or VGA sync from pins 79 and 80 where it is passed
through IC2V01 (AND Gate) and IC2Y03 (SW 3).
SW3 permits selection of sync generated by the
PCB-BITMAP in select models.
If the selected sync output by the Multi Component
Processor does not need Doubling, will not have
its Format revised or will not host a POP, it is se-
lected by IC2X07 (SW 5) to bypass the 2HDW.
Main sync from the Main Decoder or Multi Com-
ponent Processor is selected for processing by the
2HDW by IC2Y07 (SW 7).
After being returned to the Multi Component Pro-
cessor, pins 65 and 66, 2H or HD sync is directed
out pins 28 and 29 to the Deflection Jungle to time
the generation of Horizontal and Vertical Drive.
Sub Picture Sync Selection
All Sub Picture sync is applied to the PCB-2HDW,
connector EA, pins 6 and 8. Switching is performed
as follows:
DVD 1 or DVD 2 -- IC2Y01 (SW 6)
DVD 1/2 or DTV -- IC2Y05 (SW 4)
DVD/DTV or NTSC -- IC2Y09 (SW 8)
Since DVD 1 or 2 sync can be selected for Sub pic-
ture timing by IC2Y01 (SW 6), the DVD Inputs
can host one another as Main/Sub pictures. The
DVD inputs can also be used as a Sub-Picture source
with the DTV source as the Main picture. How-
ever, a DVD Main picture cannot host a DTV Sub
Picture.
Note: The POP feature is not functional using the
VGA Inputs.
Deflection Drive
Deflection Drive is generated by the Deflection
Jungle, IC4A01, located on PCB-JUNGLE. A block
diagram of the Deflection Jungle circuitry is shown
in Figure 6-3.
Inputs and Outputs to the DR and DQ Connectors
between the PCB-MAIN and PCB-Jungle are
shown in the block diagram starting from the left.
Connector DR
Pins 10 and 9 are the I
2
C inputs for PC con-
trol over deflection.
Vertical Sync is input Pin 2.
The VTIM and SCP output at Pins 3 and 1
and are directed to IC2V00 to time signal
processing.
The input at Pin 4 feeds back a saw tooth from
the Vertical Yoke ground return for vertical
linearity correction. This waveform is also sent
to the Video Blanking circuit. If Vertical De-
flection is lost, video will be blanked to pre-
vent CRT phosphor damage.
The - and + Vertical Drive signal is output
Pins 6 and 7 respectively.
Connector DQ
A Vertical Parabola for Side Pin Cushion
Correction is fed out Pin 2.
Pins 9 and 10 provide VCC, 9V STBY.
The Horizontal Drive signal is output Pin 3.
The F33K signal output at Pin 7 provides a
High indication to the horizontal circuit
when a 1080i signal is present to indicate a
scanning rate of 33.75KHZ.
The FH Status signal output at Pin 6 pulses
when a change in the horizontal rate occurs.
Horizontal Sync is input Pin 5.
The H-PULSE is fed back from the FBT for
Phase Control of the Horizontal Drive signal.
Page 6-7
Page 6-8
While much of the Horizontal Deflection circuit is
carried over from previous chassis, some of the sup-
porting circuitry is new. A block diagram of the
Horizontal Deflection circuit is in Figure 6-5.
The Horizontal Drive signal from the Deflection
Jungle drives the Horizontal Output transistor,
Q5A31, by way of Q5A33, Q5A32 and T5A32. The
ground return for the yokes is provided through
C5A37, C5A38, R5A46 and the Linearity Coil,
L5A33.
Supporting Circuitry
Q5A01 has two functions.
1) Voltage Regulation
2) Pin Cushion Correction Drive.
The conduction of Q5A01 is controlled by the three
inputs to IC5A01:
F33K
FH STATUS
SIDE-PIN
Vertical Deflection
While the output IC used for
vertical deflection has been
changed from generic #
LA7845 to TDA8177, the
theory of operation remains
unchanged. A block diagram
of the circuit is shown in Fig-
ure 6-4.
The amplifier is configured in
a capacitively coupled arrange-
ment with C4B11 in series with
the deflection yokes. Linearity
and S correction is fed back to
the inverting side of the ampli-
fier. The ground return occurrs
by way of R4B10 and R4B12.
Since this chassis is capable of two deflection fre-
quencies, the deflection circuit has different voltage
requirements for the different signal sources. The
F33K input at DQ Pin 7 changes the regulation.
HIGH = 31.5 KHZ
LOW = 33.75 KHZ
F33K changes the DC bias on the Op-amp, IC5A01,
by switching Q5A04. This results in a bias change
on Q5A01, raising or lowering the source voltage
to the Horizontal Deflection circuit.
F33K also switches Q5A35 and Q5A34, removing
or placing R5A45 in parallel with R5A36 and
R5A37. This alters the voltage source for the Hori-
zontal Drive circuit, T5A32 and Q5A32.
To reduce circuit stresses caused when changing fre-
quencies, the FH STATUS pulses HIGH momen-
tary at the base of Q5A05 during the transition pe-
riod. The change in bias briefly lowers the output at
the emitter of Q5A01 while the circuit stabilizes.
Page 6-9
The Pin Cushion Correction waveform, SIDE-PIN,
generated by the Deflection Jungle is also added to
the input of IC5A01 to be coupled into the deflec-
tion circuit. This results in a 10 V-pp, 60 HZ, para-
bolic waveform added to the DC voltage at the emit-
ter Q5A01.
C5A34 couples a sample of the Horizontal Deflec-
tion Output pulse to the Video Blanking circuit. If
deflection is lost, the video will be blanked to pre-
vent damage to the CRTs' phosphor.
C5A34 is also coupled to the High Voltage Regula-
tor, IC5A00, to develop the High Voltage Drive sig-
nal.
Page 6-10
High Voltage
IC5A00 achieves High Voltage regulation by Pulse
Width Modulating the High Voltage Drive. Figure
6-6 demonstrates how this is performed.
The PWM is controlled by the Oscillator and Error
Amp Inputs. The leading edge of the Saw tooth
generated by the Oscillator is timed to the HD input
to Pin 4. This, in turn, determines the leading edge
of the PWM. The On time pulse duration of the
PWM is determined by the Error Amp.
The HV ADJ input to the Error Amp is a DC refer-
ence originating in the Convergence Generator cir-
cuit. The HV FB is a Feed Back voltage propor-
tional to the High Voltage.
During normal brightness and high voltage, the out-
put of the Error Amp is timed to trigger the trailing
edge of the PWM to give less than a 50% pulse
duration.
If an increase in beam current creates a load on the
high voltage, the Feed Back is lowered. The Out-
put of the Error Amp will increase resulting in a
delay of the sample timing and a longer pulse dura-
tion.
A decrease in beam current and resulting rise in High
Voltage will produce the opposite results.
IC5A00 also has protection circuitry, Over Current
input to Pin 7 and Over Voltage (XRAY) input to
Pin 10. If the threshold of either input is exceeded,
the PWM will be shut down. During shut down,
the Sense outputs at Pins 8 or 3 will be high. Check-
ing these pins will help determine if the shutdown is
current or voltage related.
Page 6-11
Figure 6-7 shows how IC5A00 is used with the High
Voltage, Regulation and Shut Down circuits.
The PWM Output drives Q5A51 and the Fly Back
Transformer. The resultant High Voltage is applied
to the CR Block and split to the CRTs.
The DX connector from the CR Block provides:
AC HV Feed Back sample
DC HV Feed Back sample
Ground return for the voltage divider.
R5A58 and R5A59 couples the AC and DC HV
Feedback samples together and routes them to Pin
6 of IC5A00 where it is compared to the reference
DC voltage at Pin 11 for regulation.
Protection Circuitry
The V17 chassis protection circuitry works in con-
junction with IC5A00 to shutdown under excessive
voltage, current or arcing conditions.
Current in the High Voltage circuit is detected by
the voltage drop across Q5A51's ground return re-
sistor, R5A51. If the increase in current is exces-
sive, it will be detected at the DCL input at Pin 7,
causing IC5A00 to shut down.
Excessive High Voltage and Beam Current con-
ditions are detected by the comparators in IC5A02.
If either is excessive, a LOW is output on the
XRAY line at Connector KH, Pin 11 where it is
directed to the Control PC, IC7A00, pin 58.
Page 6-12
Beam Current is detected by monitoring the Au-
tomatic Current Limiter voltage produced at the
ground return side of the FBT, Pin 8. An increase
in beam current will cause the ACL voltage to de-
crease. Excessive beam current is detected by com-
paring it to a reference voltage in IC5A02.
The voltage rectified by D5A57 is representative of
the High Voltage. It is also compared to a stable
reference by IC5A02. Again, if excessive, the out-
put will cause a shut down condition.
Circuitry associated with Q5A06 provides Arc Pro-
tection. Under circumstances where arcing may
occur, the beam current will surge. During such
times, the ACL voltage will dip drastically, avalanch-
ing D5A60, turning on Q5A06, causing IC5A00 to
go into shutdown. C5A64 will hold the set in shut-
down until AC power is removed and reapplied to
the set.
Page 7-1
Overall Convergence Signal Path
Convergence Output Circuitry
Convergence Control Circuitry
Chapter 7
Convergence Circuitry
Page 7-2
Page 7-3
Convergence Circuitry
The Convergence circuitry in the V17 series of chas-
sis, is basically the same as that used in the V15 and
V16W chassis.
Correction signals are generated in a serial
digital format.
Converted to analog signals
Amplified and directed to the sub coils in the
Deflection Yokes
The differences in the V17 chassis are:
New Convergence Output ICs (Generic
#STK392-570)
Reduced number of ICs by combining the
Low Pass Filters (LPF) and Summing Ampli-
fiers into one IC.
Page 7-4
Page 7-5
Overall Convergence Signal Path
Figure 7-1 illustrates the Convergence Circuitry
Overall Signal Path. Horizontal and vertical pulses
from the Deflection circuitry are the source for all
Convergence Correction signals. The pulses are pro-
cessed by the Flip Flops in IC8A03, providing sharp
clean pulses for the Convergence Waveform Gen-
erator, IC8A00.
IC8A00 generates correction signals in an 8 bit se-
rial digital format. Both horizontal and vertical cor-
rection signals are generated for each primary color,
red, green and blue. The correction signals are di-
rected to specific Digital to Analog (DAC) Converter
ICs. Each of the DAC ICs is comprised of two Digi-
tal to Analog Converters.
IC8D01 and IC8D02 process Red and Green
Horizontal correction (RH & GH).
IC8D03 and IC8D04 process Blue Horizon-
tal (BH) and Red Vertical (RV) correction.
IC8D05 and IC8D06 process Green and
Blue Vertical correction (GV & BV).
The signals from the DACs are processed by Low
Pass Filters and Summing Amplifiers in ICs IC8D07,
IC8D08 and IC8D09. Note that green correction is
added to both the red and blue correction in the Sum-
ming Amplifiers. Therefore, green raster correction
affects all three colors, and must be adjusted before
adjusting red and blue conver-
gence.
The resulting six correction sig-
nals (RH, GH, BH, RV, GV and
BV) are directed to the Con-
vergence Output ICs on the
PCB-POWER. IC8C02 ampli-
fies the vertical correction sig-
nals and directs them to the sub
vertical coils in their respective
Deflection Yoke. IC8C01
serves the same purpose for the
horizontal correction signals.
Convergence Output
Circuitry
Figure 7-2 shows the Conver-
gence Output Circuitry in more
detail. It is basically the same
as in the V16 chassis, except
for pin number designation.
In the V16 chassis, the positive
and negative 24 Volt Supplies
had to be increased to +34 and
-34 Volts at the edges of the
picture. This increased the con-
vergence correction at the
edges of the picture. With the
new output ICs in the V17 this
Page 7-6
is not required, only the +24 volts and -24 volts sup-
plies are needed.
Figure 7-3 shows the circuit configuration of a Con-
vergence Output Amplifier. All six of the Output
Amplifiers are the same.
The correction signal from the Waveform Generator
is applied to the (+) input of the Output Amplifier.
The amplified output is directed to the Sub Coil in
the Deflection Yoke. The Sub Coil is returned to
ground through two parallel 3.9 Ohm resistors.
The signal across the ground return resistors is di-
rected through an RC network to the (-) input of the
amplifier. This feedback stabilizes the amplifier and
helps supress noise.
The C-MUTE command is input at pin 2 of IC. It is
connected to all three of the amplifiers in that IC.
When High, the Output Amplifiers are disabled.
Convergence Mute is momentarily activated:
When the TV switched On or Off.
During a channel change.
During an Input change.
During a horizontal scan frequency change.
The new Convergence Output ICs are smaller than
those used in previous models. The mounting of the
ICs has been changed to insure efficient heat transfer
to the heat sink. A strap is now used to hold the ICs
against the heat sink. The strap is held in place by
three mounting screws, as shown in Figure 7-4.
Page 7-7
Convergence Control Circuitry
The Convergence Control Circuitry is shown in Fig-
ure 7-5, and is also similar to the V16 chassis. All
convergence control signals originate in the Control
PC, IC7A00. The CE2RST, CMUTE and CRESET
commands are buffered by IC7A01 before being ap-
plied to the Convergence circuitry. The purpose of
each of the control lines is given in the following.
CSDA I2C data line transfers data to and from
IC8A00.
CSCL clock line times data transfer.
CACK acknowledgment line IC8A00 informs
the PC that it has received a command.
CBUSY IC8A00 holds this line Low when per-
forming a command, informing the PC it is busy.
CRESET Factory use, resets all convergence data
to its nominal point.
CMUTE Removes all convergence correction
drive to the Convergence Output Amplifiers.
CE2RST If lock up occurs, the CBUSY line is
held at a constant Low. The PC responds by driv-
ing the CE2RST line momentarily High. This mo-
mentarily removes the 5 volt supply from IC8A01,
unlocking the E2PROM.
Page 7-8
D/A Converter Timing Signals
The BCLK signal from IC8A00 is the Bit Clock sig-
nal controlling the D/A ICs, and WCLK (Word
Clock) enables the D/A Converters. During the
WCLK cycle the odd numbered D/A ICs are enabled
(IC8D01, IC8D03 and IC8D05).
Q8A01 inverts the WCLK signal, enabling the even
numbered D/A Converters during the second cycle
(IC8D02, IC8D04 and IC8D06).
HV-REG & DBF
IC8A00 also generates the signals controlling HV
Regulation and Dynamic Beam Focus. The PWM1
signal from pin 16 of IC8A00 is used to set HV Regu-
lation.
The parabolic signal from pin 38, is the source signal
for the Dynamic Focus circuitry.
Page 8-1
Signal Sources / Outputs
Signal Paths
Audio Output Amplifier
Chapter 8
Sound Circuitry
Page 8-2
Page 8-3
Sources / Outputs
Like the Video, the number of sound sources avail-
able has increased in the V17 chassis. These sources
include:
Main Tuner
Sub Tuner (monaural only)
External Inputs 1 through 3
Front External Inputs
Digital TV inputs (DTV)
DVD Inputs 1 & 2
In the V17+ and V17++ chassis the Set Top Box
(STB) inputs are added to the list.
The sound outputs include:
Sets Speakers
Monitor Outputs (fixed or variable)
PIP Sound Outputs
Sound Signal Path
Figure 8-1 illustrates and Overall Diagram of the
Sound Circuitry. The same ICs used to select Main
and Sub NTSC video sources are used to select the
sound source, IC2L01 and IC2K01.
IC2L01 selects the sound source from the EXT-2,
EXT-3, FRONT, DVD-1 or DVD-2 inputs. In the
V17+ and V17++ models, the STB Inputs are also
selectable by IC2L01. The selected signals from
IC2L01 are directed to IC2K01.
IC2K01 selects the signals from the EXT-1, DTV,
Main Tuner, Sub Tuner or that selected by IC2L01.
It selects both the main and sub (PIP) sound signal
sources.
The selected sub sound source signals are directed
to the Right and Left PIP Output Jacks on the rear
of the TV.
The Main Tuner Sound Signal is directed to IC3A01,
the MCS/A-Control IC. The signal is decoded and
broken down into its separate right and left audio
channels. The right and left channels are directed to
pins 29 and 31 of IC2K01. If a broadcast SAP sig-
nal is the selected source, it is selected in IC3A01
and applied to pins 29 and 31 of IC2K01.
The sound signal from the Sub Tuner is monaural
and is applied directly to pin 25 of IC2K01.
The selected main sound source signal, either the
Main Tuner, EXT-1 or DTV Inputs, or the signals
from IC2L01, are output at pins 43 and 45 of
IC2K01. The signals are then directed through the
Audio Control circuitry in IC3A01 and conventional
sound adjustments may be made, volume, treble, bass,
etc.
The signals from the Audio Control circuitry take
two paths:
1) To the Audio Amplifier, IC3E01, on the
PCB-POWER.
2) To the left and right Variable Inputs at pins
59 and 61 of IC2K01.
IC3E01 amplifies the right and left channel signals,
and through the EL connector directs them to the
TVs speakers.
Either fixed or variable level sound signals may be
selected for the Monitor Audio Output Jacks. Fixed
level signals are derived from the main sound source.
Variable level signals are derived from the signals
output from the Audio Control circuitry in IC3A01,
and directed back to pin 59 and 61 of IC2K01. The
selected signals are output at pin 52 and 54 of IC2K01
and directed to the Monitor Output Jacks.
Sound Circuitry
Page 8-4
NOTES:
Page 8-5
Audio Output Amplifier
Figure 8-2 illustrates the Audio Output Amplifiers
in IC3E01. This is the same IC used in the VZ7 and
VZ8 chassis. Internally it is divided into Right and
Left Output Amplifiers.
The first stage in the amplifier is a phase splitter,
outputting two signals 180 degrees a part. The in-
phase signal (+), and the out of phase signal (-) are
amplified by two separate amplifiers. The amplified
(+) signal is applied to one end of the speaker's coil,
and the (-) signal to the other end of the coil.
This type of push/pull speaker drive eliminates the
need for a large electrolytic capacitor to block DC,
between the output IC and the speaker. The capaci-
tor is not needed since the average DC voltage at the
(+) and (-) outputs of the IC are the same, approxi-
mately 9 volts. Removing the capacitor also improves
the low frequency response of the signal applied to
the speakers.
IC3E01 also has an internal Mute circuit. When the
voltage at pin 6 goes High, no sound is output from
the IC. The logic at pin 6 of the IC is controlled by
the MUTE-3 command from the Control circuitry.
Page 8-6
Copyright 2000 Mitsubishi Digital Electronics America, Inc.
9351 Jeronimo Road Irvine, CA 92618-1904
Part Number: T/M V17

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