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Wireless Networks 4 (1998) 41–53 41

Noise considerations for mixed-signal RF IC transceivers


Sayfe Kiaei a , David Allstot b , Ken Hansen c and Nishath K. Verghese d
a Broadband Products, Motorola Inc., Austin, TX 78721, USA
b Electrical and Computer Engineering Department, Oregon State University, Corvallis, OR 97331, USA
c Wireless Technology Center, Motorola Inc., Austin, TX 78759, USA
d Cadense Design Systems, San Jose, CA 95134, USA

This paper discusses design trade-offs for mixed-signal radio frequency integrated circuit (RF IC) transceivers for wireless applications
in terms of noise, signal power, receiver linearity, and gain. During air wave transmission, the signal is corrupted by channel noise,
adjacent interfering users, image signals, and multi-path fading. Furthermore, the receiver corrupts the incoming signal due to RF circuit
non-linearity (intermodulation), electronic device noise, and digital switching noise. This tutorial paper gives an overview of the design
trade-offs needed to minimize RF noise in an integrated wireless transceiver. Fundamental device noise and the coupling of switching
noise from digital circuits to sensitive analog sections and their impact on RF circuits such as frequency synthesizers are examined.
Methods to minimize mixed-signal noise coupling and to model substrate noise effects are presented.

1. Introduction

There has been rapid growth in wireless communi-


cation systems such as cellular and cordless telephones,
multi-media, paging, and Personal Communication Systems
(PCS) [6,10,19,23,26,27], and the recent FCC allocation of
new PCS channels in the 1.8–2 GHz band will simulate fur-
ther growth in the next generation of wireless systems [27].
The recent increase in wireless applications brings a new
set of aggressive design goals: low-power for portability, (a)
lower-cost, and higher integration of RF components. For
a typical receiver, the RF signal’s magnitude modulated at
900 MHz–2 GHz, can range from 20 dBm to −120 dBm;
i.e., with a 50 Ω termination, the incoming signal can be
as low as 0.22 µV [10]. During signal propagation and
reception, there exists many sources of noise such as inter-
ferers, channel noise and device non-linearity (mixers and
front and RF circuitry) that affect the integrity of the de-
modulated signal. Figure 1(a) shows the possible sources
of noise during signal transmission and reception. This can
be categorized as follows:
• Channel noise sources and signal losses: background (b)
white gaussian noise, atmospheric noise, radio propaga- Figure 1. Wireless system noise model. (a) Cellular system model.
tion losses, Doppler effect, fast fading, multi-path signal (b) Transceiver model.
losses, and adjacent channel interferers [10,23].
the signal path in the RF mixer as illustrated in figure 1(b).
• Front-end RF receiver non-idealities: RF circuit sensi-
Moreover, on-chip integration of sensitive analog RF cir-
tivity, circuit non-linearity (mixers, amplifiers, RF fil-
cuits with the noisy local oscillator (LO), frequency syn-
ters), intermodulation, spurious responses [4,9,18,21,22,
thesizer, and other high-speed digital circuits can be detri-
25,30], fundamental device noise, and synthesizer phase
mental to the weak incoming RF signal. The synthesizer
noise [28].
consists of a high-speed divider/counter circuit which can
• Mixed-signal noise coupling: digital circuit switching produce significant switching noise [8]. Any digital switch-
noise coupling to RF and sensitive analog sections via ing noise is of significant importance since cumulatively
the substrate, input/output pins, and supply lines [1,2,7, it can reach several hundred mVolts and propagate to the
12,15,29,31–34]. RF section via the substrate and I/O pins. This noise can
Fundamental device noise contributions to the frequency also couple to the signal path during the mixing operation
synthesizer spectral response (phase noise) can couple to of LO with the incoming signal. Methods to model such

 J.C. Baltzer AG, Science Publishers


42 S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers

noise and to prevent its propagation to the analog section


are discussed in sections 4 and 5.
The organization of this paper is as follows: a tutorial
on the basics of radio frequency signal propagation and
interference is given followed by an overview of a typical
RF transceiver and its design trade-offs. Later sections
examine on-chip noise coupling for mixed-signal RF ICs
and methods to model such effects.

2. RF signal losses and channel noise Figure 2. Reflective signal losses.

The properties of a wire-lined communications channel


such as a cable telephone system which can be modeled as
a stationary channel are well understood. However, a wire-
less channel is constantly changing over time due to the
uncertainty in the channel terrain, signal propagation path,
and the mobility of the transceiver unit. The RF signal
received at the antenna is a function of the distance from
the base station, signal path geography, obstacles between
the transmitter and the receiver, and multi-path propaga-
tion of reflective signals. The channel noise illustrated in
figure 1(a) consists of large scale propagation losses, log-
normal shadowing, and exponential multi-path power losses
(Rayleigh fading) [3,10,14,21–23,30] as described bellow.

2.1. Power-law losses Figure 3. Mobile received signal fading representation.

2.2. Multi-path losses


The power law effect is due to the power loss of an elec-
tromagnetic wave traveling through free space in a line of The power law expression of (2) describes large-scale
sight path from transmitter to receiver. Under the assump- losses in the channel as a function of distance. There is
tion that the transmitting antenna is in the far field of the also substantial variation in the receive power for small
receiving antenna [10], changes in distance because radio waves arrive at the re-
ceiver with different time delays (phase) and from different
Pt Gt Gr λ2 directions. As the mobile unit moves, the phase relation-
Pr (d) = , (1)
(4π)2 d2 L ships among various incoming signals to the receiver via
direct paths or reflected paths change. More specifically, if
where Pr and Pt are the received and transmitted signal there is a substantial change in phase and magnitude of the
powers, Gr and Gt are the receiver and transmitter antenna incoming signals, then the received signal is subjected to
gains, d is the receiver distance is from the transmitter, L is fading. In addition to reflections, the mobile may also be
the system loss related to the channel, and λ is the RF signal moving which imposes a Doppler shift on the received sig-
wavelength. A more general expression can be derived to nal. For UHF and higher RF frequencies, the scattered sig-
include reflections from the earth as shown in figure 2: nals resulting from other moving objects can cause fading
  even if the mobile receiver is stationary. Figure 3 shows
hb hm
Pr (d) ≈ (Pt Gt Gr ) , (2) the received signal losses in a mobile environment. The
d2 long-term fading in the mean level is due to slow fading or
log-normal fading, while fast fading occurs over distances
where hb and hm are the heights of the base station and
of about half the signal wavelength. For a mobile travel-
the mobile antenna. Since the received signal power is
ling at 30 m.p.h., the fast fades occur about every second
inversely proportional to the fourth power of distance, there
(60 Hz) for VHF and UHF frequencies. The rapid changes
is a 12 dB loss in power for each doubling of distance are due to local multipath phase cancellation known as fast
from the transmitter. This model accurately predicts what fading or Rayleigh fading. The received signal xr (t) is a
is measured empirically in the field [21]. For base station function of long term fading m(t) and short term fading
antennas less than 20 m in height over a range of 1 to r(t):
15 km, the measured power law exponent is d3.6 compared
to d4 . xr (t) = m(t)r(t). (3)
S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers 43

2.2.1. Fast-fading (Rayleigh-fading)


If distances over only a few wavelengths about a fixed
distance are observed experimentally, the received sig-
nal has an exponential or Rayleigh distribution of power.
Rayleigh fading is caused by multi-path signals arriving at
the antenna with different time delays (phase shift) and am-
plitudes. The vector sum of the incident waves produces
the resultant power. By moving only a fraction of a wave-
length, it is possible for the phases of the incident waves
to cancel the incoming signal resulting in a significant at-
tenuation (up to 30 dB) of the received signal [3,14,21,22].
Consider the modulated received signal
 Figure 4. Multi-path received signal arriving at an angle α.
xr (t) = A(t) cos 2πfc t + θ(t) ,
2.2.2. Long-term fading
where A(t) is the amplitude variation and θ(t) encompasses
Field measurements have shown that the distribution of
the phase changes. In many cases, line of sight commu-
the received power measured at a constant distance from the
nication is not possible and the received signal is reflected
base around a circular route (where the signal path from
from several paths arriving at different times as the mobile
the base-station is constant) is log-normal with a typical
is moving with a velocity ν. Figure 4 shows the mobile
standard deviation of 8–10 dB [10]. Since the probability
moving along the x-coordinate at speed ν. The received
density function for long-term fading m(t) is log-normal,
signal arrives at an angle α and there exist N multipath
the term log-normal shadowing is also used to describe this
components. If the transmitted signal is vertically polarized
fading condition:
(i.e., the electric field vector is aligned along the z-axis), the
electric field intensity of the RF signal Ez can be written 1 2 2
p(m) = √ e[(−(log m−η) )/(2σm )] , (7)
as mσm 2π
X
N
where σm is the standard deviation and η is the mean of
Ez = E0 ej(ωc t+θn ) , θn = ωd t + φn , (4)
log(m). The long-term and short term fading along with
n=1
other channel noise cause phase and amplitude distortions
where E0 is the amplitude of the nth incoming reflective in the signal. In addition to the channel noise sources, the
wave, φn is its random phase uniformly distributed between receiver adds noise and distortion to the incoming signal as
0 and 2π, ωc is the carrier frequency, ωd is the Doppler described in the next sections.
radian frequency of nth incoming wave, and θn is the signal
phase. The Doppler shift due to nth incoming signal at an
angle αn is 3. RF receiver design considerations

ωd = βν cos(αn ), (5) The goal of receiver design is to optimize performance


in the presence of interferers. The primary interferers are
where β = 2π/λ. For a vehicle travelling at 60 m.p.h.
undesired transmitters at the same frequency (co-channel
receiving a modulated signal at 800 MHz, the fade occurs
interferers) or at a frequency one channel away (adjacent
every 7 msec or at the frequency of fd = 143 Hz. The short
channel interferers). There are other interference sources
term fading envelope has a Rayleigh probability distribution
such as automotive ignition systems, power distribution or
function given by [10]
transmission lines, industrial equipment (motors, welders),
r (−r2 )/(2P0 ) and consumer products (fluorescent lights, TV local oscil-
p(r) = e , (6)
P0 lators, garage door openers).
Co-channel interference is at the receiver’s desired fre-
where 2P0 = 2σ2 is the mean square power of the compo- quency and can only be minimized by geographic separa-
nent subject to short-term fading and r2 is the instantaneous tion and by reducing the number of potential interferers.
power. The Rayleigh density function describes the first- From the power law model of (1), a first order estimate of
order statistical properties of the signal envelope over short carrier and interferer powers can be made. For US Cellu-
distances where the signal mean level is constant. In order lar AMPS systems, a minimum carrier to interferer (C/I)
to combat short-fading, the system must be designed with level of 17–18 dB is required for acceptable voice qual-
sufficient transmit power to cover the desired area and pre- ity. A typical super heterodyne receiver block diagram is
vent loss of communication during a fade. Hence, the radio shown in figure 5. Wherein an adjacent channel interferer
circuit designer must design circuits whose performance is is attenuated by crystal and ceramic filtering. Crystal fil-
insensitive to rapid changes of RF signal power. tering typically provides 15–20 dB of protection with the
44 S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers

Figure 5. Superheterodyne receiver architecture.

remainder (determined by system specification) provided


by ceramic filtering.

3.1. Receiver block

The receiver block diagram shown in figure 5 consists


of an RF front end, a 1st IF (Intermediate Frequency), a
second IF, and an audio processing block. The RF selec-
tivity band-width (image rejection) is typically 3–8 MHz
depending on the application; the crystal selectivity filters
usually consist of 2 poles per stage with an insertion loss
of 2–3 dB per stage. The main objectives of the selectivity
filter are to filter out the image signal and to band-limit the
number of possible interferers that could cause intermodu-
lation distortion before mixing, as shown in figure 6. The Figure 6. Image rejection. The image signal is 2fIF away from the desired
image signal is an unwanted interferer at a frequency 2fIF signal.
away from the desired RF signal that mixes to the same
frequency as the IF signal. tional Semiconductor Corp. [11] for Digital European Cord-
The first mixer frequency translates the RF carrier to an less Telephone (DECT) and PCS applications is shown in
IF frequency (the RF signal frequency can vary depend- figure 7. The main transceiver integrated circuit consists
ing on the channel frequency allocation). All further signal primarily of the mixers, and PLL, however, many of the
processing can be done at single tuned frequencies. Each components in the system such as the front-end RF SAW
and LC filters, Transmit Power Amplifier (Tx PA), Voltage
crystal filter typically consists of a 2 pole bandpass stage
Control Oscillator (VCO), PLL loop filter, and others are
with 3 dB of insertion loss. The 2nd IF circuitry is referred
external. There are several major obstacles in providing a
to as the receiver back-end and the final band-pass selec-
single Transceiver IC including the front-end filters due to
tivity filter is a high Q filter such as ceramic filters. These
their high-Q and high operating frequency, the VCO due to
ceramic filters typically consist of 8 poles with 12 dB of in-
its sensitivity to voltage variation and on-chip noise, and the
sertion loss. The audio processing circuitry conditions the
synthesizer and oscillator components due to the coupling
audio signals as per system specifications and is typically
of their digital switch noise to the incoming RF signal.
integrated.
Although the block diagram is for an AMPS system, the
3.2. Receiver sensitivity
RF/IF blocks are nearly identical for all digital modulation
formats. Many of the digital modulation schemes carry am- The receiver’s ability to receive a signal is defined in
plitude (not necessary in FM) as well as phase information terms of SINAD which is measured at the input to the
which requires a different solution for the demodulation speaker and is defined to be
function as compared to FM. This is typically handled us-
ing a DSP section whose input is from the 2nd mixer. The S+N +D
SINAD = , (8)
purpose of the low-noise amplifiers is to provide isolation S+N
between stages and gain to improve the receiver sensitivity. where S = signal, N = noise, and D = distortion power.
The placement and design of selectivity filters and ampli- The accepted standard measure of receiver sensitivity is the
fiers balance the requirements of receiver sensitivity and RF signal level required to produce 12 dB SINAD. The dis-
intermodulation performance which will be discussed next. tortion is caused in part by the FM process of receiving only
The new generation of mobile telecommunications devices limited sidebands. This degradation is primarily fixed by
are becoming more complex, yet rapidly decreasing in size. the system specifications for channel spacing and frequency
An example of a single chip Transceiver developed by Na- deviation. Noise degradations are caused by the noise of
S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers 45

Figure 7. Single chip transceiver with several off-chip components [11].

electronic circuits. For RF circuits, noise performance is


characterized by noise figure which is defined as

(S/N )I 1 NO
F = = , (9)
(S/N )O G NI Figure 8. Noise figure for cascade of devices.

where F = noise figure, (S/N )I = Input signal-to-noise 3.3. Intermodulation


ratio, (S/N )O = Output signal-to-noise ratio, and G =
circuit gain. If several blocks are cascaded as shown in Intermodulation distortion is a measure of circuit non-
figure 8 with noise figure Fi and power gain Gi , the overall linearity; it occurs when two or more sinusoidal signals
noise figure is given by [30] are applied to a non-linear circuit. Under these conditions,
the output consists of the fundamentals, harmonics, and
(F2 − 1) (F3 − 1) other spurious frequencies. A classical way of analyzing
F = F1 + + + ···. (10) the problem is to represent a non-linear transfer function as
G1 G1 G2
a power series [18]:
The overall noise figure is the first stage which it should υ0 = a0 + a1 υi + a2 υi 2 + a3 υi 3 + · · · + an υi n, (13)
have a low noise figure and a high gain. Noise figure
can be related to receiver sensitivity through a receiver rise where υ0 = output voltage, υi = input voltage, and ai =
sensitivity (R) defined as power series coefficient. If the input consists of two si-
nusoids of equal amplitude (replicates standard test condi-
S+N tions),
R=
N
. (11) 
υi = υi cos(ω1 t) + cos(ω2 t) , (14)
The rise sensitivity is typically measured at the lowest IF then from (13)
frequency. It has been found experimentally that a 6 dB rise
υ0 = a0 + a1 υ1 (cos ω1 t + cos ω2 t)
sensitivity corresponds to 12 dB SINAD. For a signal gen- 
erator driving a matched load it can be shown that the RMS + a2 υ12 1 + 12 cos 2ω1 t + 12 cos 2ω2 t

voltage level required to achieve a given rise sensitivity is + cos(ω1 + ω2 )t + cos(ω1 − ω2 )t
[4] 
+ a3 υ13 94 cos ω1 t + 94 cos ω2 t
p
υ = F kT BRg (R − 1), (12) + 14 cos 3ω1 t + 14 cos 3ω2 t
where k = Boltzman’s constant, T = temperature in ◦ K, + 34 cos(2ω1 + ω2 )t + 34 cos(2ω2 + ω1 )t

B = bandwidth, and Rg = matched load impedance. + 34 cos(2ω1 − ω2 )t + 34 cos(2ω2 − ω1 )t + · · · . (15)
46 S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers

Figure 9. Intermodulation and harmonic distortion due to two sine tones


at ω1 and ω2 .

For this analysis to be valid, it is assumed that the circuit is


weakly non-linear so that the higher order terms are small
compared to the fundamental amplitude a1 υ1 . Figure 10. Inter-modulation intercept plot.
A frequency domain plot of (15) is shown in figure 9.
Second-order terms in the frequency domain consist of a of the input interferer (v1 ), and (3) the level of IM gener-
DC component, the second harmonics of each input, and ated (vc ).
the sum and difference frequencies of the two inputs. Third- A convenient way to describe these relationships is by
order terms are the fundamental frequencies, the third har- using the intercept point. Figure 10 shows the intercept
monics of the inputs, and the sum and differences of twice point concept wherein each line is a plot of output ver-
one input frequency minus the other input. The intermod- sus input power. The slope of the fundamental is one and
ulation ratio (IM) is defined as the ratio of the desired the slope of the mth order IM product is m. The inter-
amplitude to the undesired amplitude. The particular fre- section of the 2 lines defines the intercept point. Both an
quency components of interest are those created by the mth order input intercept point (IPmi ) and an mth order
sum and difference frequencies of the two input sources. output intercept point (IPmo ) can be defined as shown in
Thus, figure 10. In practice, the signal will is limited by the
a1 1 4 a1 1 supply voltage and the circuit will gain compress prior to
IM2 = and IM3 = . reaching the intercept point levels. Using figure 10 and
a2 v1 3 a3 v12
simple geometric techniques, the relationship between IM
In wireless communications applications, third-order IM and intercept point can be determines as follows (units
distortion is a primary concern. in dB):
Consider the typical measurement for IM, which is to
place two interfering signals at one and two channels away IP2i = IM2 + v1 , (16)
from the desired signal such that ωd = 150 Mhz, ω1 = IP2o = 2IM2 + vc , (17)
150 Mhz + 25 kHz, and ω2 = 150 Mhz + 50 kHz, where
ωd = the desired frequency and ω1 and ω2 are interferers. IP3i = 12 IM3 + v1 , (18)
From (15), there is an IM3 product at 2ω1 − ω2 = 150 Mhz 3
IP3o = 2 IM3 + vc , (19)
which is the desired frequency. There is little protection
from this IM3 product. The RF passband will pass the inter- where IP2i(o) = second order input (output) intercept point,
ferer unattenuated. However, the crystal filter can provide IP3i(o) = third order input (output) intercept point, IM2 =
some protection. It has been shown that the IM3 ratio is im- second-order IM ratio, and IM3 = third-order IM ratio.
proved 2 dB for every dB of attenuation one channel away Using figure 10, the total intercept point IPt for cascaded
from the desired and is improved dB for dB two channels stages can be calculated as [15]
away from the desired [9]. The remainder of the IM perfor-  q  q
mance can only be achieved by designing circuits that are 1 1 G1
= +
highly linear. For dual conversion receivers, second-order IPt IP1i IP2i
IM is not important because the distortion products fall  q 1/q
G1 G2
well outside the RF passband. However, for direct conver- + + ··· , (20)
IP3i
sion receivers (homodyne) where the RF signal is directly
down converted to base-band signal, the second order IM where q = (m − 1)/2, m = order of the intercept, and
product (ω2 − ω1 ) will fall at the desired frequency. In IPni = input intercept of nth stage. Therefore, from (20), it
order to specify the IM characteristics of a circuit, two of is undesirable to add gain in the receiver path after the first
the following must be specified: (1) IM ratio, (2) level stage. Since this is in direct conflict with the requirement
S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers 47

its impact the second-order non-linearity of the circuit


must to be minimized.
• Able–Baker spur. These spurs are defined to occur at
frequencies where n and m are separated by one. Spurs
of this type are likely to fall within the RF passband
but tend to be higher order. It has been shown that
Figure 11. Mixer symbol.
the distance the Able–Baker spur is from the desired
frequency is [8]
for high receiver sensitivity discussed in section 3.2, trade-
offs in the gain and selectivity of each stage must be made mfs − nfLO = fIF , (26)
to optimize system performance. fd − fLO = fIF , (27)

3.4. Spurious responses where fs = spurious frequency, and fd = desired fre-


quency. As f = fs − fd approaches 0, the spurious
Receiver spurious responses are defined as an apparent interferer falls inside the RF and IF passbands. With
on-channel response to an undesired signal or group of sig- f = 0, it can be seen that the lower the IF frequency,
nals. Spurious responses are caused by non-linearity in the higher the order of the spur which is desirable since
the receiver circuits. Intermodulation is a type of spurious the magnitude of higher-order harmonics will be reduced
response. Other common spurious responses are image, substantially.
half-IF spur, and Able–Baker spurs generated by the mixer. The choice of an IF frequency requires several trade-offs.
A mixer function provides a frequency translation from the The first criterion is to choose an IF frequency that is not
input frequency to an IF frequency. For the mixer shown identical to a powerful transmitter (such as a commercial
in figure 11, for low-side injection fLO < fRF , where FM station) due to direct pickup. To minimize the impact
fIF = fRF − fLO , (21) of the image and half-IF spurs, the IF frequency should
be as high as possible. However, to minimize the impact
and for high-side injection fLO > fRF of Able–Baker spurs, the IF should be chosen as low as
possible. Therefore, designer must balance these conflicting
fIF = fLO − fRF , (22) requirements.
where fRF = RF frequency, fLO = Local Oscillator (LO)
frequency and fIF = IF frequency. 3.5. Electronic device noise

• Image spur. The image spur (fI ) occurs one IF fre- An important consideration in the design of receiver RF
quency away from the LO frequency in the opposite di- circuitry is the noise introduced by electronic (active and
rection from the RF frequency and is applied at the RF passive) components. Device noise is particularly impor-
input of the mixer as an undesired signal (figure 11). tant in the design of voltage-controlled oscillators where it
Protection from the image can be provided by selec- contributes to noise in the oscillator phase response which
tivity ahead of the mixer. For example, for low IF at sensitizes the receiver to interferers as will be seen in sec-
455 kHz, the image is at 910 kHz from the desired input tion 3.6. Moreover, in amplifiers and mixers, device noise
signal. For this reason 4 poles of crystal selectivity are must be considered in designing for acceptable noise figure.
typically required ahead of the second mixer. The level of noise generated by device noise mechanisms
• Half-IF. The half-IF spur (fHIF ) occurs at a frequency such as thermal noise, 1/f noise, and shot noise represents
of 1/2 the IF frequency from the RF frequency towards a minimum level of noise in a system and its control is
the injection frequency. For low side injection accomplished through optimal circuit design, topology se-
lection, bandwidth limiting of signals, and semiconductor
fHIF = fLO + fIF /2. (23) process control.
The most significant contributor to device noise is ther-
Spurs are characterized by their order typically written
mal noise (also called Johnson noise) due to the Brownian
as order (m, n) where m is the harmonic of the incoming
motion of charges in resistors. This random thermal motion
spurious signal and n is the harmonic of the local os-
can be represented as lattice vibrations within the material
cillator required to produce a signal at the IF frequency.
which result in a random disruption of current flow. The
In the case of the half-IF spur of order (2, 2),
mean-square thermal noise voltage generated by a resistor
2fHIF − 2xfLO = fIF , (24) is
fHIF = fLO + fIF /2. (25) e2n = 4kT R∆f , (28)
The half-IF spur is even more difficult to protect against where en represents the rms noise voltage developed across
than the image spur because it is located only half an the resistor of value R over the (brickwall) bandwidth ∆f
IF from the desired RF frequency. In order to minimize at absolute temperature T , a 1 MOhm resistor generates
48 S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers

1.26 mV of rms thermal noise over a 100 MHz bandwidth


at 25◦ C. Although pure reactances contribute no thermal
noise, all practical implementations of reactive elements
contain some resistive losses which lead to thermal noise
contributions. For instance, a grounded capacitor with a
series lossy resistance can be easily shown to have a brick-
wall bandwidth of 1/4RC. Consequently, such a capacitor
would contribute “capacitor” noise with a meansquare volt-
age value of kT /C.
The thermal noise contribution of a MOSFET can be
determined by applying (28) to the channel resistance of the
device to yield a channel thermal noise voltage, ed given
by

e2d = 4γkT ∆f /gd0, (29)

where gd0 is the drain-source conductance at zero Vds and


the parameter γ is ideally unity in the triode region and ap-
proximately 2/3 in saturation. Unfortunately, modern day Figure 12. Frequency synthesizer phase noise.
shortchannel devices exhibit noise in excess of that pre-
dicted by (29) due to the influence of hot-electron effects, 3.6. Synthesizer phase noise
channel induced gate noise at RF frequencies [17] and other Specifications of modern communication systems dictate
phenomena. that very small signals in the frequency band of interest be
Other sources of device noise include flicker (1/f ) noise detected in the presence of strong interferers in adjacent
which is generally associated with surface charge trapping channels. The high desensitization requirement for such
by defects, impurities in semiconductor material, and shot interferers in adjacent channels cannot possibly be met by
noise due to the discreteness of charge carriers as they cross the RF filter alone. Consequently, the LO signal applied
a potential barrier. As its name implies, 1/f noise is in- to the RF mixer in the receive path must be as close to a
versely proportional to its frequency, pure sinusoid as possible. If the spectrum of the LO signal
consists of excessive contributions from frequencies close
i2n = KI∆f /f n , (30) to the LO frequency, the undesired interferers in the RF
band are also mixed down, thereby corrupting the IF signal.
where K is an empirically determined parameter, f is the The non-ideal spectral response of the LO signal is caused
frequency of the noise component and I is the dc bias by device noise and digital switching noise mechanisms
current. For example, an NMOS device with W/L = (outlined in following sections) in the frequency synthesizer
(100 µm/10 µm) exhibits roughly 100 nV/sqrt(Hz) of rms and are referred to as its phase noise. The phase noise
flicker noise at 1 kHz. Flicker noise in MOS devices is requirement of a frequency synthesizer expressed in dBc/Hz
usually insignificant beyond a few tens of kHz, whereas in from the carrier (LO) frequency is illustrated in figure 12.
bipolar devices it is insignificant beyond a few hundreds of A typical cellular standard requires the phase noise to be
Hz. Although 1/f noise contributions are negligible at RF between −115 to −130 dBc/Hz, at 60–250 kHz from the
frequencies, low frequency 1/f noise can be modulated by carrier frequency.
the RF carrier signal and appear in the RF band of mixers In commonly-used phase-locked loop based frequency
synthesizers as shown in figure 13, spectral components of
and oscillators [24].
the LO signal around the carrier frequency are determined
Shot noise can be modeled as a current controlled current
primarily by phase noise in the voltage-controlled oscillator.
source whose rms-noise current value, is given by
Phase noise introduced by the crystal reference is low-pass
filtered by the loop, whereas phase noise introduced by the
i2n = 2qI∆f , (31) VCO is high pass filtered. Consequently, for frequencies
above the loop bandwidth which is typically governed by
where I is the dc current flowing through the potential the channel spacing, the VCO effectively runs open loop
barrier and q is the electronic charge. For instance, a 1 µA and its phase noise is injected directly into the synthesizer
current flowing through a P–N junction produces a rms output.
shot noise current of 5.7 nA over a 100 MHz bandwidth. Synthesizer phase noise is optimized through proper
Shot noise is prevalent in bipolar devices but is insignificant VCO design. Implementation of VCOs using active de-
in MOSFETS since the only current that flows through a vices is not common since a large amount of power must
semiconductor junction in MOS devices is the negligible be dissipated to minimize device noise contributions to the
gate current. overall phase noise. Tuned LC oscillators using purely pas-
S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers 49

Figure 13. PLL-based frequency synthesizer.

sive components are more commonly employed. With in-


creasing demands for integrated transceivers, it has become
necessary to implement passive inductors on the silicon sub-
strate or as bondwires. Since, such implementations are
lossy in nature, careful attention must be paid to physical
design to realize integrated inductors at minimum cost [28].

Figure 14. Noise coupling from the noisy digital portion of the IC to the
4. Mixed-signal noise coupling sensitive RF/analog portion via substrate and supply lines.

The received RF signal can range from 20 dBm to Substrate coupling is a key problem both in purely ana-
−120 dBm; i.e., the incoming signal can be as low as log circuits and in mixed-signal circuits. Although the
0.22 µV at 1.8–2 GHz. Any internal on-chip noise can mechanism of coupling in the substrate is identical in both
corrupt the desired signal. The main source of on-chip cases, the effect of the parasitic crosstalk tends to be slightly
noise in mixed-signal ICs is digital switching noise. In different in these two classes of circuits. In purely analog
purely digital applications, CMOS static logic offers several circuits, the substrate acts as a signal feedback path which
attractive features including zero static power dissipation, can lead to changes in small signal performance functions
high packing densities, wide noise margins, high operating like amplifier gain and bandwidth. Additionally, impact
frequencies, etc. For high-frequency wireless applications, ionization can cause currents to be injected into the sub-
however, its major drawback is the generation of a large strate even under DC operating conditions, causing sub-
amount of digital switching noise [1,2,7,12,15,29,31–34]. strate biases to vary, which in turn cause variations in MOS
When many static gates change states, a large cumulative threshold voltages, depletion capacitances and other circuit
current spike flows through parasitic resistances and induc- bias and performance quantities. In mixed-signal circuits,
tances creating power supply noise voltage spikes known in addition to impact ionization-generated substrate cur-
as ‘Vdd bounce’ or ‘Gnd bounce’. Some fraction of this rents, significant substrate currents are generated as a re-
noise inevitably propagates, as shown in figure 14, to the sult of digital switching nodes capacitively connected to
sensitive analog circuitry through the substrate, power sup- the substrate through both interconnect and device junction
ply lines, bonding wires, package pins, etc., where it often (depletion) capacitances. The switching noise injected into
limits the achievable accuracy. The switching noise cur- the substrate is picked up by sensitive analog devices on
rent can range from 0.1 mA to several mA per CMOS gate the same substrate, through both their junction capacitances
depending on the device sizes. to substrate and through the MOS device body effect. This
results in induced spikes of noise in both device currents
4.1. Substrate coupling and node voltages [33].

One of the key problem areas in integrating a receiver (or 4.2. Mixed-signal design considerations
transceiver) onto a single chip is the common silicon sub-
strate. Transistors fabricated on the same die interact with Designers frequently rely on heuristic guidelines to im-
each other through the common conductive substrate lead- munize their designs from substrate crosstalk. These in-
ing to a phenomenon referred to as “substrate coupling”. clude noise prevention techniques to minimize generation
This parasitic crosstalk can cause otherwise normal designs of switching noise and noise reduction techniques using
to malfunction. With increasing demands on both the fre- layout isolation and noise tolerant circuit design techniques
quency of operation and the analog resolution of integrated for sensitive analog circuitry [33].
circuits, substrate coupling is becoming an increasingly im- Less noisy alternatives to static CMOS logic families
portant determinant of mixed analog/digital (mixed-signal) such as current steering logic (CSL) and folded source cou-
RF IC performance and behavior. pled logic (FSCL) that reduce switching currents in the
50 S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers

power supply [1,2] are used wherever possible, especially impact ionization, device/interconnect capacitance, pack-
at higher frequencies. In many transceiver systems, the syn- age/bondwire inductance and substrate resistance (and ca-
thesizer is designed using Bi-CMOS technology where the pacitance).
highspeed dividers and scalers are implemented with ECL
(emitter coupled logic) topologies and at lower frequen- 5.1. Impact ionization
cies standard CMOS or CSL/FSCL components are used.
Clocks and buffered outputs are ramped or have their rise With increasing speeds of operation and decreasing tech-
times reduced to prevent excessive switching currents into nology feature sizes, impact ionization is becoming a pri-
the supplies and the substrate. Buffered outputs are skewed mary cause of substrate current injection in integrated cir-
to prevent them from switching simultaneously and instants cuits. When the electric field in the depleted drain end of
of analog sampling are timed away from primary switching a MOS transistor becomes large enough to cause impact
events [32]. Power buses are routed to minimize impedance ionization, electron-hole pairs are created causing a current
using multi-level gridded buses with regular on-chip (and flow to the substrate. The hot-electron induced substrate
on-board) capacitive decoupling to defuse current spikes. current can be expressed in semi-analytical form as [13]
Power buses are also tied to multiple power pads/package  1/3 1/2 
C2 tox · xj
pins to minimize lead inductance. (Package/bondwire in- Isub = C1 (Vds − Vdsat )Id exp − , (32)
ductance is the subject of a following section.) Layout Vds − Vdsat
isolation techniques help reduce the severity of crosstalk where C1 and C2 are process-related, empirically deter-
on some substrates. Physical separation between noisy and mined parameters, tox is the oxide thickness and xj is the
quiet circuits, separate analog and digital power/substrate junction depth. Using results from device simulations or
supplies and diffused guard rings around a sensitive circuit measurements, it is possible to determine the empirical co-
are commonly employed layout strategies. efficients, C1 and C2 and to incorporate impact ionization
Noise tolerant analog circuits can also be employed to induced substrate currents into existing device models for
minimize the impact of coupled noise. By using fully circuit simulation.
differential analog circuitry as in doubly balanced mixers
and fully differential low noise amplifiers (LNA) with high 5.2. Device and interconnect capacitance
common-mode rejection ratio (CMRR) and power-supply
rejection ratio (PSRR), advantage can be taken of the fact Every transistor on an IC die is coupled capacitively
that the switching noise appears as common-mode and is to the substrate through its p–n junction depletion capaci-
easily rejected by the circuit. In employing differential tances. Moreover, every interconnect routed on an IC has
analog circuitry, care must be taken to ensure symmetric some capacitance to substrate. This capacitively coupled
layout so that the coupled noise appears as common-mode substrate current is of significant consequence in mixed-
between the differential device pairs. The unfortunate by- signal circuits, due to the presence both of a large number
product of using differential circuits is that the device noise
√ of switching digital nodes that inject current into the sub-
contribution of the circuit now increases by a factor of 2 strate and of high impedance analog nodes that are affected
on a rms basis. Typically however, additional device noise by this injected current. Since the amount of injected cur-
is easier to live with. rent is directly proportional to the slew rate of the switch-
Sophisticated processing techniques utilizing triple-wells ing voltage, at higher rates of circuit operation the sub-
and trench structures or bondedwafer Silicon on Insulator strate coupling problem is greatly aggravated. Moreover,
(SOI) processes may also be used to DC isolate devices with decreasing technology feature sizes, the interconnect
from one another. Such processes help isolate sensitive RF capacitances to substrate are becoming increasingly impor-
subsections from low frequency noise coupling from the tant contributors of injected current. In order to account
digital sections. The aforementioned methods provide a for capacitively coupled substrate currents, it is necessary
partial solution to minimizing on-chip noise coupling. to perform a parasitic capacitance extraction on the design
to determine all significant capacitances to substrate in the
circuit.
5. Modeling substrate coupling
5.3. Package/bondwire inductance
Without suitable analysis to predict substrate crosstalk
during the design process, the effectiveness of design guide- The effect of non-ideal (inductive) power supplies has
lines cannot be determined until a circuit is fabricated and a tremendous impact on the amount of substrate coupled
tested. Consequently, a basic understanding of the substrate switching noise in an IC design. Since the bondwires and
coupling problem and techniques to model it [1,7,29,31–33] package pins associated with the substrate supplies have
are assets to every RF integrated circuit designer. finite and often large inductances, any substrate current
Several mechanisms must be understood and suitably picked up by these supplies can cause large glitches in the
modeled in an electrical circuit in order to analyze it for value of the substrate supply bias. This phenomenon is
substrate coupling problems. These include the effects of referred to as inductive or Ldi/dt noise. The presence of
S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers 51

Figure 16. Substrate admittance versus frequency.

Figure 15. Methods for minimizing the coupling between the digital por-
tion of Transceiver and the sensitive Analog portion.

parasitic inductances in the substrate supplies (note: there


are typically several separate digital and analog supplies
connected to substrate) can severely aggravate the noise
coupling problem and much of current mixed-signal IC de-
sign methodology focuses on techniques to minimize their
effect. For simulation purposes, it is necessary to use suit- Figure 17. A typical substrate profile consisting of multiple uniformly-
able package inductance models in the supply leads to ac- doped semiconductor layers with a backplane.
curately analyze substrate-coupled switching noise [29,33].
the substrate. The substrate admittance between the two
5.4. Substrate resistance and capacitance points, y12 (s) can be determined as
i1 1
Outside of the active areas formed by devices and sub- y12 (s) = = . (35)
2(υ1 (s) − υ2 (s)) 2(z11 (s) − z12 (s))
strate contacts, the substrate can be treated as consisting
of layers of uniformly doped semiconductor material. Ne- Figure 16 plots the substrate admittance between two points
glecting the effects of magnetic-fields on-chip, a simplified on a substrate as a function of frequency for different sub-
form of Maxwell’s equations can be applied to the substrate strate sheet resistivity (with ε0 = 11.7). Note that the ad-
yielding mittance has a zero in its response with a 3 dB frequency
 as given above. Moreover, the 3 dB frequency scales with
1 2 ∂
∇ V (r, t) + ε ∇2 V (r, t) = I(r, t), (33) doping and is nearly 150 GHz for a 1 Ω-cm substrate. Con-
ρ ∂t sequently, for most frequencies of interest, the substrate can
where ρ is the resistivity and ε the permittivity of the be assumed to behave as a purely resistive medium.
uniformly-doped semiconductor. V (r, t) and I(r, t) are the The analysis conducted above assumed a simplistic ho-
transient voltage and current vectors at location r = (x, y, z) mogeneous substrate. When the substrate profile consists of
on the substrate. Assuming a 3-D semi-infinite substrate several layers of different doping density as shown in fig-
that goes to infinity in all but one of the six spatial direc- ure 17, the analysis becomes more complicated. To accom-
tions, the solution to (33) in the Laplace domain for the modate arbitrary doping profiles and the finite box bound-
voltage at any point on the substrate due to a unit current ary condition, techniques like the numerical finite differ-
injected into the substrate a distance r away, is given by ence method [33] or the semi-analytical boundary element
ρ i1 (s) method [7,32] can be applied. These techniques are used to
υ2 (s) = · . (34) determine reduced-order R(C) models between the devices
2πr s(ρε) + 1
in the circuit to capture the behavior of the substrate.
Consequently, the substrate impedance z21 (s) = v2 (s)/i1 (s) Combining models for impact ionization, intercon-
has a single pole response with a 3 dB frequency given by nect/device capacitance, package/bondwire inductance and
the reciprocal of the relaxation time constant, τ = ρε of substrate resistance/capacitance with a given electrical cir-
52 S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers

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[9] J. Heck, Intermodulation distortion analysis, Motorola Internal Tech-
nical Report (1993). Sayfe Kiaei, Ph.D., Washington State University, 1987. He was with
[10] G.C. Hess, Land Mobile Radio System Engineering (Artech House, Boeing Research and Technology Center at Renton, WA, during 1985–
Boston, 1993). 1986 and with Motorola Inc. Wireless Technology Center from 1993 to
[11] K.M.D. Hess and D.E. Fague, Performance evaluation of a single 1997. Dr. Kiaei has been with the Department of Electrical Engineering at
chip radio transceiver, in: Proc. IEEE VTS 46th Vehicular Technol- Oregon State University from 1987–1993 and 1996–present where he is an
ogy Conference, pp. 1048–1051. Associate Professor. His current research activities includes design of high
S. Kiaei et al. / Noise considerations for mixed-signal RF IC transceivers 53

performance IC’s for mixed-mode applications, wireless communication Symposium on Low-Power Electronics and Design, and the IEEE Inter-
systems, VLSI system design for digital signal processing, and design national Solid-State Circuits Conference. He is currently on the executive
of ASIC’s. He has authored several book chapters and over 30 papers committee of the IEEE International Solid-State Circuits Conference. He
in the fields of wireless communications, DSP, and Mixed-signal CMOS was a co-recipient of the 1980 IEEE W.R.G. Baker Award and the 1995
IC’s. Dr. Kiaei is a senior member of the IEEE, and was a member IEEE Circuits and Systems Society Darlington Award, and has received
of the editorial board of IEEE Transactions on Circuits and Systems II. excellence in teaching awards from SMU, OSU, and CMU. He is a mem-
He is the Technical Co-Chair of the International Symposium on Low- ber of Eta Kappa Nu and Sigma Xi and a fellow of IEEE.
Power Electronics and the member of the technical program committee of
a number of conferences. Dr. Kiaei is the recipient of the IEEE circuits and
systems society Darling best paper award in 1994, and was the recipient Ken Hansen. MS, University of Illinois, 1976. Principal Member of the
of the Loyd-Carter award for the best teacher in the college of engineering Technical Staff and Director of the Wireless Integration Technology Center
at Oregon State University. Dr. Kiaei is the associate director of the NSF for Radio Products Group of Motorola in Austin, TX. He has over 20 years
Center for the Design of Analog–Digital IC’s (CDADIC). of experience in RF circuits, bipolar, CMOS, and BiCMOS analog and
digital circuit design in the field of wireless communications. He holds 7
David J. Allstot received the B.S. degree in engineering science from patents in this area and is a member of IEEE.
the University of Portland, the M.S. degree in electrical and computer
engineering from Oregon State University, and the Ph.D. degree in elec-
trical engineering and computer Science from the University of California Nishath K. Verghese received the B.E. (Hons.) degree from Birla Insti-
(Berkeley) in 1979. His Ph.D. dealt with the analysis, design, and imple- tute of Technology and Science, Pilani, India, in 1990, and the M.S. and
mentation of switched-capacitor filters. He has held industrial positions Ph.D. degrees from Carnegie Mellon University, Pittsburgh, PA, in 1993
with Tektronix, Texas Instruments, and MOSTEK, and academic positions and 1995, respectively. From 1990 to 1991 he was with the VLSI Design
with UC Berkeley, Southern Methodist University, and Carnegie Mellon Laboratory at McGill University, Montreal, Canada, where he worked on
University. He is currently the Hewlett-Packard Professor of Electrical new circuit implementations of sigma–delta A/D converters and on es-
and Computer Engineering at Oregon State University. He has advised timation techniques for power bus current in CMOS logic circuits. At
about 50 M.S. and Ph.D. students and has published several papers and CMU, his research focussed on extraction and simulation techniques for
one book with colleagues. Dr. Allstot’s professional service has included: substrate-coupled noise in mixed-signal ICs. In 1994, he worked for five
Associate Editor and Editor of the IEEE Transactions on Circuits and Sys- months at the Mixed-Signal Design Department, Texas Instruments, Dal-
tems, Guest Editor of the IEEE Journal of Solid-State Circuits, member of las, applying these techniques to the design of a video A/D converter. He
the IEEE Circuits and Systems Society Board of Governors, and Techni- is currently a Member of Consulting Staff at Cadence Design Systems,
cal Program Committee member of the IEEE Custom IC Conference, the San Jose, CA. His research interests include design and verification of
IEEE International Symposium on Circuits and Systems, the International analog and mixed-signal circuits.

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