IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO.

5, MAY 2002 553

A Temperature-Stable CMOS Variable-Gain

Amplifier With 80-dB Linearly Controlled
Gain Range
Takafumi Yamaji, Member, IEEE, Nobuo Kanou, Member, IEEE, and Tetsuro Itakura

Abstract—A CMOS variable-gain amplifier (VGA) using sub-

threshold exponential region transistors with master–slave control
technique is proposed. The proposed technique is applied to an
intermediate-frequency VGA with a quadrature demodulator for
wireless receivers. The test chip is fabricated using a 0.25- m
CMOS technology. An 80-dB linearly controlled gain range is
achieved with exponential voltage-to-current converters using
MOS transistors biased in a subthreshold exponential region,
and the master–slave control circuits make the gain-control
characteristic insensitive to the temperature. The experimental
results indicate that the proposed technique is effective for a
CMOS variable-gain amplifier.
Index Terms—Linear-in-dB gain control, master–slave control,
temperature stabilizing, variable-gain amplifier, wireless receiver.

I. INTRODUCTION Fig. 1. Block diagram of the test chip.

A VARIABLE-GAIN amplifier (VGA) is an indispensable

function block for radio communication systems. It is used
for controlling the transmission signal power or for adjusting the
received signal amplitude. There are two types of VGAs. One is
a discrete gain-step type with a digital control signal [1], and the
other is a continuously variable gain type which is controlled by
an analog gain-control signal [2], [3].
For a code-division multiple-access (CDMA) system, a
continuous-type VGA is preferred because it can avoid the
signal phase discontinuity. In addition, accurate transmission
power control and accurate received signal strength measure-
ment are required to optimize the system capacity. Obviously,
the linear-in-dB variable-gain characteristic and temperature
stability of the VGA are desirable for ease of transceiver design.
Prior to this work, a bipolar liner-in-dB VGA and its temper-
ature stabilizing technique with additional temperature depen-
dent current were proposed [3]. However, the stabilizing tech-
nique is sensitive to the device parameters for temperature, and
the reported results show that the variable-gain characteristic is
still sensitive to the temperature.
As for the CMOS VGA, it is difficult to make an exponential
or logarithmic function because the normal operation of MOS
transistors is the square-law transfer characteristic. For the
linear-in-dB gain range of up to 30 dB, an approximate rational
function is used instead of an exponential function [4], [5].
The 30-dB gain range is too small for CDMA receivers, which
require an intermediate frequency (IF) gain range of 70 dB, at
least. For a wider gain range, parasitic bipolar transistors are
used for accurate exponential transformation [6], [7]. These
papers focus on the exponential function and variable gain
range; however, the temperature dependences are not reported.
Consequently, a temperature-stable CMOS VGA with wide
linear-in-dB gain range needs to be developed for a highly
integrated CDMA transceiver.
In this paper, a CMOS VGA using subthreshold exponential
region transistors with master–slave control technique is pro-
posed. The master–slave control technique is a kind of feedback
technique, and has the advantage of insensitivity to the temper-
ature and device parameters. The control technique can be ap-
plied for a bipolar VGA or a CMOS VGA using parasitic bipolar
transistors. However, a subthreshold region MOS transistor is
suitable because there is no gate current and a simple control
circuit is available. Details of the gain stabilizing techniques are
described in Section II.
The proposed technique is applied to an IF VGA for CDMA
receivers. Circuit implementation is covered in Section III. The
experimental results and conclusions follow in Section IV and
Section V, respectively. The experimental results indicate that
the technique is effective for a CMOS VGA.

Manuscript received July 28, 2001; revised November 9, 2001. II. DESIGN STRATEGY AND STABILIZING TECHNIQUES
T. Yamaji and T. Itakura are with the Corporate Research and Development
Center, Toshiba Corporation, Kawasaki 210-8582, Japan. Fig. 1 shows the block diagram of the test chip, which
N. Kanou is with the System LSI Design Division, Semiconductor Company,
Toshiba Corporation, Kawasaki 212-8520, Japan. comprises an IF VGA and a quadrature demodulator (QDEM).
Publisher Item Identifier S 0018-9200(02)03674-0. The IF VGA consists of four cascaded amplifier stages. Each
0018-9200/02$17.00 © 2002 IEEE

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 554 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 5, MAY 2002

Fig. 2. Design strategy.

Fig. 3. Gain-control circuit with master–slave control.

stage has a pair of variable transconductance elements. In

the first two stages, transistors biased in the square-law region
are used as the variable elements. Transistors biased in the
subthreshold exponential region are used in the following two
stages and a mixer input stage of the QDEM.
To achieve a wide variable-gain range, the input stage needs
to attenuate a huge input signal linearly when the gain of the
VGA is less than one (negative in dB). The square-law region
has the advantage of linearity. However, the gain-control range
is small, because the of a square-law region transistor is
proportional to the square root of the bias current. Fig. 4. Common-mode feedback for stabilizing gain at V =V .

On the other hand, the largest input signal of the latter two
stages is smaller than that of the input stage. This smaller input region transistors M2 and M3. The drain currents of M2 and
signal allows us to use exponential region transistors, which M3 are
have a larger gain-control range, because is proportional to
the bias current.
Fig. 2 shows our strategy for design of a gain-control circuit: (1)
1) To achieve a wide linear-in-dB control range, an MOS
transistor biased in a subthreshold exponential region (M1
in Fig. 2) is used for exponential voltage-to-current con- (2)
version in the control and bias block shown in Fig. 1.
where is the common-mode reference current, shown in
2) Temperature dependence of the gain-control character-
Fig. 4, is the differential voltage gain of the master voltage
istic is compensated by the voltage converter which con-
converter, and are reference input voltages, is a co-
verts the gain-control voltage to the gate voltage of
efficient depending on the transistor fabrication, and is the
the transistor M1.
thermal voltage.
3) To achieve a temperature-stable gain at and
is input to the pMOS current mirror circuit and is mul-
stable gain-control ratio dB simultaneously, a
tiplied by . The output current of the pMOS current mirror
differential architecture is adopted for the voltage con-
circuit is compared and made equal to by a feedback loop.
verter, and the common-mode output voltage and differ-
The output voltage is generated and used as a gain-control
ential-mode gain are independently controlled.
voltage of the voltage converter. The feedback loop sets the gain
Note that the square-root function is transformed to a linear at
function by the logarithmic conversion, i.e., ,
and the exponential conversion is the only function which we (3)
need to make for the linear-in-dB characteristic.
(4)
A. Gain-Control Ratio Stabilizing Technique The slave voltage converter is controlled by . Therefore,
the gain is the same as the gain of the master converter. Conse-
A master–slave control technique is applied to our gain-con-
quently, the output current of the slave circuit is
trol circuit, as shown in Fig. 3. The master circuit generates bias
voltage , which controls the gain of the voltage converter in
the slave circuit. Both voltage converters in the master and slave
circuits have a common-mode feedback circuit, as is shown in
Fig. 4, but omitted in Fig. 3.
The output voltage of the master voltage converter is ex-
ponentially converted to an output current by the exponential (5)

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 YAMAJI et al.: TEMPERATURE-STABLE CMOS VARIABLE-GAIN AMPLIFIER 555

Fig. 6. Schematic of the IF VGA unit amplifier.

Fig. 5. Bias circuit and amplifier for which gain is insensitive to temperature.
where is the threshold voltage. Equation (10) can be sim-
The coefficient depends on the gate-width plified as follows:
ratio of the current mirror circuit and the reference voltages. If
the reference voltage is temperature insensitive, the coefficient (11)
is insensitive to the temperature. It means that the gain-control
ratio dB is insensitive to the temperature when the am- The drain current of M6 is thus derived:
plifier gain is proportional to the bias current.
(12)
B. Gain Stabilizing Technique
The drain current of M8 is the same as that of M6, and the
Since the exponential amplifiers and the square-law ampli-
transconductance of M8 is
fiers have different temperature dependence, two individual bias
and control circuits are required to stabilize the entire gain. In
our VGA, two bias circuits which have the same structure but
different temperature dependence are employed.
Fig. 5 shows the bias circuit and an amplifier. To focus on the
principle, the schematic is simplified and a fixed-gain amplifier
is indicated. (13)
When the transistors M5 and M6 are in an exponential region,
the bias circuit operates as a reference circuit. Since the drain Consequently, the voltage gain of the amplifier, , is
currents of M5 and M6 are the same
(14)

(6) The gain depends on the resistance ratio, and is indepen-

dent of temperature [8].
The source resister makes the drain current of M6 This temperature stabilizing technique is adopted in
our VGA. The reference current is used in generating the
(7) common-mode reference voltage of the voltage converter, as
shown in Fig. 4, and the gain of our VGA at is
Note that and are proportional to the absolute tempera- insensitive to the temperature.
ture.
The drain current of M8 is the same as that of M6. The III. CIRCUIT IMPLEMENTATION
transconductance of M8 is
A. IF Amplifier
(8) Fig. 6 shows the schematic of the IF amplifier. It consists of a
variable input amplifier and a transimpedance output buffer.
and the voltage gain of the amplifier, , is When the input transistors, M9 and M10, are in an exponential
region, is proportional to the bias current . When the
(9) input transistors are in a square-law region, is proportional
to the square root of . In both cases, is proportional
The gain depends on the resistance ratio, and is indepen- to .
dent of temperature. The transimpedance output buffer has low input and output
A similar result is obtained in the case where M5 and M6 impedances, which makes the frequency response of the IF am-
operate in a square-law region. Since the drain currents of M5 plifier wide and flat. The transresistance of this buffer is approx-
and M6 are the same imately the same as the feedback resistance . Consequently,
the amplifier gain is , which is the same as that of the am-
(10) plifier shown in Fig. 5.

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 556
Fig. 7. Schematic of the voltage converter used in the master–slave control
circuit.
B. Voltage Converter for Master–Slave Control Circuit
Fig. 7 shows the voltage converter for the master and slave
circuits. The input transistors, M11 and M12, are biased in the
triode region. The drain currents of M11 and M12 are
(15)
(16)
Assuming that the and are successfully controlled
and they are equal to each other, the differential output voltage
of the voltage converter is
(17)
The differential output voltage is proportional to the differen-
tial input voltage, and the differential gain is proportional to the
drain–source voltage. Note that a proper common-mode rejec-
tion ratio is achieved with the common-mode feedback loop, as
shown in Fig. 4. This voltage converter has the advantage of a
wide liner input range with variable gain [9].
Fig. 8 shows the schematic of the current-comparator-type
amplifier used as the regulating amplifiers in the voltage con-
verter. To avoid the effect of device parameter variation, triode
region transistors, M14 and M15, with cascode transistors are
used at the input of the regulating amplifier [10]. The positive
input node of the regulating amplifier is opened, and input cur-
rent is 0. The input node voltage is the same as the voltage of
node A in the bias circuit. The node A voltage is controlled by
the feedback signal shown in Fig. 3. The bias circuit has a
role as a voltage converter which converts the large swing feed-
back signal into the small swing control voltage, to en-
sure that M11 and M12 in Fig. 7 are in the triode region.
This current-comparator-type regulating amplifier has the ad-
vantage of low sensitivity to the temperature and device param-
eter variation, and makes the master–slave control circuits ro-
bust.
C. Reference Voltage Generator
The reference voltages for the master–slave control circuits
are generated with series resistors dividing the power-supply
voltage. Therefore, the reference voltages are proportional to
the power-supply voltage. It is preferable because pulse density
modulation, of which output is proportional to the power-supply
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 5, MAY 2002
Fig. 8. Schematic of the regulating amplifier used in the master–slave control
circuit.
Fig. 9. Die micrograph.
voltage, is often used to generate the gain-control voltage
in CDMA transceivers [2]. As shown in (5), the current
depends on the voltage ratio of to .
Consequently, the reference voltages generated with the voltage
divider make the gain control characteristic insensitive to the
power-supply voltage and temperature.
IV. EXPERIMENTAL RESULTS
Fig. 9 shows the die micrograph of our test chip. The active
area occupies 0.7 mm 0.7 mm.
Fig. 10 shows the measured gain-control characteristics at
temperatures of 33 C, 26 C, and 83 C. As expected, a
temperature-stable gain and stable gain-control ratio were ob-
tained. The gain and the gain-control ratio at V were
28.7 1.1 dB and 45.0 0.8 dB/V, respectively. An 80-dB lin-
early controlled gain range within 3-dB error was achieved at
26 C. These results indicate that:
1) The voltage converter used in the master–slave control
circuit has wide linear input range.
2) An accurate exponential conversion is done with the sub-
threshold region transistor.
3) The proposed master–slave control circuit stabilizes the
gain-control ratio successfully.
4) The bias circuits successfully compensate for the temper-
ature dependence of exponential and square-law ampli-
fiers.
Fig. 11 shows the frequency response of the VGA. The
dc-decoupling capacitors between each stage limit the lower
frequency, and the frequency divider used as a phase shifter in
QDEM limits the upper frequency. This result shows that the
 YAMAJI et al.: TEMPERATURE-STABLE CMOS VARIABLE-GAIN AMPLIFIER 557

TABLE I
PERFORMANCE SUMMARY

confirmed from 33 C to 83 C with a test chip. An 80-dB

linearly controlled gain range was achieved with exponential
voltage-to-current converters using MOS transistors biased in
Fig. 10. Gain-control characteristics at 033 C, 26 C, and 83 C.
a subthreshold exponential region. This VGA is suitable for a
highly integrated CMOS radio receiver.

Fig. 11. Frequency response of the VGA.
subthreshold transistor can amplify over 100 MHz of frequency
signal. To achieve the required , the transistors used in
exponential amplifiers have a much wider gate width than that
of square-law amplifiers. As a result, the parasitic capacitance
of the transistors becomes large. For a VGA, two effects on
frequency response due to the parasitic capacitance should
be considered. One is the gain reduction at high frequencies
when the VGA has a high gain, and the other is attenuation
reduction when the VGA attenuates the signal. The former
effect is controlled successfully with the transimpedance output
buffers which have low input impedance. The latter effect is
seen when the signal passed through a parasitic path is not
negligible. The latter effect is barely detectable on the curve of
V. It means that our 0.25- m MOS transistor has a
sufficiently larger intrinsic than parasitic transadmittance
in the indicated frequency range, even when it is biased in the
subthreshold exponential region.
Other measured results are summarized in Table I. A satis-
factory linearity is achieved by appropriate arrangement of the
square-law and exponential amplifiers.
V. CONCLUSION
An IF VGA with a master–slave temperature-stabilizing
technique has been proposed, and temperature stability was
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Takafumi Yamaji (M’98) received the B.E. and
M.E. degrees in communication engineering from
Kyusyu University, Fukuoka, Japan, in 1988 and
1990, respectively.
He joined the Corporate Research and Develop-
ment Center, Toshiba Corporation, Kawasaki, Japan,
in 1990. Since then, he has been engaged in the re-
search and development of analog integrated circuits
for wireless communications. Currently, he is a Vis-
iting Researcher in the Department of Electrical En-
gineering, University of California, Los Angeles.

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 558
Nobuo Kanou (M’99) was born in Tokyo, Japan,
in 1968. He received the B.E., M.E., and Dr. Eng.
degrees in electronic engineering from Tokyo Denki
University in 1991, 1993, and 1997, respectively.
From 1996 to 1999, he was an Assistant at Tokyo
Denki University, and was engaged in the research
of neural networks with analog integrated circuits.
In 1999, he joined the System LSI Design Division,
Semiconductor Company, Toshiba Corporation,
Kawasaki, Japan. Since then, he has been engaged in
the development of analog CMOS integrated circuits
for telecommunications.
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 37, NO. 5, MAY 2002
Tetsuro Itakura received the B.E. degree in
electronics engineering from the Tokyo University
of Agriculture and Technology, Tokyo, Japan, in
1981, and the M.S. degree in electrical engineering
from Stanford University, Stanford, CA, in 1989.
In 1981, he joined Toshiba Corporation, Kawasaki,
Japan, where he is with the Mobile Communication
Laboratory, Corporate Research and Development
Center. He has been involved in the design of
opamps for LCD driver ICs and the design of analog
filters for telecommunication. His current research
interests are in analog LSI design and signal processing.