Analog Integrated Circuits and Signal Processing, 21, 109±116 (1999)

# 1999 Kluwer Academic Publishers, Boston. Manufactured in The Netherlands.

Class AB Output Stages of the Integrated Ampli®ers

VADIM IVANOV
Burr-Brown Corp., Tucson, AZ

Received November 12, 1997; Accepted April 24, 1998

Abstract. General approach to the design of the class AB output stages of bipolar and CMOS ampli®ers based on
common-mode negative feedback is discussed. Frequency compensation of the result multiloop system is provided
by feed forward links. Effectiveness of the proposed method is shown on designs of rail-to-rail bipolar and CMOS
output stages, all-NPN output stage, output stage of the hearing aids IC. Common design mistakes are shown using
industry-standard ICs.

Key Words: operational ampli®er, class AB, frequency compensation, minimum selector

1. Introduction shown in Fig. 2: common-collector (drain), common-

One of the most important parts of the integrated
operational or power ampli®er is the output stage.
Output stage should provide good linearity and high-
frequency behavior combined with high power
ef®ciency and low current consumption. Good
linearity means stable gain of the output stage in
spite of output voltage (current). Ideal and typical
dependencies of the input-referred error of the
ampli®er from the output signal is shown in Fig. 1.
Any sharp change of the error curve means drop of
the ampli®er open-loop gain at this point and
nonlinear distortions, especially non-desirable for
the audio applications. Difference in error curve
angle for sinking and sourcing of the output current
mean second harmonic in signal distortions.
For low frequencies those errors can be negligible
due to the high enough open-loop gain and small
absolute value of the error; for frequencies close to the
unity-gain bandwidth of the ampli®er these non-
linearities become more important. As the result, in
distortion-sensitive applications like audio ampli®ers
bandwidth exceeds signal bandwidth in 1000 and
more times which subsequently leads to excess power
consumption, complicated technology, etc.
Output stage of OpAmp consists of two power
transistors; main topologies of the output stages are
emitter (source) and mixed (all-NPN or N-channel).
Consequently, it has two controlled variables: output
voltage Vout , de®ned by the input signal, and quiescent
current Iq ˆ min…I1; I2†, de®ned by internal feed-
backs and structure of the stage. The goal of the class
AB stabilization is the preserving of good linearity
and speed combined with power ef®ciency by keeping
Iq within certain limits.
Typical dependence of the Iq from output current is
shown in Fig. 3. Because transconductance of bipolar
and, in ®rst approximation, of CMOS transistors
de®ned by its collector (drain) current, value of Iq
with zero output current de®nes lowest gain and
capacitive load capability of the stage (introduced by
the capacitive load time constant is T ˆ CL =gm [1]).
Iqmin is not so important and should be kept non-zero
mainly to prevent saturation or complete shut off of
the stage transistors.
Any class AB circuit in every operating point can
be described by the graph in Fig. 4 [2], as shown on
examples in part 3 of the paper. General properties of
this differential structure with common-mode feed-
back are described in part 2 (full and mathematically
correct analysis is done in [2]); knowledge of these
properties clears drawbacks of the existing decisions
( part 3) and helps to generate a set of new circuits for
the output stages ( part 4). Any feedback loop has a

M9331 Kluwer Academic Publishers Analog Integrated Circuits and Signal Processing (ALOG) Tradespools Ltd., Frome, Somerset
110 V. Ivanov
Fig. 1. Input error versus output voltage.
potential stability problem; recommendations on the
compensation of these local feedback loops are in part
5 of the paper.
2. Differential Structure with Common-Mode
Feedback
Output stage can be abstracted to differential structure
with common-mode feedback as shown in Fig. 4 [2],
where X1, X2Ðcurrent (or more rarely voltage) on
the inputs of each of output transistors, B1, B2Ðgain
of output transistors, F1, F2Ðcurrent-dependent
transfer coef®cients of the current measurement/
minimum selector circuit, D and E1, E2Ðgain in
class AB stabilization loops. Gain B1, B2 is usually
proportional to the transconductance of the output
transistors Q1, Q2.
Fig. 2. Topologies of output stage.
M9331 Kluwer Academic Publishers Analog Integrated Circuits and Signal Processing (ALOG)
Fig. 3. Iq …Vout †.
This represents most general caseÐin existing
circuits part of these links can be absent.
Output current of the stage is equal
I1 ÿ I2 ˆ …A1B1 ‡ A2B2†Vin ÿ YD…B1E1 ÿ B2E2†
…1†
where Y is generally the complex non-linear
minimum-like function of I1, I2.
It can be seen, that conditions for ideally linear stage
are B1E1 ˆ B2E2 and …A1B1 ‡A2B2† ˆ const.
It is relatively easy to achieve E1 ˆ E2 ˆ E and
A1 ˆ A2 ˆ A. Gain B1, B2 of output transistors is
usually proportional to their transconductance,
another words, to the current for bipolars or to
sqrt(current) for CMOS (without use of the local
feedbacks for gain control). In area around zero output
current of both transistor currents are close to the Iq ,
and it is possible to get B1 ˆ B2 ˆ B and stage gain is
equal to …AB1 ‡ B2† ˆ AB.
Fig. 4. General signal graph of the output stage.
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 Class AB Output Stages of the Integrated Ampli®ers 111

For the big output currents minimum-selector

circuit breaks one of the links F1, F2, for example if
I1 4 I2 F1 ˆ 0, F2 ˆ 1, so Y ˆ 12. Current 12 is
keeping equal to Iq with possible error less than
Vin A/DE. If B2F2DE 1 (otherwise loop gain is not
suf®cient and class AB operation can not be kept), and
gain of the ampli®er is:
Iout *I1 ˆ 2B1Vin A …2†
If I1 5 I2
Iout ˆ 2B2Vin A
Fig. 5. Graph of the non-symmetrical output stage.
Summarizing:
± any output stage can be generalized to the structure achieve superior linearity. Typical dependence of the
in Fig. 4; input error versus output voltage is shown in Fig. 7.
± ideally linear stage needs matching Second drawback of such stages is that long gain
chain when sourcing current leads to additional
E1 ˆ E2; delays, complicated compensation and loss of the
A1 ˆ A2 ˆ const ampli®er speed.
most difficult B1 ˆ B2 ˆ const To linearize such stages, the non-linear local feed-
back can be used as in OP296 [5] (Fig. 8), as shown in
± at any operating point the loop gain of at least one structure in Fig. 5 by dashed line. Non-linearity of this
of the feedback loops F-D-E-B should be 4 1 to
keep class AB operation.
Structures of the existing class AB circuits can lack
some of the links of Fig. 4 and mentioned above
conditions could be not satis®ed; it means various
drawbacks, as shown in the next part. Designer's
decision is which drawbacks are acceptable.
Understanding of properties of the basic structure
can help to generate may be complicated, but more
accurate and fast circuits.

3. Structures of Class AB Stages and Their

Properties

First variation of basic structure is shown in Fig. 5 and

describes the widely used stage shown in Fig. 6; it can
also characterize output stages of MC33502 [3] and
many other industry circuit decisions for OpAmps and
power ampli®ers.
It differs from Fig. 4 by the removal of E2 and A1
links. Links F1 and F2 are non-linear, strong for small
currents and weakening with the rise of current.
Structure is inherently non-symmetrical and has
different signal gain for sinking and sourcing of
current. As a result, it is not possible in principle to Fig. 6. All-NPN stage.

M9331 Kluwer Academic Publishers Analog Integrated Circuits and Signal Processing (ALOG) Tradespools Ltd., Frome, Somerset
112 V. Ivanov
Fig. 7. Input error vs. Vout .
local feedback should be matched with F2. It improves
to some extension symmetry of error curve by
decreasing of the gain for sourcing currents (one non-
linearity compensates another non-linearity), but does
not help to ®x speed problems.
Another way to provide class AB operation is the
non-linear local feedbacks which keep minimum
current of the each output transistor stable regardless
of input signal, as was ®rst suggested by D. Monticelli
(Fig. 9) [4]. Modi®cations of this circuit are used in
numerous OpAmps, like LMC604x [5], LM646x, etc.
Structure of those stages is shown in Fig. 10.
Both gain links are independent and each one has
non-linear local feedback keeping minimum current
equal to Iq . As soon as this local feedback becomes
active, input signal does not change current of this
transistor any more.
It is easy to achieve equal and big gain when
sourcing and sinking current. However, in transition
Fig. 8. Use of the local feedback to linearize stage.
M9331 Kluwer Academic Publishers Analog Integrated Circuits and Signal Processing (ALOG)
Fig. 9. Output stage with local feedbacks.
point close to the Vout ˆ 0 or with small output current
both local feedbacks are active and open-loop gain of
ampli®er drops down (Fig. 11), causing zero-cross
distortions of the signal.
4. Class AB Stages with Common-Mode
Feedback
Historically ®rst and still most popular class AB
output stage (Fig. 12) is consistent with basic structure
in Fig. 4. It's error versus output voltage is shown in
Fig. 13. Stage gain rises with output current due to
increase of transconductance of output transistors
with current (2); gain in zero point and zero-cross
distortions are de®ned by the transconductance when
output transistors are biased by Iq. As shown in Fig.
13, error curve gets smoother and gain variation
decreases with increase of Iq . For the same reason
Fig. 10. Graph of the output stage with independent local
feedbacks.
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 Class AB Output Stages of the Integrated Ampli®ers
Fig. 11. Error vs Vout.
similar error curve have all stages based on structure
of Fig. 4 as far as gain of both output transistors (B1,
B2 links in Fig. 4) is not stabilized by the local
feedbacks.
Various realizations of the structure of Fig. 4 for
rail-to-rail bipolar and CMOS ampli®ers were
invented by Prof. J. Huijsing and his group [7±10].
For the straight forward realization of structure of
Fig. 4 following circuit blocks are necessary:
1. Sensors of the current of output transistors. Those
sensors should be linear for small currents close to
the Iq ; linearity in the big current area is not
important. Some variants of current measurement
are shown in Fig. 14. For measurements can be
used:
base-emitter (gate-source) voltage:
r
I L
Vbe ˆ Vt ln e or Vgs ˆ Vt ‡ k ID
Is W [11].
Fig. 12. Common-collector output stage.
M9331 Kluwer Academic Publishers Analog Integrated Circuits and Signal Processing (ALOG)
113
Fig. 13. Error vs Vout.
voltage drop on the resistor in the emitter (source) of
the transistor connected in parallel (Q20 in Fig. 14),
which is equal to:
I IR
VR ˆ Vt ln & if VR  Vt
NI N
NÐratio of emitter sizes.
2. Circuit of minimum-like function of I1, I2. In
circuit in Fig. 12 function I1 I2 is used. In Fig. 15
few simplest minimum selectors are shown: diode
minimum selector, diode minimum selector pro-
viding voltage gain and CMOS minimum selector
3. Two feedback ampli®ers (for each of output
transistors). Gain of differential stage is usually
suf®cient to provide the effective class AB
stabilization feedback.
Examples of output stages designed by strait
Fig. 14. Current sensing.
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114 V. Ivanov

Fig. 15. Minimum-selection circuits.

realization of structure of Fig. 4 and using described

above blocks are shown in Figs. 16±19.
In Fig. 16Ðrail-to-rail output stage of the bipolar
OpAmp [12]. Sum of the base-emitter voltages and
consequently product of currents of output transistors
is stabilized here. Emitters of transistors of A1, A2
differential stages are connected, ensuring identity of
the A1,A2 gain. Emitters of E1, E2 ampli®ers are also
connected for the same reason.
CMOS rail-to-rail output stage with minimum
selector circuit is shown in Fig. 17. Identity of A1, A2
and E1, E2 gain can be achieved by appropriate
choice of the transistor's W/L and/or IA , IE currents.
Output stage on Fig. 18 with all NPN output
transistors is not rail-to-rail, but still viable for high-
frequency and high-current operational and power
ampli®ers due to better speed and current capabilities
of NPN transistors for most processes.
For simplicity, ampli®ers A1, A2 replaced by the
single transistor Q3; it leads to the slight non-
symmetry of the stage error.
More symmetrical stage with the same structure for
high frequency applications is described in [14].
Fig. 17. Rail-to-rail CMOS output stage.
1-V class AB output stage for the hearing aids
ampli®er with differential output (usually these amps
are loaded on transformer) is shown in Fig. 19.
These are few examples of the variety of output
stages which can be designed using described
approach.
5. Frequency Compensation of the Class AB
Local Feedback Loops
All class AB stages which are build using structure of
Fig. 4 contain at least 2 feedback loops. For system
stability both loops should be frequency compensated
at all operating points.
Among variety of compensation methods most

Fig. 16. Bipolar rail-to-rail output stage. Fig. 18. All-NPN class AB stage.

M9331 Kluwer Academic Publishers Analog Integrated Circuits and Signal Processing (ALOG) Tradespools Ltd., Frome, Somerset
 Class AB Output Stages of the Integrated Ampli®ers
Fig. 19. Differential output stage.
useful for this case is the compensation by the low-
gain but fast feedforward links [13,12]. Circuit
diagram of the stage in Fig. 16 with addition of feed
forward link for compensation of the high-side loop is
shown in Fig. 20 (low-side loop of this stage does not
need compensation). Function of forward link
provided if I2 > I1 due to the fact that speed and
transconductance of the bipolar transistors are
proportional to the collector current.
Similar compensation needs stage in Fig. 18.
Fig. 20. Feed forward link for compensation of the high-side
class AB loop.
M9331 Kluwer Academic Publishers Analog Integrated Circuits and Signal Processing (ALOG)
115
7. Conclusion
General method of the class AB circuits design based
on general differential structure with common-mode
feedback has been proposed.
Effectiveness of the method is shown on few non-
trivial examples of the variety of class AB stages
which can be generated using described approach.
The same methodology can be used for the design not
only of half-bridge or differential stages, but also for
bridge, 3-phase and other stages with unlimited
quantity of outputs and internal variables, for class
AB input stages, etc.
Method also empowers designer to estimate draw-
backs of the existing decisions without their detailed
analysis and, most important, indicates means for the
circuit improvement.
References
1. E. Vittoz, ``Low-power low-voltage limitations and prospects
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2. V. N. Ivanov and V. V. Ivanov, ``
'' (Power integrated ampli®ers). Rumb: St.-
Petersburg, 1987 (in Russian).
3. R. Grif®th et al., ``A 1V BiCMOS Rail-to-rail ampli®er with n-
channel depletion mode input stage.'' Digest ISSCC'97
pp. 352±353.
4. D. Monticelli, US pat. 4,570,128 ``Class AB output stage with
large swing.''
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116 V. Ivanov
ampli®ers.'' In: Analog integrated circuits and signal proces-
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Vadim Ivanov received his degree in electrical
engineering in 1980 from St. Petersburg Electrical
Engineering University, Russia.
M9331 Kluwer Academic Publishers Analog Integrated Circuits and Signal Processing (ALOG)
From 1980 till 1991 he was design engineer and
researcher in ``Electropribor'' Research Institute, St.
Petersburg, Russia, working on analog electronics and
ASICs in power, sensor and RF areas with OES
Electronics, St. Petersburg, Russia. From 1991 to
1995 he designed various ASICs in power, sensor and
RF areas with OES Electronics, St. Petersburg, Russia.
In 1996 he joined Burr-Brown Corp., Tucson, AZ, as a
design engineer.
He has co-authored two books on analog IC design
and holds 3 U.S. and more than 40 USSR author
certi®cates and Russian patents on inventions in
analog circuit techniques. His interests include
utilization of the control theory methods for the
analog IC design.
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