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WE3F-6

A HIGH SPEED FEED FORWARD PSEUDO AUTOMAllC GAIN CONTROL CIRCUIT


FOR AN AMPLIFIER CASCADE

Stewart Walker

Filtronic Components Ltd W. Yorkshire, England, UK

ABSTRACT
become attenuated would be much under lOns, if
delays associated with the detector, feedback circuit,
A technique has been demonstrated that allows pseudo
attenuator, and RF gain cascade are taken into account.
automatic gain control to be performed on an RF
Therefore intuitively it appears to be impossible to make
amplifier cascade in approximately 20ns . This gives a
limited RF output which has negligible harmonic content. a stable conventionalA.G.C. system which would attack
The limited RF output phase is relatively independent of and give a constant amplitude output within
input power. approximately 20ns. For this reason an open loop
solution to the problem is presented in this paper. The
presented in this paper. The construction and results
from a 2.5Ghz to 5.3Ghz prototype circuit that was
constructed in order to investigate the circuits
performance, are also presented.

INTRODUCTION PRINCIPLES OF OPERATION OF THE FEED


FORWARD PSEUDO A.G.C. CIRCUIT
Many EW systems use a combination of directional
antenna and interferometry techniques for measuring A block diagram of the circuit is shown in Fig 1. The n*
the direction of arrival of an RF pulse. Typically the comparitor reference level is set such that each
amplitude difference between the signals detected by comparitor changes state when the power at the
several directional antennae yields coarse direction of detector reaches a level which is slightly lower than the
arrival information. While comparison of the phase of level at which the n+lmamplifer starts to saturate. The
the signals, by an interferometer yields fine direction comparitor output is fed forward to switch in all
of arrival information. It can be seen that the RF subsequent attenuators down the cascade, which
amplifier cascades that are used for amplifying the exactly cancel the gain of each stage. As the
incoming signals to an adequate level for the feedfoward signal is applied to each OR gate
interferomer must exhibit good AMlPM conversion simultaneously, the time taken for the AGC to cut in is
over the input dynamic range. This is to minimise governed by the propagation delay of one comparitor
phase errors due the difference in amplitude of the and one OR gate, and the time it takes for the
signals caused by the directional antenna. Typically attenuators to change state. The outputs of the
the phase shift of an of S21 for an amplifier does not comparitors further down the cascade, which may
vary with input power, providing the input power is low corrupted by switching transients from prior attenuators
enough that the amplifier is operating linearly. As the do not effect the attenuation state, during an RF pulse.
input is increased to the point at which an amplifier The attenuation for the whole cascade is controlled by
stage stops to operate linearly, then the phase of S21 one comparitor transition. The detector that drives each
starts to change with increasing power level. comparitor is separated from the first attenuator that it
controls by an amplifier. This amplifier's reverse isolation
It would therefore be desirable to keep the individual stops the detector being effected by switching transients
RF amplifier stages from saturating. In principle this from the first attenuator, that it controls.
could be achieved using an amplifier cascade with
automatic gain control (A.G.C.). however in order to DESIGN OF A PROTOTYPE CIRCUIT
operate effectively on incoming radar pulses it would
have to operate within approximately 20ns. It is A prototype was constructed to operate across the 2.5
unlikely that a conventional closed loop feedback to 5.3 GHz band.. The intention was to keep the
A.G.C. system could be made in which the delay ouput power constant to within a 5dB wide window,
between an RF pulse arriving and the pulse starting to over approximately 30dB wide dynamic range. AM to

94 1
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PM conversion of up to 2"ldB has been seen from controlled by a detector closer to the input of the
conventional amplifier cascades at similar frequencies. cascade. However when a pulse finishes, then false
The intention was to demonstrate that this could be triggering may be caused by this, which effects the
reduced by an order of magnitude, by using the length of time it takes before the A.G.C. is able to
feedforward A.G.C. to ensure that the amplifiers never operate properly on a new pulse.
saturate. The aim was also to show also that the
feedforward A.G.C. circuit could cut in approximately
20ns, and to find out if any unforeseen practical Fig 3 shows how the individual stages were connected
problems that would effect its operation. together to make the prototype. This differs slightly from
the circuit shown in Fig 5.1 in two main respects:
Fig 2 shows a diagram of the a single stage of the
prototype circuit. The low phase shift attenuator was 1) In order to demonstrate that fine amplitude control
made by switching the RF through two different paths could be incorporated at the end of the cascade a
with differing attenuation, but equal electrical length. The switched attenuator, with approximately half of the
attenuation state is switched between 3dB attenuation, attenuation range that each stage attenuator had, was
and 14dB attenuation. The phase through this circuit placed at the end of the cascade. As the input power is
was found to be more constant than a circuit with OdB ramped up this was altemately switched to tum to its
and 1IdB attenuation, when the circuit was terminated high attenuation state (9dB) by a second comparitor on
by amplifiers at either end. This is because reflected each detector, and then to its low attenuation state
signals between the amplifers have less effect on the (4.5dB) as the next main attenuator stage was switched
phase with the 3dB pad in place in the low attenuation in. The signal that switched this fine attenuator to its
state. low state was derived from the same comparitor
transition that turned on the main attenuator stage,
The gain of this entire stage was switched between hence the attenuators change state at exactly the same
approximately 10dB and OdB. This gain was acheived power level.
using 2 Avantek MGA64135 packed MMlC amplifiers
with nominally 10 dB gain each. As can be seen there 2) The logic was inverted to allow the OR gates to be
was 10 dB of loss in the through path, caused by a replaced with 3 input NAND gates which were readily
combination of the Wilkenson power splitter for coupling available. It was decided to use AC type logic for the
off the signal to the detector, the switched attenuator, NAND gates, as it has a large output transition going
and some gain equalisation to improve the frequency from within 0.5V from the negative rail to within 0.5V of
flatness. The detector was protected from detecting the positive rail. This allowed the gates to drive the
switching transients of the attenuators further down the attenuators directly without extra driving circuitry.To
cascade, which may have caused false triggering, by make driving the attenuators straight forward the logic
the reverse isolation of one amplifier, and the isolation was run from +/-2.5V supplies to provide a negative low
of the Wilkenson Power Splitter. output and positive high. The comparitors were run from
+2.5V and -7SV to allow the NAND gates to be driven
It is not quite as important that a detector could detect directly from the comparitors. Hysteresis approximately
transients from an attenuator closer to the input of the equivalent to 0.5dB of RF power was put on each
cascade, when an input pulse is applied. This is comparitor circuit to avoid spurious transitions.
because, by definition, that detector will not be effecting
the operation of any attenuators, as they will all be

FIG I BLOCK D I A G R A M CF HIGH SPEED FEED F O P W A R D


PSEUDO A G C C I R C U I T

rm*r IlliOC , IT"0 ITKL ~ 1Hli3 Illzr


,
I

Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY WARANGAL. Downloaded on February 27, 2009 at 08:08 from IEEE Xplore. Restrictions apply.
FIG3
BLOCK DIAGRAM OF PROTOTYPE FEED FORWARD PSEUDO AGC CIRCUIT

I1 L

The unit was set up at 4GHZ with comparitor transitions &er the pulse has finished appears more significant due
set so as to give the output power versus input power to the transients coming from attenuators at the
characteristics shown in Fig.4. beginning of the cascade and being amplifed by the
following amplification. Because of the length of time
PERFORMANCE OF THE PROTOTYPE CIRCUIT that these transients carry on for after the pulse has
finished it appears that they are large enough to
A single stage was found to have approximately 1dB retrigger the attenuators further down the cascade,
gain ripple, and +/-2" phase shift between attenuation hence causing more transients.
states. The phase shift is thought to result mainly from
the.mismatach effects between the switching junctions The phase of S21 at an input power of -1dBm refered to
and amplifiers being suppressed more in the high the phase shift when the input power was -4ldBm was
attenuation state. measured. The worst case phase shift over 4OdB
dynamic range was approximately 8'. This results in a
approximately 0.2"ldB average AMlPM conversion. This
The output power of the unit at 4 GHz is shown in Fig
4 as the input power is increased in real time over a compares with figures of 2'/dB that have been seen for
conventional limiting amplifier cascades.
range of 36 dB. This demonstrates that over a 28 dB
range the output power stays within +/-MI3 of a fixed
output level. It also shows that the transitions appear The harmonic output of the unit was also measured for
clean, without false triggering.

The pulse performance of the unit is shown in Figs 5


to 7. They show the output from a negative going
detector connected up to the RF output, as the power FIG . 2 C I A G R A M OF R F CIRCUITRY OF SINGLE
STAGE OF PROTOTYPE FEED FORWARD A.GC C I R C U I l
level of an applied 250ns pulse is increased. Fig 5
shows the output of the unit with the input power just
below the power level at which the first transition 2 SECTION

occurs. In this state the unit operates identically to a VIKENSON


POWER DIVIrIER
(3 dB LOSS)
conventional amplifier cascade. It is noticeable that the RF
INPUT
RF pulse appears to take approximately ions to get
close to its ultimate level. This is thought to be caused
by the signal source, and is thought to be the reason
why the unit appeared to be slightly slower than
origanally anticipated. Fig 6 shows the ouput from a an
identical input pulse to that in Fig 5 except with its power
increasedto a level that was 3dB above the power level
where the 3"1transition occurred. The time that it took for
the output to reach its final level after the start of the
rising edge of the pulse was 22.5ns. Fig 7 shows the
same 25017sinput pulse, except with its power level 5 dB
above where the final transition occurred. This shows
the attenuation to "cutin" in approximately the same time
as Fig 6. On this plot the effect of switching transients

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a 2 GHz fundemental at power levels between
-40dBm and OdBm. It was found that the second and third F1G.L OUTPUT W W E R OF THE PROTOTYPE UNIT AS THE
INPUT POWER IS SWEPT OVER A RRNGE OF 36 dB
harmonic levels were always greater than 5OdB below
the fundamental at the output. This illustrates that an
amplifier cascade using this type of A.G.C. would -3dBM
provide a very clean amplified signal for frequency
measurement, or other uses, over a wide input dynamic
range.
FURTHER WORK

In order to make a unit of this type into a practical unit,


there are several areas which would require further I I l-i I I
work:

I ) In order not to cause spurious outputs after a pulse


ends, the switching transients resulting from the
attenuators being switched to a their low attenuation
state should be preventedfrom being amplifed by the RF
amplifiers. This could be acheived by combination of FIG
~~ 5 _._
.PP
PULSE DETECTED
filtering the RF lines, slowing down this switching pulse, AT OUTPUT OF
PSEUDO A.G.C.
or a different design of attenuator PROTOTYPE
(INPUT POWER
BELOW FIRST
2) The time taken for the unit to "cut in" should be TRANSITION)
reduced to the region of ions over the full dynamic (NEGATIVE GOING
DETECTOR)
range. With the current unit significant degradation in
"cut in" time was observed close to the transitions,
where the comparitors were not being significantly
overdriven.
FIG6 RF 125 mV/div -375 mV 50.0 n s / d i v 0.000 3
PULSE DETECTED
3) In order to keep the RF output within a narrow AT OUTPUT OF
wind? the gain of the amplifier cascade would require PSEUDO
PROTOTYPE
A.G.C. G v.

to be flat with frequency and temperature compensated.


(INPUT POWER
Altematively, one conventional limiting amplifer stage 3dB ABOVE THIRD
TRANSITION)
could be placed at the output. This would, however,
(NEGATIVE GOING
cause additional phase shifl in S21, with input power DETECTOR)
OSV

level. Cursor 0-X


-145 mv
22 5 ns
It is the authors opinion that the feedforward techniques
described in this chapter may lend themselves well to a FIG7 RF
PULSE DETECTED
GaAs monolithic approach, with an amplifer, switched AT OUTPUT OF
attenuator, detector, high speed comparitor and high PSEUDO A . G .C .
PROTOTYPE
speed logic circuitry on a GaAs MMIC. This should (INPUT POWER
011

improve the speed and reduce the size. 5dB ABOVE SIXTH
TRANSITION)

(NEGATIVE GOING
DETECTOR]
CONCLUSIONS
Cursor 0-x
-169 "J
A novel feed forward pseudo A.G.C. circuit has been 26.5 ns

presented. This is intended to reduce the AM to PM


conversion in the RF output of a limiting RF amplifier
cascade. There may also be applications for this
technique in amplifying RF pulses over a wide input
dynamic range to give an RF output that is free from
harmonics. The design and construction of a prototype
circuit are described. The key points of the
performance of the prototype are approximately
0.2"ldB AM to PM conversion, and approximately 20ns
"cut in" time.

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