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Stewart Walker
ABSTRACT
become attenuated would be much under lOns, if
delays associated with the detector, feedback circuit,
A technique has been demonstrated that allows pseudo
attenuator, and RF gain cascade are taken into account.
automatic gain control to be performed on an RF
Therefore intuitively it appears to be impossible to make
amplifier cascade in approximately 20ns . This gives a
limited RF output which has negligible harmonic content. a stable conventionalA.G.C. system which would attack
The limited RF output phase is relatively independent of and give a constant amplitude output within
input power. approximately 20ns. For this reason an open loop
solution to the problem is presented in this paper. The
presented in this paper. The construction and results
from a 2.5Ghz to 5.3Ghz prototype circuit that was
constructed in order to investigate the circuits
performance, are also presented.
94 1
CH3389-4/94/~-0941$01.(XIO1994 lEEE 1994 IEEE MlT-S Digest
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PM conversion of up to 2"ldB has been seen from controlled by a detector closer to the input of the
conventional amplifier cascades at similar frequencies. cascade. However when a pulse finishes, then false
The intention was to demonstrate that this could be triggering may be caused by this, which effects the
reduced by an order of magnitude, by using the length of time it takes before the A.G.C. is able to
feedforward A.G.C. to ensure that the amplifiers never operate properly on a new pulse.
saturate. The aim was also to show also that the
feedforward A.G.C. circuit could cut in approximately
20ns, and to find out if any unforeseen practical Fig 3 shows how the individual stages were connected
problems that would effect its operation. together to make the prototype. This differs slightly from
the circuit shown in Fig 5.1 in two main respects:
Fig 2 shows a diagram of the a single stage of the
prototype circuit. The low phase shift attenuator was 1) In order to demonstrate that fine amplitude control
made by switching the RF through two different paths could be incorporated at the end of the cascade a
with differing attenuation, but equal electrical length. The switched attenuator, with approximately half of the
attenuation state is switched between 3dB attenuation, attenuation range that each stage attenuator had, was
and 14dB attenuation. The phase through this circuit placed at the end of the cascade. As the input power is
was found to be more constant than a circuit with OdB ramped up this was altemately switched to tum to its
and 1IdB attenuation, when the circuit was terminated high attenuation state (9dB) by a second comparitor on
by amplifiers at either end. This is because reflected each detector, and then to its low attenuation state
signals between the amplifers have less effect on the (4.5dB) as the next main attenuator stage was switched
phase with the 3dB pad in place in the low attenuation in. The signal that switched this fine attenuator to its
state. low state was derived from the same comparitor
transition that turned on the main attenuator stage,
The gain of this entire stage was switched between hence the attenuators change state at exactly the same
approximately 10dB and OdB. This gain was acheived power level.
using 2 Avantek MGA64135 packed MMlC amplifiers
with nominally 10 dB gain each. As can be seen there 2) The logic was inverted to allow the OR gates to be
was 10 dB of loss in the through path, caused by a replaced with 3 input NAND gates which were readily
combination of the Wilkenson power splitter for coupling available. It was decided to use AC type logic for the
off the signal to the detector, the switched attenuator, NAND gates, as it has a large output transition going
and some gain equalisation to improve the frequency from within 0.5V from the negative rail to within 0.5V of
flatness. The detector was protected from detecting the positive rail. This allowed the gates to drive the
switching transients of the attenuators further down the attenuators directly without extra driving circuitry.To
cascade, which may have caused false triggering, by make driving the attenuators straight forward the logic
the reverse isolation of one amplifier, and the isolation was run from +/-2.5V supplies to provide a negative low
of the Wilkenson Power Splitter. output and positive high. The comparitors were run from
+2.5V and -7SV to allow the NAND gates to be driven
It is not quite as important that a detector could detect directly from the comparitors. Hysteresis approximately
transients from an attenuator closer to the input of the equivalent to 0.5dB of RF power was put on each
cascade, when an input pulse is applied. This is comparitor circuit to avoid spurious transitions.
because, by definition, that detector will not be effecting
the operation of any attenuators, as they will all be
Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY WARANGAL. Downloaded on February 27, 2009 at 08:08 from IEEE Xplore. Restrictions apply.
FIG3
BLOCK DIAGRAM OF PROTOTYPE FEED FORWARD PSEUDO AGC CIRCUIT
I1 L
The unit was set up at 4GHZ with comparitor transitions &er the pulse has finished appears more significant due
set so as to give the output power versus input power to the transients coming from attenuators at the
characteristics shown in Fig.4. beginning of the cascade and being amplifed by the
following amplification. Because of the length of time
PERFORMANCE OF THE PROTOTYPE CIRCUIT that these transients carry on for after the pulse has
finished it appears that they are large enough to
A single stage was found to have approximately 1dB retrigger the attenuators further down the cascade,
gain ripple, and +/-2" phase shift between attenuation hence causing more transients.
states. The phase shift is thought to result mainly from
the.mismatach effects between the switching junctions The phase of S21 at an input power of -1dBm refered to
and amplifiers being suppressed more in the high the phase shift when the input power was -4ldBm was
attenuation state. measured. The worst case phase shift over 4OdB
dynamic range was approximately 8'. This results in a
approximately 0.2"ldB average AMlPM conversion. This
The output power of the unit at 4 GHz is shown in Fig
4 as the input power is increased in real time over a compares with figures of 2'/dB that have been seen for
conventional limiting amplifier cascades.
range of 36 dB. This demonstrates that over a 28 dB
range the output power stays within +/-MI3 of a fixed
output level. It also shows that the transitions appear The harmonic output of the unit was also measured for
clean, without false triggering.
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a 2 GHz fundemental at power levels between
-40dBm and OdBm. It was found that the second and third F1G.L OUTPUT W W E R OF THE PROTOTYPE UNIT AS THE
INPUT POWER IS SWEPT OVER A RRNGE OF 36 dB
harmonic levels were always greater than 5OdB below
the fundamental at the output. This illustrates that an
amplifier cascade using this type of A.G.C. would -3dBM
provide a very clean amplified signal for frequency
measurement, or other uses, over a wide input dynamic
range.
FURTHER WORK
improve the speed and reduce the size. 5dB ABOVE SIXTH
TRANSITION)
(NEGATIVE GOING
DETECTOR]
CONCLUSIONS
Cursor 0-x
-169 "J
A novel feed forward pseudo A.G.C. circuit has been 26.5 ns
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