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REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Low Cost
Instrumentation Amplifier
AD622
Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
FEATURES
Easy to Use
Low Cost Solution
Higher Performance than Two or Three Op Amp Design
Unity Gain with No External Resistor
Optional Gains with One External Resistor
(Gain Range 2 to 1000)
Wide Power Supply Range (2.6 V to 15 V)
Available in 8-Lead PDIP and SOIC
Low Power, 1.5 mA max Supply Current
GOOD DC PERFORMANCE
0.15% Gain Accuracy (G = 1)
250 V max Input Offset Voltage
2.0 V/C max Input Offset Drift
5 nA max Input Bias Current
66 dB min Common-Mode Rejection Ratio (G = 1)
NOISE
12 nV/Hz @ 1 kHz Input Voltage Noise
0.60 V
p-p
Noise (0.1 Hz to 10 Hz, G = 10)
EXCELLENT AC CHARACTERISTICS
800 kHz Bandwidth (G = 10)
10 s Settling Time to 0.1% @ G = 1100
1.2 V/s Slew Rate
APPLICATIONS
Transducer Interface
Low Cost Thermocouple Amplifier
Industrial Process Controls
Difference Amplifier
Low Cost Data Acquisition
PRODUCT DESCRIPTION
The AD622 is a low cost, moderately accurate instrumentation
amplifier that requires only one external resistor to set any gain
between 2 and 1,000. Or for a gain of 1, no external resistor
is required. The AD622 is a complete difference or subtracter
amplifier system while providing superior linearity and common-
mode rejection by incorporating precision laser trimmed resistors.
The AD622 replaces low cost, discrete, two or three op amp
instrumentation amplifier designs and offers good common-
mode rejection, superior linearity, temperature stability, reliabil-
ity, and board area consumption. The low cost of the AD622
eliminates the need to design discrete instrumentation amplifi-
ers to meet stringent cost targets. While providing a lower cost
solution, it also provides performance and space improvements.
1
2
3
4
8
7
6
5 AD622
R
G
REF
OUTPUT
+V
S
R
G
IN
+IN
V
S
AD622SPECIFICATIONS
AD622
Model Conditions Min Typ Max Units
GAIN G = 1 + (50.5 k/R
G
)
Gain Range 1 1000
Gain Error
1
V
OUT
= 10 V
G = 1 0.05 0.15 %
G = 10 0.2 0.50 %
G = 100 0.2 0.50 %
G = 1000 0.2 0.50 %
Nonlinearity, V
OUT
= 10 V
G = 11000 R
L
= 10 k 10 ppm
G = 1100 R
L
= 2 k 10 ppm
Gain vs. Temperature Gain <1000
1
50 ppm/C
VOLTAGE OFFSET (Total RTI Error = V
OSI
+ V
OSO
/G)
Input Offset, V
OSI
V
S
= 5 V to 15 V 60 250 V
Average TC V
S
= 5 V to 15 V 2.0 V/C
Output Offset, V
OSO
V
S
= 5 V to 15 V 600 1500 V
Average TC V
S
= 5 V to 15 V 15 V/C
Offset Referred to the
Input vs.
Supply (PSR) V
S
= 5 V to 15 V
G = 1 80 100 dB
G = 10 95 120 dB
G = 100 110 140 dB
G = 1000 110 140 dB
INPUT CURRENT
Input Bias Current 2.0 5.0 nA
Average TC 3.0 pA/C
Input Offset Current 0.7 2.5 nA
Average TC 2.0 pA/C
INPUT
Input Impedance
Differential 102 GpF
Common-Mode 102 GpF
Input Voltage Range
2
V
S
= 2.6 V to 5 V V
S
+ 1.9 +V
S
1.2 V
Over Temperature V
S
+ 2.1 +V
S
1.3 V
V
S
= 5 V to 18 V V
S
+ 1.9 +V
S
1.4 V
Over Temperature V
S
+ 2.1 +V
S
1.4 V
Common-Mode Rejection
Ratio DC to 60 Hz with
1 k Source Imbalance V
CM
= 0 V to 10 V
G = 1 66 78 dB
G = 10 86 98 dB
G = 100 103 118 dB
G = 1000 103 118 dB
OUTPUT
Output Swing R
L
= 10 k,
V
S
= 2.6 V to 5 V V
S
+ 1.1 +V
S
1.2 V
Over Temperature V
S
+ 1.4 +V
S
1.3 V
V
S
= 5 V to 18 V V
S
+ 1.2 +V
S
1.4 V
Over Temperature V
S
+ 1.6 +V
S
1.5 V
Short Current Circuit 18 mA
(typical @ +25C, V
S
= 15 V, and R
L
= 2 k unless otherwise noted)
REV. 0 2
AD622
Model Conditions Min Typ Max Units
DYNAMIC RESPONSE
Small Signal 3 dB Bandwidth
G = 1 1000 kHz
G = 10 800 kHz
G = 100 120 kHz
G = 1000 12 kHz
Slew Rate 1.2 V/s
Settling Time to 0.1% 10 V Step
G = 1100 10 s
NOISE
Voltage Noise, 1 kHz
Total RTI Noise = (e
2
ni
) +(e
no
/ G)
2
Input, Voltage Noise, e
ni
12 nV/Hz
Output, Voltage Noise, e
no
72 nV/Hz
RTI, 0.1 Hz to 10 Hz
G = 1 4.0 V p-p
G = 10 0.6 V p-p
G = 1001000 0.3 V p-p
Current Noise f = 1 kHz 100 fA/Hz
0.1 Hz to 10 Hz 10 pA p-p
REFERENCE INPUT
R
IN
20 k
I
IN
V
IN+
, V
REF
= 0 +50 +60 A
Voltage Range V
S
+ 1.6 +V
S
1.6 V
Gain to Output 1 0.0015
POWER SUPPLY
Operating Range
3
2.6 18 V
Quiescent Current V
S
= 2.6 V to 18 V 0.9 1.3 mA
Over Temperature 1.1 1.5 mA
TEMPERATURE RANGE
For Specified Performance 40 to +85 C
NOTES
1
Does not include effects of external resistor R
G
.
2
One input grounded. G = 1.
3
This is defined as the same supply range that is used to specify PSR.
Specifications subject to change without notice.
REV. 0 3
AD622
AD622
REV. 0 4
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Internal Power Dissipation
2
. . . . . . . . . . . . . . . . . . . . 650 mW
Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 25 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (N, R) . . . . . . . 65C to +125C
Operating Temperature Range
AD622A . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C to +85C
Lead Temperature Range
(Soldering 10 seconds) . . . . . . . . . . . . . . . . . . . . . . . +300C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
8-Pin Plastic Package:
JA
= 95C/Watt
8-Pin SOIC Package:
JA
= 155C/Watt
ORDERING GUIDE
Model* Temperature Range Package Option
AD622AN 40C to +85C N-8
AD622AR 40C to +85C SO-8
*N = Plastic DIP, R = SOIC.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD622 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
Typical Characteristics (@ +25C, V
S
= 15 V, R
L
= 2 k, unless otherwise noted)
OUTPUT OFFSET VOLTAGE mV
50
20
0
0.40 0 0.40 0.80 1.00 1.00 0.80
P
E
R
C
E
N
T
A
G
E
O
F
U
N
I
T
S
30
10
40
SAMPLE SIZE = 191
Figure 1. Typical Distribution of Output Offset Voltage
COMMON-MODE REJECTION RATIO dB
50
20
0
60 80 100 120 140
P
E
R
C
E
N
T
A
G
E
O
F
U
N
I
T
S
30
10
40
SAMPLE SIZE = 383
Figure 2. Typical Distribution of Common-Mode Rejection
AD622
REV. 0 5
Typical Characteristics (@ +25C, V
S
= 15 V, R
L
= 2 k, unless otherwise noted)
WARM-UP TIME Minutes
2
1.5
0
0 5 1 2 3 4
1
0.5
C
H
A
N
G
E
I
N
O
F
F
S
E
T
V
O
L
T
A
G
E
V
Figure 3. Change in Input Offset Voltage vs. Warm-Up
Time
FREQUENCY Hz
1000
10
1
1 100k 10
V
O
L
T
A
G
E
N
O
I
S
E
n
V
/
H
z
100 1k 10k
100
GAIN = 1
GAIN = 10
GAIN = 100, 1,000
GAIN = 1000
BW LIMIT
Figure 4. Voltage Noise Spectral Density vs. Frequency,
(G = 11000)
FREQUENCY Hz
1000
100
10
0 1000 10
C
U
R
R
E
N
T
N
O
I
S
E
f
A
/
H
z
100
Figure 5. Current Noise Spectral Density vs. Frequency
FREQUENCY Hz
0.1 1M 1 10 100 1k 10k 100k
160
0
140
80
60
40
20
120
100
C
M
R
d
B
G = 1000
G = 100
G = 10
G = 1
Figure 6. CMR vs. Frequency, RTI, Zero to 1 k Source
Imbalance
FREQUENCY Hz
P
S
R
d
B
0.1 1M 1 10 100 1k 10k 100k
180
0
160
100
80
60
40
140
120
G = 1000
G = 100
G = 10
G = 1
Figure 7a. Positive PSR vs. Frequency, RTI (G = 11000)
FREQUENCY Hz
P
S
R
d
B
0.1 1M 1 10 100 1k 10k 100k
180
0
160
100
80
60
40
140
120
G = 1000
G = 100
G = 10
G = 1
Figure 7b. Negative PSR vs. Frequency, RTI (G = 11000)
FREQUENCY Hz
G
A
I
N
V
/
V
1000
10
0
100 10M 1k 10k 100k 1M
100
1
Figure 8. Gain vs. Frequency
LOAD RESISTANCE
30
20
0
10 10k 100 1k
10
O
U
T
P
U
T
V
O
L
T
A
G
E
S
W
I
N
G
V
o
l
t
s
p
-
p
V
S
= 15V
G = 10
Figure 9. Output Voltage Swing vs. Load Resistance
OUTPUT STEP SIZE Volts
20
S
E
T
T
L
I
N
G
T
I
M
E
s
15
0
0 20 5 10 15
10
5
TO 0.1%
Figure 10. Settling Time vs. Step Size (G = 1)
GAIN
1000
100
1
1 1000 10 100
10
S
E
T
T
L
I
N
G
T
I
M
E
s
Figure 11. Settling Time to 0.1% vs. Gain, for a 10 V Step
10
0%
100
90
2V 10V
1
0
3
/
9
6
P
R
I
N
T
E
D
I
N
U
.
S
.
A
.
12