VTU Exam Paper Solution

January 2010
PART-A
1. a. i) The cut - in voltage of a Si - P - n diode is about...... 4 Marks
a) 0.6V b) 0.6V
c) 1.!V d) l.!V
ii) The ri""le factor for a full- #ave rectifier is.
a) 0.4$! b) 0.%
c) 1.!1 d) -1.!1
iii) The &ener resistance of a &ener diode' #hich e(hibits %0V change in V) for a !.%*
change in +)' is
iv) The average out"ut voltage of a half #ave rectifier #ith an in"ut of ,00 sin ,14t is
a) 100V b) -%.4-V
c) -0.4- V d) -0.0 V
Ans:- i) .a) ii) .a) iii) !0/ iv) .b)
l.b Draw and explain the Y.I harateristi !" #i and $e di!des. % &ar's
*ns. Silicon diode 0or#ard 1 2everse characteristic
0or silicon diode. The for#ard current 3+03 reains ver4 lo#.56*) until the diode for#ard
bias voltage Vf e(ceeds a""ro(iatel4 0.7V.
*bove 0.7V' 3+03 increases alost linearl4 #ith increase in V0 .The diode reverse current
3+23 is ver4 uch saller than its for#ard current +0 0or Silicon diode' 8+28 is norall4
less then 100n*'and it is alost co"letel4 inde"endent of the reverse - bias voltage.
3+23 is due to inorit4 change carriers and is called reverse saturation current.
9hen reverse bias voltage 3V23 is sufficientl4 increased' The diode goes into reverse
breakdo#n #hich a4 destro4.
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VTU Exam Paper Solution
2everse breakdo#n occurs at 7%V.
0or :eraniu diode' The for#ard current ;+f3 reains ver4 lo#.56*) until the diode
for#ard bias voltage 3Vf3 e(ceeds a""ro(iatel4 0.,V.
'*bove 0.,V' 3+f3 increases alost linearl4 #ith increase in 3Vf<. The diode reverse current
3+23 is ver4 uch saller than its for#ard current 3+f3 for3 :eraniu diode'+2 is norall4
less than 16*' and it is alost co"letel4 less inde"endent of the reverse - bias voltage.
+2 is due to inorit4 change carriers and is called reverse saturation current.
9hen reverse bias voltage V2 is sufficientl4 increased' the diode goes into reverse
breakdo#n #hich a4 destro4
2everse breakdo#n occurs at %0V.
1..Draw the iruit !" a hal" wa(e reti"ier and explain its w!r'in) with neessary
wa(e"!r*s. % &ar's
0ig.a) =alf #ave rectifier .b) 9ave fors of transforer secondar4 voltage 'load >urrent 'load
voltage. 3
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VTU Exam Paper Solution
=alf #ave rectifier consisted of a single diode in series #ith load resistance. The ac voltage
across the secondar4 #inding * 1 ? changes "olarities after half c4c1e.
+perati!n :-
@uring "ositive half c4cle of the ac in"ut voltage end * becoes "ositive #rt end ?'the diode @
is for#ard biased and acts as a short circuit' thus the current flo#s in the circuit. The load voltage
is given b4
@uring negative half c4cle of the ac in"ut voltage end * becoes negative #rt end ?' The
@iode @ is reverse biased and acts as a o"en circuit thus no current flo#s in the circuit as
sho#n in 0ig
+he dc out"ut #ave for is e("ected to be a straight line but the half #ave rectifier gives
out"ut in the for of "ositive sinusoidal "ulse. =ence the out"ut is called "ulsating dc
The load current is given b4
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VTU Exam Paper Solution
l.d. A di!de with ," - 0..( is !nneted as a hal" wa(e reti"ier. The l!ad resistane is %00/
and The 0r*s1 a input is 22,. Deter*ine the pea' !utput (!lta)e3 the pea' l!ad urrent
and the di!de pea' re(erse (!lta)e. 2 &ar's
:ivenA- V0B 0.7v' 2CB 600/' VsB !4 V
!a. i) The do"ing of the eitter region of a transistor is---------- the base region
a) :reater than b) DEual to
c) Cess than d) Much less than
ii) +f F B 0.-%' Then the value of G of the transistor is ---------------.
a) 1-0 b)1-
c) 0.0% d) !%
iii) The in"ut resistance is highest for ------------ .
a) >? a"lifier b) >> a"lifier
c) >D a"lifier d) Hone of These
iv) 0or cascading one should use --------------
a) >D configuration b) >? configuration
c) >> configuration d) Hone of these
2.b. Draw a bl!' dia)ra* !" an un - biased n . p - n transist!r. Identi"y eah part !" the
de(ie and sh!w the depleti!n re)i!ns and barrier (!lta)es. 4rie"ly explain. 05 &ar's1
9hen the three terinals of3 the transistor are ke"t o"en it is called unbiased transistor. *n
unbiasedI transistor eans a transistor #ith no e(ternal voltage a""lied. Thus no current flo#s in
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VTU Exam Paper Solution
an4 of transistor leads.
@uring @iffusion Process region "enetrates ore dee"l4 into the lightl4 do"ed base. The
de"letion region at eitter Junction "enetrates less in the heavil4 do"ed eitter.
Siilarl4 the de"letion region at collector Junction "enetrates less in the heavil4 do"ed collector
and e(tends ore in base region.
This de"letion la4er #idth at the collector Junction is ore than the de"letion la4er #idth
at the eitter Junction.
The collector current +c in ters of +D and Fdc given b4
+cB Fdc +D
The collector current +c in ters of +? 1 Fdc is given b4
Fdc is defined as the ratio of the collector current 3+c3 to eitter current 3+D 3
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VTU Exam Paper Solution
T4"ical value of Fdc ' is bet#een 0.-6 to 0.--%
Gdc is defined as the ratio of the collector current 3+c3 to the base current 3+?
T4"ical value of Gdc is bet#een !% to ,00
2.d. 6!r the 7iruit dia)ra* sh!wn in "i) 20b1 a #i transist!r with 8- 50 is used. Draw the
d. l!ad line and deter*ine the !peratin) p!int. 0% &ar's1
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VTU Exam Paper Solution
9a. i1 6!r an e*itter "!ll!wer3 the (!lta)e )ain is 2 &ar's
a) Knit4 b) :reater than Knit4
c) Cess than Knit4 d) &ero
ii) The self bias arrangeent gives a better L"oint stabilit4 #hen--------------
a) 2e is sall b) G is sall but 2e is large
c) ?oth G and 2e are large d) Hone of these
iii) The load line oves "arallel to itself on the >D out"ut characteristics of a transistor
#hen-----------
a)32C changes b) Vcc changes
c) ?oth 2C and Vcc changes d) Hone of these changes
iv) To #ork as a linear a"lifier a transistor ust o"erate in .
a) *ctive region b) Saturation region
c) Honlinear region d) >ut - off region
Ans. i) .a) ii) .b) iii) .b) iv) .a)
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VTU Exam Paper Solution
9b. 7!*pare base bias3 !llet!r t! base bias3 and (!lta)e di(ider bias with re)ard t!
stability !" the transist!r !llet!r (!lta)e with spread in h6: (alue. 10 &ar's
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VTU Exam Paper Solution
2a. i1 The 6:T is a !ntr!lled de(ie
a) >urrent b) Voltage
c) Po#er d) Hone of
ii) 9hich of the follo#ing devices is e("ected to have the highest in"ut i"edanceM
a) MNS0DT b) ?OT
c)O0DT
iii) The S>2 is used as a
a) Nrdinar4 rectifier b) >ontrolled rectifier
c) *"lifier d) Hone of there
iv) *n initial saturated dra current can be attained in an n-channel O0DT #hen V:S is eEual to--
a) Pinch off voltage b). &ero volts
c)-4V
Ans: i) ? ii) > iii) ? iv)*
2b. Draw a iruit dia)ra* t! !btain the drain harateristis !" an n - hannel J6:T. Thus
draw drain harateristis ; explain the*. < &ar's
* fail4 of drain characteristics for an n-channel 0DT can be obtained b4 a""l4ing several
values of negative gateI source Voltage V:S3 0ig sho#s such a fail4 of drain characteristics.
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VTU Exam Paper Solution
9ith V:S B 0' +@B0 and the channel bet#een the gate Junctions is entirel4 o"en as there is
no de"letion region "enetration. 0or sall a""lied voltage V@S .5 1V) a sall drain current flo#s
causing soe Vge dro" along the channel. *s a result there is a sall de"letion "enetration of
the channel' #hich has no a""reciable effect on the #idth of the channel 1 its resistance.
9hen V:S B -1V The gate - channel Junctions becoe reverse biased on even #hen +@B 0'
=ence there is alread4 a de"letion "enetration into the channel. @ue to this' #ith V:S B - 1V the
channel "inch - off occurs at a lo#er +@ value than #hen V:S B 0 This the result of a""l4ing
negative gate bias is to reach the saturation level at a lo#er level of V@S 'as V:S is ade ore 1
ore negative saturation level of +@ reduces further and the "inch - off voltage continues to dro"
in a "arabolic anner as indicated b4 the dashed line on the characteristics in 0ig
+t is seen that a gate - source bias Vg ' eEual to the "inch - off voltage .V:S B - V")
reduces +@ to &ero .i.e. s#itches the device off).This value of gate bias voltage' is kno#n as the
gate cutoff voltage V:S .off).
The region to the left of "inch P off lo#s is referred to as the voltage controlled resistance
. or ohic region' #here the Q0DT can be used as a voltage controlled resistor. The region to the
right of the "inch - off is norall4 e"lo4ed in a"lifiers' the value of V@S at #hich break do#n
occurs is reduced as the negative gate - source voltage is increased.
2. #'eth typial #7R "!rward and re(erse harateristis identi"y all re)i!ns !"
harateristis ; all i*p!rtant urrent ; ()e le(els. < &ar's
PART- 4
%a. i) *n audio a"lifier #orks over the freEuenc4 range -----
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VTU Exam Paper Solution
a) !0=& to !0R=& b) !0=& to +M=&
c) 1R=& to 4R=&
ii) *n oscillator reEuires ----------feedback for its o"erations.
a) Hegative b) Positive
c) =igh d) Co#
iii) The freEuenc4 of a =artle4 oscillator for C1 B C!B %0= and > B !00"03 is --------
a) %0,k=& b) 100R=& .
c) 1%0R=&
iv) The conditions *G B 1 for oscillations is kno#n as ----------criterion
a) H4Euist3s b) ?arkhausen
c) 2outh - hou#it) d) Hone of these
Ans:- i ) a ii) b iii) a iv) b
5b. =ith a neat iruit dia)ra*3 explain the w!r'in) !" sin)le sta)e R7 !upled a*pli"ier
and thus draw "re>ueny resp!nse ur(e ; explain 10 &ar's
+perati!n A.-The signal is fed at the in"ut terinals .i.e' bet#een base and eitter)
an out"ut is taken fro collector and eitter end of su""l4
V>D BVcc - ic2c
9hen the Signal voltage increases in the "ositive half- c4cle' the base current also
increases .The result is that the collector current 1 hence voltage dro" ic2c increases. *s Vcc is
constant' therefore'oS" voltages V>D decreses. +n other #ords' as the signal voltage is increasing
in the negative sense i.e. oS" is 1$0
o
out of "hase #ith the iS". +t follo#s' therefore that in a
coon eitter a"lifier' the Tve half-c4cle of the signal a""ears as a"lified negative half-
c4cle in the oS" 1 vice-versa. +t a4 be noted that a"lification is not affected b4 this "hase
reversal.
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VTU Exam Paper Solution
The freEuenc4 res"onse can be divided into three regions .
.a) Co# freEuenc4 region .b) Mid freEuenc4 region .c) =igh freEuenc4 region .
0a1 ?!w "re>ueny re)i!nA The lo# freEuenc4 res"onse of an a"lifier is governed b4 the
cou"ling ca"acitors >1 1 >! 1 b4"ass ca"acitor >D . *t lo# freEuenc4 the reactance of these
ca"acitors are large enough to dro" soe of the ac Signal voltage. *s a result the voltage
gain decreases at lo# freEuencies.
0b1 &id "re>ueny re)i!nA +n the id freEuenc4 region' the voltage gain is a(iu and has
alost constant value of *o. *o is called the id band voltage gain.
01 @i)h 6re>ueny re)i!n: *t high freEuenc4 the voltage gain decreases due to the influence
of Junction ca"acitances of the transistor. 0ig sho#s the Junction ca"actiances >bc'>be'>ce

These ca"acitances "rovide b4"ass "aths for the ac Signal. *s the freEuenc4 increases the
ca"acitive reactance becoe lo# enough to "revent noral transistor action. The result is a loss
of voltage gain.
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VTU Exam Paper Solution
7ut - !"" "re>uenies :- The freEuencies at #hich the voltage gain reduces to 1SU! or 0.707 of its
id band value *o are called the cut P off freEuencies f1 is the lo# cut P off freEuenc4 and f! is
the u""er cut - off freEuenc4.
4and width :- ?and #idth of an a"lifier is the band of freEuenc4 easured fro f1 to f!.
?and#idth B f! - f1
5b. ?ist and explain the ad(anta)es !" ne)ati(e "eedba' in a*pli"ier. % &ar's
The follo#ing are the advantages of negative feedback
1. Hegative 0? stabili)es the voltage gain of an a"lifier.
!. Hegative 0? odifies the iS" 1 olp i"edance of the a"lifier. 0or instance the series
voltage negative increases olp i"edance b4 a factor .1TG*v) 1 reduces the 01" i"edance b4
the sae factor #hich is desirable.
,. Hegative 0? increases the band#idth of an a"lifier b4 a factor .1TG*v). This akes
the a"lifier to a"lif4 a #ide range of freEuencies #ith eEual gain'
4. Hegative 0? reduces =aronic distort ion b4 a factor .1TG*v).*s a result the olp
signal is an e(act re"lica of the ilp signal.
%. Hegative 0? reduces the attenuation distortion b4 a factor .1TG*v)
6. Hegative 0? reduces the noise generated #ith in the feedback loo" of a"lifier b4 a
factor .1TG*v)
6a i) The >M22 of an NP -*MP is ------------ 4 Marks
a) :reater than 1 b) Cess than 1
c) DEual to 1.
. ii) The NP -*MP 741 has an o"en loo" voltage gain of --------
a) !( 10
%
b) ! ( 10
-%
c) , V 10
10
iii) The inverting a"lifier circuit has an in"ut resistance 21 B 1R/.' feedback resistance
2f B ,R/' the out"ut voltage is .
a) 6V b) 1!V
c) l$V d) ,V
iv) CissaJoes figures are used to easure ----------difference bet#een t#o sinusoidal Signals.
a) Phase b) *"lifier
c) 0reEuenc4
Ans i) .a) ii) .a) iii) .d) iv) .a)
%b. =hat are the ideal harateristis !" +PA&PA 2 &ar's3
+nfinite Voltage :ain .*NC B W)The N"en.loo" voltage gain is infinit4 .*vBW)
The in"ut i"edance is infinit4 .2in B W)
Nut"ut i"edance is &ero .2o B 0)
The band#idth is infinit4 .?9 B W)
The out"ut voltage is )ero #hen both in"ut are eEual. That is )ero offset voltage
+nfinite >M22
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VTU Exam Paper Solution
The sle# rate is infinit4
Po#er Su""l4 reJection ratio is )ero .PS22)
>haracteristics of an ideal o" - *" do not drift #ith te"erature.
%.. =ith a neat dia)ra* explain the w!r'in) !" an +P - A&P as su**in) a*pli"ier
9hen ore than one +SP Signal is a""lied to the +HV or HNH -+HV a"lifier' the olp contains
addition of the a""lied +SP signals =ence it is called Suer or adder a"lifier circuit
i) +HV Suer a"lifier >ircuit
+n"ut Signals #hich are to be added are a""lied to the +HV +SP of o" - a".
*s ode ? is grounded' due to virtual ground conce"t the node * is also at ground "otential
i.e V* BV? B 0 .
0ro +n"ut side'
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VTU Exam Paper Solution
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VTU Exam Paper Solution
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VTU Exam Paper Solution
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VTU Exam Paper Solution
%.d.#h!w h!w !p - a*p an be used as an in(ertin) a*pli"ier. Deri(e an expressi!n "!r the
(!lta)e )ain. % &ar's
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VTU Exam Paper Solution
7a. i) The *M signal that occu"ies the greatest band#idths is the one odulated b4
a) 1R=& sine #ave b) 10 R=& sine #ave
c) 1R=& sEuare #ave d) % R=& sEuare #ave
ii) The circuit that recovers the original odulating inforation for an *M signal is
kno#n as--------------- .
a) Modulator b) Mi(er
c) @eodulator d) Nscillator
iii) Nn an 0M signal' a(iu deviation occurs at -----------------.
. a) &ero crossing3"oint b) Peak Positive
c) Peak negative a"litude d) ?oth .*) and .?)
iv) The binar4 eEuivalent of the decial nuber % is
a) 100 b) 101
c) 110 d) 1001
Ans:- i) .b) ii) .c) iii).a) +V) .b)
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VTU Exam Paper Solution
.b. :xplain with neat wa(e "!r*s the priniple !" a*plitude *!dulati!n. =rite the the
expressi!n "!r A& wa(e. % &ar's
*"litude odulation is defined as the odulation in #hich the a"litude of the carrier #ave
is varied in accordance #ith the instantaneous a"litude of the odulating Signal kee"ing its
carrier freEuenc4 and "hase constant.
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VTU Exam Paper Solution
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VTU Exam Paper Solution
.. A 500=3100B@C arrier is *!dulated t! a depth !" %0D by *!dulatin) si)nal
"re>ueny 1B@C. 7alulate the t!tal p!wer trans*itted. =hat are the #ide band
!*p!nents !" the A& wa(eA
:ivenA Po#er of carrier Pc B %009
>arrier freEuenc4 fc B 100 R=&
0reEuenc4 of odulating signal B 1R=&
Modulation inde( S @e"th of odulation B 6 B 60X
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VTU Exam Paper Solution
$a. i) The ?oolean e("ression Y B*.? re"resents.
a) N2 gate b) VHN2 gate
c) *H@ gate d) HNT gate
ii) To add t#o - bit eber' The eber of reEuired half adders is--------------
a)!-1 b) !
c) !

-1 d) , T 1
iii) The decial nuber ,7 is re"resented in ?>@ b4
a) 1001l1 b) 00111011
c) 00110111 d) 111100
iv) * HNT circuit can be built using--------------
a) MNS0DT b) @iode
c) &ener diode d) ?OT
Ans:- i) Za) ii) .b) iii) .c) iv) .d)
<b. =rite the truth table !" an +R "unti!n and realiEe an +R )ate usin) di!des The +R
)ate per"!r*s l!)ial additi!n. 5 &ar's
* ?
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VTU Exam Paper Solution
>ase 1A 9hen * B 0V and ? B 0V
1he diodes @ and @ are reverse biased and the voltage at out"ut terinal is eEual to NV
>ase !A 9hen *B0V and ?B%V
The diode @! is for#ard biased 1 @1 is reverse biased. =ence the olp voltage is eEual to T %V as
sho#n in fig
>ase ,A 9hen *B%V and ?B0V
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VTU Exam Paper Solution
The diode @1' is for#ard biased and @! is reverse biased. =ence out"ut voltage is eEual to T%V
>ase 4A 9hen * B T%V and ? B TSV
?oth the diodes are for#ard biased and both the in"ut voltages are connected in "arallel
and hence olp voltage is eEual to T%V
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VTU Exam Paper Solution
<d. RealiEe a hal" adder usin) AFD3 +R and in(erter l!)i )ates. =rite the truth table. % &
The half [ adder is a logic circuit #hich aritheticall4 adds t#o bits. The truth - table of a half -
adder #ith in"uts * and out"uts Su' S and >arr4' > is sho#n in Table.
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VTU Exam Paper Solution
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