Praveen Meduri, PhD

200 Affinity Lane, Apt E, Buffalo, NY 14215

Email: koushikmp@gmail.com, praveenm@buffalo.edu
Mobile: 618-303-2946
Summary
Faculty, Department of Electrical Engineering, University at Buffalo (SUNY) from August 2013
ARM-University Program Donation Recipient, priced at $53,300. August 2013 to August 2014
Doctoral thesis in design automation of Transistor Level CMOS OpAmps
Demonstrated research experience with Analog Circuit Design

Good background and understanding of Digital and Analog design basics like Band-gap references,
Oscillators, Amplifiers, etc.

Good background and understanding of Analog/Mixed Signal Circuits
Hands on experience in Full Custom Design of Digital VLSI Circuits
Background in Programmable ASIC Design, Xilinx Tools
Over 4 years of experience in designing Transistor Level CMOS OpAmps
Over 4 years of research experience in design automation of OpAmps
Proficiency in using Tools like Spectre, Cadence dF II, HSpice for Schematics and Layouts
Background in Semiconductor Fabrication and tools like TCAD MEDICI for process simulation
Proficient in Full Custom Design of Integrated Circuits: Frontend Design, simulation, backend (Layout),
post Layout simulation and verification
Experience in Modeling the device and circuit level Analog Circuits
Demonstrated research experience in implementation of SKILL subroutines in Cadence Virtuoso
Designed and integrated several CAD tools into Cadence Design Environment
Experience with installation and customization of PDKs (Process Design Kits for Automation)
Embedded Systems Experience with ARM Cortex-M3 (MCB1700 Board, TIva LaunchPad )
Digital Programmable Logic Experience with VHDL
Experienced with Atlys Spartan 6 FPGA development board
Academic Qualifications
Doctor of Philosophy 20062011 GPA 3.65
Electrical Engineering
Old Dominion University, Norfolk, VA
Master of Science 2004 2006 GPA 3.7
Electrical Engineering
Southern Illinois University, Carbondale, IL
Bachelor of Technology 20002004 GPA 3.5
Electronics & Communications
Jawaharlal Nehru Technological University, India
Work Experience
Faculty Present
Electrical Engineering Department, University at Buffalo (SUNY)

ARM-University Program Donation Recipient. Received 25 software licenses for ARM MDK
Standard Edition software, priced at $53,300 from August 2013 to August 2014
Teach Undergraduate and Graduate Courses
Design Coursework in line with ABET guidelines
Student Advisement
Courses taught:
HDL Based Digital Design using Programmable Logic
Embedded Systems and Applications
Art of Analog OpAmp Design
Faculty August 2011 August 2012
Electronics Engineering Technology Department, ECPI University, Virginia Beach, Virginia
Taught several Undergraduate level courses
Supervised different lab courses
Interacted with several students to provide academic advising
Courses and Labs taught:
Digital Systems, Electric Circuits, Digital Communications, Electronic Circuits and Electronic
Instrumentation
Technical Liaison to Cadence Systems August 2006 May 2011
Department of Electrical and Computer Engineering, Old Dominion University, Norfolk, Virginia

Introduced Cadence Design Tools as a teaching and research aid in Old Dominion University
Installed and Maintained Cadence tools on Linux and Solaris platform based Servers
Troubleshot and resolved several installation, maintenance and compatibility issues for various
Cadence Tools
Provided technical support in Cadence issues to faculty and students for teaching and research
projects
Instructor, Graduate Teaching Assistant August 2006 May 2011
Department of Electrical and Computer Engineering, Old Dominion University, Norfolk, Virginia
Courses and Labs taught:
Analog VLSI Design Digital VLSI Design Electronic Circuits
NewPAGE (New Portals To Appreciating our Global Environment)
Fundamentals of Computer Engineering
Graduate Research Assistant December 2006 May 2011
Department of Electrical and Computer Engineering, Old Dominion University, Norfolk, Virginia

1. Operational Amplifier Design (December 2006 May 2007)
Designed and laid out a two stage operational amplifier in IBM7wl using 0.4 micron technology
Simulated in Spectre to evaluate the performance in terms of gain, noise, bandwidth, and phase margin
Improved the gain using bulk driven PMOS transistors at the input stage
2. Digital to Analog Converter (August 2007 December 2007)
Designed an 8-bit charge scaling Digital to Analog converter using the IBM7wl technology in
cadence
Observed its functionality in the presence of non-ideal effects
Graduate Research Assistant August 2005 August 2006
Department of Electrical and Computer Engineering, Southern Illinois University, Carbondale, Illinois
1. Bi quad Low Pass Filter (August 2005 December 2005)
Designed and implemented a bi quad low pass filter on XILINX-ISE6
Verified the functionality with input test patterns
2. Digital VLSI Design (December 2005 May 2006)
Designed the Schematics and Layouts and for several circuits like 2 bit shift register, 4-bit ALU
Design Rule Check and LVS have been performed on all the layouts
Extracted layouts were simulated using HSpice to study the effect of parasitic capacitances

Research Experience
Doctoral Thesis Technology Independent Synthesis of CMOS Operational Amplifiers
Proposed a novel design methodology for design automation of Two-Stage CMOS OpAmps
Automatically modeled the DC, AC and time-domain constraints from circuit heuristics and
simulations
Synthesized a fully cascoded two stage OpAmp (Super Circuit) with BSIM accuracy (Telescopic first
stage and cascode second stage)
Implemented Nested Miller compensation to eliminate the complex poles in frequency range of
interest
Automatically designed several Two-Stage OpAmp topologies in various technologies
Validated the proposed methodology through detailed Spectre simulations
Two Stage OpAmp Synthesis using Optimization
The OpAmp sizing problem has been modeled as an optimization problem for TSMC 0.25 technology
Modeled various performance constraints like ICMR, Output Swing, Gain-bandwidth Product and
Phase Margin as posynomial equations
Obtained global optimal solution for the specifications through Convex Optimization
Proposed new empirical device models to accurately model the gm and gds of deep sub-micron
transistors
Designed several Two-Stage OpAmps using gm/Id based design scheme
Design of Oscillator for MEMS Gyroscope
Designed a 17.5 K Hz Trans Impedance Oscillator to sustain the drive side vibrations of a MEMS
Gyroscope
Implemented Automatic Gain Control to prevent saturation of the oscillator
Publications
Praveen K. Meduri and Shirshak K. Dhali, A Novel Methodology for Design Automation of CMOS
OpAmps, proceedings of IEEE Int. Symp on Electronic System Design (ISED10), December 2010.

Praveen K. Meduri and Shirshak K. Dhali, A Methodology For Automatic Transistor-Level Sizing
Of CMOS OpAmps, proceedings of IEEE 24th Int. Conference on VLSI Design, January 2011.

Praveen K. Meduri and Shirshak K. Dhali, A Framework for Automatic Sizing of CMOS
Operational Amplifiers, proceedings of International Conf. on Mod., Sim. and Vis. Methods
(MSV10), July 2010.

Praveen K. Meduri and Shirshak K. Dhali, A Framework for Automatic CMOS OpAmp Sizing,
proceedings of IEEE 53rd International Midwest Symposium on Circuits and Systems
(MWSCAS10), August 2010.

Praveen K. Meduri and Shirshak K. Dhali, A SKILL Based Automation Tool for CMOS OpAmp
Sizing, Cadence Design Network, CDNLive, September 2008. Poster

Praveen K. Meduri and Shirshak K. Dhali, An Automated Methodology for Modeling of Posynomial
Equations for Use in CMOS OpAmp Synthesis, Elsevier, Integration, The VLSI Journal. In
Preparation

Praveen K. Meduri and Shirshak K. Dhali, Geometric Programming Based Design Automation Tool
for CMOS OpAmps, ACM Transactions on Design Automation of Electronic Circuits. In
Preparation

Professional Activities/Awards
ARM-University Program Donation Recipient. Received 25 software licenses for ARM MDK
Standard Edition software, priced at $53,300 from August 2013 to August 2014
Recipient of fellowship award from International Conference on VLSI Design, January 2011, (IEEE)
Recipient of student travel Grant from IEEE ($600) (ISED10), December 2010
Student Member, Institute of Electrical and Electronics Engineers (IEEE) from 2009
Member of International Student Advisory Board (ISAB), Old Dominion University, Norfolk, VA
Panel Reviewer for Research Expo 2007, 2008 Old Dominion University, Norfolk, Virginia
Member of Off-Campus Student Advisory Committee of Old Dominion University, Norfolk, VA,
from 2008 to 2009

Skill Set
CAD Tools: Cadence Spectre, Multisim
Languages: SKILL, C, HTML
HDLs: VHDL, VerilogA, Verilog
FPGA Tools: Xilinx Foundation Tools, Actel


References

Available upon request