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Spring 2012
Midterm Exam
Score:
/70
Name: _____________________
1.
Answer
2.
Assume a buck DC/DC converter with no feedback control. What is the steady-state mean output
voltage if the converter is in CCM?
(a)
Answer
3.
, so that
(b)
(c)
(d)
so (a)
The input voltage to a lossless DC/DC regulator doubles, but the load stays the same. The input
current will
(a) Double
(b) Half
Answer (b)
4.
(b) Decrease by factor 4 (c) Stay the same (d) Need additional information
Answer: (c)
5.
Answer: (c)
6.
When researching part numbers for three-terminal regulators, an engineer encounters the term LDO.
What does LDO stand for?
Answer: Low Drop Out
7.
Spring 2012
The duty cycle for the switch in the DC/DC converter below is . The output voltage, assuming
lossless operation, is
(a)
(b)
(c)
)(
Answer: This is a buck DC/DC converter so that (a) is the correct answer.
8.
Briefly explain why semiconductor companies often specify the ripple rejection ratio of their threeterminal regulators at frequencies in the range 100120 Hz. Why is it important to know the ripple
rejection at these particular frequencies?
Answer: When full-wave bridge rectifiers rectify 50 Hz (i.e., Europe) or 60 Hz (i.e., U.S.) ac, the
resulting ripple frequency is 100120 Hz, so the regulator must remove these ripple voltages.
9.
The smoothing capacitor in a linear regulator is replaced with a capacitor that has twice the value.
The load current stays the same. The peak current through the rectifier diodes will then
(a) Increase
(c) Decrease
Answer: (a)
10.
Consider the steady-state (i.e., no inrush current) peak diode current in a linear power supply. For a
load current , the peak diode current can be as large as (pick the largest reasonable value):
(a)
(b) 20
(c) 100
(6) 1,000
Answer (b)
11.
A buck DC/DC converter with no feedback is in CCM. The load is then removed. The new steadystate mean output voltage will then (assuming lossless operation and duty cycle D) be
(a)
(b)
(c)
(d)
Answer (b)
12.
Spring 2012
Question 2 Explain how one can use a +5 V three-terminal regulator to regulate for
. For
example, how can one use a +5 V regulator as a +12 V regulator? Provide a diagram, and an equation
for the output voltage. You dont have to specify component (i.e., resistor) values. (6 points)
Solution
Add two external resistors as shown. Then
(
(
Note:
)
)
Question 3
(a) Explain is 45 sentences what a gated oscillator dc/dc converter is. (3 points)
(b) Name one advantage of such converters. (1 point)
(c) Name one disadvantage of such converters. (1 point)
Solution
(a) In a gated oscillator dc/dc converter, the oscillator controls the energy-conversion switch. The
output voltage is measured and compared against a reference. If the output voltage exceeds the
reference, the oscillator is turned off. If the output voltage falls below the reference, the oscillator
is turned on again. The oscillator has fixed frequency and duty cycle.
(b) One advantage is that, even though there is non-linear feedback, this type of converter tends to be
stable. Another advantage is that these converters have very low idle power consumption, which
is important for battery-operated equipment.
(c) Disadvantage: there is always residual ripple present at the output.
Note: A number of students described the basic dc/dc conversion. A gated oscillator regulator is a
special case where the oscillator runs at a fixed frequency and duty cycle (no PWM). The gating
refers to when the oscillator is turned off completely. To make the scheme work, there has to be
some hysteresis (key feature).
Spring 2012
Solution
Note: Most people did well on this question. Common mistakes were omitting the figure, not
showing where
,
fits in, and not labeling axes on graphs (what up with this ). The
derivation should be such that if you showed it to someone that does not know how the converter
works, they could follow your reasoning.
Question 5 Consider the gated-oscillator DC/DC regulator below. The hysteresis for
,
, the duty cycle of the 20 kHz oscillator is 70%.
Spring 2012
is 5 mV,
(a) What is the (mean) output voltage for an input voltage of 3 V? (5 points)
(b) What is the output ripple voltage? (5 points)
Solution
Part (a) The feedback loop stabilizes when the mean voltage at the
reference voltage. This is when
, and
and
Spring 2012
Solution
Part (a) This is a high-pass filter. The FETs, the clocks, and
resistor along with
form a high-pass filter.
Part (b)
) wrong
. This
Spring 2012
Question 7 Explain by using a circuit diagram and a few sentences how one could use two electronic
SPDT switches and two capacitors to invert a dc voltage. The switches break before they make, and
switch at 20 kHz. (6 points)
Solution
When the switches are in the and positions, charges to the input voltage. When the switches
change to the and positions, they break before they make. During the break time,
holds its
charge. When the switches make, they place in parallel with , and confer charge to . Within a
few cycles, the voltage across
is equal to the input voltage. However, note that the way the switches
are wired, the output voltage is inverted.
Note: Most students go this question correct.
Spring 2012
Question 8 Consider a full wave rectifier with a smoothing capacitor and a load that draws a constant
current . The peak amplitude of the waveform after the bridge rectifier is .
(a) Make a neat and detailed sketch the output voltage waveform. Indicate the conduction interval
and clearly indicate the ripple voltage . (4 points)
(b) Then show that
Here
You may make reasonable assumptions, but you have to state them.
Solution
Part (a) Key aspects: rectified full wave,
Part (b)
represents the time the filter capacitor is supplying the load, is as indicated, and is the
time the diodes supply the load and replenish the capacitors charge (i.e., conduction interval). Since the
load is constant ( ) the differential equation for the filter capacitor, namely:
so that
(
Further,
, so that