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Introduction to
USRP E310

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USRP E300: DEPLOYABLE SDR

Applications
Deployed monitoring and generation
Sensor network research
Land mobile communication / safety
radio
Features
2x2 TX/RX Channels, 70 MHz 6 GHz
Customizable Xilinx 7 Series FPGA
Selectable RX/TX filter banks for
improved RF
Integrated battery for portable/ deployed
operation
375 grams (with reduced weight options)
2-6W typical
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Audience
Mil/Aero/Gov
Academic Research

USRP E300 SYSTEM ARCHITECTURE

Power

RF A

Power
Management

TRX-A

JTAG
Debug

RX2-A
ARM
ARM

MicroSD Flash

FPGA

Sync
Ethern
USB 2.0 Host
et

AD9361
RFIC

Filter bank

RF B
TRX-B

1GB
DRAM

512MB
DRAM

RX2-B

GPS
Ant

GPS
Receiver

TCXO

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Local
Oscillator &
Sample
Clock

FORM FACTOR
Size: 133 x 68.2 x 26.4 mm
Weight: 375 grams (225 gram OEM
version)
Includes bottom mounting holes
2-6 Watts typical (18W Max)

USRP N210 & USRP E310 size

comparison

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PERIPHERALS

Front Panel

Back Panel

Top Row

Left to Right

TRX-A RF A, Transmit/ Receive

RX2-A Alternate RX path
TRX-B RF B, Transmit/ Receive
RX2-A Alternate RX path
Bottom Row
Power Button
Micro SD card port (SDXC capable)
GPS - antenna port
Sync - digital line to FPGA
Audio Jack 2.5mm Mic/speaker

CONSOLE serial over USB com

port
2 x USB2 Host for USB peripherals
10/100/1000 Ethernet interface
5-15V DC Power supply, 2-6W
typical

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RFIC & FILTER BANK

Rx filters: reduce interference from out-of-band signals, while Tx filters:
suppress spurious harmonics
Selections chosen dynamically by the driver

* Filter bank pass bands with normalized gain, based on component characteristics.
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ZYNQ HARDWARE & SOFTWARE ARCHITECTURE

Processor cores
Clocking frequency
DMA Channels
External DRAM

2
667 MHz
8
1 GB

FPGA Resources

Xilinx7 FPGA

Programmable Logic Cells

LUTs
Flip-Flops
Block Ram
DSP Slices
Peak DSP Performance

85k
53,200
160,400
560kB
220
276 GMACs

ARM

RFIC FPGA

ARM

Embedded Linux

Cortex A9
FPGA

ARM Processor

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Custom Application
GNU Radio
Python / GRC

C / Other

UHD Driver
UHD FPGA Bitfile

SHIPPING KIT CONTENTS

Qty

Description

USRP E310 Hardware

4GB micro SD card

1 Gigabit Ethernet 3m cable

SMB-F to SMA-F adapter

6V power supply

USB console cable

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E310 INTEGRATED GPS-DISCIPLINED CLOCK

Global Position

GPS Antenna

<< Available at Lunch

uC

Precision Time
<< Future Capability

GPS
Precision Frequency Ref

TCXO

<< Future Capability

With GPS lock

Improved frequency accuracy
Global time & frequency sync
GPS location information

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PRODUCT COMPARISON: USRP PLATFORM

Low Cost
B2xx

Embedded
E3xx

General Purpose
N2xx

High Performance
X3xx

70 M 6 G

70 M 6 G

DC-30M & 50M6G

DC-30M & 50M6G

56MHz (34 MHz 2x2)

56MHz (34 MHz 2x2)

20 MHz

120 MHz

Channels

2 Tx, 2 Rx

2 Tx, 2 Rx
w/ filter banks

1 Tx, 1Rx

2 Tx, 2 Rx

DAC/ADC
Res./Rate

DAC: 12b , 61.44MS/s

ADC: 12b , 61.44MS/s

DAC: 12b , 61.44MS/s

ADC: 12b , 61.44MS/s

DAC: 16b, 400 MS/s

ADC: 14b,100 MS/s

DAC: 16b, 800 MS/s

ADC: 14b, 200 MS/s

Frequency (Hz)
Bandwidth

Noise Figure

Processing

5-7 dB

Host PC

Zynq 7020 (Xilinx 7 FPGA,

Dual ARM CORTEX A9)

Host PC

Kintex7 FPGA
Host PC

Phase Coherent

Phase Coherent

Phase Coherent

*Phase Coherent

Latency

ms to Host

uS to FPGA
uS to Host

mS to Host

uS to FPGA
uS to Host

Bus

USB3, USB2

AXI-DMA (FPGA to ARM)

1 GbE (ARM to Host)

1 GigE

1/10GbE
Cabled PCIe x4

None

None

None

None

MIMO

**Calibration

*Same Daughterboard in each slot

**UHD provides correction software

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SUMMARY
The USRP E310 extends the embedded USRP product family, engineers
can begin prototyping using a low-cost B200 or MIMO capable X300
platform and deploy on the USRP E310 for stand-alone applications with
a common software experience.
Matt Ettus,
Founder and President of Ettus Research

The USRP E310 integrates a rich set of features and peripherals

necessary for algorithm prototyping, mobile radio, wireless sensor
networks, and remote sensing applications.

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Thank you!!!
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