Topstar C48 C46 C48 C46

5
Topstar Digital technologies Co.,LTD
Board name: MotherBoard Schematic
02. System block & Index
Project name: C48
03. PWR Block & Description
Version: VerC
04. Notes & Annotations
Initial Date: MAY.9, 2008
05. Schematic Modify and History

59. CLOCK Distribution
60. Power on & off Sequence
60. Power On Sequence & Reset Map
61. ACPI Mode Switch Timings
Topstar Confidential
C
Hardware drawing by:
Hardware check by:
Power drawing by:
Power check by:
EMI Check by:
Manager Sign by:
TOPSTAR TECHNOLOGY
Joseph
Page Name
Title
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
Friday, January 15, 2010
1
59
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
5
Topstar Confidential
ShenZhen Topstar Industry Co.,LTD
D
C46 SYSTEM BLOCK Ver:A

Backlight
Connector
+VDC
CK505M
Clocking
Only for PM
TFT
SLG8SP585
LVDS switch
+V3.3S
+V3.3S
64M*16Bit*4 DDRIII
+V1.5GDDR
Memory
interface
LVDS
VGA
Nvidia
NB11
R/G/B
TMDS
+V5S
+VGA_CORE,
+V1.05GPU
+V1.8GDDR,
+V3.3GPU
+V1.5GPU
DDR3 SODIMM0
800/1066
DDR3 800/1066
Arrandule/clarsfield
989rPGA
PEGX16 /eDP
+V0.75S,+V1.5,+V3.3S
DDR3 SODIMM1
800/1066
DDR3 800/1066
+VCC_CORE,+VccGFX
+V1.5S, +V1.8S,
+V1.1S_VTT
+V0.75S,+V1.5,+V3.3S
HDMI
LVDS
+V0.75S,+V1.5,+V3.3S
DMI*4 100MHz
FDI
RJ45
PCIE 1X
SPI
BIOS
8Mbit
RTL8102E
+V3.3S,+V3.3AL
RJ45
Ibex_peak
+V3.3AL
PCI-Express X16
1071 BGA
SATA ODD
PCIE mini Card
PCIE mini Half-Card
ESATA
+V5S
+V3.3A,+V3.3S,+V1.5S,
+V1.05S,+V1.8S,
+V5A,+V5S
S-ATA
2.5" HDD
+V5S,+V3.3S
USB1.1/2.0
PCIE 1X
SD/MMC/MS CARD
Card Reader
ITE 1337
+V3.3S,+V3.3AL
LPC
AZALIA
USB1.1/2.0
BLUE
TOOTH(V1.2)
B
BTM-203/CCOM
NEW CARD(Type II)
+V3.3AL
Camera
1.3M/2.0M
MODULE
USB PORT1
KB Controller/EC
+V5AL
ENE 3926
+V3.3AL,+V3.3S,+V5AL
+V3.3S
TCM
MiC
AZALIA
ALC662
+V5S,+V3.3S
LED/TouchPAD/Button/
DAUGHTER BOARD
Q-key/LID
DAUGHTER BOARD
KB Matrix
TOPSTAR TECHNOLOGY
Joseph
Page Name
Sys block
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
2
59
5
C46 POWER BLOCK Ver:A

3ODWIRUP
/RJLF
95B21
VCC_SENCE
VSS_SENCE
IMON
95B77
9FFBFRUH
9,1
9B
,093
9B
9,'>@
36,
&/.B(1$%/(
,093B3:5*'
'356/395
36, 352&+27
3&+
&38B3:5*'
&380
&/.
&+,3

&KDUJH
,6/
%DWWHU\
$GDSWHU
3RZHU
6ZLWFK
$
9&&B&25(
65/90W
9&&B&25(
,6/
9'&
$
+V1.8S
MOSFET
+V1.8GPU
KIA1117
,6/
,6/
736
736
96
96B977
$
$
9*$B&25(
$
9*);
MOSFET
$OZD\VB2Q
3RZHU
736
''53RZHU
736
$3/
96
96
9
96
9$/
9$/
$$
$$
MOSFET
MOSFET
MOSFET
+V1.5S
$
9*38
+V3.3GPU
$
$
$
+V1.5GPU
$
6\VWHP3RZHU
9B6
TOPSTAR TECHNOLOG
Joseph
Page Name
PWR Block
Size
C
C48
Project Name
Rev
C

3
59
of
Date:
Sheet
5
Voltage Rails
+VDC
Primary DC system power supply(9V-19V)
+VCC_CORE
Core voltage for processor
+V1.1S_VTT
1.1V for CPU
+V1.05S
1.05V for PCH core
+V0.75S
0.75V DDR3 Termination voltage
+V1.5
1.5V power rail for DDR3
+V3.3AL
3.3V always on power rail
+V3.3S
3.3V main power rail
+V5AL
5V for USB Device
+V5S
5V main power rail
+VGA_CORE
0.8--1.03V for GPU NB8M core voltage
+V1.5S
1.5S for PCIE Device
+V1.8S
1.8V for display votage
+V3.3GPU
3.3V for external GPU
I2C SMB Address
+V1.05GPU
+V1.8GPU
+V1.5GPU
Device
Address
Clock Generator
1101 001x
1010 000x
1010 010x
Variable
Variable
D2
A0
A4
Variable
Variable
SMB_PCH
SMB_PCH
SMB_PCH
SMB_PCH
SMB_PCH
Variable
Variable
SMB1_PCH
SO-DIMM0
SO-DIMM1
NEW CARD
PCIE Mini CARD
PCH
Smart Battery
Touch sensor IC
Hex
0001 011x
16
1000 110x
8C
Bus
I2C
SMB1_PCH
Master
PCH
PCH
PCH
PCH
PCH
ENE3926
ENE3926
ENE3926
Power States/AC mode

6LJQDO
Board stack up description

PCB Layers
TOP
GND
IN1
IN2
9 $/
9
6/3B6
6/3B6
6/3B6
9 6
&ORFN
6)XOO2Q
+,*+
+,*+
+,*+
21
21
21
21
6670
/2:
+,*+
+,*+
21
21
2))
2))
667'
/2:
/2:
+,*+
21
2))
2))
2))
66RIW2II
/2:
/2:
/2:
21
2))
2))
2))
Trace Impedence:50ohm +/-15%(Default)
VCC
IN3
B
GND
Bottom
Wake up Events
USB Table
USB Port#
LID switch from EC
Function Description
Express Card
minicard1
reserved
camera
USB port1
Bluetooth
Power switch from EC
Reserved
Reserved
CARD Reader
minicard2
Page Name
Notes
USB port2
Size
C
C48
TOPSTAR TECHNOLOG
Joseph
10
11
USB port3
Project Name
Rev
C

4
59
of
Date:
Sheet
4
C48 VerB to VerC change

1:GPURST#I GU1 ,NI GR1PLTRST#EC_GPURST#EC_GPURST#
GPURST#PLATRST#PLTRST#EC_GPURST#GPURST#
EC_GPURST#PLTRST#GPURST#
PLTRST#5msEC5ms,
PLTRST#
D
2
NI Q31,PZ8,change PR187 from 100 ohm to 2K ohm,change PR24 from 51k to 15K
Q31GPU_OVT#
GPUGPU_OVT#GPU
BIOSECECPR1872K,PR2415K
51K100ohmPZ8
3.3AL
PZ8
3TP_CON26Pin7pin,C49C49ECGPIO
EC GPIO1pin
C
4PWRLED#POWER1PWRLED1PWRLED#POWER1,PWRLED1ECGPIO
PWR
5Audio Jack SMDDIPSymbolAudio

SPK CONNCONNRTC CONN
6USB connUSB conn
7CO-lay Option for C49,
TOPSTAR TECHNOLOG
Joseph
Page Name
history
Size Project Name

Custom
C48
Rev
C
of
Monday, January 25, 2010
5
59
Date:
Sheet
5
+V3.3S
FB1 2
+V3.3S
{8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
+V3.3AL
{22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
+V3.3S_CK_VDD
1 100ohm@100MHz,3A
FB0805
C1
C2
C3
C4
C5
10UF/6.3V,X5R
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
C0805
C0402
C0402
C0402
C0402
Layout Note:
Cap Close to CK505 PWR pin
+V3.3S
R573
10K
R0402
U1
CPU_STOP#
+V3.3S_CK_VDD
+VDDIO_CLK
No more than 500 mil
+V3.3S
FB2 1
C7
C8
C9
Y1
14.31818MHz
XS2_3D3
XTAL_OUT
VDD_DOT
VDD_27
VDD_SRC
VDD_REF
24
18
15
G1
G2
G3
G4
28
VDD_CPU
VDD_CPU_IO
VDD_SRC_IO
GND1
GND2
GND3
GND4
XTAL_IN
27
G5
XTAL_OUT
GND5
C10
2
C6
XTAL_IN
+VDDIO_CLK
2 100ohm@100MHz,3A
FB0805
27pF/50V,NPO
C0402
C11
1
5
17
29
10UF/6.3V,X5R
0.1UF/25V,Y5V
0.1UF/25V,Y5V
10UF/6.3V,X5R
0.1UF/25V,Y5V
C0805
C0402
C0805
C0402
C0402
C12
2
8
9
12
21
26
27pF/50V,NPO
C0402
SMBUS ADD:1101 001X

R955
R956
0
0
R0402
R0402
0
0
R0402
R0402
SMB_DATA
SMB_CLK
31
32
CPU_STOP#
16
CPU0
CPU0#
23
22
BCLK
BCLK#
CPU1
CPU1#
20
19
Integrated resistors on differentail clk
DOT96
DOT96#
3
4
DOT96
DOT96#
R1
R2
R3
R4
0
0
R0402
R0402
SRC0/SATA
SRC0#/SATA
10
11
R5
R6
0
0
R0402
R0402
SRC1
SRC1#
13
14
R7
R8
0
0
R0402
R0402
R9
33
R0402
VSS_DOT
VSS_27
27M_NSS
VSS_SATA
27M_SS
VSS_SRC
VSS_CPU
REF/FS
VSS_REF CK_PWRGD/PWRDWN#
SMB_DATA_S
SMB_CLK_S
CLK_BUF_BCLK_P
CLK_BUF_BCLK_N
{24}
{24}
CLK_BUF_DOT96_P
CLK_BUF_DOT96_N
{24}
{24}
CLK_BUF_SATA_P {24}
CLK_BUF_SATA_N {24}
CLK_BUF_EXP_P {24}
CLK_BUF_EXP_N {24}
6
7
30
25
{14,15,24,37,39}
{14,15,24,37,39}
CPU_STOP#
27M_nonSSC {20}
27M_SSC
{20}
BCLK_FS
CLK_PWRGD
CLK_BUF_REF14
{24}
CK505QFN32
+V3.3S
Frequence Select
High:100Mhz
Low:133Mhz(Default)
B
CLK_BUF_REF14
R10
10K
R0402
ns
C13
10PF/50V,NPO
ns
C0402
B
BCLK_FS
R895
0 ns
+V3.3S
+V3.3AL
R898
1K
R0402
C535
VCC
4
C0402
0.1UF/25V,Y5V
ns
GND
3
PQ85
2N7002
SOT23
C534
0.1UF/10V,X7R
5
1
{53} CK505_CLK_EN#
R896
10K
R0402
R897
10K
R0402
ns
CLK_PWRGD
SOT23_5
SN74AHC1G08DBV
U30
C536
C0402
0.1UF/25V,Y5V
TOPSTAR TECHNOLOG
Joseph
Page Name
CK505M
Size
C
C48
Project Name
Rev
C

6
59
Date:
Sheet
of
5
PEG_IRCOMP_R
R11
U2A
{25}
{25}
{25}
{25}
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
{25}
{25}
{25}
{25}
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
{25}
{25}
{25}
{25}
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
{25} FDI_TXN[7:0]
DMI_RX#[0]
DMI_RX#[1]
DMI_RX#[2]
DMI_RX#[3]
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
B24
D23
B23
A22
DMI_RX[0]
DMI_RX[1]
DMI_RX[2]
DMI_RX[3]
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
D24
G24
F23
H23
DMI_TX#[0]
DMI_TX#[1]
DMI_TX#[2]
DMI_TX#[3]
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
D25
F24
E23
G23
DMI_TX[0]
DMI_TX[1]
DMI_TX[2]
DMI_TX[3]
E22
D21
D19
D18
G21
E19
F21
G18
FDI_TX#[0]
FDI_TX#[1]
FDI_TX#[2]
FDI_TX#[3]
FDI_TX#[4]
FDI_TX#[5]
FDI_TX#[6]
FDI_TX#[7]
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
D22
C21
D20
C18
G22
E20
F20
G19
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
FDI_TX[3]
FDI_TX[4]
FDI_TX[5]
FDI_TX[6]
FDI_TX[7]
{25} FDI_FSYNC0
{25} FDI_FSYNC1
F17
E17
FDI_FSYNC[0]
FDI_FSYNC[1]
{25}
FDI_INT
C17
FDI_INT
{25} FDI_LSYNC0
{25} FDI_LSYNC1
F18
D17
FDI_LSYNC[0]
FDI_LSYNC[1]
{25} FDI_TXP[7:0]
Intel(R) FDI
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
A24
C23
B22
A21
DMI
{25}
{25}
{25}
{25}
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
PCI EXPRESS -- GRAPHICS
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
B26
A26
B27
A25
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
IC,AUB_CFD_rPGA,R1P0
R12
EXP_RBIAS
49.9,1%
R0402
750 OHM
R0402
PEG_TXN[15..0] {17}
PEG_TXP[15..0] {17}
PEG_RXN[15..0] {17}
L33 0.1UF/10V,X7R GC217

M35 0.1UF/10V,X7R GC218
M330.1UF/10V,X7R GC219
M30 0.1UF/10V,X7R GC220 PM
L310.1UF/10V,X7R GC221
PM
K32 0.1UF/10V,X7RGC223 PM
M29 0.1UF/10V,X7RGC222
PM
J31 0.1UF/10V,X7RGC224 PM
K290.1UF/10V,X7R GC225
PM
0.1UF/10V,X7R
GC227
H30
PM
H290.1UF/10V,X7R GC226
PM
F290.1UF/10V,X7RGC228
PM
E280.1UF/10V,X7RGC229
PM
D29 0.1UF/10V,X7RGC231 PM
D27 0.1UF/10V,X7R GC230
PM
C26 0.1UF/10V,X7R GC232 PM
PM
GC237
0.1UF/10V,X7R
L34
PM
GC240 0.1UF/10V,X7R
M34
PM
M32 GC242 0.1UF/10V,X7R
GC241
0.1UF/10V,X7R
L30
PM
M31 GC238 0.1UF/10V,X7R
GC243 0.1UF/10V,X7R PM
K31
PM
M28 GC239 0.1UF/10V,X7R
H31
PM
K28 GC2450.1UF/10V,X7R
G30
PM
G29 GC2460.1UF/10V,X7R
GC2480.1UF/10V,X7R PM
F28
PM
E27 GC235 0.1UF/10V,X7R
D28
PM
GC236
0.1UF/10V,X7R
C27
GC2340.1UF/10V,X7R PM
C25
PM
PM
PM
PM
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP[15..0] {17}
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
B
C48
Project Name
Rev
C
Date:
Sheet
7
59
of
5
+V1.1S_VTT {10,11,28,29,30,34,48,49,53}
+V3.3S
{6,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
+V1.5
{11,14,15,47,54,55,56}
+V1.1S_VTT
Voltage Level?
D
R59
1K
R0402
ns
+V1.1S_VTT
Layout Note:
Place close to CPU
COMP3
+V1.1S_VTT
+V1.1S_VTT
{28}
R23
H_PECI
R25
68
R0402
R0402
H_PECI_R
VR_PROCHOT#
ns
AT15
AN26
AK15
{28,34} THERMTRIP#
CATERR#
THERMAL
49.9,1% R0402 H_CATERR# AK14
R21
SKTOCC#
PECI
PROCHOT#
PEG_CLK
PEG_CLK#
E16
D16
R17
R18
0
0
R0402
R0402
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
A18
A17
CLK_DP_P_R
CLK_DP_N_R
R19
R20
0
0
R0402
R0402
SM_DRAMRST#
THERMTRIP#
ns H_CPURST#_R
AP26
RESET_OBS#
R0402 H_PM_SYNC_R
AL15
PM_SYNC
R0402
R27
+V1.1S_VTT
R487
R488
{28} VCCPWRGD_0
R413
1K,1%
R0402
ns
{25} PM_DRAM_PWRGD
0
0
R0402 VCCPWRGOOD_1_R AN14

R0402 VCCPWRGD_0_R
PM_DRAM_PWRGD
CPU_VTT_PWG
H_PWRGD_XDP_R
{17,27,34,35,37,39,41,42}
BUF_PLT_RST#
R29
1.5K,1% R0402
PLT_RST#_R
AN27
VCCPWRGOOD_1
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
F6
R15
10K
R0402
CLK_EXP_P
CLK_EXP_N
PM_EXT_TS#[0]
PM_EXT_TS#[1]
AN15
AP15
PM_EXT_TS#0
PM_EXT_TS#1
PRDY#
PREQ#
AT28
AP27
TCK
TMS
TRST#
AN28
AP28
AT27
TCK
TMS
TDI
TDO
TDI_M
TDO_M
AT29
AR27
AR29
AP29
TDI
TDO
TDI_M
TDO_M
DBR#
AN25
R51
10K
R0402
ns
Q27
3
SOT23
PM_EXT_TS#0
{24}
{24}
2 ns
MMBT3904-F
DIM_EXTTS#0
{14}
+V1.1S_VTT
ns
ns
DDR3_DRAMRST#
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
JTAG & BPM
68
PWR MANAGEMENT
R26
{25} H_PM_SYNC
{28}
{28}
ns
ns
T24
T36
AL1
AM1
AN1
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
+V1.1S_VTT
BCLK_CPU_P
BCLK_CPU_N
+V3.3S
Voltage Level?
R154
1K
R0402
ns
+V1.1S_VTT
DDR3
MISC
AH24
CLK_EXP_P_R
CLK_EXP_N_R
R0402
R0402
{14,15}
R22
10K
R0402
R24
10K
R0402
ns
Q28
3
SOT23
PM_EXT_TS#1
ns
2
MMBT3904-F
DIM_EXTTS#1
{15}
+V1.1S_VTT
XDP_REQ
TDO
R566
TRST#
49.9,1%
R0402
49.9,1%
R0402
49.9,1%
R0402
49.9,1%
R0402
49.9,1%
R0402
ns
R562
49.9,1%
R0402
ns
T48
TMS
R253
TCK
R267
ns
ns
+V3.3S
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
T20
T42
T43
T44
T46
T45
T47
T37
TDI
ns
ns
ns
ns
ns
ns
ns
ns
R296
ns
XDP_REQ R325
R28
10K
R0402
ns
EC_PROCHOT#
R30
1K
R0402
R265
0
TDO_M
ns
R0402
+V1.1S_VTT
Q1
MMBT3904-F
SOT23
R33
750 OHM
R0402
R31
1K
R0402
Q2
R32
MMBT3904-F 1K
SOT23
R0402
1
VR_PROCHOT#
Processor Compensation
Signals
{42}
+V1.1S_VTT
TDI_M
COMP0
BCLK_ITP_P
BCLK_ITP_N
0
0
+V1.1S_VTT
AT26
AR30
AT30
BCLK_ITP
BCLK_ITP#
R13
R14
COMP1
BCLK_CPU_P_R
BCLK_CPU_N_R
COMP2
G16
H_COMP0
MISC
AT24
H_COMP1
A16
B16
BCLK
BCLK#
CLOCKS
AT23
H_COMP2
U2B
H_COMP3
+V3.3S
VR_PROCHOT#
{53}
DDR3 Compensation Signals

SM_RCOMP_2
H_COMP1
H_COMP3
SM_RCOMP_1
H_COMP0
H_COMP2
SM_RCOMP_0
R34
49.9,1%
R0402
R35
49.9,1%
R0402
R36
20,1%
r0402
R37
20,1%
r0402
R38
100,1%
R0402
R39
R40
24.9,1% 130,1%
R0402
R0402
+V1.5
R215
1.21K,1%
{42} CPU_VTT_PWG
PM_DRAM_PWRGD
A
R899
750 OHM
R234
3.3K
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
8
59
5
U2D
U2C
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
A10
C10
C7
A7
B10
D10
E10
A8
D8
F10
E6
F7
E9
B7
E7
C6
H10
G8
K7
J8
G7
G10
J7
J10
L7
M6
M8
L9
L6
K8
N8
P9
AH5
AF5
AK6
AK7
AF6
AG5
AJ7
AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
{14}
{14}
{14}
MA_A_BS0
MA_A_BS1
MA_A_BS2
AC3
AB2
U7
SA_BS[0]
SA_BS[1]
SA_BS[2]
{14}
{14}
{14}
MA_A_CAS#
MA_A_RAS#
MA_A_WE#
AE1
AB3
AE9
SA_CAS#
SA_RAS#
SA_WE#
AA6
AA7
P7
M_CLK_DDR0 {14}
M_CLK_DDR#0 {14}
M_CKE0
{14}
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
Y6
Y5
P6
M_CLK_DDR1 {14}
M_CLK_DDR#1 {14}
M_CKE1
{14}
SA_CS#[0]
SA_CS#[1]
AE2
AE8
SA_ODT[0]
SA_ODT[1]
AD8
AF9
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
DDR SYSTEM MEMORY A
{14} MA_DATA[63:0]
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
B9
D7
H7
M7
AG6
AM7
AN10
AN13
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
C9
F8
J9
N9
AH7
AK9
AP11
AT13
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
C8
F9
H9
M9
AH8
AK10
AN11
AR13
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_CS#0
M_CS#1
M_ODT0
M_ODT1
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7
MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
MA_A_A0
MA_A_A1
MA_A_A2
MA_A_A3
MA_A_A4
MA_A_A5
MA_A_A6
MA_A_A7
MA_A_A8
MA_A_A9
MA_A_A10
MA_A_A11
MA_A_A12
MA_A_A13
MA_A_A14
MA_A_A15
{14}
{14}
{14}
{14}
MA_DM[7:0] {14}
MA_DQS#[7:0]
{14}
MA_DQS[7:0]
{14}
MA_A_A[15:0] {14}
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
J6
J3
G1
G5
J2
J1
J5
K2
L3
M1
K5
K4
M4
N5
AF3
AG1
AJ3
AK1
AG4
AG3
AJ4
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
{15}
{15}
{15}
MB_B_BS0
MB_B_BS1
MB_B_BS2
AB1
W5
R7
SB_BS[0]
SB_BS[1]
SB_BS[2]
{15}
{15}
{15}
MB_B_CAS#
MB_B_RAS#
MB_B_WE#
AC5
Y7
AC6
SB_CAS#
SB_RAS#
SB_WE#
DDR SYSTEM MEMORY - B
{15} MB_DATA[63:0]
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
W8
W9
M3
M_CLK_DDR2 {15}
M_CLK_DDR#2 {15}
M_CKE2
{15}
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
V7
V6
M2
M_CLK_DDR3 {15}
M_CLK_DDR#3 {15}
M_CKE3
{15}
SB_CS#[0]
SB_CS#[1]
AB8
AD6
M_CS#2
M_CS#3
{15}
{15}
SB_ODT[0]
SB_ODT[1]
AC7
AD1
M_ODT2
M_ODT3
{15}
{15}
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
D4
E1
H3
K1
AH1
AL2
AR4
AT8
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
D5
F4
J4
L4
AH2
AL4
AR5
AR8
MB_DQS#0
MB_DQS#1
MB_DQS#2
MB_DQS#3
MB_DQS#4
MB_DQS#5
MB_DQS#6
MB_DQS#7
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
C5
E3
H4
M5
AG2
AL5
AP5
AR7
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
MB_DM[7:0]
{15}
MB_DQS#[7:0]
{15}
MB_DQS[7:0]
MB_DQS0
MB_DQS1
MB_DQS2
MB_DQS3
MB_DQS4
MB_DQS5
MB_DQS6
MB_DQS7
{15}
MB_B_A[15:0] {15}
MB_B_A0
MB_B_A1
MB_B_A2
MB_B_A3
MB_B_A4
MB_B_A5
MB_B_A6
MB_B_A7
MB_B_A8
MB_B_A9
MB_B_A10
MB_B_A11
MB_B_A12
MB_B_A13
MB_B_A14
MB_B_A15
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
9
59
5
+VCC_CORE
{53}
+V1.1S_VTT {8,11,28,29,30,34,48,49,53}
U2F
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
VTT0_32
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
PSI#
AN33
PM_PSI#
{53}
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PROC_DPRSLPVR
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
PM_DPRSLPVR
{53}
{53}
{53}
{53}
{53}
{53}
{53}
{53}
+V1.1S_VTT
C14
C15
C16
C17
C18
C19
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
+V1.1S_VTT
R58
1K
R0402
ns
R156
1K
R0402
PM_PSI#
PM_DPRSLPVR
R155
1K
R0402
C20
C21
C22
C23
C24
C25
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
0.22uF/10V,X7R
0.01uF/25V,X7R
R157
1K
R0402
ns
+V1.1S_VTT
POWER
CPU VIDS
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100
CPU CORE SUPPLY
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26
VTT_SELECT
G15
C26
C27
10uF/6.3V,X5R
10uF/6.3V,X5R
+VCC_CORE
VTT_SELECT_R
R41
R0402
C28
C29
C30
C31
C32
C33
C34
C35
C36
C37
C38
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
VTT_SELECT {48}
B
+VCC_CORE
SENSE LINES
Clarksfield 1.1v
Arrandale 1.05v
+V1.1S_VTT
1.1V RAIL POWER
+VCC_CORE
ISENSE
AN35 Vcore_IMON_R
VCC_SENSE
VSS_SENSE
AJ34 VCCSENSE_R
AJ35 VSSSENSE_R
VTT_SENSE
VSS_SENSE_VTT
R42
0
R0402
R44
R45
B15
A15
Vcore_IMON
R0402
R0402
{53}
C40
C41
C42
C43
C44
C45
C46
C47
C48
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R 10uF/6.3V,X5R
C49
C50
10uF/6.3V,X5R
10uF/6.3V,X5R
R43
100,1%
R0402
0
0
T3 ICTP ns
T1 ICTP ns
C39
VCCSENSE
VSSSENSE
{53}
{53}
R46
100,1%
R0402
C51
C52
C53
C54
C55
C56
C57
C58
C59
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
1uF/10V,X7R
1uF/10V,X7R
0.22uF/10V,X7R
0.22uF/10V,X7R 0.01uF/25V,X7R
C60
C61
C62
0.01uF/25V,X7R
10uF/6.3V,X5R
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
Date:
Sheet
of
10
59
5
+VGFX
{49}
+V1.1S_VTT {8,10,28,29,30,34,48,49,53}
+V1.5
{8,14,15,47,54,55,56}
+V1.8S
{16,27,29,30,47,54,55}
+VGFX
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
C67
C68
C69
C70
0.22uF/10V,X7R
0.01uF/25V,X7R
10uF/6.3V,X5R
10uF/6.3V,X5R
J24
J23
H25
VTT1_45
VTT1_46
VTT1_47
GRAPHICS
10uF/6.3V,X5R
10uF/6.3V,X5R
FDI
C78
VGFXVCCSEN {49}
VGFXVSSSEN {49}
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
AM22
AP22
AN22
AP23
AM23
AP24
AN24
GFXVR_VID_0
GFXVR_VID_1
GFXVR_VID_2
GFXVR_VID_3
GFXVR_VID_4
GFXVR_VID_5
GFXVR_VID_6
GFX_VR_EN
GFX_DPRSLPVR
GFX_IMON
AR25
AT25
AM24
GFXVR_DPRSLPVR {49}
VGFX_IMON
{49}
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
C82
C83
C84
10uF/6.3V,X5R
10uF/6.3V,X5R
10uF/6.3V,X5R
1.1V
1.8V
C81
10uF/6.3V,X5R
PEG & DMI
VTT1_48
VTT1_49
VTT1_50
VTT1_51
VTT1_52
VTT1_53
VTT1_54
VTT1_55
VTT1_56
VTT1_57
VTT1_58
GFXVR_EN
{49}
R705
470
R0402
VTT0_59
VTT0_60
VTT0_61
VTT0_62
P10
N10
L10
K10
C71
C72
C73
C74
C75
C76
10uF/6.3V,X5R
10uF/6.3V,X5R
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
+V1.1S_VTT
+V1.1S_VTT
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
{49}
{49}
{49}
{49}
{49}
{49}
{49}
+V1.5
+V1.1S_VTT
C77
AR22
AT22
- 1.5V RAILS
C63
VAXG_SENSE
VSSAXG_SENSE
DDR3
C66
GRAPHICS VIDs
C65
POWER
C64
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
SENSE
LINES
U2G
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68
J22
J20
J18
H21
H20
H19
VCCPLL1
VCCPLL2
VCCPLL3
L26
L27
M26
C79
C80
10uF/6.3V,X5R
10uF/6.3V,X5R
+V1.1S_VTT
B
C85
C86
10uF/6.3V,X5R
10uF/6.3V,X5R
VCCPLL
+V1.8S
VCCPLL
FB3
2 FB0805
300ohm@100MHz,1.5A
C87
C88
C89
C90
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
10uF/6.3V,X5R
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
Date:
Sheet
of
11
59
5
U2I
U2H
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
K27
K9
K6
K3
J32
J30
J21
J19
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
H8
H5
H2
G34
G31
G20
G9
G6
G3
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
E8
E5
E2
D33
D30
D26
D9
D6
D3
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
B8
B6
B4
A29
A27
A23
A9
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190
VSS191
VSS192
VSS193
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213
VSS214
VSS215
VSS216
VSS217
VSS218
VSS219
VSS220
VSS221
VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233
VSS
NCTF
AT20
AT17
AR31
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
B
C48
Project Name
Rev
C
Date:
Sheet
12
59
of
5
U2E
R47
3.01K,1%
R0402
R49
R48
3.01K,1%
3.01K,1%
R0402
R0402
ns CFG0 AM30
AM28
AP31
CFG3 AL32
ns CFG4 AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86
B19
A19
RSVD15
RSVD16
A20
B20
RSVD17
RSVD18
U9
T9
RSVD19
RSVD20
AC9
AB9
RSVD21
RSVD22
C1
A3
RSVD_NCTF_23
RSVD_NCTF_24
J29
J28
RSVD26
RSVD27
A34
A33
RSVD_NCTF_28
RSVD_NCTF_29
C35
B35
RSVD_NCTF_30
RSVD_NCTF_31
H12
AP1
AT2
RSVD_NCTF_42
RSVD_NCTF_43
AT3
AR1
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65
E15
F15
A2
D15
C15
AJ15
AH15
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
VSS
AP34
H14
D
CPU_HOLE
ns
CPU_HOLE
ns
CPU_HOLE
ns
1
2
3
4
5
6
7
8
9
CPU_HOLE
ns
1
2
3
4
5
6
7
8
9
RSVD_NCTF_40
RSVD_NCTF_41
H13
1
2
3
4
5
6
7
8
9
RSVD38
RSVD39
AJ26
AJ27
H11
1
2
3
4
5
6
7
8
9
RSVD36
RSVD_NCTF_37
AL26
AR2
1
2
3
4
5
6
7
8
9
ns
ns
AH25
AK26
1
2
3
4
5
6
7
8
9
R0402
R0402
RSVD34
RSVD35
1
2
3
4
5
6
7
8
9
0
0
AJ13
AJ12
1
2
3
4
5
6
7
8
9
R496
R497
{14} VREFA_DDR3
{15} VREFB_DDR3
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
SA_DIMM_VREF
SB_DIMM_VREF
RSVD11
RSVD12
RSVD13
RSVD14
RESERVED
AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30
RSVD32
RSVD33
BRACKET
BRACKET1_Mylar
CPU_BRACKET
R50
Mylar
R0402
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
B
C48
Project Name
Rev
C
Date:
Sheet
13
59
of
5
+V3.3S
+V1.5
+V0.75S
{6,8,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{8,11,15,47,54,55,56}
{15,47,54}
+V0.75S +V1.5
BA0
BA1
BA2
114
121
CS0
CS1
11
28
46
63
136
153
170
187
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
113
115
110
WE
CAS
RAS
M_CKE0
M_CKE1
73
74
CKE0
CKE1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
101
103
102
104
CK0
CK0
CK1
CK1
116
120
ODT0
ODT1
12
29
47
64
137
154
171
188
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
200
202
SDA
SCL
197
201
SA0
SA1
199
VDDSPD
1
126
VREF_DQ
VREF_CA
C382
2.2UF/10V,X7R
198
30
EVENT#
RESET#
C0805
77
122
125
NC1
NC2
NCTEST
MA_A_BS0
MA_A_BS1
MA_A_BS2
{9}
{9}
M_CS#0
M_CS#1
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
{9}
MA_A_WE#
MA_A_CAS#
MA_A_RAS#
M_ODT0
M_ODT1
MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
{9} MA_DQS[7:0]
{6,15,24,37,39}
{6,15,24,37,39}
SMB_DATA_S
SMB_CLK_S
R415
R414
+V3.3S
10K R0402
10K R0402
close to DDR pin

VREFA_DDR3
0.1UF/25V,Y5V
C379
C0402
R416
0
VREFB_CA
C380
C381
0.1UF/25V,Y5V
C0402
2.2UF/10V,X7R
C0805
close to DDR pin
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
10
27
45
62
135
152
169
186
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7
C91
+ ns
C92
C93
C94
C95
C96
C97
C98
ns
ns
ns
C0402
C0805
C0805
C0402
C0805
C0402
C0805
CT7343_19
0.1UF/25V,Y5V
2.2UF/10V,X7R
2.2UF/10V,X7R
2.2UF/10V,X7R
2.2UF/10V,X7R
0.1UF/25V,Y5V
0.1UF/25V,Y5V
220UF/2.5V,POSCAP
2
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
DDR3_SODIMM204_0
{8} DIM_EXTTS#0
MA_DATA[63:0] {9}
1, A minimum of 9 high frequency

capacitors are recommended to be
placed near each SO-DIMM of DDR2.
2, 2.2F*5 per DIMM,0.1F*4 per
DIMM,330F*1 per DIMM
+V1.5
C105
C100
10uF/6.3V,X5R
C0402
C101
C106
C0805
2.2UF/10V,X7R
0.1UF/25V,Y5V
C103
C104
10uF/6.3V,X5R
C0402
C0805
2.2UF/10V,X7R
0.1UF/25V,Y5V
Layout note:DDR slot VDD PIN

+V0.75S
C99
C102
C107
C108
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
C
MA_DQS#[7:0]
GND1
GND2
109
108
79
{9}
{9}
{9}
DIMM1
{9}
205
206
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
{9} MA_DM[7:0]
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
MA_A_A0
MA_A_A1
MA_A_A2
MA_A_A3
MA_A_A4
MA_A_A5
MA_A_A6
MA_A_A7
MA_A_A8
MA_A_A9
MA_A_A10
MA_A_A11
MA_A_A12
MA_A_A13
MA_A_A14
MA_A_A15
VTT2
VTT1
{9} MA_A_A[15:0]
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
204
203
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
+V1.5
{8,15} DDR3_DRAMRST#
+V1.5
+V1.5
R492
1K,1%
R0402
R900
1K,1%
R0402
VREFA_DDR3
R493
1K,1%
R0402
VREFA_DDR3
VREFB_CA
{13}
R901
C537
1K,1%
R04020.1UF/25V,Y5V
C0402
C538
2.2UF/10V,X7R
C0805
close to DDR pin
TOPSTAR TECHNOLOGY
Joseph
Page Name
DDR2 SODIMM0
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
14
59
5
+V3.3S
+V1.5
+V0.75S
{6,8,14,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{8,11,14,47,54,55,56}
{14,47,54}
+V0.75S +V1.5
BA0
BA1
BA2
114
121
CS0
CS1
11
28
46
63
136
153
170
187
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
113
115
110
WE
CAS
RAS
M_CKE2
M_CKE3
73
74
CKE0
CKE1
M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR3
M_CLK_DDR#3
101
103
102
104
CK0
CK0
CK1
CK1
116
120
ODT0
ODT1
12
29
47
64
137
154
171
188
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
200
202
SDA
SCL
197
201
SA0
SA1
199
VDDSPD
1
126
VREF_DQ
VREF_CA
C131
198
30
EVENT#
RESET#
2.2UF/10V,X7R
C0805
77
122
125
NC1
NC2
NCTEST
C109 C110
C111
C112
C113
C114
C115
C116
C117
ns
ns
C0805
C0402
C0805
C0805
C0402
C0805
C0805
C0402
C0805
2.2UF/10V,X7R
2.2UF/10V,X7R
0.1UF/25V,Y5V
2.2UF/10V,X7R
10UF/6.3V,X5R
0.1UF/25V,Y5V
2.2UF/10V,X7R
2.2UF/10V,X7R
0.1UF/25V,Y5V
+V1.5
C118
10uF/6.3V,X5R
C0805
C119
10uF/6.3V,X5R
C0805
{9}
{9}
{9}
+V1.5
MB_B_BS0
MB_B_BS1
MB_B_BS2
{9}
{9}
M_CS#2
M_CS#3
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
C120
C121
C122
C123
C124
C125
C126
C127
ns
ns
ns
ns
C0402
C0805
C0805
C0402
C0805
C0805
C0402
C0805
0.1UF/25V,Y5V2.2UF/10V,X7R
2.2UF/10V,X7R
0.1UF/25V,Y5V
2.2UF/10V,X7R
0.1UF/25V,Y5V
2.2UF/10V,X7R
2.2UF/10V,X7R
C
Layout note:DDR SLOT VDD PIN
{9}
MB_DM[7:0]
{9}
{9}
{9}
MB_B_WE#
MB_B_CAS#
MB_B_RAS#
{9}
{9}
+V0.75S
C383
C384
1uF/10V,X7R
ns
C385
1uF/10V,X7R
ns
{9}
{9}
{9}
{9}
C386
1uF/10V,X7R
ns
{9}
{9}
1uF/10V,X7R
ns
M_ODT2
M_ODT3
MB_DQS0
MB_DQS1
MB_DQS2
MB_DQS3
MB_DQS4
MB_DQS5
MB_DQS6
MB_DQS7
C46
{9} MB_DQS[7:0]
Note:
SO-DIMM1 SPD Address is 0xA4
SO-DIMM1 TS Address is 0x34
+V3.3S
{6,14,24,37,39}
{6,14,24,37,39}
SMB_DATA_S
SMB_CLK_S
R54
R55
10K R0402
10K R0402
VREFB_DDR3
VREFA_CA
close to DDR pin

B
C130
C129
0.1UF/25V,Y5V
C0402
C128
0.1UF/25V,Y5V
C0402
2.2UF/10V,X7R
C0805
close to DDR pin
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
DDR3_SODIMM204_0
{8} DIM_EXTTS#1
MB_DATA[63:0] {9}
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
10
27
45
62
135
152
169
186
MB_DQS#0
MB_DQS#1
MB_DQS#2
MB_DQS#3
MB_DQS#4
MB_DQS#5
MB_DQS#6
MB_DQS#7
MB_DQS#[7:0]
GND1
GND2
109
108
79
+V1.5
DIMM2
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
{9}
205
206
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
MB_B_A0
MB_B_A1
MB_B_A2
MB_B_A3
MB_B_A4
MB_B_A5
MB_B_A6
MB_B_A7
MB_B_A8
MB_B_A9
MB_B_A10
MB_B_A11
MB_B_A12
MB_B_A13
MB_B_A14
MB_B_A15
VTT2
VTT1
MB_B_A[15:0]
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
{9}
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
204
203
{8,14} DDR3_DRAMRST#
+V1.5
+V1.5
R494
1K,1%
R0402
VREFB_DDR3
VREFB_DDR3
R902
1K,1%
R0402
{13}
VREFA_CA
R495
1K,1%
R0402
R903
C539
1K,1%
R04020.1UF/25V,Y5V
C0402
C540
2.2UF/10V,X7R
A
C0805
close to DDR pin

TOPSTAR TECHNOLOGY
Joseph
Page Name
DDR2 SODIMM1
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
15
59
5
+V3.3S
+V1.8S
+V1.8S
{6,8,14,15,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{11,27,29,30,47,54,55}
+V1.8S
U26
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
{22} LVDS_CLKAP
{22} LVDS_CLKAM
{22} LVDS_YAP2
{22} LVDS_YAM2
{27} LVDS_SEL
{22} LVDS_YAP1
{22} LVDS_YAM1
{22} LVDS_YAP0
{22} LVDS_YAM0
GND
VSS
VDD7
VDD
VSS8
TMDS2+
VDD6
TMDS2VSS7
VSS1
ATMDS2+
TMDS1+
ATMDS2TMDS1ATMDS1+
VDD1
ATMDS1SEL
ATMDS0+
VSS2
ATMDS0TMDS0+ ATMDSCLK+
TMDS0ATMDSCLKVSS3
VDD5
TMDSCLK+ BTMDS2+
TMDSCLKBTMDS2VDD2
BTMDS1+
VSS4
BTMDS1VDD3
BTMDS0+
VSS5
BTMDS0VDD4
BTMDSCLK+
VSS6
BTMDSCLK-
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
PCH_LVDS_CLKAP
PCH_LVDS_CLKAM
PCH_LVDS_YAP2
PCH_LVDS_YAM2
PCH_LVDS_YAP1
PCH_LVDS_YAM1
PCH_LVDS_YAP0
PCH_LVDS_YAM0
{26}
{26}
{26}
{26}
{26}
{26}
{26}
{26}
GPU_LVDS_CLKAP {20}
GPU_LVDS_CLKAM {20}
GPU_LVDS_YAP2 {20}
GPU_LVDS_YAM2 {20}
GPU_LVDS_YAP1 {20}
GPU_LVDS_YAM1 {20}
GPU_LVDS_YAP0 {20}
GPU_LVDS_YAM0 {20}
TS3DV421
PM
+V3.3S
+V3.3S
C
U27
{27} LVDS_DDC_SEL
IN1
{21} G_SMB_CLK
NO1
GND
{21} G_SMB_DATA
4
5
10
EDID_CLK
NC1
PCH_DDC_CLK
V+
NC2
COM2
COM1
NO2
IN2
{22}
{26}
PCH_DDC_DATA
EDID_DATA
U28
{21} GPU_LVDS_BKLTEN_R
{26}
{26} PCH_LVDS_BKLTEN
NO
IN
GND V+
NC COM
LVDS_BLT_SEL {27}
LVDS_BKLTEN {22}
ts5a3157
{22}
TS5A23157
PM
PM
+V3.3S
U29
{21} GPU_LVDS_VDDEN
{26} PCH_LVDS_VDDEN
NO
IN
GND V+
NC COM
LVDS_SEL_PCH
LVDS_VDDEN
{27}
{22}
ts5a3157
PM
{26}
{26}
{26}
{26}
{26}
{26}
{26}
{26}
RN4
RA0402_4
RN5
RA0402_4
RN6
RA0402_4
RN7
RA0402_4
PCH_LVDS_CLKAP
PCH_LVDS_CLKAM
PCH_LVDS_YAP2
PCH_LVDS_YAM2
PCH_LVDS_YAP1
PCH_LVDS_YAM1
PCH_LVDS_YAP0
PCH_LVDS_YAM0
{26} PCH_LVDS_VDDEN
1
3
1
3
1
3
1
3
2
4
2
4
2
4
2
4
R893
GM
R0402
R894
GM
R0402
0
GM
0
GM
0
GM
0
GM
LVDS_CLKAP
LVDS_CLKAM
LVDS_YAP2
LVDS_YAM2
LVDS_YAP1
LVDS_YAM1
LVDS_YAP0
LVDS_YAM0
{22}
{22}
{22}
{22}
{22}
{22}
{22}
{22}
LVDS_BKLTEN {22}
LVDS_VDDEN
{26} PCH_DDC_CLK
R891
GM
R0402
{26} PCH_DDC_DATA
R892
GM
R0402
{22}
EDID_CLK
{22}
EDID_DATA
{22}
TOPSTAR TECHNOLOGY
Joseph
Page Name
DDR2 Decoupling
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
16
59
5
+V3.3GPU
{20,21,36,38,55}
+VGA_CORE {50}
+V1.05GPU {18,19,20,55}
0
ns
+V3.3GPU
GR1
{42} EC_GPU_RST#
BUF_PLT_RST#
GC1
0.1uF/10V,X7R
ns
GU1
+V1.05GPU
GR2 is used for test only, so it

can be unstuff for cost saving.
VCC
GPU_RST#
4
2
SN74AHC1G08DBV
SOT23_5
PM
GR2
100K
PM
PCIE_CLKREQ
GR3
200,1%
{7} PEG_RXP[15..0]
{7} PEG_RXN[15..0]
{7} PEG_TXP[15..0]
{7} PEG_TXN[15..0]
PEG_RXN[15..0]
PEG_TXP15
GC14 0.1UF/10V,X7R
PEG_TXN15 GC17 0.1UF/10V,X7R
PEG_RXP15
PEG_RXN15
GC21 0.1UF/10V,X7R
PEG_TXP14
PEG_RXP14
PEG_RXN14
+V3.3GPU
PM
PEG_TXP13
GC22 0.1UF/10V,X7R
GR53
10K
PM
S_Top
EC_GPU_RST#
GR4
10K
PM
PCIE_CLKREQ
PEG_RXP13
PEG_RXN13
PM
PEG_TXP9
PEG_TXN9
PEG_RXP9
PEG_RXN9
PEG_TXP8
PEG_TXN8
PEG_RXP8
PEG_RXN8
PEG_TXP7
PEG_TXN7
PEG_RXP7
PEG_RXN7
PEG_TXP6
PEG_TXN6
PEG_RXP6
PEG_RXN6
PEG_TXP5
PEG_TXN5
PEG_RXP5
PEG_RXN5
PEG_TXP4
PEG_TXN4
PEG_RXP4
PEG_RXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_RXP2
PEG_RXN2
PEG_TXP1
PEG_TXN1
PEG_RXP1
PEG_RXN1
PEG_TXP0
PEG_TXN0
PEG_RXP0
PEG_RXN0
PEX_TX1
PEX_TX1#
AN19
AP19
PEX_RX1
PEX_RX1#
AL19
AK19
PEX_TX2
PEX_TX2#
AR19
AR20
PEX_RX2
PEX_RX2#
AL20
AM20
PEX_TX3
PEX_TX3#
AP20
AN20
PEX_RX3
PEX_RX3#
AM21
AM22
PEX_TX4
PEX_TX4#
AN22
AP22
PEX_RX4
PEX_RX4#
AL22
AK22
PEX_TX5
PEX_TX5#
AR22
AR23
PEX_RX5
PEX_RX5#
AL23
AM23
PEX_TX6
PEX_TX6#
PM
PM
GC39 0.1UF/10V,X7R
GC42 0.1UF/10V,X7R
PM
PM
GC46 0.1UF/10V,X7R
GC47 0.1UF/10V,X7R
AP23
AN23
PEX_RX6
PEX_RX6#
AM24
AM25
PEX_TX7
PEX_TX7#
AN25
AP25
PEX_RX7
PEX_RX7#
AL25
AK25
PEX_TX8
PEX_TX8#
AR25
AR26
PEX_RX8
PEX_RX8#
AL26
AM26
PEX_TX9
PEX_TX9#
AP26
AN26
PEX_RX9
PEX_RX9#
AM27
AM28
PEX_TX10
PEX_TX10#
AN28
AP28
PEX_RX10
PEX_RX10#
PM
PM
GC51 0.1UF/10V,X7R
GC52 0.1UF/10V,X7R
PM
PM
GC53 0.1UF/10V,X7R
GC54 0.1UF/10V,X7R
PM
PM
GC58 0.1UF/10V,X7R
GC59 0.1UF/10V,X7R
PM
PM
GC60 0.1UF/10V,X7R
GC61 0.1UF/10V,X7R
AL28
AK28
PEX_TX11
PEX_TX11#
AR28
AR29
PEX_RX11
PEX_RX11#
AK29
AL29
PEX_TX12
PEX_TX12#
AP29
AN29
PEX_RX12
PEX_RX12#
AM29
AM30
PEX_TX13
PEX_TX13#
PM
PM
GC67 0.1UF/10V,X7R
GC68 0.1UF/10V,X7R
PEG_RXP3
PEG_RXN3
PEX_RX0
PEX_RX0#
PM
PM
PEG_TXP10
GC37 0.1UF/10V,X7R
PEG_RXP10
PEG_RXN10
AP17
AN17
AM18
AM19
PM
PM
PEG_TXP11
GC30 0.1UF/10V,X7R
PEG_RXP11
PEG_RXN11
PEX_TX0
PEX_TX0#
PM
PEG_TXP12
GC11 0.1UF/10V,X7R
PEG_RXP12
PEG_RXN12
AL17
AM17
PM
PM
GC69 0.1UF/10V,X7R
GC70 0.1UF/10V,X7R
PM
PM
GC74 0.1UF/10V,X7R
GC75 0.1UF/10V,X7R
AN31
AP31
PEX_RX13
PEX_RX13#
AM31
AM32
PEX_TX14
PEX_TX14#
AR31
AR32
PEX_RX14
PEX_RX14#
AN32
AP32
PEX_TX15
PEX_TX15#
AR34
AP34
PEX_RX15
PEX_RX15#
PM
PM
GC76 0.1UF/10V,X7R
GC77 0.1UF/10V,X7R
PM
PM
PCI_EXPRESS
PEX_IOVDD_01
PEX_IOVDD_02
PEX_IOVDD_03
PEX_IOVDD_04
PEX_IOVDD_05
AK16
AK17
AK21
AK24
AK27
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9
PEX_IOVDDQ_10
AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
PEX_IOVDDQ_11
PEX_IOVDDQ_12
PEX_IOVDDQ_13
PEX_IOVDDQ_14
PEX_IOVDDQ_15
PEX_IOVDDQ_16
PEX_IOVDDQ_17
PEX_IOVDDQ_18
PEX_IOVDDQ_19
PEX_IOVDDQ_20
PEX_IOVDDQ_21
PEX_IOVDDQ_22
PEX_IOVDDQ_23
PEX_IOVDDQ_24
PEX_IOVDDQ_25
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16
GC4
GC5
PM
PM
PM
PM
+VGA_CORE
GC15
GC16
0.1uF/10V,X7R
PM
GC18
GC13
PM
PM
PM
PM
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19
GC20
GC19
C0805
C0805
4.7uF/10V,X5R10uF/6.3V,X5R
PM
PM
+VGA_CORE
MAX:19.6A
Under GPU
Near GPU
GC24
GC12
GC25
GC27
GC28
C0402
C0603
0.047uF/16V,X7R
0.22uF/10V,X7R
1uF/10V,X5R
0.047uF/16V,X7R
0.22uF/10V,X7R
PM
A2
AA4
AB4
AB7
AC5
AD6
AF6
AG6
AJ5
AK15
AL7
E7
H32
M7
P6
U7
V6
Y4
PM
PM
PM
GC45
GC35
GC29
C0805
4.7uF/10V,X5R
PM
PM
GC36
C0402
C0402
0.022uF/16V,X7R
0.022uF/16V,X7R
0.022uF/16V,X7R
PM
PM
GC41
PM
GC43
PM
GC44
C0402
0.01uF/25V,X7R C0402
0.01uF/25V,X7R
0.01uF/25V,X7R
0.01uF/25V,X7R
PM
PM
PM
PM
GC48
GC49
GC50
C0402
4700pF/25V,X7R
0.01uF/25V,X7R
PM
PM
U3F
C0402
4700pF/25V,X7R
PM
VDD_001
VDD_002
VDD_003
VDD_004
VDD_005
VDD_006
VDD_007
VDD_008
VDD_009
VDD_010
VDD_011
VDD_012
VDD_013
VDD_014
VDD_015
VDD_016
VDD_017
VDD_018
VDD_019
VDD_020
VDD_021
VDD_022
VDD_023
VDD_024
VDD_025
VDD_026
VDD_027
VDD_028
VDD_029
VDD_030
VDD_031
VDD_032
VDD_033
VDD_034
VDD_035
VDD_036
VDD_037
VDD_038
VDD_039
VDD_040
VDD_041
VDD_042
VDD_043
VDD_044
VDD_045
VDD_046
VDD_047
VDD_048
VDD_049
VDD_050
VDD_051
VDD_052
VDD_053
VDD_054
VDD_055
VDD_056
GND
VDD_057
VDD_058
VDD_059
VDD_060
VDD_061
VDD_062
VDD_063
VDD_064
VDD_065
VDD_066
VDD_067
VDD_068
VDD_069
VDD_070
VDD_071
VDD_072
VDD_073
VDD_074
VDD_075
VDD_076
VDD_077
VDD_078
VDD_079
VDD_080
VDD_081
VDD_082
VDD_083
VDD_084
VDD_085
VDD_086
VDD_087
VDD_088
VDD_089
VDD_090
VDD_091
VDD_092
VDD_093
VDD_094
VDD_095
VDD_096
VDD_097
VDD_098
VDD_099
VDD_100
VDD_101
VDD_102
VDD_103
VDD_104
VDD_105
VDD_106
VDD_107
VDD_108
VDD_109
VDD_110
VDD_111
P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24
+V3.3GPU
MAX:120mA
Under GPU
GC56
GC57
C0603
C0805
1uF/10V,X7R 4.7uF/10V,X5R
0.1uF/10V,X7R
F7
AG19
PM
PM
NB10_G128
PM
Near GPU
GC55
PM
MAX:180mA
VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD_SENSE1
VDD_SENSE2
VDD_SENSE3
GND_SENSE1
GND_SENSE2
GND_SENSE3
PEX_PLLVDD
J10
J11
J12
J13
J9
D35
P7
AD20
AD19
R7
E35
AG14
GC63
GC64
0.1uF/10V,X7R
0.1uF/10V,X7R
PM
PM
S46 VerA:Delete some caps

followed N10M DG 090327
NVVDD_SENSE {50}
R57
+V1.05GPU
R0402
PM
Near GPU
MAX:120mA
GC71
GFB1
1
2 FB0603
120ohm@100MHz,500mA
GC72
GC73
C0805 PM
C0805
4.7uF/10V,X5R
4.7uF/10V,X5R
1uF/10V,X7R
C0603
PM
PM
T2
PM
ns
PEX_CAL_PU_GND/NC
AG20
PEX_TERMP
AG21
GR5
2.49K,1%
TESTMODE
AP35
GR6
10K R0402
ns
R0402 PM
+V3.3GPU
GR7 10K R0402

PM
S46 VerA:Add reserved pull up resistor

on TESTMODE follewed nvidia suggest
U3G
+VGA_CORE
NVVDD
GC9
C0805
4.7uF/10V,X5R
0.1uF/10V,X7R C0402
C0402
1uF/10V,X5R 1uF/10V,X5R
GC40
PEX_SVDD_3V3_1
PEX_SVDD_3V3_2
PM
+V1.05GPU
PEX_IOVDD+PEX_IOVDDQ:MAX:2200mA
Under GPU
Near GPU
PM
NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_14
NC_16
NC_17
NC_18
NC_21
NC_22
NC_23
GC8
C0805
10uF/6.3V,X5R
GC6
C0805
4.7uF/10V,X5R
0.1uF/10V,X7R C0402
C0402
1uF/10V,X5R 1uF/10V,X5R
GC32
GC33
C0402
0.047uF/16V,X7R
0.022uF/16V,X7R
NB10_G128
CLOSE
TO N11
Near GPU
GC3
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
PEX_REFCLK
PEX_REFCLK#
PM
+V3.3GPU
PEX_RST#
PEX_CLKREQ
AR16
AR17
PM
PM
PEG_TXP[15..0]
PEG_TXN[15..0]
AM16
AR13
R0402 AJ17
ns
AJ18
{24} PCIE_CLKREQ
{24} CLK_PCIE_N11M
{24} CLK_PCIE_N11M#
PEG_RXP[15..0]
Under GPU
U3A
GND
{8,27,34,35,37,39,41,42}
EC_GPU_RST#
Layout Notice
Under GPU:
The total trace length measured from GPU ball to cap is no more than 150 mil
Near GPU:
The total trace length measured from GPU ball to cap is no more than 750 mil
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA2
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AA5
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD11
AD13
AD15
AD17
AD2
AD21
AD23
AD25
AD31
AD34
AD5
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG31
AG34
AG5
AK2
AK31
AK34
AK5
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AL6
AL9
AN2
AN34
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP6
AP9
B12
B15
B21
B24
B27
B3
B30
B33
B6
B9
C2
C34
E12
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75
GND_76
GND_77
GND_78
GND_79
GND_80
GND_081
GND_082
GND_083
GND_084
GND_085
GND_086
GND_087
GND_088
GND_089
GND_090
GND_091
GND_092
GND_093
GND_094
GND_095
GND_096
GND_097
GND_098
GND_099
GND_100
GND_101
GND_102
GND_103
GND_104
GND_105
GND_106
GND_107
GND_108
GND_109
GND_110
GND_111
GND_112
GND_113
GND_114
GND_115
GND_116
GND_117
GND_118
GND_119
GND_120
GND_121
GND_122
GND_123
GND_124
GND_125
GND_126
GND_127
GND_128
GND_129
GND_130
GND_131
GND_132
GND_133
GND_134
GND_135
GND_136
GND_137
GND_138
GND_139
GND_140
GND_141
GND_142
GND_143
GND_144
GND_145
GND_146
GND_147
GND_148
GND_149
GND_150
GND_151
GND_152
GND_153
GND_154
GND_155
GND_156
GND_157
GND_158
GND_159
GND_160
GND_161
GND_162
GND_163
GND_164
GND_165
GND_166
GND_167
GND_168
GND_169
GND_170
GND_171
GND_172
GND_173
GND_174
GND_175
GND_176
GND_177
GND_178
GND_179
GND_180
GND_181
GND_182
GND_183
GND_184
GND_185
GND_186
GND_187
GND_188
GND_189
GND_190
GND_191
E15
E18
E24
E27
E30
E6
E9
F2
F31
F34
F5
J2
J31
J34
J5
L9
M11
M13
M15
M17
M19
M2
M21
M23
M25
M31
M34
M5
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R31
R34
R5
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V12
V14
V16
V18
V2
V20
V22
V24
V31
V5
V9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
NB10_G128
PM
PM
VerA: all PCIE singala lane reversal
llh0523
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
D
C48
Project Name
Rev
C
of
Date:
Sheet
17
59
5
MAX:5700mA
L32
N33
L33
N34
N35
P35
P33
P34
K35
K33
K34
H33
G34
G33
E34
E33
G31
F30
G30
G32
K30
K32
H30
K31
L31
L30
M32
N30
M30
P31
R32
R30
AG30
AG32
AH31
AF31
AF30
AE30
AC32
AD30
AN33
AL31
AM33
AL33
AK30
AK32
AJ30
AH30
AH33
AH35
AH34
AH32
AJ33
AL35
AM34
AM35
AF33
AE32
AF34
AE35
AE34
AE33
AB32
AC35
FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63
FBADQM_0
FBADQM_1
FBADQM_2
FBADQM_3
FBADQM_4
FBADQM_5
FBADQM_6
FBADQM_7
P32
H34
J30
P30
AF32
AL32
AL34
AF35
FBA_DQM0
FBA_DQM1
FBA_DQM2
FBA_DQM3
FBA_DQM4
FBA_DQM5
FBA_DQM6
FBA_DQM7
FBADQS_0
FBADQS_1
FBADQS_2
FBADQS_3
FBADQS_4
FBADQS_5
FBADQS_6
FBADQS_7
L34
H35
J32
N31
AE31
AJ32
AJ34
AC33
FBA_DQS_WP0
FBA_DQS_WP1
FBA_DQS_WP2
FBA_DQS_WP3
FBA_DQS_WP4
FBA_DQS_WP5
FBA_DQS_WP6
FBA_DQS_WP7
FBADQS_0#
L35
FBADQS_1# G35
FBADQS_2# H31
FBADQS_3# N32
FBADQS_4# AD32
FBADQS_5# AJ31
FBADQS_6# AJ35
FBADQS_7# AC34
FBA_DQS_RN0
FBA_DQS_RN1
FBA_DQS_RN2
FBA_DQS_RN3
FBA_DQS_RN4
FBA_DQS_RN5
FBA_DQS_RN6
FBA_DQS_RN7
P29
R29
L29
M29
AG29
AH29
AD29
AE29
+V1.5GPU
GR21
1K,1%
ns
J27
J23
J24
J29
AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
FBVDDQ0
FBVDDQ1
FBVDDQ2
FBVDDQ3
FBVDDQ4
FBVDDQ5
FBVDDQ6
FBVDDQ7
FBVDDQ8
FBVDDQ9
FBVDDQ10
FBVDDQ11
FBVDDQ12
FBVDDQ13
FBVDDQ14
FBVDDQ15
FBVDDQ16
FBVDDQ17
FBVDDQ18
FBVDDQ19
FBVDDQ20
FBVDDQ21
FBVDDQ22
FBVDDQ23
FBVDDQ24
FBVDDQ25
FBVDDQ26
FPA
V32
W31
U31
Y32
AB35
AB34
W35
W33
W30
T34
T35
AB31
Y30
Y34
W32
AA30
AA32
Y33
U32
Y31
U34
Y35
W34
V30
U35
U30
U33
AB30
AB33
T33
W29
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29/NC
FBA_CMD30/NC
Under GPU
Near GPU
GC80
PM
PM
PM
GC79
GC84
0.1uF/10V,X7R
0.047uF/16V,X7R
PM
PM
GC78
0.1uF/10V,X7R
PM
GC85
4.7uF/10V,X5R
PM
FBA_A4
FBA_RAS#
FBA_A5
FBA_BA1
FBB_A2
FBB_A4
FBB_A3
FBB_CKE
FBB_CS#
FBA_A11
FBA_CAS#
FBA_WE#
FBA_BA0
FBB_A5
FBA_A12
FBA_RST
FBA_A7
FBA_A10
FBA_CKE
FBA_A0
FBA_A9
FBA_A6
FBA_A2
FBA_A8
FBA_A3
FBA_A1
FBA_A13
FBA_BA2
FBB_ODT0
FBA_CS0#
FBA_ODT0
N1
R1
B2
K2
G7
K8
D9
N9
R9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
B1
D1
G1
E2
D8
E8
B9
F9
G9
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
FBB_VREF1
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
H1
M8
VREFDQ
VREFCA
D7
C3
C8
C2
A7
A2
B8
A3
B7
C7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU#
DQSU
FBAD_6
FBAD_1
FBAD_7
FBAD_4
FBAD_3
FBAD_0
FBAD_5
FBAD_2
FBADQS_0#
FBADQS_0
FBA_CLK0
T32
FBA_CLK0#
T31
AC31 FBA_CLK1
AC30 FBA_CLK1#
FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15/BA3
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
ODT0
ODT1
K1
J1
FBA_ODT0
CS0#
CS1#
L2
L1
FBA_CS0#
BA0
BA1
BA2
M2
N8
M3
FBA_BA0
FBA_BA1
FBA_BA2
RESET#
T2
FBA_RST
RAS#
CAS#
WE#
J3
K3
L3
FBA_RAS#
FBA_CAS#
FBA_WE#
DMU
DML
D3
E7
FBADQM_0
FBADQM_3
CK
CK#
J7
K7
FBA_CLK0
FBA_CLK0#
CKE0
CKE1
K9
J9
FBA_CKE
ZQ0
ZQ1
L8
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL#
DQSL
E3
F7
F2
F8
H3
H8
G2
H7
G3
F3
U22
T132
T30
FBA_DEBUG
ns
MAX:100mA
Near GPU
GC89
FB_DLLAVDD0
AG27
FB_PLLAVDD0
AF27
PM
+V1.05GPU
GFB2
120ohm@100MHz,500mA
1
2
PM
FB0603
GC90
1uF/10V,X5R
4.7uF/10V,X5R
C0805
PM
FBB_VREF3
GC103
GC104
1000pF/25V,X7R
1000pF/25V,X7R
0.01uF/16V,X7R
PM
PM
PM
GC109
GC110
GC111
1000pF/25V,X7R
0.01uF/16V,X7R
0.1uF/10V,X7R
0.1uF/10V,X7R
PM
GC105
C0603
1uF/10V,X7R
PM
GC106
C0603
1uF/10V,X7R
PM
GC107
C0805
4.7uF/10V,X5R
PM
PM
GC112
C0603
1uF/10V,X7R
PM
GC113
C0603
1uF/10V,X7R
PM
A1
C1
F1
D2
H2
A8
C9
E9
H9
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
N1
R1
B2
K2
G7
K8
D9
N9
R9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
B1
D1
G1
E2
D8
E8
B9
F9
G9
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
H1
M8
VREFDQ
VREFCA
FBA_CKE
FBA_RST
GC114
C0805
4.7uF/10V,X5R
GR17
10K
PM
GR18
10K
PM
GR19
10K
PM
D7
C3
C8
C2
A7
A2
B8
A3
B7
C7
PM
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
GR20
1K,1%
PM
GC91
0.01uF/16V,X7R
PM
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
+V1.5GPU
GR12
1K,1%
PM
FBAD_25
FBAD_27
FBAD_28
FBAD_29
FBAD_26
FBAD_30
FBAD_24
FBAD_31
FBADQS_3#
FBADQS_3
GR61
243,1%
PM
FBB_VREF2
H1
M8
VREFDQ
VREFCA
D7
C3
C8
C2
A7
A2
B8
A3
B7
C7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU#
DQSU
FBAD_13
FBAD_11
FBAD_14
FBAD_8
FBAD_12
FBAD_10
FBAD_15
FBAD_9
FBADQS_1#
FBADQS_1
FBB_VREF1
GR13
1K,1%
PM
GC88
0.01uF/16V,X7R
PM
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_A0
FBA_A1
FBA_A2
FBA_A3
FBA_A4
FBA_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
ODT0
ODT1
K1
J1
FBA_ODT0
CS0#
CS1#
L2
L1
FBA_CS0#
BA0
BA1
BA2
M2
N8
M3
FBA_BA0
FBA_BA1
FBA_BA2
RESET#
T2
FBA_RST
RAS#
CAS#
WE#
J3
K3
L3
FBA_RAS#
FBA_CAS#
FBA_WE#
DMU
DML
D3
E7
FBADQM_1
FBADQM_2
CK
CK#
J7
K7
FBA_CLK0
FBA_CLK0#
CKE0
CKE1
K9
J9
FBA_CKE
ZQ0
ZQ1
L8
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL#
DQSL
E3
F7
F2
F8
H3
H8
G2
H7
G3
F3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15/BA3
FBAD_23
FBAD_19
FBAD_20
FBAD_16
FBAD_22
FBAD_17
FBAD_21
FBAD_18
FBADQS_2#
FBADQS_2
GR62
243,1%
PM
DDR3
PM
+V1.5GPU
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15/BA3
FBA_A0
FBA_A1
FBB_A2
FBB_A3
FBB_A4
FBB_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
ODT0
ODT1
K1
J1
FBB_ODT0
CS0#
CS1#
L2
L1
FBB_CS#
BA0
BA1
BA2
M2
N8
M3
FBA_BA0
FBA_BA1
FBA_BA2
RESET#
T2
FBA_RST
RAS#
CAS#
WE#
J3
K3
L3
FBA_RAS#
FBA_CAS#
FBA_WE#
DMU
DML
D3
E7
FBADQM_7
FBADQM_4
CK
CK#
J7
K7
FBA_CLK1
FBA_CLK1#
CKE0
CKE1
K9
J9
FBB_CKE
ZQ0
ZQ1
L8
L9
U24
+V1.5GPU
+V1.5GPU
GR64
1K,1%
PM
GR66
1K,1%
PM
FBB_VREF3
GR69
1K,1%
PM
GC176
0.01uF/16V,X7R
PM
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU#
DQSU
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL#
DQSL
E3
F7
F2
F8
H3
H8
G2
H7
G3
F3
FBAD_32
FBAD_36
FBAD_33
FBAD_37
FBAD_35
FBAD_39
FBAD_34
FBAD_38
FBADQS_4#
FBADQS_4
A1
C1
F1
D2
H2
A8
C9
E9
H9
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
N1
R1
B2
K2
G7
K8
D9
N9
R9
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
B1
D1
G1
E2
D8
E8
B9
F9
G9
VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
E1
M1
P1
T1
J2
B3
G8
J8
A9
M9
P9
T9
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
H1
M8
VREFDQ
VREFCA
D7
C3
C8
C2
A7
A2
B8
A3
B7
C7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU#
DQSU
FBB_VREF4
GR70
1K,1%
PM
GC177
0.01uF/16V,X7R
PM
GR67
243,1%
PM
FBAD_48
FBAD_52
FBAD_50
FBAD_54
FBAD_51
FBAD_55
FBAD_49
FBAD_53
FBADQS_6#
FBADQS_6
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7
FBA_A0
FBA_A1
FBB_A2
FBB_A3
FBB_A4
FBB_A5
FBA_A6
FBA_A7
FBA_A8
FBA_A9
FBA_A10
FBA_A11
FBA_A12
FBA_A13
ODT0
ODT1
K1
J1
FBB_ODT0
CS0#
CS1#
L2
L1
FBB_CS#
BA0
BA1
BA2
M2
N8
M3
FBA_BA0
FBA_BA1
FBA_BA2
RESET#
T2
FBA_RST
RAS#
CAS#
WE#
J3
K3
L3
FBA_RAS#
FBA_CAS#
FBA_WE#
DMU
DML
D3
E7
CK
CK#
J7
K7
FBA_CLK1
FBA_CLK1#
CKE0
CKE1
K9
J9
FBB_CKE
ZQ0
ZQ1
L8
L9
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQSL#
DQSL
E3
F7
F2
F8
H3
H8
G2
H7
G3
F3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15/BA3
FBADQM_6
FBADQM_5
FBAD_47
FBAD_43
FBAD_46
FBAD_41
FBAD_45
FBAD_42
FBAD_44
FBAD_40
FBADQS_5#
FBADQS_5
GR68
243,1%
PM
DDR3
PM
GC115
GC116
1000pF/25V,X7R
GC117
1000pF/25V,X7R
PM
GC118
0.01uF/16V,X7R
PM
GC119
0.1uF/10V,X7R
GC120
1uF/10V,X7R
C0603
PM
PM
GC121
1uF/10V,X7R
C0603
PM
4.7uF/10V,X5R
C0805
PM
FBB_ODT0
GR15
10K
PM
+V1.5GPU
FBA_CLK1
GC93
150UF/2.5V
CT7343_28
ns
GR234
243,1%
PM
FBA_CLK0#
B1
D1
G1
E2
D8
E8
B9
F9
G9
FBB_VREF2
DDR3
PM
PM
FBA_CLK0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
GR16
1K,1%
PM
+V1.5GPU
N1
R1
B2
K2
G7
K8
D9
N9
R9
+V1.5GPU
FBB_VREF4
FBAD_60
FBAD_59
FBAD_61
FBAD_56
FBAD_63
FBAD_58
FBAD_62
FBAD_57
FBADQS_7#
FBADQS_7
PM
+V1.5GPU
GR14
10K
PM
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
FBB_CKE
U23
FB_VREF
FBA_ODT0
A1
C1
F1
D2
H2
A8
C9
E9
H9
+V1.5GPU
FBA_WDS0/NC
FBA_WDS0#/NC
FBA_WDS1/NC
FBA_WDS1#/NC
FBA_WDS2/NC
FBA_WDS2#/NC
FBA_WDS3/NC
FBA_WDS3#/NC
PM
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
DDR3
PM
GC102
PM
A1
C1
F1
D2
H2
A8
C9
E9
H9
PM
GC108
{19,55}
U21
GC82
4.7uF/10V,X5R
0.1uF/10V,X7R
+V1.5GPU
1000pF/25V,X7R
+V1.5GPU
+V1.5GPU
GC81
0.1uF/10V,X7R
0.047uF/16V,X7R
GC92
0.01uF/16V,X7R
ns
GC101
{17,19,20,55}
+V1.5GPU
GC86
NB10_G128
PM
GR22
2.49K,1%
ns
+V1.05GPU
+V1.5GPU
U3B
FBAD_0
FBAD_1
FBAD_2
FBAD_3
FBAD_4
FBAD_5
FBAD_6
FBAD_7
FBAD_8
FBAD_9
FBAD_10
FBAD_11
FBAD_12
FBAD_13
FBAD_14
FBAD_15
FBAD_16
FBAD_17
FBAD_18
FBAD_19
FBAD_20
FBAD_21
FBAD_22
FBAD_23
FBAD_24
FBAD_25
FBAD_26
FBAD_27
FBAD_28
FBAD_29
FBAD_30
FBAD_31
FBAD_32
FBAD_33
FBAD_34
FBAD_35
FBAD_36
FBAD_37
FBAD_38
FBAD_39
FBAD_40
FBAD_41
FBAD_42
FBAD_43
FBAD_44
FBAD_45
FBAD_46
FBAD_47
FBAD_48
FBAD_49
FBAD_50
FBAD_51
FBAD_52
FBAD_53
FBAD_54
FBAD_55
FBAD_56
FBAD_57
FBAD_58
FBAD_59
FBAD_60
FBAD_61
FBAD_62
FBAD_63
GC94
GC95
1000pF/25V,X7R
PM
PM
GC96
1000pF/25V,X7R
PM
GC97
0.01uF/16V,X7R
PM
GC98
0.1uF/10V,X7R
PM
GC99
1uF/10V,X7R
C0603
PM
GC100
4.7uF/10V,X5R
C0805
1uF/10V,X7R
C0603
PM
GR235
243,1%
PM
FBA_CLK1#
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M memory1
Size
D
C48
Project Name
Rev
C
of
Date:
Sheet
18
59
5
+V1.5GPU
U3C
Under GPU
B13
D13
A13
A14
C16
B16
A17
D16
C13
B11
C11
A11
C10
C8
B8
A8
E8
F8
F10
F9
F12
D8
D11
E11
D12
E13
F13
F14
F15
E16
F16
F17
D29
F27
F28
E28
D26
F25
D24
E25
E32
F32
D33
E31
C33
F29
D30
E29
B29
C31
C29
B31
C32
B32
B35
B34
A29
B28
A28
C28
C26
D25
B25
A25
FBC_D0
FBC_D1
FBC_D2
FBC_D3
FBC_D4
FBC_D5
FBC_D6
FBC_D7
FBC_D8
FBC_D9
FBC_D10
FBC_D11
FBC_D12
FBC_D13
FBC_D14
FBC_D15
FBC_D16
FBC_D17
FBC_D18
FBC_D19
FBC_D20
FBC_D21
FBC_D22
FBC_D23
FBC_D24
FBC_D25
FBC_D26
FBC_D27
FBC_D28
FBC_D29
FBC_D30
FBC_D31
FBC_D32
FBC_D33
FBC_D34
FBC_D35
FBC_D36
FBC_D37
FBC_D38
FBC_D39
FBC_D40
FBC_D41
FBC_D42
FBC_D43
FBC_D44
FBC_D45
FBC_D46
FBC_D47
FBC_D48
FBC_D49
FBC_D50
FBC_D51
FBC_D52
FBC_D53
FBC_D54
FBC_D55
FBC_D56
FBC_D57
FBC_D58
FBC_D59
FBC_D60
FBC_D61
FBC_D62
FBC_D63
A16
D10
F11
D15
D27
D34
A34
D28
FBC_DQM0
FBC_DQM1
FBC_DQM2
FBC_DQM3
FBC_DQM4
FBC_DQM5
FBC_DQM6
FBC_DQM7
C14
A10
E10
D14
E26
D32
A32
B26
FBC_DQS_WP0
FBC_DQS_WP1
FBC_DQS_WP2
FBC_DQS_WP3
FBC_DQS_WP4
FBC_DQS_WP5
FBC_DQS_WP6
FBC_DQS_WP7
B14
B10
D9
E14
F26
D31
A31
A26
FBC_DQS_RN0
FBC_DQS_RN1
FBC_DQS_RN2
FBC_DQS_RN3
FBC_DQS_RN4
FBC_DQS_RN5
FBC_DQS_RN6
FBC_DQS_RN7
G14
G15
G11
G12
G27
G28
G24
G25
FBC_WDS0/NC
FBC_WDS0#/NC
FBC_WDS1/NC
FBC_WDS1#/NC
FBC_WDS2/NC
FBC_WDS2#/NC
FBC_WDS3/NC
FBC_WDS3#/NC
FPC
FBVDDQ27
FBVDDQ28
FBVDDQ29
FBVDDQ30
FBVDDQ31
FBVDDQ32
FBVDDQ33
FBVDDQ34
FBVDDQ35
FBVDDQ36
FBVDDQ37
N27
P27
R27
T27
U27
U29
V27
V29
V34
W27
Y27
Near GPU
GC123
GC122
0.01uF/25V,X7R
PM
{17,18,20,55}
+V1.5GPU
{18,55}
GC124
0.047uF/16V,X7R
PM
+V1.05GPU
0.1uF/10V,X7R
PM
GC125
4.7uF/10V,X5R
PM
D
GC126
0.01uF/25V,X7R
GC127
0.047uF/16V,X7R
PM
PM
GC128
0.1uF/10V,X7R
PM
GC129
4.7uF/10V,X5R
PM
FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28
FBC_CMD29/NC
FBC_CMD30/NC
C17
B19
D18
F21
A23
D21
B23
E20
G21
F20
F19
F23
A22
C22
B17
F24
C25
E22
C20
B22
A19
D22
D20
E19
D19
F18
C19
F22
C23
B20
A20
FBC_CLK0
FBC_CLK0#
FBC_CLK1
FBC_CLK1#
E17
D17
D23
E23
+V1.5GPU
MAX:35mA
GC130
FBC_DEBUG
FB_DLLAVDD1
FB_PLLAVDD1
G19 GR23
60.4,1%
R0402
ns
0.1uF/10V,X7R
ns
GC131
0.1uF/10V,X7R
ns
+V1.05GPU
GFB3
120ohm@100MHz,500mA
1
2
FB0603
GC132
ns
C0805
10UF/6.3V,X5R
ns
J19
J18
+V1.5GPU
Place close to balls

FBCAL_PD_VDDQ
K27 GR34
PM
40.2,1%
R0402
FBCAL_PU_GND
L27 GR35
PM
40.2,1%
R0402
FBCAL_TERM_GND
M27 GR26
PM
40.2,1%
R0402
40.2 in DG
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M memory2
Size
A3
C48
Project Name
Rev
C

19
59
Date:
Sheet
of
NB10_G128
PM
+V3.3GPU
+V1.05GPU
+V1.8GPU
{17,21,36,38,55}
{17,18,19,55}
{55}
+V3.3GPU
R60
4.99K,1%
R0402
ns
R61
34.8K,1%
R0402
PM
R62
2.2K
R0402
ns
GU4
+V3.3GPU
ROM_SI_GPU
ROM_SCLK_GPU
GR27
PM
10K
GR29
PM
10K
ROM_SI_GPU
ROM_SCLK_GPU
ROM_CS#_GPU
ROM_SO_GPU
R64
10K,1%
PM
R65
15K,1%
R0402
ns
R66
15K,1%
R0402
PM
HOLD
8
GR28
10K
ns
Rom_SI: -Hynix 32Mx32 (pull-down 15K)

-Samsung 32MX32 (pull-down 20K)
VCC
U3D
ROM_SO_GPU
1K is not-stuffed in DG V02
ns
+V3.3GPU ns
T8
T9
R70
VSS
10K R0402
AK9
AJ11
IFPA_IOVDD
IFPB_IOVDD
AG9
AG10
IFPA_TXC#
IFPA_TXC
AM12
AM11
GPU_LVDS_CLKAM {16}
GPU_LVDS_CLKAP {16}
IFPA_TXD0#
IFPA_TXD0
AL8
AM8
GPU_LVDS_YAM0 {16}
GPU_LVDS_YAP0 {16}
IFPA_TXD1#
IFPA_TXD1
AM9
AM10
GPU_LVDS_YAM1 {16}
GPU_LVDS_YAP1 {16}
IFPA_TXD2#
IFPA_TXD2
AL10
AK10
GPU_LVDS_YAM2 {16}
GPU_LVDS_YAP2 {16}
IFPA_TXD3#
IFPA_TXD3
AL11
AK11
ROM_CS#
ROM_SI
ROM_SO
ROM_SCLK
IFPB_TXC#
IFPB_TXC
AN13
AP13
IFPB_TXD4#
IFPB_TXD4
AP8
AN8
IFPB_TXD5#
IFPB_TXD5
AN10
AP10
J26
J25
NC_19
NC_20
AB5
CEC
D7
D6
C7
B7
A7
RFU1
RFU2
RFU3
RFU4
RFU5
PM
PM25LV010A
PM
R67
10K
ns
R0402
GC135
0.1UF/10V,X7R
PM
MISC
IFPAB
PM
R68
40.2K,1%
R0402
R69
40.2K,1%
R0402
S46P VerB:Change R550 from 15k to 35k to

enable external VBIOS ROM 090522
N9
MULTI_STRAP_REFO_GND
M9
MULTI_STRAP_REF1_GND
FB4
1
PM
120ohm@100MHz,500mA
2
FB0603
MAX:60+45 mA
T39
F6
I2CH_SCL
ns
T40
G6
I2CH_SDA
IFPB_TXD6#
IFPB_TXD6
AR10
AR11
ns
T10
A5
SPDIF
IFPB_TXD7#
IFPB_TXD7
AP11
AN11
PLLVDD
GC147
GC148
GC149
GC150
C0805
1uF/10V,X5R 0.1UF/10V,X7R 0.1UF/10V,X7R
4.7uF/10V,X5R C0402
PM
PM
PM
PM
Near GPU
Under GPU
C3
D3
C4
D4
ns
+V1.05GPU
ns
T11
A4
ns
T12
C5
R76
0
R0402
ns
R71
ns
MAX:220 mA
IFPAB_PLLVDD
AK14
K9
PM
IFPAB_IOVDD
MAX:220 mA
GC136
GC137
0.1uF/10V,X7R
C0402
100,1%ns
0.1uF/10V,X7R
C0402
Under GPU
PM
+V1.8GPU
2
1 GFB5
FB0603
120ohm@100MHz,500mA GC140
GC138
GC139 PM
C0805
1uF/10V,X5R C0805
4.7uF/10V,X5R
C0402
4.7uF/10V,X5R
Near GPU
PM
PM
PM
PM
+V3.3GPU
MAX:220 mA
IFPCD_PLLVDD
1
GC142
0.1uF/10V,X7R
C0402
PM/HDMI
R73
GC143
0.1uF/10V,X7R
C0402
PM/HDMI
GC144
0.1uF/10V,X7R
C0402
PM/HDMI
GC145
1uF/10V,X5R
C0402
PM/HDMI
RFU
IFPC_PLLVDD
IFPC_RSET
IFPC_IOVDD
IFPD_IOVDD
IFPD_PLLVDD
IFPD_RSET
GND_192
GND_193
GFB6
2
120ohm@100MHz,500mA
FB0603
PM/HDMI
GC146
C0805
4.7uF/10V,X5R
PM/HDMI
100,1%ns
+V1.05GPU
MAX:285 mA
IFPCD_IOVDD
1
2 GFB7
FB0603
GC153
120ohm@100MHz,500mA
C0805
PM/HDMI
4.7uF/10V,X5R
PM/HDMI
BUFRST#
AJ9
AK7
AJ8
AK8
AC6
AB6
+V1.05GPU
GFB4
FB0603
120ohm@100MHz,500mA
PM
GC133
GC134
1uF/10V,X5R C0805
C0402
4.7uF/10V,X5R
PM
PM
ROM_CS#_GPU
ROM_SI_GPU
ROM_SO_GPU
ROM_SCLK_GPU
IFPAB_PLLVDD
R63
1K,1%
R0402
IFPAB_IOVDD
IFPAB_PLLVDD
IFPAB_RSET
IFPCD_PLLVDD
R75
1K,1%
PM/HDMI
IFPCD_IOVDD
IFPCD_PLLVDD
R77
1K,1%
PM/HDMI
GC151
0.1uF/10V,X7R
C0402
PM/HDMI
GC152
0.1uF/10V,X7R
C0402
PM/HDMI
GC154
1uF/10V,X5R
C0402
PM/HDMI
Under GPU
Near GPU
+V1.05GPU
PM
GR228
PM
{6} 27M_nonSSC
PMNear
GR227
10K
33
27M_nonSSC_GPU
GR236
10K
PM
GPU PM
GFB8
120ohm@100MHz,500mA
FB0603
PM
SP_PLLVDD
XTALOUTBUFF_T12
GC157
0.1UF/10V,X7R
27M_nonSSC_GPU
PM
AE9
AD9
AF9
D2
B1
PLLVDD
VID_PLLVDD
SP_PLLVDD
XTAL_SSIN
IFPC_AUX#
IFPC_AUX
XTAL_PLL
XTAL_IN
IFPCD
MAX:120mA
ns
T181
D1
XTAL_OUTBUFF
ns
T182
B2
XTAL_OUT
GC160
GC161
GC164
GC163
4.7UF/10V,X5R 1uF/10V,X5R GC162
470pF/25V,X7R
0.1UF/10V,X7R4700PF/25V,X7R
C0805
C0402
AJ12
GC165 0.1UF/10V,X7R
AK12
PM
PM
PM
PM
PM
R80
PM
AK13
R0402
124,1%
PM
Near GPU
Under GPU
R81
33 R0402 PM
G1
{38} CRT_DDC_CLK
R82
33 R0402 PM
G4
{38} CRT_DDC_DATA
{38} CRT_HSYNC
{38} CRT_VSYNC
AM13
AL13
{38}
CRT_RED
{38} CRT_GREEN
{38}
CRT_BLUE
AM15
AM14
AL14
DACA_VDD
DACA_VREF
DACA_RSET
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA
DACA_RED
DACA_GREEN
DACA_BLUE
AN3
AP2
R0402 PM/HDMI
R0402 PM/HDMI
HDMI_DDC_DATA {36}
HDMI_DDC_CLK {36}
IFPC_L3#
IFPC_L3
PM/HDMI
C158 0.1uF/10V,X7R
AR2 IFPC_TXC#_R
PM/HDMI
C159 0.1uF/10V,X7R
AP1 IFPC_TXC_R
IFPC_TXC#
IFPC_TXC
{36}
{36}
IFPC_L2#
IFPC_L2
PM/HDMI
C160 0.1uF/10V,X7R
AM4 IFPC_TXD0N_R
PM/HDMI
C161 0.1uF/10V,X7R
AM3 IFPC_TXD0P_R
IFPC_TXD0N
IFPC_TXD0P
{36}
{36}
IFPC_L1#
IFPC_L1
PM/HDMI
C162 0.1uF/10V,X7R
AM5 IFPC_TXD1N_R
PM/HDMI
C163 0.1uF/10V,X7R
AL5 IFPC_TXD1P_R
IFPC_TXD1N
IFPC_TXD1P
{36}
{36}
IFPC_L0#
IFPC_L0
PM/HDMI
C164 0.1uF/10V,X7R
AM6 IFPC_TXD2N_R
PM/HDMI
C165 0.1uF/10V,X7R
AM7 IFPC_TXD2P_R
IFPC_TXD2N
IFPC_TXD2P
{36}
{36}
IFPD_AUX#
IFPD_AUX
AN4
AP4
IFPD_L3#
IFPD_L3
AR4
AR5
IFPD_L2#
IFPD_L2
AP5
AN5
IFPD_L1#
IFPD_L1
AN7
AP7
IFPD_L0#
IFPD_L0
AR7
AR8
DACB_VDD
DACB_VREF
DACB_RSET
AG7
AK6
AH7
I2CB_SCL
DACC
I2CB_SDA
DACB_HSYNC
DACB_VSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
G3
G2
AM1
AM2
AK4
AL4
AJ4
IFPC_TXC#_R
IFPC_TXC_R
IFPC_TXD0N_R
IFPC_TXD0P_R
IFPC_TXD1N_R
IFPC_TXD1P_R
IFPC_TXD2N_R
IFPC_TXD2P_R
R92
R83
R84
R85
R86
R87
R88
R90
R91
499,1%
499,1%
499,1%
499,1%
499,1%
499,1%
499,1%
499,1%
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM/HDMI
PM
+V3.3GPU
27M_SSC
XTALOUTBUFF_T12
{6}
33
GR226
120ohm@100MHz,500mA MAX:45mA
2
FB0603
GC155
GC156
C0805
1uF/10V,X5R
4.7uF/10V,X5R C0402
33
33
\
O
J
Q
R
U

Z

V
L

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7
N
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Q
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O

G
Q
W
D
F
H
U
.
/
U
&F
R
B
&

'
R
'
W
B

,
P
0
H
'W
K
+

%
S
U
D
H
Z
9
V

N
3

Q

L
6
O
FB5
1
PM
R78
R79
Q3
BSS138
SOT23
PM/HDMI
+V3.3GPU
R89
PM/HDMI 10K
PLLVDD
10K R0402
PM
+V3.3GPU
TBD
150,1%
150,1%
150,1%
GR38
PM
GR41
PM
GR43
PM
CRT_RED
CRT_GREEN
CRT_BLUE
Place close to balls

A
R93
R94
2.2K R0402
2.2K R0402
PM
PM
NB10_G128
PM
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M IO_1
Size Project Name

Custom
C48
Rev
C
Date:
Sheet
of
20
59
5
+V3.3GPU
U3E
R96
PM
R95
PM
10K R0402
10K R0402
AJ6
AL1
AE7
AD7
IFPEF_PLLVDD
IFPEF_RSET
IFPE_IOVDD
IFPF_IOVDD
AD4
AE4
IFPE_AUX#
IFPE_AUX
AE5
AE6
IFPE_L3#
IFPE_L3
AF5
AF4
IFPE_L2#
IFPE_L2
AG4
AH4
IFPE_L1#
IFPE_L1
AH5
AH6
IFPE_L0#
IFPE_L0
AF2
AF3
IFPF_AUX#
IFPF_AUX
AH3
AH2
IFPF_L2#
IFPF_L2
AJ2
AJ3
IFPF_L1#
IFPF_L1
+V3.3GPU
C166
0.1uF/10V,X5R
C0402
ns T13
PM
C
MIOB_VDDQ1
MIOB_VDDQ2
MIOB_VDDQ3
MIOB_VDDQ4
AA7
MIOB_CAL_PD_VDDQ
ns
T14
AA6
MIOB_CAL_PU_GND
ns
T15
AF1
MIOB_VREF
Y1
Y2
Y3
AB3
AB2
AB1
AC4
AC1
AC2
AC3
AE3
AE2
U6
W6
Y6
W5
W7
V7
MIOB_D0
MIOB_D1
MIOB_D2
MIOB_D3
MIOB_D4
MIOB_D5
MIOB_D6
MIOB_D7
MIOB_D8
MIOB_D9
MIOB_D10
MIOB_D11
MIOB_D12/NC
MIOB_D13/NC
MIOB_D14/NC
STRAP0
STRAP1
STRAP2
W3
W1
W2
Y5
MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE
V4
W4
MIOB_CLKOUT
MIOB_CLKOUT#
+V3.3GPU
R107
45.3K,1%
R0402
PM
STRAP0_GPU
STRAP1_GPU
STRAP2_GPU
R114
30.1K,1%
R0402
PM
R115
34.8K,1%
R0402
ns
R117
15K,1%
R0402
ns
R122 10K
PM
+V3.3GPU
S46P VerB:Ns R579,stuff

R562 and change R562 to 35k
followed nvidia PUN 090619
R0402
C167
0.1uF/10V,X5R
C0402
PM
AE1
P9
R9
T9
U9
MIOA_D0
MIOA_D1
MIOA_D2
MIOA_D3
MIOA_D4
MIOA_D5
MIOA
MIOA_D6
MIOA_D7
MIOA_D8
MIOA_D9
MIOA_D10
MIOA_D11
MIOA_D12/NC
MIOA_D13/NC
MIOA_D14/NC
N1
P4
P1
P2
P3
T3
T2
T1
U4
U1
U2
U3
R6
T6
N6
MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE
P5
N3
L3
N2
MIOA_CLKOUT
MIOA_CLKOUT#
R4
T4
MIOA_CLKIN
N4
R97
PM
10K
R0402
MIOB
THERMDN
B4
THERMDP
B5
U5
T5
MIOA_CAL_PD_VDDQ
MIOA_CAL_PU_GND
ns
T19
N5
MIOA_VREF
Action
GPIO
no using , PD 10K
GPIO1
HPD-C
connect to HDMI conn with level shifter
GPIO2
Panel backlight brightness
reserved associated with EC PWM , then connect to LVDS conn
GPIO3
Panel Power enable , active high
connect LCDVDD_ON
GPIO4
Panel backlight On , active high
connect LCDVDD backlight on
GPIO5
GPU vid0
Reserved routing to GPU power controller
GPIO6
GPU vid1
GPIO7
GPU vid2
no using , reserved 10K PU V3.3S
GPIO8
Thermal trip of GPU , active low
Connect to Hardware shut down circuit , parallel with CPU thermaltrip , 10K PU V3.3S
, reserved PD 10K
Reserved routing to GPU power controller
DDR3
GPIO9
Thermal alert input
connect to thermal sensor IC alert with 10K PU V3.3S
GPIO10
Memory Vref switch
no using , NC
GPIO11
SLI_SYNC , host GPU output , slave input
No using , PD 10K followed DEMO
GPIO12
PWR_LEVEL
no using , 10K PU V3.3S followed DEMO
GPIO13
Dynamic NVVDD control 0
no using , NC
GPIO14
Dynamic NVVDD control 0
no using , NC
GPIO15
HPD-E
no using , PD 10K
GPIO16
FAN_PWM
no using , PD 10K
GPIO17
Reserved
no using , PD 10K
GPIO18
Reserved
no using , PD 10K
GPIO19
HPD_D
no using , PD 10K
GPIO20
Reserved
no using , PD 10K
GPIO21
HPD-F
no using , PD 10K
GPIO22
SWAPRDY
10K PU V3.3S
GPIO23
GPIO
no using , NC
AP14
AR14
AN14
AN16
AP16
ns
ns
ns
R98
R99
R100
10K R0402
10K R0402
10K R0402
ns
R101
1K
+V3.3GPU
T16
R0402
ns
+V3.3GPU
MISC1
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CC_SDA
RFU_1
RFU_2
RFU_3
RFU_4
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
GPIO21
GPIO22
GPIO23
MIOA_VDDQ1
MIOA_VDDQ2
MIOA_VDDQ3
MIOA_VDDQ4
T17
T18
FUNC
GPIO0
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#
MIOB_CLKIN
ns
ns
ITEM
IFPF_L0#
IFPF_L0
AA9
AB9
W9
Y9
N10M-GS:0xA74(strap2 pull-down 25K, rom_sclk pull-up 15K)

N10M-GE:0xA68(strap2 pull-up 5K, rom_sclk pull-down 15K)
R106
34.8K,1%
R0402
PM
IFPEF
IFPF_L3#
IFPF_L3
AH1
AJ1
AL3
AL2
R105
4.99K,1%
R0402
ns
{17,20,36,38,55}
E2
E1
E3
E4
F4
G5
D5
E5
K1
K2
K3
H3
H2
H1
H4
H5
H6
J7
K4
K5
H7
J4
J6
L1
L2
L4
M4
L7
L5
K6
L6
M6
R102 2.2K
R103 2.2K
PM
PM
R0402
R0402
R109 33 R0402
R110 33 R0402
PMI2CD_SCL_GPU
PMI2CD_SDA_GPU
G_SMB_CLK
{16}
G_SMB_DATA {16}
+V3.3GPU
GPIO0_GPU
GPU_LVDS_BKLTCTL
GPU_VID2
GPU_OVT#
THER_ALERT#
SLI_SYNC
PWR_LEVEL ns
GPU_HDMI_HPD {36,42}
GPU_LVDS_BKLTCTL {22}
GPU_LVDS_VDDEN {16}
GPU_LVDS_BKLTEN
GPU_VID0
{50}
GPU_VID1
{50}
GPU_OVT#
R124
33
G_SMB_CLK
G_SMB_DATA
I2CD_SCL_GPU
I2CD_SDA_GPU
GPU_VID2
GPU_OVT#
SLI_SWAPRDY
R111
R112
R113
R116
R118
R119
R120
2.2K
2.2K
2.2K
2.2K
10K
10K
10K
R0402
R0402
R0402
R0402
R0402
R0402
R0402
PM
PM
ns
ns
ns
PM
ns
PWR_LEVEL
R121
10K
R0402
ns
{34}
R0402
AC_IN
{42,44}
HPD_E_GPU
GPU_FAN_PWM
GPU_GPIO17
GPU_GPIO18
HPD_D_GPU
GPU_GPIO20
HPD_F_GPU
SLI_SWAPRDY
GPU_HDMI_HPD
GPIO0_GPU
GPU_LVDS_BKLTCTL
SLI_SYNC
GPU_LVDS_VDDEN
HPD_E_GPU
GPU_FAN_PWM
GPU_GPIO17
GPU_GPIO18
HPD_D_GPU
GPU_GPIO20
HPD_F_GPU
R123
R125
R126
R127
R128
R129
R130
R131
R132
R133
R134
R135
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
ns
PM
ns
PM
ns
ns
ns
ns
ns
ns
ns
Nvidia advise:
For used GPIO1,2,3,4,5,6: please use 10K pull-down for initial value.
For used GPIO8,12: please use 10K pull-up for initial value.
For the unused GPIO, no need external HW pull-up/down.
NB10_G128
PM
NOTE:
1, XCLK_277 set 0 using 27MHz clock
2FB_0_BAR_SIZE 0 system frame buffer 256M
3PCI_DEVID[4:0] N10M-GS set 0x0A74 PCI_DEVID[4:0] set 10100
4, USER[3:0] set 1111 , using EDID method to detect panel
5, 3GIO_PADCFG[3:0] set 0001 , using NOTEBOOK configuration
6, RAMCFG[3:0] need follow latest PUN
7, PEX_PLL_EN_TERM100 set 0 , using PEX PLL termination disable configuration
8, SLOT_CLK_CFG set 1 , GPU MCH using the same clk chip
9, SUB_VENDOR set 0 , no VIDEO BIOS ROM
10.SMBUS_ALT_ADDR Set 0
11.0 3D Device 1VGA Device(default)
+V3.3GPU
R251
0
R0402
PM
C215
PM
0.1UF/25V,Y5V
C0402
U34
A
1
GPU_LVDS_BKLTEN
2
PM
GR52
10K
R0402
PM
VCC
74AHCT1G08GV
SOT23_5
GPU_LVDS_BKLTEN_R
4
GPU_LVDS_BKLTEN_R
{16}
GND
TOPSTAR TECHNOLOGY
THER_ALERT#
Joseph
R240
10K
R0402
PM
N10M IO_2
Size Project Name

Custom
C48
Rev
C
of
Date:
Sheet
21
59
+V3.3GPU
Page Name
+V3.3S
D24 2
SOD323
LIDR#
1 1N4148WS
R136
1K
R0402
D1
{16} LVDS_BKLTEN
{42} HW_OFF_BKLT#
BKLT_ON
BKLT_ON
LCDCON1
LCDCON2X20
CNS40_LCDB
{42}
LCDVDD
C168
BAT54A
1000pF/50V,X7R
C0402
LCDVDD
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
{16} LVDS_YAM0
{16} LVDS_YAP0
{16} LVDS_YAM2
{16} LVDS_YAP2
LCDVDD
F1
AO6409
+V3.3S
+V3.3AL
6
5
4 S
1
2
3
ns 1.5A T-Fuse
R0603
FB6
0 R0805
Q4
C173
C0402
0 R0402
{16}
{16}
LVDS_CLKAP {16}
LVDS_CLKAM {16}
EDID PWR
LVDS_CAM_USB_PN3
LVDS_CAM_USB_PP3
BKLT_ON
C175
0.1uF/25V,X7R
C0603
100pF/50V,NPO
0 R0402
FB26
ns
INVT_VDD
C174
0.1uF/25V,X7R
C0603
ns
LVDS_YAM1
LVDS_YAP1
BKLT_PWM
R148
10K
R0402
R143
100K
+V5AL
R0402
FB8
ns
2
FB7
41
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
VerB:Reverse Camera PWR control Circuit 071026

C176
+V5S
R145
100K
R146
0
R0805
ns
C177
R147
0
R0805
100pF/50V,NPO
C0402
R149
0 R0805
+5VAL_Camera
+V3.3S
+V3.3AL
R151
R0603 ns
R152
R0603
R150
10K
R0402
ns
EDID PWR
R160
R0603 0
C178
0.1uF/10V,X5R
C0402
E1
EMI
ns
C179
10UF/6.3V,X5R
C0805
ns
Add +5S to CAM POWER
081111
1
R159
100K
R0402
ns
{42} Camera_ON
R0603 0
Q7
SOT23
AO3415
ns
500mA
R153 10K
R0402
C180
0.1UF/10V,X7R
C0402
R158
{26} LVDS_BKLTCTL
41
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
+VDC
R142
100
R0603
{21} GPU_LVDS_BKLTCTL
+5VAL_Camera
BKLT_PWM
1.5A T-Fuse
R0603 ns
FB0805
Q6
SC70_6
F2
+VDC
100ohm@100MHz,3A
LVDS_VDDEN
2
2N7002DW
R144
{16}
EDID_CLK
{16} EDID_DATA
R139
2.2K
R0402
ns
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
LCDVDD
{42} EC_BKLT_PWM
C171
0.047uF/16V,X7R
0.01uF/16V,X7R
LVDS_VDDGON#
R140
100K
R0402
R141
100K
R0402
C170
C0402 10UF/6.3V,X5R C0805

0.1UF/25V,Y5V C0805 10UF/6.3V,X5R
ns
Q5
2N7002
SOT23
{16} LVDS_VDDEN
C172
C0402
ns
3LCDVDD_EN#
R138
100K
R0402
ns
LCDVDD
C169
G
R137
10K
{6,8,14,15,16,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{37,44,46,47,48,49,50,53,54,55}
{6,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
{30,40,41,46,47,48,51,54}
{24,26,30,33,34,36,38,40,41,42,49,50,53,54}
{41,42}
+V3.3S
+VDC
+V3.3AL
+V5AL
+V5S
Q8
2N7002E-T1
SOT23
ns
CHK1
LVDS_CAM_USB_PN3
LVDS_CAM_USB_PP3
2
3
L4_0805 90ohm@100MHz,0.5A
D2
D3
ns
EGA10603V05A1-B
ESDPAD_R0603
ns
1
4
{27} CAM_USB_PN3
{27} CAM_USB_PP3
EGA10603V05A1-B
ESDPAD_R0603
ns
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
C
Project Name
LVDS&Inverter CONN
C48
Rev
C

22
59
of
Date:
Sheet
5
+V1.05S
{24,25,29,30,48,54,55}
+V3.3AL
{6,22,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
+V3.3S
{6,8,14,15,16,22,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
EC_RTC
{44,46}
PCH_EC_RTC {30}
SPONGE_RTC1
RTCBAT GLUE
assembly
Voltage Swing on RTCX1 pin

should not exceed 1.0V.
EC_RTC
RTC_BAT1
D8
BAT54C
SOT23
+
-
PCH_EC_RTC
RTCBAT with Cable

assembly
3
C186
1uF/10V,X7R
C0603
R182
1K
R0402
20K
CMOS Settings J1
Clear CMOS Short
Keep CMOS
Open
R0402
+V3.3S
R183
U4A
RTCX1
RTCX2
RTC_RST#
C14
RTCRST#
SRTC_RST#
D17
SRTCRST#
SM_INTRUDER#
ICH_INTVRMEN
{33} AZALIA_CODEC_BITCLK
{33} AZALIA_CODEC_SYNC
{33}
INTRUDER#
A14
INTVRMEN
R187
33
R0402
A30
HDA_BCLK
R188
33
R0402
D29
HDA_SYNC
P1
SPKR
R190
{33} AZALIA_CODEC_RST#
C
A16
33
R0402
{33} AZALIA_SDATAIN0
R191
{33} AZALIA_CODEC_SDOUT
R225
4.7K
33
R0402
R0402
ns
For ME
+V3.3AL
R196
0
ns
ns
ICTP
ns
ICTP
ns
ICTP
ns
ICTP
ns
ICTP
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN# / GPIO33
J30
HDA_DOCK_RST# / GPIO13
T50
M3
JTAG_TCK
T51
K3
JTAG_TMS
T52
K1
JTAG_TDI
T53
J2
JTAG_TDO
T54
J4
TRST#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
FWH4 / LFRAME#
C34
LPC_FRAME# {34,37,42}
LDRQ0#
LDRQ1# / GPIO23
A34
F34
SERIRQ
AB9
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
AK7
AK6
AK11
AK9
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AH6
AH5
AH9
AH8
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
AF11
AF9
AF7
AF6
R498
R499
1K
1K
R0402 ns
R0402 ns
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
AH3
AH1
AF3
AF1
R500
R501
1K
1K
R0402 ns
R0402 ns
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
AD9
AD8
AD6
AD5
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
AD3
AD1
AB3
AB1
C388
C389
C465
R504
R505
1K
1K
SATA_RXN1
SATA_RXP1
SATA_TXN1
SATA_TXP1
{40}
{40}
{40}
{40}
SATA_RXN4
0.01uF/25V,X7R
SATA_RXP4
C0402
SATA_TXN4
SATA_TXP4
{40}
{40}
{40}
{40}
+V1.05S
SATAICOMPO
AF16
SATAICOMPI
AF15
R192
37.4,1%
R0402
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
SATALED#
T3
SATA0GP / GPIO21
Y9
R199
10K
R0402
SATA1GP / GPIO19
V1
R201
10K
R0402
SPI_MISO
R200
AV1
SPI_MISO
+V3.3S
OD output
need pullup
SPI_MOSI
R0402 ns
R0402 ns
AY1
INT_SERIRQ
{40}
{40}
{40}
{40}
R194
R971
10K
R0402
SATA_RXN0
SATA_RXP0
SATA_TXN0
SATA_TXP0
0.01uF/25V,X7R
0.01uF/25V,X7R
C390
C0402
C0402
0.01uF/25V,X7R
C464
C0402
R186
10K
R0402
ns
{34,42}
0.01uF/25V,X7R
0.01uF/25V,X7R
C387 C0402
C0402
R193
R197
{34,37,42}
{34,37,42}
{34,37,42}
{34,37,42}
INT_SERIRQ
SPI_CS0#
SPI_MOSI
R202
D33
B33
C32
A32
SPI_CLK
R198
R189
10K
R0402
ns
FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3
HDA_SDIN1
E32
+V3.3S
10K
+V3.3S
LPC
B13
D13
RTC
32XCLK0
32XCLK1
R185
1M
R0402
J1
JOPEN
RESISTOR_1
ns
IHDA
C187
C188
1uF/10V,X7R
C0603
1uF/10V,X7R
C0603
SATA
20K R0402
JTAG
R184
RTCBAT1
CONN2_R
CNS2_R
1 1
2 2
R195
10K
R0402
SPI
Cable
SATA_LED#
{43}
+V3.3S
IbexPeak-M_Rev1_0
ns
R0402
U5
8
VDD
R203
3.3K
WP#
R204
3.3K
SI
SO
CE#
SCK
5
2
1
6
VSS
HOLD#
SPI_MOSI
SPI_MISO
SPI_CS0#
SPI_CLK
8M
C184
PCH_EC_RTC
332K 1% PULL
HIGH TO
VBAT_RTC FOR
ICH8M INTRNAL
VR ENABLE(PULL
LOW DISABLE)
R179
R178
C0402
R0402
R180
10M
R0402
Y2
32.768KHz
xd3_2X6
3
ASSY
15pF/50V,NPO
332K,1%
R0402
32XCLK0
SOIC8_50_208
C185
ICH_INTVRMEN
32XCLK1
C0402
15pF/50V,NPO
R181
0
ns
R0402
A
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
Date:
Sheet
of
23
59
5
+V3.3AL
{6,22,23,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
+V1.05S
{23,25,29,30,48,54,55}
+V3.3S
{6,8,14,15,16,22,23,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
+V5S
{22,26,30,33,34,36,38,40,41,42,49,50,53,54}
+V3.3AL
SMBCLK
R515
SMBDATA
R516
2.2K
GPIO11
R56
10K
R0402
GPIO60
R375
10K
R0402
SML0CLK
R376
10K
R0402
SML0DATA
R377
10K
R0402
GPIO74
R509
10K
R0402
2.2K
D
U4B
{35}
{35}
{35}
{35}
PCIE_RXN4_WLAN
PCIE_RXP4_WLAN
PCIE_TXN4_WLAN
PCIE_TXP4_WLAN
C396
C0402
C398
C0402
0.1UF/10V,X7R
0.1UF/10V,X7R
C0402
C395
0.1UF/10V,X7R
C0402
0.1UF/10V,X7R
AW30
BA30
BC30
BD30
AU30
AT30
AU32
AV32
PERN3
PERP3
PETN3
PETP3
BA32
BB32
BD32
BE32
PERN4
PERP4
PETN4
PETP4
BF33
BH33
BG32
BJ32
PERN5
PERP5
PETN5
PETP5
BA34
AW34
BC34
BD34
PERN6
PERP6
PETN6
PETP6
AT34
AU34
AU36
AV36
PERN7
PERP7
PETN7
PETP7
BG34
BJ34
BG36
BJ36
PERN8
PERP8
PETN8
PETP8
+V3.3AL
R16
10K
R0402
R52
+V3.3AL
R906
10K
R0402
R905
10K
R0402
MiniPCIE_REQ#
minicard_CLKREQ#
AK48
AK47
{41} CLK_PCIE_GLAN#
{41} CLK_PCIE_GLAN
0
R0402
P9
{37} CLK_PCIE_3G#
{37} CLK_PCIE_3G
AM43
AM45
{37} MiniPCIE_REQ#
U4
{35} CLK_PCIE_MINICARD#
{35} CLK_PCIE_MINICARD
AM47
AM48
{35} minicard_CLKREQ#
N4
AH42
AH41
{39} CLK_PCIE_EXPCARD#
{39} CLK_PCIE_EXPCARD
A8
{39} EXPCARD_CLKREQ#
H14
SMBCLK
SMBDATA
SML1CLK
R544
2.2K
R0402
J14
GPIO60
SML1DATA
R545
2.2K
R0402
SML0CLK
C6
SML0CLK
PEG_A_CLKRQ#
R514
SML0DATA
G8
SML0DATA
10K
R0402
SML1ALERT# / GPIO74
M14
GPIO74
SML1CLK / GPIO58
E10
SML1CLK
{41,42}
SML1DATA / GPIO75
G12
SML1DATA
{41,42}
SMBDATA
PERN2
PERP2
PETN2
PETP2
SML0ALERT# / GPIO60
SMBus
C397
C393
C0402
C0402
0.1UF/10V,X7R
0.1UF/10V,X7R
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0# / GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
CLKOUT_PCIE2N
CLKOUT_PCIE2P
CL_CLK1
T13
CL_CLK1
{35}
CL_DATA1
T11
CL_DATA1
{35}
CL_RST1#
T9
CL_RST1#
PEG_A_CLKRQ# / GPIO47
H1
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_PCIE3N
CLKOUT_PCIE3P
PEG_A_CLKRQ#
AN4
AN2
CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P
AT1
AT3
R523
R519
R520
AD43
AD45
CLKOUT_DMI_N
CLKOUT_DMI_P
0
0
{35}
R0402 ns
R0402
R0402
PCIE_CLKREQ
{17}
CLK_PCIE_N11M# {17}
CLK_PCIE_N11M {17}
CLK_EXP_N {8}
CLK_EXP_P {8}
R563
R0402
AW24
BA24
CLK_BUF_SATA_N {6}
CLK_BUF_SATA_P {6}
CLKIN_BCLK_N
CLKIN_BCLK_P
AP3
AP1
CLK_BUF_BCLK_N
CLK_BUF_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
F18
E18
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
AH13
AH12
CLK_BUF_EXP_N {6}
CLK_BUF_EXP_P {6}
REFCLK14IN
P41
CLK_BUF_REF14
CLKIN_PCILOOPBACK
J42
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P
GPIO11
B9
C8
SMBCLK
Link
{39} PCIE_RXN3_EXP
{39} PCIE_RXP3_EXP
{39} PCIE_TXN3_EXP
{39} PCIE_TXP3_EXP
C394
C0402
0.1UF/10V,X7R
SMBALERT# / GPIO11
PCI-E*
PCIE_RXN2_3G
PCIE_RXP2_3G
PCIE_TXN2_3G
PCIE_TXP2_3G
C392
C0402
0.1UF/10V,X7R
PERN1
PERP1
PETN1
PETP1
Controller
{37}
{37}
{37}
{37}
C391
BG30
BJ30
BF29
BH29
PEG
PCIE_RXN1_LAN
PCIE_RXP1_LAN
PCIE_TXN1_LAN
PCIE_TXP1_LAN
From CLK BUFFER
{41}
{41}
{41}
{41}
{6}
{6}
{6}
{6}
{6}
B
PCI_CLKFB
{27}
+V3.3AL
AM51
AM53
R907
8.2K
R0402
M9
CLKOUT_PCIE4N
CLKOUT_PCIE4P
XTAL25_IN
XTAL25_OUT
AH51
AH53
XCLK_RCOMP
AF38
R508
R521
R522
90.9,1%
R0402
0
10M
R0402
+V1.05S
+V3.3AL
8.2K
R0402
H6
+V3.3AL
AK53
AK51
R909
8.2K
R0402
P13
CLKOUT_PCIE5N
CLKOUT_PCIE5P
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ# / GPIO56
CLKOUTFLEX0 / GPIO64
T45
P43
Y5
2
Clock Flex
AJ50
AJ52
R908
T42
N50
1
25MHz
XS2_3d3
R564
33
CLK_CR_48M {32}
C400
27pF/50V,NPO
C0402
C399
27pF/50V,NPO
C0402
IbexPeak-M_Rev1_0
+V3.3S
R910
R0402
R517
2.2K
ns
Q29
2N7002E-T1
SMBCLK
SMB_CLK_S
{6,14,15,37,39}
+V3.3S
+V5S
R911
R0402
R518
2.2K
ns
TOPSTAR TECHNOLOGY
Q30
Joseph
2N7002E-T1
3
SMBDATA
SMB_DATA_S {6,14,15,37,39}
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
24
59
+V5S
+V3.3AL
+V3.3S
+V1.05S
R205
49.9,1%
R0402
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
{7}
{7}
{7}
{7}
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
{7}
{7}
{7}
{7}
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
{7}
{7}
{7}
{7}
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
BC24
BJ22
AW20
BJ20
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
BD24
BG22
BA20
BG20
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
BE22
BF21
BD20
BE18
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
BD22
BH21
BC20
BD18
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
BH25
DMI_COMP_R
BF25
DMI_ZCOMP
FDI
+V1.05S
{7}
{7}
{7}
{7}
DMI
U4C
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
{7}
FDI_TXP[7:0]
{7}
FDI_INT
BJ14
FDI_FSYNC0
BF13
FDI_FSYNC0
FDI_FSYNC1
BH13
FDI_FSYNC1
{7}
FDI_LSYNC0
BJ12
FDI_LSYNC0
{7}
FDI_LSYNC1
BG14
FDI_LSYNC1
{7}
PCIE_WAKE#
{35,37,39,41,42}
DMI_IRCOMP
+V3.3S
FDI_TXN[7:0]
FDI_INT
{6,22,23,24,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
{6,8,14,15,16,22,23,24,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{23,24,29,30,48,54,55}
{7}
{7}
R524
10K
R0402
{42}
T6
SYS_RESET#
WAKE#
R527
R0402
M6
SYS_PWROK
CLKRUN# / GPIO32
Y1
R528
R0402
B17
R529
R0402
K5
MEPWROK
SUS_STAT# / GPIO61
P8
PM_SUS_STAT# {42}
A10
LAN_RST#
SUSCLK / GPIO62
F3
T74 ICTPns
SLP_S5# / GPIO63
E4
R535
R0402
SLP_S4#
H7
R541
R0402
SLP_S3#
P12
R542
R0402
SYS_RST#
J12
SYS_PWROK
This is suspend power pin

R533
R489
{8} PM_DRAM_PWRGD
10K
R0402
R0402
D9
C16
{42,51} PM_RSMRST#
{42} ALW_ACK
R531
10K
R0402
+V3.3AL
R534
{42} PM_PWRBTN#
AL_PWRGD
R0402
{42} AC_IN_PCH
U20
BAT_LOW#
RSMRST#
+V3.3AL
SUS_PWR_DN_ACK / GPIO30
P5
PWRBTN#
P7
ACPRESENT / GPIO31
A6
BATLOW# / GPIO72
CLKRUN#
SLP_M#
K8
TP23
N2
PMSYNCH
BJ10
T143
ns
PM_SLP_S4# {39,42,54}
PM_SLP_S3# {39,42,51}
1
2
ns
VCC
R526
RI#
SYS_PWROK
ns
MS
H_PM_SYNC
R323
10K
ns
{8}
F14
RI#
SLP_LAN# / GPIO29
F6
+V3.3AL
GND
3
ns
{42,51} Main_PWROK
{42} EC_IMVP_PWRGD
74AHCT1G08GV
SOT23_5
4
R321
10K
ns
+V3.3AL
T144
{42}
DRAMPWROK
M1
C401
0.1UF/25V,Y5V
PWROK
System Power Management
IbexPeak-M_Rev1_0
R525
10K
R0402
ALW_ACK R402
10K
R0402
0
+V3.3AL
+V3.3S
RI#
R538
10K
R0402
R537
10K PM_PWRBTN#
R0402
R539
PCIE_WAKE#
1K
R0402
R540
10K
R0402
CLKRUN#
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
Tuesday, January 19, 2010
25
59
5
+V3.3S
{6,8,14,15,16,22,23,24,25,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
+V5S
{22,24,30,33,34,36,38,40,41,42,49,50,53,54}
+V3.3S
R638
100K
R627
10K
R628
10K
LCTL_DATA
LCTL_CLK
+V3.3S
U4D
PCH_DDC_DATA
PCH_DDC_CLK
L_BKLTEN
L_VDD_EN
Y48
L_BKLTCTL
PCH_DDC_CLK
PCH_DDC_DATA
AB48
Y45
L_DDC_CLK
L_DDC_DATA
LCTL_CLK
LCTL_DATA
AB46
V48
L_CTRL_CLK
L_CTRL_DATA
AP39
AP41
LVD_IBG
LVD_VBG
AT43
AT42
LVD_VREFH
LVD_VREFL
AV53
AV51
LVDSA_CLK#
LVDSA_CLK
T157
BB47
BA52
AY48
AV47
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
T161
BB48
BA50
AY49
AV48
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
AP48
AP47
LVDSB_CLK#
LVDSB_CLK
AY53
AT49
AU52
AT53
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
{16}
{16}
T156
R632
2.37K,1%
ns
{16} PCH_LVDS_CLKAM
{16} PCH_LVDS_CLKAP
{16} PCH_LVDS_YAM0
{16} PCH_LVDS_YAM1
{16} PCH_LVDS_YAM2
ns
{16} PCH_LVDS_YAP0
{16} PCH_LVDS_YAP1
{16} PCH_LVDS_YAP2
ns
{38} CRT_BLUE_R
{38} CRT_GREEN_R
{38} CRT_RED_R
CRT_BLUE_R
CRT_GREEN_R
CRT_RED_R
CRT_DDC_CLK_R
CRT_DDC_DATA_R
{38} CRT_DDC_CLK_R
{38} CRT_DDC_DATA_R
CRT_HSYNC_R
CRT_VSYNC_R
{38} CRT_HSYNC_R
{38} CRT_VSYNC_R
AY51
AT48
AU50
AT51
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
AA52
AB53
AD53
CRT_BLUE
CRT_GREEN
CRT_RED
Y53
Y51
CRT_HSYNC
CRT_VSYNC
R702
R703
R704
150,1%
GM
CRT_BLUE_R
150,1%
GM
CRT_GREEN_R
GM
CRT_RED_R
150,1%
R630
1K,1%
BJ48
BG48
SDVO_INTN
SDVO_INTP
BF45
BH45
T51
T53
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
BG44
BJ44
AU38
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
DDPC_CTRLCLK
DDPC_CTRLDATA
Y49
AB49
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
BE44
BD44
AV40
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
DDPD_CTRLCLK
DDPD_CTRLDATA
CRT_DDC_CLK
CRT_DDC_DATA
DAC_IREF
CRT_IRTN
BJ46
BG46
SDVO_STALLN
SDVO_STALLP
SDVO_CTRLCLK
SDVO_CTRLDATA
V51
V53
AD48
AB51
SDVO_TVCLKINN
SDVO_TVCLKINP
+V5S
GM_HDMI_DDC_CLK {36}
GM_HDMI_DDC_DATA {36}
1
{22} LVDS_BKLTCTL
T48
T47
Digital Display Interface
{16} PCH_LVDS_VDDEN
LVDS
R629
2.2K
CRT
R631
2.2K
DDPC_HPD
R634
IN_D2{36}
IN_D2+
{36}
IN_D1{36}
IN_D1+
{36}
IN_D0{36}
IN_D0+
{36}
MCH_CLK_D4- {36}
MCH_CLK_D4+ {36}
R0402
GM
MCH_HDMI_HPD
{36}
Q41
2N7002
GM
R635
100K
GM
R636
R0402
ns
U50
U52
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
BC46
BD46
AT38
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
IbexPeak-M_Rev1_0
TOPSTAR TECHNOLOGY
Joseph
Page Name
PCH
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
26
59
5
+V3.3AL
{6,22,23,24,25,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
+V3.3S
{6,8,14,15,16,22,23,24,25,26,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
+V1.8S
{11,16,29,30,47,54,55}
+V3.3S
+V3.3AL
U4E
J50
G42
H47
G34
C/BE0#
C/BE1#
C/BE2#
C/BE3#
G38
H51
B37
A44
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PCI_REQ#3
F51
A46
B45
M53
REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
PCI_GNT#0
PCI_GNT#1
GNT2#
PCI_GNT#3
F48
K45
F36
H53
GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
B41
K53
A36
A48
PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5
0.1UF/25V,Y5V
C0402
C189
VCC
{8,17,34,35,37,39,41,42}
PLT_RST#
BUF_PLT_RST#
2
U6
74AHCT1G08GV
SOT23_5
GND
R210
100K
R0402
R206
10K
R0402
PCI_GNT#0
PCI_GNT1# PCI_GNT0# Boot BIOS

PCI_GNT#1
R212
1K
R0402
ns
R213
1K
R0402
ns
SPI
PCI
LPC
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
PCI_REQ#0
LVDS_SEL_PCH
PCI_GNT#3
{16} LVDS_BLT_SEL
PCI_GNT#3
Low=A16 swap override/
Top Block Swap Mode Topblock Swap Override enable
Strap
High=Default
B
R214
1K
R0402
ns
4.7K in checklist
{16} LVDS_DDC_SEL
PCI_RST#
PCI pullup
+V3.3S
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_STOP#
PCI_SERR#
PCI_DEVSEL#
PCI_PERR#
PCI_LOCK#
PCI_REQ#0
LVDS_SEL_PCH
LVDS_BLT_SEL
PCI_REQ#3
LVDS_DDC_SEL
GNT2#
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
R216
R217
R218
R219
R220
R221
R222
R223
R224
R912
R226
R228
R237
R252
R229
R230
R231
R232
R233
R235
R236
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
PCI_RST#
R238
8.2K
R0402
T26
ICTP
T30
ICTP
ns
PCIRST#
E44
E50
SERR#
PERR#
PCI_IRDY#
PCI_PAR
PCI_DEVSEL#
PCI_FRAME#
A42
H44
F46
C46
IRDY#
PAR
DEVSEL#
FRAME#
PCI_LOCK#
D49
PLOCK#
PCI_STOP#
PCI_TRDY#
D41
C48
STOP#
TRDY#
PCI_PME
M7
PME#
PLT_RST#
D5
PLTRST#
ns
47
47
22
47
{42} CLK_591PCI
{34} CLK_TCMPCI
{24} PCI_CLKFB
{37} PCI_CLK_DEBUG
K6
PCI_SERR#
PCI_PERR#
R510
R511
R506
R507
N52
P53
P46
P51
P48
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NVRAM
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
R208
0
R0402
AY9
BD1
AP15
BD8
NV_DQS0
NV_DQS1
AV9
BG8
NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9
NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
NV_ALE
NV_CLE
BD3
AY6
NV_RCOMP
AU2
NV_RB#
AV7
NV_WR#0_RE#
NV_WR#1_RE#
AY8
AY5
NV_WE#_CK0
NV_WE#_CK1
AV11
BF5
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USB
R207
0
R0402
ns
H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
PCI
PLTRST buffer
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
USBRBIAS#
B25
USBRBIAS
D25
OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43
OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14
N16
J16
F16
L16
E14
G16
F12
T15
EXPCARD_USB_PN0 {39}
EXPRESS Card
EXPCARD_USB_PP0 {39}
CAM_USB_PN3 {22}
CAM_USB_PP3 {22}
MINICARD_USB_PN2 {37}
MINICARD_USB_PP2 {37}
MINICARD_USB_PN1 {35} CAMERA
MINICARD_USB_PP1 {35}
MINICARD
BT_USB_PN5
BT_USB_PP5
T25
T27
T28
T29
USB_CR_PN8
USB_CR_PP8
USB_PN9
USB_PP9
USB_PN10
USB_PP10
USB_PN11
USB_PP11
ns
ns
ns
ns
{34}
{34}
BT
{32} CARD READER

{32}
{40} Esata_usb conn
{40}
{41}
{41} USB CONN
{41}
{41}
Attribution
TBD
USB_BIAS
R227
22.6,1%
R0402
OC0#
OC1#
OC2#
OC3#
OC6#
OC7#
USB_OC#4
USB_OC#5
{40}
{41}
IbexPeak-M_Rev1_0
ns
+V3.3AL
+V1.8S
+V1.8S
R913
1K,1%
R0402
R914
10K
R0402
PM
{16} LVDS_SEL_PCH
LVDS_SEL_PCH
Q42
2
3
MMBT3904-FSOT23
PM
R0402 10K R917
OC1#
R0402 10K R918
OC3#
R0402 10K R919
OC6#
R0402 10K R921
Page Name
N10M PCIE&PWR&GND
OC7#
R0402 10K R922
Size
C
C48
TOPSTAR TECHNOLOGY
Joseph
PM
OC0#
OC2#
Project Name
R0402 10K R927
Rev
C
of
27
59
Date:
Sheet
LVDS_SEL {16}
+V1.1S_VTT {8,10,11,29,30,34,48,49,53}
+V3.3AL
{6,22,23,24,25,27,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
+V3.3S
{6,8,14,15,16,22,23,24,25,26,27,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
GPIO24
+V3.3S
10K
R0402 ns
SATA4GP
R241
R557
10K
R0402 ns
SATA_CLKREQ#
R560
10K
R0402
GPIO27
R337
10K
R0402 ns
U4F
EXTSMI#
R547
10K
GPIO6
R548
10K
EC_RUNTIME_SCI#
R549
10K
SATA2GP
R239
10K
SATA4GP
R553
10K
GPIO17
R554
10K
GPIO22
R555
10K
STP_PCI#
R559
10K
GPIO0
{42}
EXTSMI#
GPIO6
{42} EC_RUNTIME_SCI#
GPIO8
LAN_PHY
GPIO15
SATA5GP
R242
10K
GPIO48
R565
10K
H_RCIN#
R569
10K
Y3
TACH1 / GPIO1
D37
TACH2 / GPIO6
10K
LAN_PHY
R551
10K
K9
LAN_PHY_PWR_CTRL / GPIO12
A20GATE
T7
GPIO15
TACH3 / GPIO7
GPIO8
1K
GPIO24
R556
10K
GPIO28
R558
GPIO57
R568
U2
SATA4GP / GPIO16
CLKOUT_BCLK0_N / CLKOUT_PCIE8N
AM3
BCLK_CPU_N
{8}
TACH0 / GPIO17
CLKOUT_BCLK0_P / CLKOUT_PCIE8P
AM1
BCLK_CPU_P
{8}
GPIO22
Y7
GPIO24
H10
GPIO24
GPIO27
AB12
GPIO27
GPIO28
V13
GPIO28
STP_PCI#
M11
STP_PCI# / GPIO34
V6
SCLOCK / GPIO22
PECI
RCIN#
BG10
H_PECI
{8}
T1
H_RCIN#
{42}
PROCPWRGD
BE10
THRMTRIP#
BD10
SATA2GP / GPIO36
TP1
BA22
AB13
SATA3GP / GPIO37
TP2
AW22
GPIO38
V3
SLOAD / GPIO38
TP3
BB22
GPIO39
P3
SDATAOUT0 / GPIO39
TP4
AY45
H3
TP5
AY46
F1
TP6
AV43
ns
AB6
SDATAOUT1 / GPIO48
TP7
AV45
10K
SATA5GP
AA4
SATA5GP / GPIO49
TP8
AF13
10K
GPIO57
GPIO57
TP9
M18
TP10
N18
TP11
AJ24
TP12
AK41
TP13
AK42
TP14
M32
TP15
N32
TP16
M30
TP17
N30
TP18
H12
TP19
AA23
NC_1
AB45
NC_2
AB38
NC_3
AB42
NC_4
AB41
NC_5
T39
A4
A49
A5
A50
A52
A53
B2
B4
B52
B53
BE1
BE53
BF1
BF53
BH1
BH2
BH52
BH53
BJ1
BJ2
BJ4
BJ49
BJ5
BJ50
BJ52
BJ53
D1
D2
D53
E1
E53
+V3.3S
R567
10K
ns
R575R574
10K 10K
ns ns
GPIO37
GPIO38
GPIO39
R578
10K
F8
R577R576
10K 10K
R485
R486
56
R0402
{8}
54.9,1% R0402
THERMTRIP# {8,34}
SATACLKREQ# / GPIO35
AB7
GPIO37
ns
VCCPWRGD_0
THERMTRIP_R#
+V1.1S_VTT
{42}
F38
GPIO48
ns
H_A20GATE
GPIO17
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
NCTF
R552
internal pull up. default to use internal VccVRM
RSVD
GPIO15
T38
ICTP
T41
ICTP
AF48
AF47
AA2
SATA2GP
R550
AH45
AH46
SATA4GP
SATA_CLKREQ#
GPIO8
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
J32
F10
+V3.3AL
BMBUSY# / GPIO0
C38
MISC
10K
CPU
R546
GPIO
GPIO0
INIT3_3V#
TP24
P6
C10
IbexPeak-M_Rev1_0
For differentiate BIOS version
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
of
28
59
Date:
Sheet
5
+V1.1S_VTT
+V1.05S
+V3.3S
+V1.8S
{8,10,11,28,30,34,48,49,53}
{23,24,25,30,48,54,55}
{6,8,14,15,16,22,23,24,25,26,27,28,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{11,16,27,30,47,54,55}
+V3.3S
+V1.05S
C403
1uF/10V,X7R
AK24
VCCIO[24]
BJ24
VCCAPLLEXP
POWER
CRT
C402
10uF/6.3V,X5R
VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCC CORE
U4G
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
0 R0805
C405
C406
C407
10uF/6.3V,X5R
1uF/10V,X7R
1uF/10V,X7R
C408
C409
1uF/10V,X7R
1uF/10V,X7R
+V3.3S
+V1.8S
+V1.05S
FB281
2 FB0603
120ohm@100MHz,500mA
ns
AN30
AN31
VCCIO[54]
VCCIO[55]
AN35
VCC3_3[1]
AT22
VCCVRM[1]
BJ18
VCCFDIPLL
AM23
C410
VCCIO[1]
1uF/10V,X7R
ns
LVDS
HVCMOS
R570
VCCIO[25]
VCCIO[26]
VCCIO[27]
VCCIO[28]
VCCIO[29]
VCCIO[30]
VCCIO[31]
VCCIO[32]
VCCIO[33]
VCCIO[34]
VCCIO[35]
VCCIO[36]
VCCIO[37]
VCCIO[38]
VCCIO[39]
VCCIO[40]
VCCIO[41]
VCCIO[42]
VCCIO[43]
VCCIO[44]
VCCIO[45]
VCCIO[46]
VCCIO[47]
VCCIO[48]
VCCIO[49]
VCCIO[50]
VCCIO[51]
VCCIO[52]
VCCIO[53]
AE52
VSSA_DAC[1]
AF53
VSSA_DAC[2]
AF51
FB291
C412
2 FB0603
120ohm@100MHz,500mA
C424
C411
1uF/10V,X7R
0.01uF/16V,X7R 0.1UF/10V,X7R
VCCALVDS
AH38
VSSA_LVDS
AH39
VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]
AP43
AP45
AT46
AT45
VCC3_3[2]
AB34
VCC3_3[3]
AB35
VCC3_3[4]
AD35
+V1.8S
FB311
C413
2 FB0603
120ohm@100MHz,500mA
C425
C414
0.01uF/16V,X7R 0.1UF/10V,X7R
1uF/10V,X7R
+V3.3S
C426
0.1UF/10V,X7R
+V1.8S
DMI
+V1.05S
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
VCCVRM[2]
AT24
VCCDMI[1]
AT16
VCCDMI[2]
AU16
+V1.1S_VTT
C415
1uF/10V,X7R
C416
1uF/10V,X7R
PCI E*
1uF/10V,X7R
ns
+V1.8S
NAND / SPI
C404
ns
VCCAPLL
2 FB0603
FDI
FB271
AE50
VCCADAC[2]
+V3.3S
+V1.05S
120ohm@100MHz,500mA
VCCADAC[1]
VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]
AM8
AM9
AP11
AP9
C417
1uF/10V,X7R
+V3.3S
C427
IbexPeak-M_Rev1_0
0.1UF/10V,X7R
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
Date:
Sheet
of
29
59
5
+V1.1S_VTT {8,10,11,28,29,34,48,49,53}
+V1.05S
{23,24,25,29,48,54,55}
+V5AL
{22,40,41,46,47,48,51,54}
+V3.3AL
{6,22,23,24,25,27,28,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
+V5S
{22,24,26,33,34,36,38,40,41,42,49,50,53,54}
+V3.3S
{6,8,14,15,16,22,23,24,25,26,27,28,29,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
PCH_EC_RTC {23}
+V1.8S
{11,16,27,29,47,54,55}
R0402
VCCLAN[1]
AF24
VCCLAN[2]
Y20
+V1.05S
C132
0.1UF/10V,X7R
C420
C421
C422
C423
10uF/6.3V,X5R
10uF/6.3V,X5R
1uF/10V,X7R
1uF/10V,X7R
DCPSUSBYP
AD38
VCCME[1]
AD39
VCCME[2]
AD41
VCCME[3]
AF43
VCCME[4]
AF41
VCCME[5]
AF42
VCCME[6]
V39
VCCME[7]
V41
VCCME[8]
V42
VCCME[9]
Y39
VCCME[10]
Y41
VCCME[11]
Y42
VCCME[12]
V9
DCPRTC
+V1.8S
C428
0.1UF/10V,X7R
AU24
C429
VCCADPLLA
1uF/10V,X7R
BB51
BB53
VCCVRM[3]
VCCADPLLA[1]
VCCADPLLA[2]
+V1.05S
VCCADPLLB
+V1.05S
C430
C431
10uF/6.3V,X5R
1uF/10V,X7R
VCCADPLLB[1]
VCCADPLLB[2]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[2]
C436
C435
C434
AH23
AJ35
AH35
1uF/10V,X7R
1uF/10V,X7R
1uF/10V,X7R
AF34
VCCADPLLA
FB33 1
2 FB0603
120ohm@100MHz,500mA
BD51
BD53
C437
0.1UF/10V,X7R
+V1.05S
AH34
VCCIO[3]
AF32
VCCIO[4]
V12
DCPSST
Y22
DCPSUS
VCCSUS3_3[29]
VCCSUS3_3[30]
U20
VCCSUS3_3[31]
U22
VCCSUS3_3[32]
V15
VCC3_3[5]
V16
VCC3_3[6]
Y16
VCC3_3[7]
+V3.3S
+V1.1S_VTT
AT18
C441
4.7UF/10V,Y5V
C0805
C442
0.1UF/10V,X7R
PCH_EC_RTC
AU18
A12
C443
0.1UF/10V,X7R
V_CPU_IO[1]
V_CPU_IO[2]
VCCRTC
IbexPeak-M_Rev1_0
HDA
C440
0.1UF/10V,X7R
CPU
C439
0.1UF/10V,X7R
P18
U19
RTC
C433
U23
VCCIO[56]
V23
V5REF_SUS
F24
1uF/10V,X7R
+V3.3AL
C449
C447
C448
0.1UF/10V,X7R
0.1UF/10V,X7R
0.1UF/10V,X7R
+V3.3AL
+V1.05S
D37
1N4148WS
SOD323
+V5AL
R571
C541
SATA
1uF/10V,X7R
VCCSUS3_3[28]
V5REF
K49
VCC3_3[8]
J38
C542
VCC3_3[9]
L38
1uF/10V,X7R
10
R0603
10
R0603
+V3.3S
VCC3_3[10]
M36
VCC3_3[11]
N36
VCC3_3[12]
P36
VCC3_3[13]
U35
VCC3_3[14]
AD13
D38
VCCSATAPLL[1]
VCCSATAPLL[2]
PCI/GPIO/LPC
+V3.3AL
C432
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
+V5S
1N4148WS
SOD323
+V3.3S
R572
C451
0.1UF/10V,X7R
C450
0.1UF/10V,X7R
+V1.05S
FB35 1
2 FB0603
120ohm@100MHz,500mA
AK3
AK1
VCCIO[9]
AH22
VCCVRM[4]
AT20
VCCIO[10]
AH19
VCCIO[11]
AD20
VCCIO[12]
AF22
VCCIO[13]
VCCIO[14]
VCCIO[15]
VCCIO[16]
AD19
AF20
AF19
AH20
VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
AB19
AB20
AB22
AD22
VCCME[13]
VCCME[14]
VCCME[15]
VCCME[16]
AA34
Y34
Y35
AA35
C445
10uF/6.3V,X5R
ns
ns
C446
1uF/10V,X7R
ns
+V1.8S
VCCADPLLB
10uF/6.3V,X5R
VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]
C444
1uF/10V,X7R
C438
0.1UF/10V,X7R
FB34 1
2 FB0603
120ohm@100MHz,500mA
V24
V26
Y24
Y26
R211
AF23
VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]
1uF/10V,X7R
ns
VCCACLK[2]
USB
10uF/6.3V,X5R
ns
AP53
+V1.05S
POWER
Clock and Miscellaneous
C419
VCCACLK[1]
PCI/GPIO/LPC
C418
ns
AP51
U4J
FB32 1
2 FB0603
120ohm@100MHz,500mA
+V1.05S
D
VCCSUSHDA
+V1.05S
B
FB36 1
2 FB0603
120ohm@100MHz,500mA
C452
1uF/10V,X7R
+V1.05S
+V3.3AL
L30
C453
1uF/10V,X7R
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
30
59
5
U4I
AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47
B7
BG12
BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49
BB5
BC10
BC14
BC18
BC2
BC22
BC32
BC36
BC40
BC44
BC52
BH9
BD48
BD49
BD5
BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50
BE6
BE8
BF3
BF49
BF51
BG18
BG24
BG4
BG50
BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47
BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48
E6
E8
F49
F5
G10
G14
G18
G2
G22
G32
G36
G40
G44
G52
AF39
H16
H20
H30
H34
H38
H42
U4H
AB16
VSS[0]
AA19
AA20
AA22
AM19
AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47
AB5
AB8
AC2
AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49
AD7
AE2
AE4
AF12
Y13
AH49
AU4
AF35
AP13
AN34
AF45
AF46
AF49
AF5
AF8
AG2
AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47
AH7
AJ19
AJ2
AJ20
AJ22
AJ23
AJ26
AJ28
AJ32
AJ34
AT5
AJ4
AK12
AM41
AN19
AK26
AK22
AK23
AK28
VSS[1]
VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
IbexPeak-M_Rev1_0
B
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]
VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
IbexPeak-M_Rev1_0
TOPSTAR TECHNOLOGY
Joseph
Page Name
N10M PCIE&PWR&GND
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
31
59
5
+V3.3S
+V3.3AL
REG18V
D3.3V
All of by-pass capacitors must be closed to IC

{6,8,14,15,16,22,23,24,25,26,27,28,29,30,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,5
{6,22,23,24,25,27,28,30,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
D3.3V
REG18V
+V3.3AL
VDD18
D3.3V
+V3.3AL
R243
30K
R0402
DGND
REG18V
C191
0.1UF/25V,Y5V
C0402
DGND
R244 0
R245 0
RST
C194
4.7uF/10V,X5R
C0805
REG5Vin
GPIO0/LED
SM/SD/MS D4
RST
GPIO3
ClkSel
SM/SD/MS D3
SM_CD
SM_ALE
PWR_SW
VDD33
VSS
IT1337E-48
XTALI
IT1337E-48
QFPS48_0D5_1D6
SM_D2
VDD18
{27} USB_CR_PP8
{27} USB_CR_PN8
GPIO7
Clk12M_out
SM_CE/SD_WP
SM_WP/SD_CLK/MS_CLK
VSS
SM_WR
EE_SDA
SD/MS/xD
EE_CLK
AVDD33
DP
DM
AVSS
CLK_CR_48M
SM_WPSW
SM_RD
SM_RNB
SM_D0
SM_D1
PWR_SW2
PWR_SW2
XTALO
XTALI
xD_CD
Clk48M
SM_WP_SW/SD_CMD/MS_BS
SM_RD/MS_INS
SM_RNB/SD_CD
SM/SD/MS D0
SM/SD/MS D1
SM_CLE
SM/SD/MS D2
VDD18
D3.3V
+V3.3AL
C193
0.1UF/25V,Y5V
C0402
C195
2.2uF/10V,X7R
C0805
24
23
22
21
20
19
18
17
16
15
14
13
RST
ClkSel
SM_D3
C197
1uF/10V,X7R
C0603
C196
0.1UF/25V,Y5V
C0402
PWR_SW2
D3.3V
DGND
C198
0.1UF/25V,Y5V
C0402
SM_WP
R246 0
R0402
IT1337E-48 PIN MUX

PINs
05
SM/xD
SM_WPSW
06
SM_RD
07
SM_RNB
SD/MMC
SD_CMD
MS
MS_BS
MS_INS
SD_CD
08
SM_D0
SD_D0
MS_D0
09
SM_D1
SD_D1
MS_D1
11
SM_D2
SD_D2
MS_D2
18
SM_D3
SD_D3
MS_D3
22
SM_D4
SD_D4
MS_D4
29
SM_D5
SD_D5
MS_D5
32
SM_D6
SD_D6
MS_D6
34
SM_D7
SD_D7
MS_D7
39
SM_CE
SD_WP
40
SM_WP
SD_CLK
MS_CLK
SD_CLK
+V3.3S
1
2
3
4
5
6
7
8
9
10
11
12
37
Clk12M-out 38
SM_CE
39
SM_WP
40
DGND
41
42
EE_SDA
43
EE_SCL
44
D3.3V
45
46
47
DGND
48
ns
C190
2.2uF/10V,X7R
C0805
C192
4.7uF/10V,X5R
C0805
REG33Vin
REG18Vout
SM/SD/MS D7
GPIO6
SM/SD/MS D6
GPIO5
TC
SM/SD/MS D5
GPIO1
GPIO4
VSS
REG33Vout
36
35
34
33
32
31
30
29
28
27
26
25
U7
R0402
R0402
C199
0.01uF/25V,X7R
C0402
VDD18
3IN1 CONN
J2A
use 48Mhz crystal

ClkSel
R247
0
R0402
CLK_CR_48M {24}
SM_D2
SM_D3
SM_WPSW
2
3
4
DAT2_SD
DAT3_SD
CMD_SD
SD_CLK
CLK_SD
SM_D0
SM_D1
SM_RNB
SM_CE
9
10
1
11
use 12Mhz crystal
D3.3V
DAT0_SD
DAT1_SD
CD_SD#
WP_SD#
PWR_SW2
VDD_SD
6
C201
1uF/10V,X7R
C200
C0603
0.1uF/10V,X7R
SD+MMC
VSS_SD2
VSS_SD1
VCC_MS
13
3IN1
PWR_SW2
R248
C202
0.1UF/25V,Y5V
C0402
ns
EEprom Setting
U8
1
2
3
4
A0
A1
A2
VSS
VCC
WP
SCL
SDA
8
7
6
5
0
Clk12M-out Int-12MHz
R0402
J2B
XTALI
EE_SCL
EE_SDA
S-24CS02AFJ-TB-G
SO8_50_150
ns
R249
0
R0402
R250
0
R0402
ns
SD_CLK
14
CLK_MS
SM_D3
SM_RD
SM_D2
SM_D0
SM_D1
SM_WPSW
15
16
17
18
19
20
DAT3_MS
INS_MS
DTA2_MS
DTA0_MS
DTA1_MS
BS_MS
MS
VSS_MS1
VSS_MS2
GND1
GND2
C204
1uF/10V,X7R
C203
0.1uF/10V,X7RC0603
12
21
22
23
3IN1
S0=P12=EEP_SDA
S1=P13=EEP_SCK
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size Project Name
Custom
Cardreader(ITE1337)
Rev
C
C48

32
59
of
Date:
Sheet
5
+V3.3S
+V5S
+V3.3S
VCC5CDC
FB10
600ohm@100MHz,1.5A
1
C209
0.1UF/25V,Y5V
0.1UF/25V,Y5V
ICTP
ns
A_GPIO0
GPIO0
ns
A_GPIO1
GPIO1
T32
ICTP
AVDD1
AVDD2
VDD1
VDD2
T31
35
FRONT-OUT-R
36
LINE1-VREFO-R
37
{23} AZALIA_CODEC_RST#
{23} AZALIA_CODEC_BITCLK
R257
75K
R0402
C220
C0603
1uF/10V,X7R
JACK_DET_A
R262
4.7K
C221
100pF/50V,NPO
R263
4.7K
{41}
MIC2_L
{41}
MIC2_R
JACK_DET_A
JACK_DET_B
R271
PC-BEEP
13
JD1
14
LINE2-L
R272
20K,1%
R273
20K,1%
HP_DET
HP_DET
MIC1_JD
ns
{41}
MIC1_JD
30
LINE2-VREFO
31
15
LINE2-R
MIC1-VREFO-R
32
DCVOL
33
ALC662
JD2
34
CEN-OUT
43
LFE-OUT
44
75
R0402 C222
4.7uF/10V,X5R
C0805 16
MIC2-L
SIDESURR-OUT-L
45
MIC2_R
R266
75
R0402 C223
4.7uF/10V,X5R
C0805 17
MIC2-R
SIDESURR-OUT-R
46
ICTPT33
ns
18
CD-L
SPDIFI/EAPD
47
ICTPT34
ns
20
CD-R
SPDIFO
48
C225
1uF/10V,Y5V C0603
21
MIC1-L
C224
1uF/10V,Y5V C0603
22
MIC1-R
23
LINE1-L
24
LINE1-R
5.11K,1% R0402 ns
5.11K,1% R0402
MIC2-VREFO
SDIN
12
VerA:follow the DEMO design in MIC1&MIC2 071108
{41}
QFPS48_0D5_1D6
4.7uF/10V,X5R
C0805
R254 75 R0402 SURR_OUT_L
SURR_OUT_L
100uF/10V
R255 75 R0402 SURR_OUT_R
SURR_OUT_R
100uF/10V
4.7uF/10V,X5R
C0805
C214
0.1UF/25V,Y5V
{41}
{41}
VREFOUT
R256
R264
INT_MIC_L
R269
29
CT1
ns
ct6032
CT2
ns
ct6032
C213
C218
MIC2_L
All of JD resistors should be

placed as close as possible to
the sense pin of codec.
JACK_DET_B
LINE1-VREFO-L
AGND1
AGND2
R261
28
SURR-OUT-L
39
JDREF
40
SURR-OUT-R
41
MIC2_REF
GND_AUD
INT_MIC_L_R
MIC2_REF
R258
R260
C0805
10UF/6.3V,X5R
4.7K R0402
10K ns
{41}
INT_MIC_L_R
4.7K R0402
ns
VCC5CDC
JACK_DET_B
EAPD R268
ns
R0402 SHUTDOWN#
AMP_OUT_L
R270
20K,1%
GND_AUD
AMP_OUT_R
ALC662
26
42
1uF/10V,X7R
CD-GND
C219
C0603
27
SDOUT
GND1
GND2
R0402
33
VREF
MIC1-VREFO-L
SYNC
4
7
SPKR
51K
BITCLK
19
{23}
R259
{23} AZALIA_SDATAIN0
BTL_BEEP
REST#
10
{23} AZALIA_CODEC_SYNC
{23} AZALIA_CODEC_SDOUT
{42}
11
C212
FRONT-OUT-L
C211
0.1UF/25V,Y5V
Cross moat place
U9
GND_AUD
VerA:Reserve +1.5S power rail for GM
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{22,24,26,30,34,36,38,40,41,42,49,50,53,54}
2FB0805
C210
10UF/6.3V,X5R
C0805
0.1UF/25V,Y5V
C208
0.1UF/25V,Y5V
C207
10UF/6.3V,X5R
C0805
25
38
C206
1
9
C205
+V5S
connecr mic1_jd to senseB

and reserved route to senseA
By Johan 071224
T35 GND_AUD
ICTP
ns
INT_MIC_L_R
FB15 FB0805
1
2
300ohm@100MHz,1.5A
R277
10K
ns
R278
10K
GND_AUD GND_AUD
C235
ns
ns
2FB0805
300ohm@100MHz,1.5A
PQ4
2N7002
SOT23
GND_AUD
1
2
SURR_OUT_R
PQ3
2N7002
SOT23
VCC5CDC
U10
TPA6017A2
sop20_0d65_4d4g
AMP_OUT_R
C232
FB16 1
GND_AUD
AMP_SHDW1
INPUT:STEREO MIC-IN
OUTPUT:CENT/LFE
onboard stereo
microphone
GAIN0
GAIN1
PQ2
2N7002
SOT23
C0603
0.22uF/10V,X7R
GND_AUD
0.1UF/25V,Y5V
AMP_OUT_L
C236
C0603
0.22uF/10V,X7R
R280
C233
0.47uF/25V,Y5V
R281 10K
C0603
C234
0.22uF/10V,X7R
C0603
R282
20K
SHUTDOWN#
GND_AUD
20K
INTSPK1
INT_spkR 2Pin
CNS2_V
4 2 2
GND_AUD
3
ROUT-
14
-INTSPR
+INTSPL
-INTSPL
RIN-
ROUT+
RIN+
LOUT+
10
BYPASS LOUT-
5
12
LINNC
16
6
15
1
11
13
20
21
19
GAIN0
GAIN1
GNDGND_AUD,
A
+INTSPR
7
9
R279
10K
18
17
LIN+
VDD
PVDD1
PVDD2
SHDWN# GND1
GND2
GAIN0
GND3
GND4
GAIN1
GND5
+INTSPR
{41}
-INTSPR
{41}
SHUTDOWN#
3
AMP_SHDW1
GND_AUD
ns
15.6dB
21.6dB
SURR_OUT_L
PQ1
2N7002
SOT23
ASSY
R276
10K
Q11
2N7002
VCC5CDC
{42} AMP_SHDW
R275
10K
Av(inv)
6dB
10dB
MIC1
Microphone
BZ_D6027
GAIN0 GAIN1
0
0
0
1
1
0
C231
100pF/50V,NPO
C0402
D17
ESDPAD_R0603
EGA1-0603-V05
ns
VCC5CDC VCC5CDC
+
1
2
1K
INT_MIC_L R274
R284
10K
C237
0.1UF/10V,X7R
R283
100K
SOT23
C239 4.7uF/10V,Y5V
C238
C0805
0.1UF/10V,X7R
GND
GND_AUD
GND_AUD
A
+INTSPL
-INTSPL
TOPSTAR TECHNOLOGY
Joseph
Page Name
AZALIA(ALC883)
Size
C
C48
Project Name
Rev
C
Date:
Sheet
of
33
59
5
+V3.3S
H3
H1
H2
+V3.3S
+V5S
+V3.3AL
+V1.1S_VTT
+V1.5S
BT
Q12
AO3415
0
FAN
BT
BT_ON#
ns
R292
BT 1K
12
BT 1K
1
R301
100K
BT
2
3
CHK6 90ohm@100MHz,0.5A
1
4
ns
L4_0805
FAN
BT_USB_PP5
BT_USB_PN5
{27}
{27}
TH_220_132_118_6
+V5S
BT_CON
R342
ns
BT
M46 VERB:CHANGE BT_CON THE SAME AS X01--XIEZX
R957
R300
{42} BT_PWRON
Q13
2N7002E-T1-E3
SOT23
BT
1
2
3
4
5
6
7
8
9
10
BT_ON#
+V3.3AL +V3.3S
BillitonCCOM
BT
100K BT_PWRON
R298
10K
ns
R297
10K
R299
10K
ns
FAN_BACK
{42}
C242
3
R291
1
2
11 3
4
12 5
6
7
8
9
10
H4
TH_220_132_118_6
1
2
3
4
5
6
7
11
D
FAN
ns
TH_220_132_118_6
BT 0 R0402
BT 0 R0402
1
2
3
4
5
6
7
R289
100K
BT
R288
R290
0.1UF/10V,X7R
TPCON_USB
CNS10_0D8_R
FAN
ns
TH_230_132_118_6
C241
1
2
3
4
5
6
7
BT
1
2
3
4
5
6
7
R286
C240
1000pF/50V,X7R
BT
1
2
3
4
5
6
7
2
BT
0 R0805
1
2
3
4
5
6
7
ns
1
2
3
4
5
6
7
BT 0 R0805
R287
1
2
3
4
5
6
7
R285
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{22,24,26,30,33,36,38,40,41,42,49,50,53,54}
{6,22,23,24,25,27,28,30,32,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
{8,10,11,28,29,30,48,49,53}
{35,37,39,54}
0.47uF/25V,Y5V
BT
R302
1K
FAN_TACH_ON
ns
C243
+V5S
1000pF/50V,X7R
+V5S
Q14
2N2222
SOT23
ns
R304
0
ns
Q15
Vfan
CPUFAN1
2
R309
10K
TCM
PM_CLKRUN#
LPCPD#
LPCPD#
LPCPP
PM_CLKRUN#
LPCPP
R317
10K
TCM
R318
10K
TCM
9
3
BA0
BA1
PP
14
C253
1uF/10V,X7R
C0603
TCM
GND1
GND2
GND3
GND4
4
11
18
25
NC
NC1
NC2
NC3
NC4
NC5
NC6
1
2
5
6
8
12
13
R311
R0805
0
TCM
0.1UF/25V,Y5V
1
C247
10uF/6.3V,X5R
TCM
C248
0.1UF/25V,Y5V
TCM
CONN3_V
CNS3_V
FAN_FB
U12A
LM358
so8_50_150
3
Shut-Down
+V3.3S
1
10
19
24
VDD1
VDD2
VDD3
R310
1K
LFRAME#
LRESET#
LCLK
LAD0
LAD1
LAD2
LAD3
SERIRQ
CLKRUN#
LPCPD#
C249
0.1UF/25V,Y5V
TCM
C250
2
R313
R314
4.7K
R0402
10K,1%
2
R320R312
10K 10K
TCM ns
22
16
21
26
23
20
17
27
15
28
1
2
3
5.11K,1%
U11
{23,37,42} LPC_FRAME#
{8,17,27,35,37,39,41,42} BUF_PLT_RST#
{27} CLK_TCMPCI
{23,37,42} LPC_AD0
{23,37,42} LPC_AD1
{23,37,42} LPC_AD2
{23,37,42} LPC_AD3
{23,42} INT_SERIRQ
1N4148WS
SOD323
R308
VCC_358
C246
+V3.3S
+V3.3S
0.1UF/25V,Y5V
R307
10
R0603
C245
10uF/10V,Y5V
C1206
D18
TCM
1
2
3
C244
R306
1K
BCP69-16
SOT223 4
2
0.1UF/25V,Y5V
R315
100K 2
1
R316
200K
R0402
FAN1_V
Throttling/
Un-throttling
High-5V
{42}
Middle-4V
Low-3V
FAN1_V=3.30V,Vfan=5V
NC-P
TCM
SOP28_0D65_6D1
C252
C251
4.7UF/10V,Y5V
C0805
0.1uF/25V,Y5V
C0402
50
55
60
65
70
75
80
85
90
95
100
+V1.1S_VTT
+V1.1S_VTT
R209
1K
R0402
ns
R319
10K
SHDN_LOCK#
3
Q31
MMBT3904-F
SOT23
5
C254
1000pF/50V,X7R
SHDN_LOCK# {51}
2
Q16
MMDT3904
SC70_6
Del OVP CIRCUIT
R324
100K
{8,28} THERMTRIP#
10K
R322
{21} GPU_OVT#
ns
3
Q17
{42}
2N7002E-T1
ALT_ON
Use for temperature alarm driver.

R328
100K
VerA:Delete GMCH_TEMP signal and components 071026
CPU
Shut Down
PCB
R20 MB
Throttling on
THRMTRIP#
AND
PCB
SHDN#
PCBA
R20 PCBA
8VCC_358
VIN
PCBA
CPU Temperature
THERM_ALERT#
VDC
85
90
95
100
(Degree)
TOPSTAR TECHNOLOGY
Joseph
U12B
LM358
so8_50_150
7
Page Name
MDC&BT/FAN/OTP
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
34
59
Thermal
sensor
Throttling Off
0
PCIE_NUT3
Hole+Dowel
+V3.3S
+V3.3AL
+V1.5S
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{6,22,23,24,25,27,28,30,32,34,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
{37,39,54}
+DATA4
+V3.3AL
R647
0
R0603
ns
R648
0
R0603
R0402
R0402
CHK11
90ohm@100M0.33A
l4_0805
ns
3
4
2
1
{27} MINICARD_USB_PN1
{27} MINICARD_USB_PP1
+3.3V0
+3.3V1
Keep USB2.0 Signal stub short

R645 0
R646 0
-DATA4
+DATA4
36
38
R649
0
R0603
R644
0 +V1.5S
R0603
ns
48
28
6
+V3.3AL_PCIE
2
52
+V3.3S_PCIE
MPCIE2
MINIPCIE_l6
+V3.3S
+1.5V0
+1.5V1
+1.5V2
+V3.3S
D40
ESDPAD_R0603
EGA1-0603-V05
ns
24
1
2
1
2
D39
ESDPAD_R0603
EGA1-0603-V05
ns
+3.3VAUX
-DATA4
USB_DUSB_D+
+V3.3S
LED_WPAN#
LED_WLAN#
LED_WWAN#
46
44
42
PERST#
WAKE#
CLKREQ#
22
1
7
SMB_DATA
SMB_CLK
32
30
11
13
REFCLKREFCLK+
{24} PCIE_TXN4_WLAN
{24} PCIE_TXP4_WLAN
31
33
PETN0
PETP0
{24} PCIE_RXN4_WLAN
{24} PCIE_RXP4_WLAN
23
25
PERN0
PERP0
{24} CLK_PCIE_MINICARD#
{24} CLK_PCIE_MINICARD
ns
ns
ICTP
ICTP
T23
T22
17
19
RESERVED0
RESERVED1
37
39
41
43
45
47
49
51
RESERVED_PCIE0
RESERVED_PCIE1
RESERVED_PCIE2
RESERVED_PCIE3
RESERVED_PCIE4
RESERVED_PCIE5
RESERVED_PCIE6
RESERVED_PCIE7
+V3.3AL
+V3.3S
R108 0
R0603
CHANNEL_CLK
CHANNEL_DATA
5
3
RESERVED_DISABLE
20
RESERVED_SIM0
RESERVED_SIM1
RESERVED_SIM2
RESERVED_SIM3
RESERVED_SIM4
16
14
12
10
8
R650
10K
R0402
ns
T162
Wireless_LED# {43}
ICTP
ns
T163
minicard_Wake#
MiniPCIE_REQ1#_R
T49 ICTP
T55 ICTP
R674
ns
R673
R0402
R0402
R0402
0
ns
ns
R0402
R652 0
R653 0
R654 0
R655 0
R0402
R0402
ns
ns
ns
CL_DATA1
CL_CLK1
+V3.3AL
ns
ns
T164
R664 ICTP
0
R0402
R666 0
R0402
R668 0
R0402
T165
R651
10K
R0402
ns
MiniPCIE_REQ1#_R
{24}
minicard_Wake#
{24}
{24}
R0402
10K
R657
R660 0
ns
CL_RST1#
BUF_PLT_RST# {8,17,27,34,37,39,41,42}
PCIE_WAKE# {25,37,39,41,42}
minicard_CLKREQ# {24}
R0402
ns
ns
ns
HW_RATIO_OFF#
{42}
PWR_SW_VCC2 {41,42,46}
EC_DEBG_UTXD {42}
EC_DEBG_URXD {42}
ICTP
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
R104 0 R0603
R53
0
ns
R0603
PCIE mini Card
ICTP
ns
+V3.3AL
+V3.3S_PCIE
C454
10UF/6.3V,X5R
C0805
9
15
21
27
29
35
4
18
26
34
40
50
53
54
56
57
58
59
60
61
55
PCIE MINI CARD
+V3.3AL_PCIE
C455
0.1UF/25V,Y5V
C0402
C456
10UF/6.3V,X5R
C0805
C457
0.1UF/25V,Y5V
C0402
ns R284,R295,R337,R341, Install R283

For chang PCIE SPEC to 1.1
Swain 081104
+V1.5S
C458
10UF/6.3V,X5R
C0805
C459
0.1UF/25V,Y5V
C0402
C460
0.1UF/25V,Y5V
C0402
C461
0.1UF/25V,Y5V
C0402
C462
0.1UF/25V,Y5V
C0402
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A3
Project Name
PCIE MINI SLOT 1

Rev
C
C48

35
59
Date:
Sheet
of
5
+V3.3S
+V3.3S
+V3.3S
R670
4.7K ns
R656
4.7K
DDCBUF_EN
R661
4.7K
ns
DDC_EN
AD+
+V5S
+V3.3S
+V3.3AL
+V3.3GPU
{41,44,46}
{22,24,26,30,33,34,38,40,41,42,49,50,53,54}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{6,22,23,24,25,27,28,30,32,34,35,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
{17,20,21,38,55}
R669
4.7K
GM/HDMI
TMS_EN
R671
0
ns
R658
0
CFG
GM/HDMI
D
GND
GND
GM/HDMI
+V3.3S
C517
0.01uF/25V,X7R
+V5_HDMI
+V5_HDMI
HDMIHP_C
5VDDCDA_HDMI
5VDDCCK_HDMI
+V3.3S
DDC_EN
CFG
DDCBUF_EN
GM/HDMI GM/HDMI
GND
5VDDCCK_HDMI
5VDDCDA_HDMI
C518
C519
0.01uF/25V,X7R 0.01uF/25V,X7R
GM/HDMI
G7
G6
36
35
34
33
32
31
30
29
28
27
26
25
G5
G4
GM/HDMI
{26} IN_D1+
{26} IN_D1{26} IN_D0+
{26} IN_D0{26} MCH_CLK_D4+
{26} MCH_CLK_D4-
g7
g6
GND7
FUNCTION4
FUNCTION3
VCC3V5
DDC_EN
GND6
HPD_SINK
SDA_SINK
SCL_SINK
GND5
VCC3V4
TMDS_EN
g5
g4
GND
VCC3V
FUNCTION1
FUNCTION2
GND1
ANALOG1(REXT)
HPD_SOURCE
SDA_SOURCE
SCL_SOURCE
ANALOG2
VCC3V1
GND2
gnd18
{26} IN_D2+
{26} IN_D2-
GND
g1
gnd10
GND4
OUT_D1OUT_D1+
VCC3V3
OUT_D2OUT_D2+
GND3
OUT_D3OUT_D3+
VCC3V2
OUT_D4OUT_D4+
g2
g3
GND8
IN_D1IN_D1+
VCC3V6
IN_D2IN_D2+
GND9
IN_D3IN_D3+
VCC3V7
IN_D4IN_D4+
CH7318
GND
1
2
3
4
5
6
7
GM_HDMI_DDC_DATA 8
GM_HDMI_DDC_CLK
9
10
11
12
G8
37
38
39
40
41
42
43
44
45
46
47
48
GM/HDMI
G1
49
24
23
22
21
20
19
18
17
16
15
14
13
G2
G3
IFPC_TXD2P
IFPC_TXD2N
C520
0.01uF/25V,X7R
C521
0.01uF/25V,X7R
IFPC_TXD1P
IFPC_TXD1N
GM/HDMI
GM/HDMI
IFPC_TXD0P
IFPC_TXD0N
IFPC_TXC
IFPC_TXC#
+V3.3S
C
Note:The ESD protection devices should be placed as

close to the HDMI connector as
possible so that when ESD strikes occur, the
discharges can be quickly absorbed or
diverted to the ground/power plane before it is
coupled to another signal path nearby.
GND
PC0
PC1
U25
GM/HDMI
GND
C522
0.01uF/25V,X7R
GM/HDMI
+V3.3S GND
{20} IFPC_TXD1P
{20} IFPC_TXD1N
R161
0 R0603
R162
0 R0603
HDMI
CHK2HDMI
l4_0805
ns
4
3 100M0.33A
1 CHK3
2
GND_HDMI
4
3
1
2
{20} IFPC_TXD0P
{20} IFPC_TXD0N
100M0.33A
R163
0
R0603
l4_0805
R165 0 R0603
ns HDMI
HDMI
R166
0 R0603
R167
0 R0603
HDMI
CHK4HDMI
l4_0805
4
3 100M0.33A
ns
1
CHK5 2
{20}
{20}
4
1
intel demo 499 and chro demo 1.2k by homy 1029
GM/HDMI
+V3.3S
{20} IFPC_TXD2P
{20} IFPC_TXD2N
GND
GND
Colay 8101 and
Colay 8101 and
7318
7318
+V3.3S
by xiezx
by xiezx
MCH_HDMI_HPD
499,1%
PS8101
{26}
R659
R890
1.2K
CH7318
R672
2.2K
R706
2.2K
TMS_EN
C516
0.01uF/25V,X7R
IFPC_TXC
IFPC_TXC#
+V3.3S
1
2
3
4
5
LINE_1 NC4
LINE_2 NC3
VDD
GND
LINE_3 NC2
LINE_4 NC1
+V5S
10
9
8
7
6
IFPC_TXD6P_esd
IFPC_TXD6N_esd
HDMI_CON1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
IFPC_TXD5P_esd
IFPC_TXD5N_esd
AZ1045
HDMI
IFPC_TXD4P_esd
IFPC_TXD4N_esd
IFPC_TXC_esd
IFPC_TXC#_esd
GU10
IFPC_TXD4P_esd
IFPC_TXD4N_esd
GND_HDMI GC172 0.1uF/10V,X7R
IFPC_TXC_esd
C0402
IFPC_TXC#_esd HDMI
3
2
100M0.33A
R168 0
l4_0805
R169
0
HDMIns
HDMI
+V5_HDMI
GU9
IFPC_TXD6P_esd
IFPC_TXD6N_esd
GC171 0.1uF/10V,X7R
IFPC_TXD5P_esd C0402
IFPC_TXD5N_esd
HDMI
1
2
3
4
5
LINE_1 NC4
LINE_2 NC3
VDD
GND
LINE_3 NC2
LINE_4 NC1
10
9
8
7
6
5VDDCCK_HDMI
+V5_HDMI 5VDDCDA_HDMI
HDMIHP_C
AZ1045
HDMI
R0603
R0603
D2+
D2 SHTELD
D2D1+
D1 SHTELD
D1D0+
GND1
D0 SHTELD
GND2
D0CK+
CK SHTELD GND3
CKGND4
CEC
RESERVED
SCL
SDA
DCC/CEC_GND
+5V
HP_DET
FB9
D4
1
HDMI
20
21
2120ohm@100MHz,500mA
1N5819HW-F
SOD123
FB0603
C181
0.1UF/25V,Y5V
C0402
HDMI
R164
100K
R0402
HDMI
HDMI
GND_HDMI
GND_HDMI
22
23
GND_HDMI
HDMI_CON
HDMI
B
GND_HDMI
GND_HDMI
Colay COMCHK with 0ohm

R665
2.2K
GM/HDMI
PC0
R667
2.2K
GM/HDMI
+V5_HDMI
GM_HDMI_DDC_DATA
PC1
R0402
R0402
GM_HDMI_DDC_CLK
{26}
R663
4.7K
PS8101
+V3.3GPU
D6
BAT54A
PM/HDMI
+V3.3GPU
hads
R930
4.7K
CH7318
GR55
4.7K
R0402
PM/HDMI
{20} HDMI_DDC_CLK
R171
0
R0402
PM/HDMI
5VDDCCK_HDMI
3
PM/HDMI
BSS138
GQ1
GND
R173
GND_HDMI
GNDGND_HDMI,
R172
4.7K
PM/HDMI
change 4.7k to 2.2k 080508
R170
0
R0402
PM/HDMI
{26}
R662
4.7K
ns
C182
10pF/50V,NPO
C0402
PM/HDMI
R0402
ns
+V3.3GPU
GND_HDMI
+V3.3GPU
GR56
10K
R0402
+V3.3GPU
+V3.3AL
GPU_HDMI_HPD
5VDDCDA_HDMI
3
PM/HDMI
BSS138
GQ2
R175
C183
10pF/50V,NPO
C0402
PM/HDMI
R0402
ns
HDMIHP_C R456
1K
PM/HDMI
1
GR59
100K
R0402
PM/HDMI PM/HDMI
GND_HDMI
PM/HDMI
1
GC173
GR60
PM/HDMI
10K
C0402
R0402
TOPSTAR TECHNOLOGY
Joseph
PM/HDMI
GND_HDMI
{21,42}
GR58
1K
R0402
100pF/50V,NPO
PM/HDMI
GQ4
2N7002
SOT23
{20} HDMI_DDC_DATA
GQ3
2N7002
SOT23
R174
4.7K
PM/HDMI
GR57
4.7K
R0402
PM/HDMI
GND_HDMI
PM/HDMI
Page Name
Size
A2
HDMI CONN
Project Name
C48
Rev
C
Date:
Sheet
36
59
of
5
MPCIE_NUT1
Hole+Dowel
MPCIE_NUT2
Hole+Dowel
3G
3G
+V3.3S
+V1.5S
+V3.3AL
+VDC
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,38,39,40,41,42,43,47,48,49,50,51,53,54,55,56}
{35,39,54}
{6,22,23,24,25,27,28,30,32,34,35,36,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
{22,44,46,47,48,49,50,53,54,55}
+DATA8
-DATA8
+V3.3S
11
13
REFCLKREFCLK+
{24} PCIE_TXN2_3G
{24} PCIE_TXP2_3G
31
33
PETN0
PETP0
{24} PCIE_RXN2_3G
{24} PCIE_RXP2_3G
23
25
PERN0
PERP0
{24} CLK_PCIE_3G#
{24} CLK_PCIE_3G
{8,17,27,34,35,39,41,42}
+VDC
BUF_PLT_RST#
{27} PCI_CLK_DEBUG
{23,34,42} LPC_FRAME#
{23,34,42} LPC_AD0
{23,34,42} LPC_AD1
{23,34,42} LPC_AD2
{23,34,42} LPC_AD3
R675 0
R695 0
R0402
R0402
ns
Debug
17
19
RESERVED0
RESERVED1
R697 0
R687 0
R0402
R0402
Debug
PICE_39
R0402
R0402
Debug
R0402
Debug
R0402
Debug
R0402
Debug
R0402
Debug
37
39
41
43
45
47
49
51
RESERVED_PCIE0
RESERVED_PCIE1
RESERVED_PCIE2
RESERVED_PCIE3
RESERVED_PCIE4
RESERVED_PCIE5
RESERVED_PCIE6
RESERVED_PCIE7
R688
R676
R698
R696
R686
R699
0
0
0
0
0
0
24
USB_DUSB_D+
LED_WPAN#
LED_WLAN#
LED_WWAN#
46
44
42
PERST#
WAKE#
CLKREQ#
22
1
7
SMB_DATA
SMB_CLK
32
30
CHANNEL_CLK
CHANNEL_DATA
T166
T167
ns
ns
T168
ns
WAKE#
R681 0
minicard_CLKREQ#_RR684 0
R682 0
R683 0
BUF_PLT_RST# {8,17,27,34,35,39,41,42}
PCIE_WAKE# {25,35,39,41,42}
MiniPCIE_REQ# {24}
ns
ns
ns
ns
SMB_DATA_S {6,14,15,24,39}
SMB_CLK_S {6,14,15,24,39}
SIM_PWR
D21
ESDPAD_R0603
EGA1-0603-V05
ns
5
3
RESERVED_DISABLE
20
RESERVED_SIM0
RESERVED_SIM1
RESERVED_SIM2
RESERVED_SIM3
RESERVED_SIM4
16
14
12
10
8
R685
R689
SIM_REST
SIM_CLK
SIM_DATA
SIM_PWR
0
0
3G
HW_RATIO_OFF_3G#
D22
ns
3G
SIMCONN1
SIM_PWR
SIM_REST
D42
+V3.3S
C332
0.1UF/25V,Y5V
D23
C0402
ns
ns
ns
PICE_39
C259
100pF/50V,NPO
C0402
C260
1uF/10V,X7R
C0603
3G
SIM_CLK
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
PCIE MINI CARD
SIM_VPP
SIM_DATA
ns
C331
D41
47pF/50V,NPO
C0402
ns
R401
56
R0402
ns
R0603
R0603 ns
SIM_DATA
8.2K
3G
{42}
R690 R691
10K
10K
ns
3G
9
15
21
27
29
35
4
18
26
34
40
50
53
54
56
57
58
59
60
61
55
62
63
64
65
66
67
68
R700 0
R701 0
R347
R0402
SIM_VPP
+V3.3AL
+V3.3AL
+V3.3S
C463
0.1UF/25V,Y5V
C0402
-DATA8 36
+DATA8 38
WAKE#
CHK12
4
1
ns
90ohm@100M0.33A
l4_0805
minicard_CLKREQ#_R
3G
3G
R678
10K
ns
3
2
{27} MINICARD_USB_PN2
{27} MINICARD_USB_PP2
0
0
R677
10K
ns
R679
R680
+3.3V0
+3.3V1
+3.3VAUX
MPCIE1
MINIPCIE_D
3G
+V1.5S
3.3ALPCIE2
2
52
3.3PCIE2
+V3.3AL
48
28
6
R333
0
R0603
3G
PCIE mini Card
R329
0
R0603
3G
R332
0
R0603
ns
ESDPAD_R0603
ns
+1.5V0
+1.5V1
+1.5V2
D20
EGA10603V05A1-B
ESDPAD_R0603
ns
D
+V3.3AL +V3.3AL
+V3.3S
1
D19
EGA10603V05A1-B
C1
C2
C3
VCC1
RESET
CLK
C5
C6
C7
GND
VPP
IO
CD
HOLE0
HOLE1
G1
G2
CD
SIMCON
3G
ns SIM card periphery current

081222
Add Option for 3G card

Swain 080820
+V1.5S
3.3PCIE2
C468
1uF/10V,X7R
C0603
3G
C469
0.1UF/25V,Y5V
C0402
3G
C470
C471
0.1UF/25V,Y5V
0.1UF/25V,Y5V
C0402
C0402
3G
3G
3.3ALPCIE2
C472
10UF/6.3V,X5R
C0805
3G
C473
0.1UF/25V,Y5V
C0402
3G
C474
1uF/10V,X7R
C0603
3G
C475
0.1UF/25V,Y5V
C0402
3G
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A2
USB Port
Project Name
C48
Rev
C
Date:
Sheet
37
59
of
5
CRT
1
+V3.3S
+V5S
+V3.3GPU
INTERFACE
S46P VerB:staff this BAV99 to

improve ESD protection
Cross moat place
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,39,40,41,42,43,47,48,49,50,51,53,54,55
{22,24,26,30,33,34,36,40,41,42,49,50,53,54}
{17,20,21,36,55}
Cross moat place
+V5S
Place close to VGA port
VGA CONNECTOR
+V5_VGA
IFB1
47ohm/100MHz,500mA
1FB0603 2
R0603
IR1
150,1%
IC23
GR232
{20} CRT_GREEN
5.6pF/50V,NPO
IFB3
GND_VGA
47ohm/100MHz,500mA
1FB0603 2
R693
0
NV suggest:22pf
PM
5.6pF/50V,NPO
IC3
5.6pF/50V,NPO
ns
5.6pF/50V,NPO
ns
GND_VGA
GND_VGA
6
1
7
2
8
3
9
4
10
5
GND_VGA+V5_VGA
IC4
IC5
GOUT
5.6pF/50V,NPO
5.6pF/50V,NPO
ID3
BAT54SPT
SOT23
R327
GM
0
IC24
GND_VGA
CONNECTOR
TOP VIEW
IR3
150,1%
2
120ohm@100MHz,500mA
FB0603
IR2
100K
IC2
0.1UF/25V,Y5V
NV suggest:2pf
R0603
{26} CRT_GREEN_R
IFB2
2 1
GM
1N5819
SOD123
ID2
BAT54SPT
SOT23
IC1
{26} CRT_RED_R
ID1
1
ROUT
R330
GR231
CRT_RED
GND
NC
11
SDA
G
GND
HSYNC
B
12
5VDDCDA
13
HSYNC
R
GND
NC
NC VSYNC
GND
GND
shell
CRT_BLUE
R0603
{26} CRT_BLUE_R
BOUT
IC10
IC11
5.6pF/50V,NPO
5.6pF/50V,NPO
IC25
GM
VSYNC
15
5VDDCCK
shell
C10518-11505-L
S_Bot
5.6pF/50V,NPO
ns
IC6
15PF/50V,NPO
IC7
15PF/50V,NPO
IC8
15PF/50V,NPO
ns
ID4
BAT54SPT
SOT23
R326 0
2 IFB4 FB0603
47ohm/100MHz,500mA
1
IR4
150,1%
GND_VGA+V5_VGA
16
GND_VGA
0
PM
{20}
CLK
14
R694
GR233
VGA1
VGADMF
17
R692
PM
{20}
GND_VGA
GND_VGA +V5_VGA
ESD:
NV suggest use +3.3V
Layout note:
1. +3.3V and GND Route >15mils trace width
2. No more than 75mils
3. ESD diode should no more than 10pf cap.
GND_VGA
IC9
15PF/50V,NPO
ns
GND_VGA
S46/M21VGA ConnLJ081223
150ohm50ohm
(From GPU to CONN)
+V5_VGA
+V5_VGA
+V3.3GPU +V3.3S
IC12
0.1UF/25V,Y5V
IC13
0.1UF/25V,Y5V
Cross moat place

GND_VGA
GND_VGA
+V5_VGA
R336
GND_VGA
R931
8.2K
R0402
GM
{26} CRT_DDC_DATA_R
R176
8.2K
R0402
0
reserved ciucuit possibility to Cost down 1G125 follow design guide--0929
PM
Q9
BSS138
SOT23
VerC: Del VR7

R928
R331
{20} CRT_DDC_DATA
GR229
{20} CRT_HSYNC
IU1
74AHCT1G125
SOT23_5
GM
PM
OE#
GND
IC15
IC16
0.1UF/25V,Y5V
0.1UF/25V,Y5V
VCC
{20} CRT_VSYNC
GR230
PM
OE#
GND_VGA
GND
VCC
5VDDCDA
+V3.3GPU +V3.3S
R334
GM
+V3.3S
R923
8.2K
R0402
GM
0 VerC: Change to bat54s
IR7
39
HSYNC
IR8
39
VSYNC
{20} CRT_DDC_CLK
R929
0
PM
GM
R0402
R924
R177
8.2K
R0402
Q10
BSS138
SOT23
BAT54SPT
SOT23
{26} CRT_DDC_CLK_R
Near U5/U6 ASAP
CRT_H_SYNC
VerC: Change to bat54s
GM
R932
0
GND_VGA
VerB:BAV99DIODESPHILIPS
for cost down
+V5_VGA071016
+V3.3GPU
ID7
0
R0402
PM
5VDDCCK
2
3
PM
CRT_V_SYNC
BAT54SPT
GND_VGA
SOT23
R925
{26} CRT_VSYNC_R
PM
R335
IU2
74AHCT1G125
SOT23_5
+V5_VGA
ID6
IR6
2.2K
{26} CRT_HSYNC_R
IR5
2.2K
GM
+V5_VGA
+V3.3S
R0402
GND_VGA
+V5_VGA
GM
IH1
0 R926
2
IC14
0.1UF/25V,Y5V
3
ID5
GND_VGA
SOT23
+V3.3GPU
0
R0402
PM
HOLE
TH_240_92
ns
BAT54SPT
VSYNC
Demo has no voltage lever shifter
GND_VGA
+V5_VGA
ID8
2
HSYNC
TOPSTAR TECHNOLOGY
IC17
0.1UF/25V,Y5V
Joseph
Page Name
1
BAT54SPT
Size Project Name

Custom
GND_VGA
C48
Rev
C

38
59
Date:
Sheet
of
SOT23
CRT Interface
+V3.3S
+V3.3S
+V1.5S
+V3.3AL
+V1.5S
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,40,41,42,43,47,48,49,50,51,53,54,55,56}
{35,37,54}
{6,22,23,24,25,27,28,30,32,34,35,36,37,41,42,43,44,45,46,47,48,49,50,51,54,56}
EP_MYLAR1
U13
R5538
QFNS20_0D5_0D85G
C286
0.1uF/10V,X5R
C285
0.1uF/10V,X5R
12
14
2
4
+V3.3AL
17
C287
PM_SLP_S3#
0.1uF/10V,X5RPM_SLP_S4#
Newcard_RST#
RCLKEN
add power
1.5Vin1
1.5Vin2
EXP_AUX_3.3V
3.3Vauxout
15
3.3Vauxin
1.5Vout1
1.5Vout2
11
13
STBY#
PERST#
EXP_RST#
CPPE#
10
EXP_CPPE#
CPUSB#
GND2
GND3
GND1
9
G1
G2
7
CP_USB#
3.3Vin1
3.3Vin2
20
SHDN#
6
16
18
19
SYSRST#
NC
RCLKEN
OC#
PVC
EXP_3.3V
3
5
3.3Vout1
3.3Vout2
Change mylar type follow ME advised

By Johan 071228
ASSY
D
EXP_1.5V
EP_CON1
Shield
ASSY
621000000002
{8,17,27,34,35,37,41,42}
sw
R371
BUF_PLT_RST#
Newcard_RST#
EP_B1
PM_SLP_S3#
PM_SLP_S4#
{25,42,51} PM_SLP_S3#
{25,42,54} PM_SLP_S4#
EP_B2
ASSY
ASSY
Screw 2*5mm
Screw 2*5mm
R373
100K
+V3.3AL
PM_SLP_S4# ns
+V3.3AL
D28
BAT54S
SOT23
{24} PCIE_TXN3_EXP
24
PETn0
RESV1
ns
{24} PCIE_RXP3_EXP
22
PERp0
{24} PCIE_RXN3_EXP
21
RESV2
19
{24} CLK_PCIE_EXPCARD
18
{24} CLK_PCIE_EXPCARD#
EXP_CPPE#
EXP_RST#
{6,14,15,24,37} SMB_DATA_S
{6,14,15,24,37} SMB_CLK_S
ns
D30
15
+3.3VS_1
14
GND0
26
+3.3VAUX
12
REFCLK+
REFCLKCPPE#
13
PERST#
C288
SMB_DATA
SMB_CLK
CPUSB#
USB_D+
USB_D-
EXP_AUX_3.3V
C290
WAKE#
0.1uF/10V,X5R
23
+1.5V_1
+1.5V_2
10
9
GND2
20
C292
GND3
GND4
GND5
27
28
0.1uF/10V,X5R C293
10UF/10V,Y5V
C1206
ns
EXP_1.5V
+V3.3AL
C291
10UF/10V,Y5V
C1206
ns
GND1
G2
RCLKEN
C289
10UF/10V,Y5V
C1206
ns
0.1uF/10V,X5R
G1
EGA1-0603-V05 EGA1-0603-V05
ESDPAD_R0603 ESDPAD_R0603
ns
ns
EXP_3.3V
EXPCARD_CLKREQ# {24}
R378 R379
100K 100K
R380
100K
CP_USB#
EXP_CPPE#
EXPCARD_CLKREQ#
Chang the CAP type from X7R to X5R
PECA00-000LBS4Z4N0
NEW_CARD3
G2
D29
+3.3VS_2
CP_USB#
{27} EXPCARD_USB_PP0
{27} EXPCARD_USB_PN0
R381 0
R0402
L4_0805
CHK9 2
1
3
4
ns
90ohm@100MHz,0.5A
R382 0
R0402
PERn0
17
11
{25,35,37,41,42} PCIE_WAKE#
CLKREQ#
16
3
PETp0
G1
25
Q19
2N7002E-T1-E3
SOT23
2
3
J3
{24} PCIE_TXP3_EXP
R374
TOPSTAR TECHNOLOGY
Joseph
Page Name
EXPRESS CARD
Size
A3
C48
Project Name
Rev
C

39
59
Date:
Sheet
of
5
+V5S
+V3.3S
+V5AL
{22,24,26,30,33,34,36,38,41,42,49,50,53,54}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,41,42,43,47,48,49,50,51,53,54,55,56}
{22,30,41,46,47,48,51,54}
SATAHDD_B1
SATAHDD_B2
Screw 2*8mm
Screw 2*8mm
+V3.3S
FB17
R0805
ns
CT3
V3.3_SATA
4.7uF/10V,Y5V
C0805
ns
C294
0.1UF/25V,Y5V
ns
C295
0.1UF/25V,Y5V
ns
ASSY
+V5S
ASSY
Average 1A,Peak 1.5A

FB18
0 R0805
CT4
V_HDD
4.7uF/10V,Y5V
C0805
C296
0.1UF/25V,Y5V
SATA_HDD1
{23}
{23}
{23}
V3.3_SATA
{23}
C297
0.1UF/25V,Y5V
SATA_TXP0
SATA_TXN0
SATA_RXN0
SATA_RXP0
C298
C299
V_HDD
2
0.01uF/25V,X7R 3
C0402
5
C0402
6
0.01uF/25V,X7R
8
9
10
+V5S
FB19
Average 1A,Peak 1.5A
R0805
CT5
4.7uF/10V,Y5V
C0805
C300
0.1UF/25V,Y5V
V_ODD
C301
0.1UF/25V,Y5V
TX
TX#
RX#
RX
GND0
GND1
GND2
1
4
7
VCC3_0
VCC3_1
VCC3_2
GND3
GND4
GND5
11
12
13
14
15
16
18
VCC5_0
VCC5_1
VCC5_2
REEVE
GND6
17
GND7
19
20
21
22
VCC12_0
VCC12_1
VCC12_2
GND23
GND24
23
24
SATA_HDD CONN
C
SATAODD_B1
SATAODD_B2
Screw 2*8mm
Screw 2*8mm
SATA_CON1
ASSY
{23} SATA_TXP1
{23} SATA_TXN1
C302
C303
{23} SATA_RXN1
{23} SATA_RXP1
S1
S2
S3
S4
0.01uF/25V,X7R S5
0.01uF/25V,X7R S6
S7
GND1
A+
A- GND6
GND2
BB+
GND3
P1
P2
P3
P4
P5
P6
DP
+5V_1
+5V_2
MD GND7
GND4
GND5
ASSY
14
V_ODD
15
B
sata_con
VerB:change the footprint the same as S46P
USB_+V5AL
ESATA_USB_CONN1
+V5AL
sis use 10K resistor

CT7
+
R339
300K
R0402
CT6032
ns
Co-layout CT31-CT6032
USB_OC#4
Cost down
R789
560K
R0402
C136
{27}
{23} SATA_RXN4
{23} SATA_RXP4
C305
C304
Vih_ttl>=2V
Vil_ttl<=0.8V
1000pF/50V,X7R
ns
C0402
0.01uF/25V,X7R
C0402
C0402
0.01uF/25V,X7R
S1
S2
S3
S4
S5
S6
S7
GND1
A+
AGND2
BB+
GND3
VBUS
DD+
GND4
U1
U2
U3
U4
GND5
GND6
GND7
GND8
12
13
14
15
ESATA_USB_CONN
90ohm@100MHz,0.5A
-DATA9
+DATA9
4
1
3
2 ns
CHK8
D27
ESDPAD_R0603
EGA1-0603-V05
ns
USB_PN9
USB_PP9
{27}
{27}
L4_0805
{23} SATA_TXP4
{23} SATA_TXN4
CT7343_28
2 FUSE 1.1A
FUSE1812
D36
ESDPAD_R0603 R343
EGA1-0603-V05
ns
R344
C0402
C137
+
100uF/10V,TAN
C135
100uF/10V,TAN
330PF/50V,X7R
S2
USB_+V5AL
R0603
R0603

TOPSTAR TECHNOLOGY
Joseph
Page Name
SATA HDD&ODD
Size
C
C48
Project Name
Rev
C
of
Date:
Sheet
40
59
5
3
+V5S
+V3.3AL
+V5AL
+VDC
AD+
+V3.3S
{22,24,26,30,33,34,36,38,40,42,49,50,53,54}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,42,43,44,45,46,47,48,49,50,51,54,56}
{22,30,40,46,47,48,51,54}
{22,37,44,46,47,48,49,50,53,54,55}
{44,46}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,42,43,47,48,49,50,51,53,54,55,56}
Touch_Button Conn
Usb_Audio Conn
+V3.3S +V5S
+V5AL
USB_AUDIO_CONN1
C333
1000pF/50V,X7R
C0402
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
C138
1uF/10V,X7R
{24,42} SML1DATA
{24,42} SML1CLK
{42}
TB_CHG
{42} C49 switch2
1
2
3
4
5
6
7
1
2
3 9 9
4
5
6 8 8
7
CNS7_0D5_RA1
Conn 6Pin
TP_CON2
{27}
{27}
USB_PP11
USB_PN11
{27}
{27}
USB_PP10
USB_PN10
{27}
USB_OC#5
{33}
{33}
{33}
{33}
MIC2_R
MIC1_JD
MIC2_L
MIC2_REF
{33} SURR_OUT_R
{33}
HP_DET
{33} SURR_OUT_L
{33}
{33}
-INTSPR
+INTSPR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
25
26
24pin 0.5mm bot FFC
Touch pad Conn
{42}
TPCLK
TPCLK
2
TR1
Q20
2N7002E-T1
ns
3
+V5S
+V3.3AL
R383
10K
R0402
ns
TP_TPCLK_R
+V3.3AL
{42}
TPDAT
TPDAT
0 R0402
TR2
power_Lan Conn
+V5S
R384
10K
R0402
ns
TP_TPDAT_R
Q21
2N7002E-T1
ns
3
0 R0402
31
PWRCONN1
87216-XXXX
R385 LEFT
1K
R0402
C306
D31
100pF/50V,NPO
1
2
3
4
5
6
1
2
3
4
5
6
+V5S
TP_TPDAT_R
TP_TPCLK_R
{8,17,27,34,35,37,39,42} BUF_PLT_RST#
{25,35,37,39,42} PCIE_WAKE#
BAT54SPT
+V3.3S
AD+
2
TLSW1
TMG-534-V
BUTTON4_S
{24} PCIE_TXP1_LAN
{24} PCIE_TXN1_LAN
{24} PCIE_RXP1_LAN
{24} PCIE_RXN1_LAN
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
+V5S
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
AD+
CLK_PCIE_GLAN {24}
CLK_PCIE_GLAN# {24}
POWERLED#
LIDR#
{42,43}
{22,42}
+V3.3AL
Isense_SYSP {44,52}
PWR_SW_VCC2 {35,42,46}
32
AD+
LEFT
RIGHT
CNS6_1_R1
Conn 6Pin
TP_CON1
R0402
R386
1K
RIGHT
+V3.3AL
VerB:converse the connection of TP_CON1
4
3
3
C307
C308
C309
R387
R388
47K
47K
R0402
R0402
ns
ns
Add pull res
C0603
0.1UF/25V,Y5V
1UF/10V,Y5V
C0402
TPDAT
TPCLK
C310
C0402
0.1UF/25V,Y5V
ns
D32
2
TRSW1
TMG-534-V
BUTTON4_S
BAT54SPT
TOPSTAR TECHNOLOGY
100pF/50V,NPO
+V5S
Joseph
+V5S
Page Name
Size
A3
Project Name
USB2.0&&LED CONN&Qkey CONN

C48
Rev
C

41
59
of
Date:
Sheet
+V3.3S
+V5S
EC_V3.3AL
C313
10UF/6.3V,X5R
C0805
R0402
FB20
120ohm/100MHz,500mA
1
2FB0603
EC Output Signal!
D33 1
+V5S
C315
C316
C317
C318
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
Should have a 0.1uF capacitor close to every GND-VCC pair + one

larger cap on the supply.
C319
0.1UF/25V,Y5V
C0402
C322
1uF/10V,X7R
C0603
V18R
Vin>=1.5V turn on the cup FAN.
HDD_ZOUT
HDD_YOUT
HDD_XOUT
GA20/GPIO00
KBRST#/GPIO01
SCI#/GPIO0E
ECRST#
EC Input Signal!
111
96
33
22
9
125
AD0/GPI38
AD1/GPI39
AD2/GPI3A
AD3/GPI3B
63
64
65
66
PWM0/GPIO0F
PWM1/GPIO10
PWM2/GPIO11
PWM3/GPIO19
21
23
25
34
MSIC
1
2
20
EC_RESET#37
PWM
{28} EC_RUNTIME_SCI#
SYS_I_Sense
HDD_ZOUT
HDD_YOUT
HDD_XOUT
SYS_I_Sense
{52}
+V3.3AL
CHG_ON R395
10K
ALW_PWROK need move to other
place.pin110&111 follow the
sequence of R18EC
C323
change to DG
By Johan 071224
SCANIN4
SCANIN5
SCANIN6
SCANIN7
{55} V1.8G_1.5G_ON
{25} AC_IN_PCH
ns
Double confirmed
By Johan 0711081231
ns
BT_PWRON
R436
1K
+V3.3AL
R424
PCIE_WAKE#
76
75
{53} IMVP_PWRGD
{25,51} MAIN_PWROK
+V3.3AL
GPI43
GPI42
+V3.3AL
R437
R532
GPXIOD0/SDIMISO
GPXIOD1
GPXIOD2
GPXIOD3
GPXIOD4
GPXIOD5
GPXIOD6
GPXIOD7
109
110
112
114
115
116
117
118
119
120
126
128
XCLK32K/GPIO57
XCLKI
XCLKO
121
122
123
SML1DATA
SML1CLK
SM_BAT_SDA2
SM_BAT_SCL2
R455
HW_OFF_BKLT#
4.7K
R0402
10K
PCIE_WAKE#_EC
R412
10K
ALT_ON
R417
10K ns
C
R420
10K
ns
R421
10K
Fuction P.M2 P.M1 P.M0
R426
10K
VerA
VerB
0
0
Verc
EC_32XCLK1
EC_32XCLK0
VTT_PWG
BATT_IN#
{22}
4.7K
R0402
SPI_CS#
1
EC_SPI_MISO 2
WP#1
3
VSS
4
CS#
Q
W#
VSS
R427
10K
ns
VCC_SPI
HOLD#1
SPI_SCK
EC_SPI_MOSI
EC_V3.3AL
R432 0
R434 4.7K R0603 EC_V3.3AL
R0402
LABEL1
Topstar Soft
BIOS Ver: X.XX
EC Ver: X.XX
XXXXXXXX
EC/BIOS Label
W25X80A
{45}
ASSY
SOIC8_50_208
VCC_SPI
VDD
WP#1
WP#
HOLD#1
SI
SO
CE#
SCK
5
2
1
6
VSS
HOLD#
EC_SPI_MOSI
EC_SPI_MISO
SPI_CS#
SPI_SCK
VSS
W25X40
ns
SO8_50_150
B
R440
10K
R0402
4.7K
R447
ns
4.7K
R0402
VerB Colay tow roms
EC_RESET#
Q25
MMBT3904-F
C326
R442
0
R0402
0.01uF/16V,Y5V
C0402
ns
R446
10K
R0402
R0402
C329
EC_PCI_RST#
R449
EC_32XCLK0
R451
10K
R0402
ns
R450
R452
10M
R0402
1
2N7002E-T1C0402
1000pF/50V,X7R
C0402
121K,1%
C325
EC_V3.3AL
R445
8
7
6
5
VCC
HOLD#
CLK
D
{48,51}
100
R0402
EC_BUF_PLT_RST#
change vera to verb hads
EC_SPI_MISO
EC_SPI_MOSI
SPI_SCK
SPI_CS#
R0402
ns
Y3
32.768KHz
xd3_2X6
3
ASSY
15pF/50V,NPO
C330
R443
R536
U16
+V3.3AL
PWRSW#
{35,41,46} PWR_SW_VCC2
BAT_LOW#
5.6K
BIU configuration should match flash speed used
R435
BKLT_ON
EC_BUF_PLT_RST#
+V3.3AL
Q24
R425
10K
R448
10K
PCB_Mark0
PCB_Mark1
PCB_Mark2
TB_CHG
{41}
ALW_PWROK {46}
EC_V3.3AL
PCB_Mark0
PCB_Mark1
PCB_Mark2
R0603
C328
5.6K
R408
10K
CHG_LED#
{43}
BTL_LED#
{43}
PM_PWRBTN# {25}
AMP_SHDW
{33}
SYS_RST#
{25}
CHG_ON
{52}
C49 switch2
{41}
HW_RATIO_OFF_3G# {37}
HW_OFF_BKLT# {22}
AC_OFF
{44}
EC_GPU_RST# {17}
ns
100pF/50V,NPO
R418
C324
4.7UF/10V,Y5V
C0805
PM_SLP_S4#
C327
R407
LIDR#
GPXIOA00
R441
R439
10K
R0402
R406
SM_BAT_SCL2
{34}
R419
10K
ns
+V3.3S
+V3.3AL
100pF/50V,NPO
GPXIOA00
{24,41}
{24,41}
{45}
{45}
KB3926
The 0ohm RES will across the isolate

island of anolog GND and digital GND
R444
0
SM_BAT_SDA2
10K
10K
10K
10K
ALW_ACK {25}
{25} EC_IMVP_PWRGD
PM_SLP_S3#
FAN_BACK
SOD323
GND
GND
GND
GND
GND
PM_SLP_S3#
GPXIOA00/SDICS#
GPXIOA01/SDICLK
GPXIOA02/SDIMOSI
GPXIOA03
GPXIOA04
GPXIOA05
GPXIOA06
GPXIOA07
GPXIOA08
GPXIOA09
GPXIOA10
GPXIOA11
MISO
MOSI
SPICLK/GPIO58
SPICS#
change to DG
By Johan 071224
113
94
35
24
11
10K ns
69
R970
AGND
BAT_LOW#
E51CS#/GPIO52
E51TXD/GPIO16
E51RXD/GPIO17/E51CLK
E51TMR0/GPIO54/WDT_LED#
E51INT0/GPIO55/SCROLED#
E51TMR1/GPIO53/CAPSLED#
E51INT1/GPIO56
R405
100K
TPCLK
{41}
TPDAT
{41}
BT_PWRON {34}
HW_RATIO_OFF# {35}
VGPU_ON
{50}
EXTSMI#
{28}
SML1DATA
SML1CLK
80
79
78
77
97
98
99
100
101
102
103
104
105
106
107
108
CLK
{25}
90
30
31
92
93
91
95
8051
PROCHOT#
{35} EC_DEBG_UTXD
{35} EC_DEBG_URXD
{21,36} GPU_HDMI_HPD
{50} VGACORE_PWRGD
AMP_SHDW
SDA1/GPIO47
SCL1//GPIO46
SDA0/GPIO45
SCL0/GPIO44
SPI
ns
R411
ns
R959
ns
1 D35
1N4148WS
V3G_1.05G_ON {55}
FAN1_V
{34}
Camera_ON
{22}
R0402
R397
R398
R399ns
R400ns
ns
ns
U15
R438
10K
EC_FAN_BACK
28
29
26
27 R404 1K
83
84
85
86
87
88
swap for DG
By Johan 071224
SPI_CS#
EC_SPI_MOSI
EC_SPI_MISO
SPI_SCK
+V3.3AL
GPXIOD
{25} PM_SUS_STAT#
KSO17/GPIO49
KSO16/GPIO48
KSO15/GPIO2F/E51_RXD(ISP)
KSO14/GPIO2E
KSO13/GPIO2D
KSO12/GPIO2C
KSO11/GPIO2B
KSO10/GPIO2A
KSO9/GPIO29
KSO8/GPIO28
KSO7/GPIO27
KSO6/GPIO26
KSO5/GPIO25
KSO4/GPIO24
KSO3/GPIO23/TP_ISP
KSO2/GPIO22/TP_ANA_TEST
KSO1/GPIO21/TP_PLL
KSO0/GPIO20/TP_TEST
EC_PMSUSStat#
6 GPIO04
0
ns PCIE_WAKE#_EC
14 GPIO07/i_clk_8051
15 GPIO08/i_clk_peri
{21,44}
AC_IN
16 GPIO0A/CIR_RX2
{25,51} PM_RSMRST#
R428
1K
17 GPIO0B/ESB_CLK
{22,41}
LIDR#
PWRSW# R429 1K
18 GPIO0C/ESB_DAT_O/ESB_DAT_I
19 GPIO0D
{25,39,51} PM_SLP_S3#
32 GPIO18
{25,39,54} PM_SLP_S4#
R9581.5K,1% R0402
36 GPIO1A/NUMLED#
{8} CPU_VTT_PWG
EC_IR_IN
73
R431 1K EC_IMVP_ON 74 GPIO40/CIR_RX
{53}
IMVP_ON
GPIO41/CIR_RLC_TX
89 GPIO50
{34}
ALT_ON
127 GPIO59/TEST_CLKSPICLKI
{47} V1_5_ON
EC_PMSUSStat#
R433
68
{46} ALWAYS_ON
GPO3C
70 GPO3D
{54}
MAIN_ON
71 GPO3E
{48} V1_1S_VTT_ON
72 GPO3F
{47} V0_75S_ON
+V3.3AL
10K
82
81
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
GPXIOA
EC_IMVP_ON
EC_IR_IN
10K ns
10K
{25,35,37,39,41}
R430
R338
0
SCANOUT15
SCANOUT14
SCANOUT13
SCANOUT12
SCANOUT11
SCANOUT10
SCANOUT9
SCANOUT8
SCANOUT7
SCANOUT6
SCANOUT5
SCANOUT4
SCANOUT3
SCANOUT2
SCANOUT1
SCANOUT0
PSCLK1/GPIO4A/P80CLK
PSDAT1/GPIO4B/P80DAT
PSCLK2/GPIO4C
PSDAT2/GPIO4D
PSCLK3/GPIO4E
PSDAT3/GPIO4F
SET_I
3300pF/50V,X7R
C0402
RN2
1
3
5
7
SCANIN0
SCANIN1
SCANIN2
SCANIN3
KSI7/GPIO37
KSI6/GPIO36
KSI5/GPIO35
KSI4/GPIO34
KSI3/GPIO33
KSI2/GPIO32
KSI1/GPIO31
KSI0/GPIO30/E51_TXD(ISP)
{33}
POWERLED# {41,43}
{52}
EC_BKLT_PWM {22}
4.7K
2
4
6
8
ns
4.7K
2
4
6
8
62
61
60
59
58
57
56
55
BTL_BEEP
RN1
1
3
5
7
pin+V3.3AL.
R422
R423
SCANIN7
SCANIN6
SCANIN5
SCANIN4
SCANIN3
SCANIN2
SCANIN1
SCANIN0
+V3.3AL
FANFB0/GPIO14
FANFB1/GPIO15
FANPWM0/GPIO12
FANPWM1/GPIO13
SMBUS
+V3.3AL
EC_PCI_RST#
CLKREQ
CLKREQ
PS2
28
27
R403
4.7K R0402
SCANOUT15
SCANOUT10
SCANOUT11
SCANOUT14
SCANOUT13
SCANOUT12
SCANOUT3
SCANOUT6
SCANOUT8
SCANOUT7
SCANOUT4
SCANOUT2
SCANIN7
SCANOUT1
SCANOUT5
SCANIN4
SCANIN5
SCANOUT0
SCANIN2
SCANIN3
SCANOUT9
SCANIN1
SCANIN0
SCANIN6
FAN
+V3.3AL
PCICLK
SERIRQ
LFRAME#
LAD0
LAD1
LAD2
LAD3
PCIRST#/GPIO05
CLKRUN#/GPIO1D
GPIO
KBCON1
ACES 85201-2602
CNS26_1_R_2D5
12
3
4
10
8
7
5
13
38
KB3926
{27} CLK_591PCI
{23,34} INT_SERIRQ
{23,34,37} LPC_FRAME#
{23,34,37} LPC_AD0
{23,34,37} LPC_AD1
{23,34,37} LPC_AD2
{23,34,37} LPC_AD3
KB
EC_BUF_PLT_RST#
LPC
SYS_I_Sense
R396
BUF_PLT_RST#
R0402
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
U14
ADC
1N4148WS
SOD323
A20GATE
RCIN#
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
28 6
27 5
4
3
2
1
10K
10K
10K
VCC
VCC
VCC
VCC
VCC
VCC
V18R
EC Output Signal!
67
RCIN#
D34 1
{8,17,27,34,35,37,39,41}
R391
R392
R394
ns
H_RCIN#
C314
0.1UF/25V,Y5V
V18R
0.1UF/25V,Y5V
0.1UF/25V,Y5V
124
{28}
C321
Q23
2N7002E-T1
R393
10K
EC_V3.3AL
+V3.3AL
1N4148WS
SOD323
C320
+V3.3S
R390
0
R0805
A20GATE
3
ns
AVCC
{28} H_A20GATE
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,43,47,48,49,50,51,53,54,55,56}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,43,44,45,46,47,48,49,50,51,54,56}
{22,24,26,30,33,34,36,38,40,41,49,50,53,54}
Q22
2N7002E-T1
R389
8.2K
+V3.3S
+V3.3AL
+V5S
1M
EC_32XCLK1
C0402
R0402
15pF/50V,NPO
+V5S
Q26
2N7002E-T1
EC Input Signal!
A
{8} EC_PROCHOT#
R453
R454
3
0
PROCHOT#
ns
R0603
TOPSTAR TECHNOLOGY
Joseph
Page Name
KBC(PC87541L)
Size Project Name

Custom
C48
Rev
C

42
59
of
Date:
Sheet
5
LED
+V3.3S
Green color
{35} WIRELESS_LED#
WIRELS1
2
BL-HGB35A-TRB
1
LED2_0805
R530
+V3.3S
+V3.3AL
220
R0402
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,47,48,49,50,51,53,54,55,56}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,44,45,46,47,48,49,50,51,54,56}
{23} SATA_LED#
HDD1
2
Green color
BL-HGB35A-TRB
1
LED2_0805
C533
1000pF/50V,X7R
C0402
IDE+
R474
220
R0402
C367
1000pF/50V,X7R
C0402
SATA_LED#
ESD1 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
WIRELESS_LED#
ESD2 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
CHARGE_LED
ESD3 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
BAT_STATE_LED
ESD4 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
PWR_LED
ESD5 1
ns
2 EGA1-0603-V05
ESDPAD_R0603
+V3.3AL
Red/Orange
CHARGE1
R
{42} CHG_LED#
{42}
BTL_LED#
220 R0603
R478
220 R0603 BAT_STATE_LED 4
C371
0.1UF/10V,X7R
C0402
1
A
{41,42} POWERLED#
CHARGE_LED 2
R477
R479
BAT_STATE_LED
C370
1000pF/50V,X7R
C0402
CHARGE_LED
C372
1000pF/50V,X7R
C0402
PWR_LED
C373
1000pF/50V,X7R
C0402
HA1GE33B AMB/GREEN
LED4_1210A
POWER1
PWR_LED
220 R0603
2
1
BL-HGB35A-TRB
LED2_0805
Green color
TOPSTAR TECHNOLOGY
Joseph
Page Name
LED&Touch PAD&QuickButton
Size
C
C48
Project Name
Rev
C
Date:
Sheet
of
43
59
5
+VDC
+V3.3AL
AD+
BATT+
EC_RTC
{22,37,46,47,48,49,50,53,54,55}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,45,46,47,48,49,50,51
{41,46}
{45,52}
{23,46}
AD++
PD6
SSM34PT
SMA
1
{52} Isense_SYSN
Co-lay.
PQ5
AO4419
SO8_50_150
1
2
3
S
D
G
PC1
1000pF/50V,X7R
C0402
8
7
6
5
SBM54PT
SMB
ns
8
7
6
5
PQ6
D
AO4419
SO8_50_150
PR2
51K
R0402
{41,52} Isense_SYSP
PD1
1
0.025,1%
R2512
S
PR3
51K
R0402
PD2
PC2
0.01UF/25V,X7R
C0402
ns
PD3
PC3
0.1UF/25V,X7R
C0603
1
1N4148WS
SOD323
AD+
PR1
4A
1
2
3
9$
4A
AD+
1N4148WS
SOD323
PR4
51K
R0402
VCC393
PU1A
LM393
SO8_50_150
PR7
51K
R0402
$
PC4
C0402
1000pF/50V,X7R
+V3.3AL
49.9k,1%
R0402
AC_OFF
1battery learning
2S0EC
ECAC_OFF
1
PQ12
2N7002
PR30 SOT23
10K
{42}
PR20
51K
R0402
PR27
15K,1%
R0402
C-
BATT+
PC7
0.01UF/25V,X7R
C0402
ns
PR28
PR25
49.9k,1% 15K,1%
R0402
R0402
C+
C-
C587
PC8
{51}
PR26
7
PU1B
LM393
SO8_50_150
0.47uF/25V,Y5V
0.47uF/25V,Y5V
ns
1
300K
R0402
PR29
51K
R0402
PR36
300K
R0402
SHDN#
PR23
100K
R0402
PQ13
MMBT3904-F
SOT23
PR31
51K
R0402
PC9
1000pF/50V,X7R
C0402
ns
PR38
0
R0402
ns
EC_RTC
PQ14
2N7002
SOT23
2K,1%
R0402
0 R0402
ns
PR19
10K
R0402
PR24
15K,1%
R0402
ns
PQ11
2N7002
SOT23
PR22
AD++
PR21
PR17
0
R0402
PC6
0.01uF/25V,X7R
C0402
PR16
100K
R0402
PR13
10K
R0402
ns
PD5
BAT54C
SOT23
AD+
+VDC
99$
VCC393
BATT+
AC_OFF#
PR37
10
R0402
2
3
PR18
PR15
51K
R0402
8
7
6
5
PR14
51K
R0402
PR11
2K
R0402
AD+
PQ10
D
AP4407
SO8_50_150
PR10
1K
R0402
PR12
20K
R0402
BATT+
{21,42}
1
2
3
9$
AC_IN
$
PC5
1000pF/50V,X7R
C0402
8
7
6
5
VDC1
TestP
ns
TPC60
PQ9
AP4407
SO8_50_150
1
2
3
S
D
G
PQ8
2N7002
SOT23
1
PR9
51K
R0402
PD4
SSM34PT
SMA
1
PR8
75K
R0402
AD+
AC_OFF#
PQ7
2N7002
SOT23
8
3
C-
C+
PR5
51K
R0402
PR6
10
R0402
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A3
Project Name
ADAPTER IN
C48
Rev
C

44
of
59
Date:
Sheet
PC15
PFB1
0.1uF/25V,X7R
100ohm@100MHz,3A C0603
1
2
FB0805
PFB2 100ohm@100MHz,3A
1
2
FB0805
PFB3
1
2
$
BATT+
PC10
{42} SM_BAT_SDA2
{42} SM_BAT_SCL2
1000pF/50V,X7R
C0402
SM_BAT_SDA2
SM_BAT_SCL2
PC16
0.1uF/25V,X7R
C0603
ns
100ohm@100MHz,3A
FB0805
PR32
100
R0402
100
PR33
R0402
PC17
0.1uF/25V,X7R
C0603
ns
PF1
8A
FUSE1206
1
2
BATT+
AD+
+V3.3AL
BATCON1
$
BATT+
KEY
SM_BAT_SDA
SDAT
SM_BAT_SCL
SCLK
TEMP
BAT_IN#
GND
GND
$
+V3.3AL
+V3.3AL
BAT54SPT
BATT_CONN
+V3.3AL
PC11
0.1uF/25V,Y5V
C0402
SM_BAT_SCL2
PR35
R0402
3
1
SM_BAT_SDA
PC12
0.1uF/25V,Y5V
C0402
1K
BATT_IN#
SM_BAT_SCL
PZD1
GND_BAT
PR34
300K
R0402
PC14
5.6pF/50V,NPO
C0402
BAT54SPT
SM_BAT_SDA2
PC13
5.6pF/50V,NPO
C0402
{44,52}
{41,44,46}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,46,47,48,49,50,51,54,56}
PZD2
{42}
,240mils.
GND_BAT
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A3
Project Name
BATTERY IN
C48
Rev
C

45
59
of
Date:
Sheet
+V3.3AL
+VDC
AD+
+V5AL
EC_RTC
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,47,48,4
{22,37,44,47,48,49,50,53,54,55}
{41,44}
{22,30,40,41,47,48,51,54}
{23,44}
026)(7
+V3.3AL
D
PR314
10K
R0402
GND_TPS51125
026,&
7KHUPDO
*1'

+VDC
{42} ALW_PWROK
+VDC
$
$
PR315
7.68K,1%
R0402
PC262
0.22uF/16V,X7R
C0603
19
12
DRVL2
VCLK
18
VREG5
17
VIN
GND
16
PR322
0
R0402
0 R0402
ns
EN0_AL
PR324
100K
R0402
ns
PC266
4.7uF/10V,X5R
C0805
PD31
1N5819
SOD123
Co-lay.
PC38
1000pF/50V,X7R
C0402
ns
PD7
SSM34PT
SMA
ns
5A
+
PZ2
BZT52C5V6S-F/5.6
SOD323
PC35
220UF/6.3V,OSCON
CAP6_6x7_3
PC34
1000pF/50V,X7R
C0402
B
PC267
10uF/6.3V,X5R
C0805
PC268
0.022uF/16V,X7R
C0402
ns
GND_TPS51125
PD9
BAT54C
SOT23
$
VREG5
VREF
PR323
+VDC
PQ18
AO4468
SO8_50_150
PC36
4.7uF/25V,X7R
C1206
PR57
2.2
R0805
ns
1
13
G1
GND_TPS51125
$
PD8
1N4148WS
SOD323
PC41
0.1uF/25V,X7R
C0603
GND1
PR60
0
R0402
GND_TPS51125
15
GND2
14
EN0
G2
LL2
PR66
15K
R0402
PR55
10K
R0402
1
2
3
SKIPSEL
PL2
5.2uH/5.5A
LS2_1051
DRVL1
LL2
PR52
2.2 R0402
LL1
20
11
C0603
21
V5A
TestP
TPC60
ns
DRVH1
PU2
TPS51125
5
6
7
8
DRVH2
PC265
0.1uF/25V,X7R
+V5AL
3
2
1
PR51
2.2
R0402 10
PR58
PQ17
R0402
AO4468
SO8_50_150
1
PR65
100K
R0402
22
3
AD+
ENTRIP1
VBST1
{42} ALWAYS_ON
VFB1
VBST2
PQ16
AO4468
SO8_50_150
4
PD29
1N5819
SOD123
PC33
220UF/6.3V,OSCON PC37
CAP6_6x7_3
1000pF/50V,X7R
C0402
ns
{35,41,42} PWR_SW_VCC2
VREF
8
7
6
5
23
PR56
2.2
R0805
ns
VFB2
PGOOD
5
6
7
8
VREG3
G
S
PR54
10K
R0402
1
2
3
PL1
3.3uH/4.8A
LS2_8836
PC31
1000pF/50V,X7R
C0402
24
PZ1
BZT52C3V6S-F/3.6
SOD323
VO2
PC32
4.7uF/25V,X7R
C1206
5A
VO1
PC264
0.1uF/25V,X7R
C0603
V3.3A
TestP
TPC60
ns
PQ15
AO4468
SO8_50_150
4
PC46
10uF/ 25V,X7R
C1210
ns
GND_TPS51125
3
2
1
8
7
6
5
+V3.3AL
PC24
4.7uF/25V,X7R
C1206
PR321
200K
R0402
EC_RTC
ENTRIP2
10uF/6.3V,X5R
C0805
ENTRIP1
ENTRIP1
PC263
PC23
0.1uF/25V,X7R
C0603
15K,1%
R0402
PR320
0
R0402
PR319
R0402
200K
GND_TPS51125
PC22
1000pF/50V,X7R
C0402
PR318
PR317
5.11K,1%
R0402
VREF
PC21
1000pF/50V,X7R
C0402
TONSEL
PC20
0.1uF/25V,X7R
C0603
PR316
10K,1%
R0402
PR326
1K
R0402
GND_TPS51125
VREG5
PR325
0
R0402
ns
PC270
0.1uF/25V,Y5V
C0402
1
PQ84
2N7002
SOT23
1
PR329
30K
R0402
PR328
10K
R0402
PR327
4.7K
R0402
ENTRIP1
PC269
0.1uF/25V,Y5V
C0402
ns
PC19
4.7uF/25V,X7R
C1206
PR330
30K
R0402
ns
PQ81
MMBT3904-F
SOT23
TOPSTAR TECHNOLOGY
Joseph
Page Name
PR331
Size
A3
0
R0402
+V3.3AL/+V5AL
Rev
C
C48

46
59
of
Date:
Sheet
GND_TPS51125
Project Name
+V0.75S
+V5AL
+V3.3AL
+VDC
+V1.5
+V1.8S
+V3.3S
{14,15,54}
{22,30,40,41,46,48,51,54}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,48,49,50,51,54,56}
{22,37,44,46,48,49,50,53,54,55}
{8,11,14,15,54,55,56}
{11,16,27,29,30,54,55}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,48,49,50,51
+V5AL
+V3.3AL
+VDC
SW
V5IN
DRVL
RF
PC52
4.7uF/10V,X5R
C0805
11
PR77
470K
R0402
Set Fsw 290K
PR76
10K,1%
R0402
PQ20
AO4706
SO8_50_150_PPAK
PD10
SSM34PT
SMA
PC54
0.022uF/16V,X7R
ns
C0402
PR79
20K
R0402
PD23
PC62
4.7uF/10V,X5R
C0805
PC61
0.1UF/10V,X7R
C0402
GND
NC2
REFEN
VCNTL
VOUT
NC1
PR92
10K
R0402
3
PQ22
MMBT3904-F
PZ3
BZT52C2V0S-F/2.0V
SOD323
ns
2&3!$
'&
'&$&6ZLWFKHU
PC50
220UF/6.3V,OSCON
CAP6_6x7_3
PC65
4.7uF/10V,X5R
C0805
+V3.3S
VIN
1N4148WS
SOD323
1 ns
9
PQ21
2N7002
SOT23
VOUT
Vo
V1R8S1
TestP
TPC60
ns
$0D[
2
4
PU12
APE1117C
SOT223
+V1.8S
1A
PR276
220
R0402
PC206
10uF/6.3V,X5R
C0805
PC207
10uF/6.3V,X5R
C0805
PC208
10uF/6.3V,X5R
C0805
PC215
10uF/6.3V,X5R
C0805
PR278
100,1%
R0402
PR277
1K
R0402
ns
PR91
4.7K
R0402
+V3.3AL
TPC60
TestP
V0_75S1
ns
+V3.3AL
PR93
30K
R0402
ns
NC3
PR90
2K,1%
R0402
PC66
0.1UF/10V,X7R
C0402
{42} V0_75S_ON
VIN
PGND
PR88
2K,1%
R0402
$
ns
ADJ/GND
$$
+V1.5
PC51
0.1uF/10V,X7R
C0402
R0402
PU5
APL5331
SOP8_1D27_4G
+V1.5
V1_5
TestP
TPC60
ns
$
PC53
1000pF/50V,X7R
C0402
ns
5.5m ohm@4.5V
PR78
11.5K,1%
PL3
1.0uH/11A
LS2_6530
PC49
220UF/6.3V,OSCON
CAP6_6x7_3
PR75
2.2
R0805
ns
GND
VFB
PR74
0
R0402
PC48
C0402
ns
0.022uF/16V,X7R
R960
100K,1%
5
6
7
8
9
0.7V
4
PQ19
SI4892DY
SO8_50_150_PPAK
EN
PR72
10K
$
PC55
10uF/ 25V,X7R
C1210
4
PR71
0
R0402
DRVH
3
2
1
TRIP
PC45
4.7uF/25V,X7R
C1206
10
VBST
PGOOD
PC44
1000pF/50V,X7R
C0402
V1_5_ON
5
6
7
8
9
PR80
121K,1%
R0402
PC43
0.1uF/25V,X7R
C0603
3
2
1
PJ3
JOPEN
RESISTOR_1
ns
{42}
PC47
0.1uF/25V,X7R
C0603
TPS51218
DDR_PWG
PR73
2K
R0402
{51}
PR69
4.7K
R0402
PR70
0
R0402
PU3
tps51218
QFN10_0D5_0D8G
+V0.75S
PC67
10uF/6.3V,X5R
C0805
PC68
10uF/6.3V,X5R
C0805
$$
$0D[
P9'&
P9'&$&/LQHDU
PC69
0.022uF/16V,X7R
C0402
ns
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A3
Project Name
+V1.8/+V0.9S DDR
C48
Rev
C

47
59
of
Date:
Sheet
+VDC
+V3.3S
+V5S
+V1.05S
+V1.5S
+V3.3AL
+V5AL
+V1.1S_VTT
+V5AL
+V3.3S
{22,37,44,46,47,49,50,53,54,55}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,49,50,51,53,54,55,56}
{22,24,26,30,33,34,36,38,40,41,42,49,50,53,54}
{23,24,25,29,30,54,55}
{35,37,39,54}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,49,50,51,54,56}
{22,30,40,41,46,47,51,54}
{8,10,11,28,29,30,34,49,53}
+VDC
PR104
R0402
20K
ns
PC76
220UF/6.3V,OSCON
CAP6_6x7_3
$
2
PC79
C0402
0.1uF/10V,X7R
PR266
0
R0603
PD11
SBM54PT
SMB
ns
V1_1S1
TestP
TPC60
ns
+V1.1S_VTT
PQ65
AO4706
SO8_50_150_PPAK
S_Bot
11
PQ24
AO4706
SO8_50_150_PPAK
S_Bot
PD33
SSM34PT
SMA
PC82
0.022uF/16V,X7R
C0402
ns
PR100
2.2
R0805
+
ns
PC81
1000pF/50V,X7R
C0402
ns
PC80
4.7uF/10V,X5R
C0805
PR102
470K
R0402
Set Fsw 290K
5
6
7
8
9
4
GND
DRVL
PR99
0
R0603
$
RF
1.0uH/18A
LS2_1040
Co-lay.
$
PC74
10uF/ 25V,X7R
C1210
PC77
220UF/6.3V,OSCON
CAP6_6x7_3
PL6
V5IN
PC70
10uF/ 25V,X7R
C1210
PQ23
AOL1418
SO8_50_150_PPAK
VFB
PR97
10K
SW
4
PR96
0
R0603
EN
4
PC75
0.022uF/16V,X7R
C0402
ns
DRVH
5
6
7
8
9
TRIP
R961
100K,1%
10
PC73
1000pF/50V,X7R
C0402
3
2
1
{42} V1_1S_VTT_ON
VBST
PGOOD
PC72
0.1uF/25V,X7R
C0603
5
6
7
8
9
1
2
PR189
100K
R0402
PJ4
JOPEN
RESISTOR_1
ns
PR98
2K
R0402
PC71
0.1uF/25V,X7R
C0603
TPS51218
{42,51} VTT_PWG
3
2
1
PR94
4.7K
R0402
PR95
0
R0402
3
2
1
PU6
tps51218
QFN10_0D5_0D8G
PZ4
BZT52C2V0S-F/2.0V
SOD323
ns
,&&PD[ $
'&
$&ULSSOH6ZLWFKHU
PC78
220UF/6.3V,OSCON
CAP6_6x7_3
0.7V
PR103
R0402
4.99K,1%
PQ37
2N7002
SOT23
PR333
71.5K,1%
R0402
PR101
10K,1%
R0402
PR290
R0402
47K
1
2
+V3.3S
PR291
R0402
3
PQ60
MMBT3904-F
10K
VTT_SELECT {10}
1.05V/1.1V.
VTT_SELECT
High
Low
Arrandale:
Clarksfield:
Vo
1.05V
1.1V
PR292
100K
R0402
ns
+V5AL
+V3.3AL
+VDC
Co-lay.
EN
SW
PR107
2.2
R0603
4
PC90
4.7uF/10V,X5R
C0805
11
GND
5
6
7
8
PQ26
AO4468
SO8_50_150
22/30m ohm@4.5V
PD32
1N5819
SOD123
PD12
SSM34PT
SMA
PR110
2.2
R0805
ns
PC89
C0402
0.1uF/10V,X7R
ns
PC91
1000pF/50V,X7R
C0402
ns
PR113
200K
R0402
Set Fsw 340K
DRVL
+V1.05S
$
6ZLWFKHU
Co-lay.
RF
PR111
0
R0603
PR112
10K,1%
R0402
V5IN
VFB
$
V1_05S
TestP
TPC60
ns
PL7
1.0uH/11A
LS2_6530
1
0.7V
PC87
R962
0.022uF/16V,X7R100K,1%
C0402
ns
PR108
10K
PC120
10uF/ 25V,X7R
C1210
PC88
220UF/6.3V,OSCON
CAP6_6x7_3
DRVH
PC83
4.7uF/25V,X7R
C1206
ns
TRIP
PC85
1000pF/50V,X7R
C0402
10
VBST
3
2
1
PGOOD
5
6
7
8
3
2
1
{42} V1_1S_VTT_ON
PR260
210K,1%
R0402
PC84
0.1uF/25V,X7R
C0603
PJ5
JOPEN
RESISTOR_1
ns
PQ25
AO4468
SO8_50_150
4
$
PR109
2K
R0402
PC86
0.1uF/25V,X7R
C0603
TPS51218
V1.05S_PWG
PR105
4.7K
R0402
PR106
0
R0402
{51}
PU7
tps51218
QFN10_0D5_0D8G
PZ5
BZT52C2V0S-F/2.0V
SOD323
ns
TOPSTAR TECHNOLOGY
Joseph
PR114
4.99K,1%
Page Name
R0402
Size
A3
PC92
0.022uF/16V,X7R
ns
C0402
PR115
20K
R0402
ns
Project Name
+V1.5S/+V1.05S CHIPSET
C48
Rev
C

48
59
of
Date:
Sheet
PR117
2.2K
R0402
VIDDebug
PR118 +V1.1S_VTT
2.2K
R0402
ns
PR116
2.2K
R0402
ns
+V1.1S_VTT
+V5S
+V3.3S
+VGFX
+VDC
+V3.3AL
{8,10,11,28,29,30,34,48,53}
{22,24,26,30,33,34,36,38,40,41,42,50,53,54}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,50,51,53,5
{11}
{22,37,44,46,47,48,50,53,54,55}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,50,51,54,56}
PR119
2.2K
R0402
ns
{11} GFXVR_VID_0
{11} GFXVR_VID_1
{11} GFXVR_VID_2
{11} GFXVR_VID_3
{11} GFXVR_VID_4
{11} GFXVR_VID_5
PR127
0
PR128
0
R0402
ns
R0402
{11} GFXVR_VID_6
PC95
0.1uF/25V,X7R
C0603
PC96
10uF/ 25V,X7R
C1210
CLK_EN#
22
21
VID0
20
VCCP
19
LGATE
18
VSSP
17
PR138
10K
PQ28
AOL1448
SO8_50_150_PPAK
S_Bot
PL8
1.0uH/18A
LS2_1040
Co-lay.
VGFX
VGFX
{11} VGFXVCCSEN
COMP
FB
PHASE
16
VSEN
UGATE
15
GND2
GND1
G2
G1
10
PR151
R0402
BOOT
PR153
R0402
10
PR148
0
R0402
100
+V5S
GND_ISL62881
PR156
82.5,1%
R0402
PC116
0.01uF/25V,X7R
C0402
PC209
0.01uF/25V,X7R
C0402
PC115
0.1uF/25V,X7R
C0603
PR159
10K,1%
R0402
PR312
ns
PC260
470pF/25V,X7R
C0402
ns
1
2
PD28
SSM34PT
SMA
{11}
PC104
1000pF/50V,X7R
C0402
ns
PC101
PC102
PZ6
220UF/6.3V,OSCON 220UF/6.3V,OSCON BZT52C2V0S-F/2.0V
CAP6_6x7_3
CAP6_6x7_3
SOD323
ns
VGFX_IMON
{11}
+VDC
PR155
R0402
3.57K,1%
PR157
2.49K,1%
R0402
PR160
10K,1%
R0603
PR161
4.02K,1%
R0402
100
R0402
GND_ISL62881
PC114
0.047uF/50V,X7R
C0603
PC112
0.1uF/25V,X7R
C0603
PC111
0.22uF/10V,X7R
C0603
PC113
1000pF/50V,X7R
C0402
PC103
C0402
0.1uF/10V,X7R
PL4
1.0uH/11A
LS2_6530
ns
Co-lay.
VGFXVSSSEN
TestP
TPC60
ns
PR147
22.1K,1%
R0402
GND_ISL62881
GND_ISL62881
PR158
R0402
$
VGFX2
TestP
TPC60
ns
PC109
0.22uF/10V,X7R
C0603 VGFX_IMON1
PR152
R0402
PC110
270pF/25V,X7R
C0402
PR154
R0402
PQ30
AO4706
SO8_50_150_PPAK
PC108
0.22uF/16V,X7R
C0603
PR150
R0402
{11} VGFXVSSSEN
PR139
2.2
R0805
ns
PD13
SSM54PT
SMA
ns
GND_ISL62881
14
IMON
13
VIN
12
ISUM+
VDD
11
10
PR146
6.98K,1%
R0402
ISUM-
270pF/25V,X7R
C0402
PR149
R0402
PC100
1uF/10V,X7R
C0603
PC107
GND_ISL62881
RTN
PR144
75K
R0402
ns
QFNS28_0D4_1G
VW
PC106
100pF/50V,NPO
C0402
PC105
3300pF/50V,X7R
C0402
PR145
2.37K,1%
R0402
PR141
0
R0402
+V5S
PR143
470K
R0402
1000pF/50V,X7R
C0402
R0402
250KHz
10K,1%
PU8
ISL62881
PR142
PGOOD
R0402
3 RBIAS
PC99
47K
PR140
3
2
1
{51} GFXVR_PWRGD
PC98
0.022uF/16V,X7R
C0402
ns
5
6
7
8
9
PC97
10uF/ 25V,X7R
C1210
VID1
PR135
0
R0402
3
2
1
VID2
23
VID3
24
VID4
25
VID5
26
27
28
5
6
7
8
9
1
VID6
PR133
2K
R0402
ns
PR136
2K
R0402
10K R0402
ns
VR_ON
PR137
30K
R0402
ns
PR132
DPRSLPVR
3
2
PQ29
MMBT3904-F
SOT23
PQ27
2N7002
SOT23
$
// P2KP
+VGFX
1.05V/1.1V.
$
0 R0402
+V3.3S
GFXVR_EN
+VDC
PR131
{11}
PJ6 JOPEN
RESISTOR_1
ns
1
2
VGFX_ON
PC93
0.022uF/16V,X7R
C0402
{11} GFXVR_DPRSLPVR
ns
PC94
1000pF/50V,X7R
C0402
PR134
10K
R0402
PR130
47K
R0402
ns
+V3.3AL
PR126
4.7K
R0402
+V3.3S
PC117
0.1uF/10V,X7R
C0402
GND_ISL62881
NTC thermistor
2510K
603.05K
801.71K
TOPSTAR TECHNOLOGY
Page Name
Size
A3
Project Name
+V1.5AL
C48
Rev
C

49
59
of
Date:
Sheet
+VGA_CORE
+VDC
+V3.3S
+V3.3AL
+V5S
PC118
0.1uF/10V,X7R
C0402
{17}
{22,37,44,46,47,48,49,53,54,55}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,51,53,54,55,56}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,51,54,56}
{22,24,26,30,33,34,36,38,40,41,42,49,53,54}
+V5S
+VDC
VID0
VID0
PQ32
AOL1718
SO8_50_150_PPAK
13
PC131
0.1uF/10V,X7R
C0402
PR170
10K,1%
R0402
PM
PR171
45.3K,1%
R0402
PR172
220K
R0402
PM
SET1
FB
12
10
SET2
PGOOD
11
PM
PD14
SSM54PT
SMA
ns
PM
PC128
0.01uF/25V,X7R
C0402 PM
PC130
0.047uF/50V,X7R
C0603
PM
9.31K,1%
PR173 R0402
PM
VGA_CORE
+VGA_CORE
Co-Layout
PM
PM
PR169
4.99K,1%
R0402
PM
VO
LGATE
500mA
14
PD27
SSM34PT
SMA
$
$
PR167
9.31K,1%
R0402
SET0
15
PM
OCSET
PR168
2.2
R0402
SREF
PM
NC
J4
JOPEN
RESISTOR_1
ns
16
PHASE
PR166
2.2
R0805
PM
VID1
Co-lay.
10
R0402
2.2
R0402
PM
500mA
NVVDD_SENSE {17}
PR163
Co-lay.
ns
PL9
1.0uH/18A
LS2_1040
PM
PR165
PM
PM
17
UGATE
3
2
1
EN
PC124
1000pF/50V,X7R
C0402
PM
PL5
1.0uH/11A
LS2_6530
PQ31
AOL1448
SO8_50_150_PPAK
S
1uF/10V,X7R
C0603
5
6
7
8
9
GND
PM
PC122
10uF/ 25V
C1210
PM
PC126
0.1uF/25V,X7R
C0603
500mA
PM
PC121
10uF/ 25V
C1210
BOOT
18
19
PM
VID1
VCC
PM
PC273
3
2
1
PM
R0402
+V3.3AL
PGND
PR332
PM 2.2
R0402
20
VGPU_ON
PVCC
{42}
LGATE
PC125
0.1uF/10V,X7R
C0402
GND_62872
ns
PR162
30K
R0402
PR164
2K
5
6
7
8
9
500mA LGATE
PC119
0.1uF/25V,X7R
C0603
PM
PU9
ISL62872
QFNR20_0D4_0D5
$
1uF/10V,X7R
C0603
PC272
PZ7
BZT52C2V0S-F/2.0V
SOD323
ns
VGA_CORE1
TestP
TPC60
ns
C
PC129
220UF/6.3V,OSCON
GC178
GC175
CAP6_6x7_3220uF/2.5V,POSCAP
220uF/2.5V,POSCAP
CT7343_19 CT7343_19
PM
ns
PM
PC132
PR174
PM
PM
GND_62872
GND_62872
PR175
+V3.3S
100,1%
PM
10K
R0402
PM
3300pF/50V,X7R
PR176
PM
2.49K,1%
PM
PM
PR177
4.02K,1%
PR183 0 R0402
{42} VGACORE_PWRGD
PM
GND_62872
PM
GND_62872
+V3.3S
+V3.3S
+VGA_CORE
+V3.3S
PD15
PR179
10K
R0402
ns
VID0
PR178
10K
R0402
1N5819
SOD123
ns
PR180
10
R0402
ns
VID1
PQ33
2N7002
SOT23
GPU_VID0
PR184
10K
R0402
PM
PC133
PM
0.1uF/10V,X7R
C0402
ns
PR185
10K
R0402
PM
PM
PQ34
2N7002
SOT23
GPU_VID1
R0402
R0402
PR182
1K
{21}
PR181
1K
{21}
PM
PC134
PM
0.1uF/10V,X7R
C0402
ns
PM
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A3
Project Name
+VGA_CORE
Rev
C
C48
Date:
Sheet
50
59
of
5
6+'1
+V3.3AL
PQ36
MMBT3904-F
SOT23
S_Top
PZ8
BZT52C3V6S-F/3.6
SOD323
PR187
2K
R0402
PZ9
BZT52C5V6S-F/5.6
SOD323
10K
R0402
3
PR186
{34} SHDN_LOCK#
ns
PQ35
MMBT2907
SOT23
+V5AL
^`
+V3.3S
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,5
+V5AL
{22,30,40,41,46,47,48,54}
+V3.3AL
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,54,56}
+V1.05S
{23,24,25,29,30,48,54,55}
+V1.5S
{35,37,39,54}
+VCC_CORE {10,53}
AD+
{41,44,46}
PC135
0.1UF/25V,X7R
C0603
+V3.3S
PR188
10K
R0402
3RZHU*RRG/RJLF&,5&8,7
PD16
{42,48} VTT_PWG
MAIN_PWROK {25,42}
{48} V1.05S_PWG
BAT54A
{49} GFXVR_PWRGD
R963
0
GM
PD17
1
3
2
{47} DDR_PWG
BAT54A
1
{25,42} PM_RSMRST#
R484
{25,39,42} PM_SLP_S3#
R0402
1K
2
C378
0.1UF/10V,X7R
C0402
PD18
BAT54A
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A4
Project Name
Power Good Logic/OVP

C48
Rev
C
Date: Monday, January 25, 2010

Sheet
of
51
59
PR202
PC140
1uF/10V,X7R
C0603
CHG_GND
{41,44} Isense_SYSP
PC141
0.1uF/25V,X7R
C0603
PR193
{44} Isense_SYSN
ACSET
C0402
VDD
19
CSIP
20
CSIN
PC139
5600pF/50V,Y5V
C0603
0.01uF/25V,X7R
DCIN
24
UGATE
17
BOOT
16
PC136
0.1uF/25V,X7R
C0603
PR195
R0402
{42}
{42}
SET_I
PR244
6(7B,
9$
9$
9$
9$
6<6B,B6HQVH
P9
9
9
6<6B&855(17
!$
$
10K
PR198
15.4K,1%
R0402
ns
PC178
2.39V_Vref
1uF/10V,X7R
C0603
PR199
10.5K,1%
R0402
0.643Vref
ISL6251HAZ
PHASE
18
LGATE
14
PGND
13
PR197
10K
R0402
D1
D2
CSON
22
CELLS
3
G2
S2
10
ACLIM
23
ACPRN
phase
PC145
0.1uF/25V,X7R
C0603
$
15uH/3.6A
PR192 LS2_1040
2.2
R0805
ns
10uF/ 25V
C1210
PC153
0.01uF/25V,X7R
C0402
ns
PR194
BATT+
9
$0D[
PC156
PC144
10uF/ 25V
C1210
PC146
1uF/25V,Y5V
C0805
2.2 R0402
PC148
VREF
PR200
50mOHM,1%
R2512
S1
PL10
PR203
0
R0402
EN
21
10uF/ 25V
C1210
ns
PQ58
AO4932
SO8_50_150
CSOP
Co-lay.
PC200
PC147
4.7uF/25V
C1206
G1
VADJ
CHLIM
PC152
0.1uF/25V,X7R
C0603
D1
VDDP
PC142 1N4148WS
SOD323
0.1uF/25V,X7R
C0603
phase
VCOMP
1uF/10V,X7R
C0603
PR334
R0402
CHG_GND
PR196
82mV/25m ohm=3.28A.
ICM
PR201
20K,1%
R0402
6<6B&855(17
$
$
$
6<6B,B6HQVH
!9
9
11
CHG_ON
{44}
2.2
PD25
PU10
ICOMP
PC151
1000pF/50V,X7R
C0402
PD24
SOD323
1N4148WS
ns
PR204
R0402
10K
9
CHG_GND
Isense_SYSN
R0402
PC150
C0402
$
R0402
SSOP24_25_150
PC155
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54,56}
CHG_GND
R0402
PC138
1000pF/25V,X7R
{44,45}
+V3.3AL
10
VDDP
PR190
5V_internal_LDO
4.7
R0402
15
VDDP
PC149
1uF/10V,X7R
C0603
BATT+
SYS_I_Sense
100
GND
PR191
CHG_GND
R0402
12
PC154
3300pF/50V,X7R
C0402
{42}
Layout note:
Far away from critical signal trace
0
R0402
CHG_GND
CHG_GND
6<6B,B7ULS
+LJK
/RZ
&HOOVVWDWXV%DWWHU\3DN
)ORDW6
*1'6
9''6
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A3
Project Name
CHARGER
C48
Rev
C

52
59
of
Date:
Sheet
470
R0402
31
VID0
32
VID1
33
VID2
PU11
ISL62882HRTZ
VW
COMP
VCCP
25
LGATE1b
24
LG2
PR220
PC169
220UF/2.5V,POSCAP
CT7343_19
PC172
1uF/10V,X7R
R0603
+VCC_CORE
PC180
220UF/2.5V,POSCAP
CT7343_19
C0603
+V5S
UGATE1
G4
G5
G6
BOOT1
IMON
VIN
VDD
ISUM+
21
PQ41
AOL1448
SO8_50_150_PPAK
+V5S
1
PR225
10K
R0402
3
2
1
SO8_50_150_PPAK
AOL1718
PQ56
PC186
0.1uF/25V,X7R
C0603
PC199
220UF/2.5V,POSCAP
CT7343_19
ns
PL13
0.36uH/30A
LS2_1040
PC183
0.01uF/25V,X7R
PR212
C0402
3.57K,1%
R0402
3
2
1
PR288
10
R0402
$
PR224
3.57K,1%
R0402
PC160 0.1uF/25V,X7RC0603
ISUM-
PC194
0.1UF/10V,X7R
C0402
5
6
7
8
9
5
6
7
8
9
UG1
PC191
1000pF/50V,X7R
C0402
PR227
10K
R0402
4
5
6
7
8
9
19
18
17
16
15
14
20
G4
G5
G6
PR230
0
R0603
PC159 1uF/10V,X7R C0603
PR223
2.2
R0805
ns
CPU_GND
PC165
0.22uF/16V,X7R
C0603
PR211 10 R0402
PR238
100
R0402
PC177
1000pF/50V,X7R
C0402
PR234
10
R0402
PC173 0.22uF/16V,X7R
C0603
PC175
0.01uF/25V,X7R
C0402 ns
1
ISUM-
SO8_50_150_PPAK
AOL1718
PQ57
LG1a
4
Phase1
PR235
10
R0402
PD21
SBM54PT
SMB
22
RTN
PHASE1
0 R0603
ISEN2
PR221
23
3
2
1
VSSP1
13
10
FB2
VSEN
ISEN2
PC170
0.22uF/16V,X7R
C0603
CPU_GND
LGATE1a
PC167
1uF/10V,X7R
C0603
R0603
FB
G1
G2
G3
ISEN1
PR229
75K
R0402
PC184 C0402
100pF/50V,NPO
LG1b
PR228
ISEN1
QFNS40_0D4_1G
VSSSENSE
34
26
NTC
PC187
10uF/ 25V
C1210
CPU_GND
PR237
11.5K,1%
R0402
CPU_GND
{10}
VID3
35
VID4
36
VID5
37
LGATE2
PR289
10
R0402
PC193
1uF/10V,X7R
C0603
ns
VID6
NTC
PR209
3.57K,1%
R0402
VCCSENSE
38
PC181
3300pF/50V,X7R
C0402
{10}
VR_ON
PR219
470K,1% R0603
PC174
C0402
1000pF/50V,X7R
39
27
R0402
6.98K,1%
PC182
100pF/50V,NPO
C0402
DPRSLPVR
VSSP2
ISEN1
PR222
40
VR_TT#
G1
G2
G3
11
17&WKHUPLVWRU
CLK_EN#
PR287
PC168
1uF/10V,X7R
10
C0603
R0402
{8} VR_PROCHOT#
PC166
0.01uF/25V,X7R
C0402
ns
CPU_GND
C0402
4
S
PC171
1000pF/50V,X7R
PR218
4.02K,1%
R0402
PQ42
AOL1718
SO8_50_150_PPAK
VCORE1
TestP
TPC60
ns
$
+
28
PR215
10K
R0402
PHASE2
PC179
PC164
220UF/2.5V,POSCAP
220UF/2.5V,POSCAP CT7343_19
CT7343_19
0.36uH/30A
LS2_1040
PR210
2.2
R0805
ns
1
RBIAS
$
PL11
PR214
147K,1%
R0402
CPU_GND
PD20
SBM54PT
SMB
PR213
0
R0603
29
PC162
0.01uF/25V,X7R
C0402
PC176
0.1uF/25V,X7R
C0603
UGATE2
PQ55
AOL1718
SO8_50_150_PPAK
PSI#
PR208
10K
R0402
PM_PSI#
PGOOD
PC163
0.22uF/16V,X7R
C0603
Phase2
G9
G8
G7
30
PC158
10uF/ 25V
C1210
R0402
ns
PR217
10K
R0402
PR206
0
R0603
UG2
G9
G8
G7
BOOT2
PC157
10uF/ 25V
C1210
{10}
{42} IMVP_PWRGD
PR243 10K
PQ38
AOL1448
SO8_50_150_PPAK
CPU_GND
PR207
2K R0402
+V3.3S
$
PC161
0.01uF/25V,X7R
C0402
PR279
1K
R0402
PR242 10K
R0402
ns
{6} CK505_CLK_EN#
PR241
2K R0402
+VDC
+V1.1S_VTT
PR205
+V1.1S_VTT
+V1.1S_VTT
PR280
1K
R0402
ns
R0402
{10} PM_DPRSLPVR
R0402
PR344
1K
R0402
R0402
12
PR282 2K
1K
PR245
+V1.1S_VTT {8,10,11,28,29,30,34,48,49}
PR240 2K
IMVP_ON
ns
PR249
1K
R0402
{42}
R0402
H_VID6
ns
1K
H_VID5
{10}
R0402
PR248
{10}
R0402
1K
H_VID4
1K
PR247
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,54,55,56}
{22,24,26,30,33,34,36,38,40,41,42,49,50,54}
{22,37,44,46,47,48,49,50,54,55}
{10}
{10}
PR343
+V3.3S
+V5S
+VDC
+VCC_CORE
H_VID3
R0402
5
6
7
8
9
H_VID2
{10}
1K
3
2
1
{10}
PR342
5
6
7
8
9
H_VID1
R0402
3
2
1
H_VID0
{10}
1K
5
6
7
8
9
{10}
PR341
ISEN2
3
2
1
PR236
0
R0402
PC196
1000pF/50V,X7R
C0402
PR231
10
R0402
PC188
0.22uF/10V,X7R
C0603
CPU_GND
PC197
0.1uF/25V,X7R
C0603
PR232
82.5,1%
R0402
PR246
PC195
0.01uF/25V,X7R
C0402
0
R0603
+VDC
Vcore_IMON
{10}
100
R0402
ns
PC261
470pF/25V,X7R
C0402
ns
+VDC
ISUM+
PC210
0.01uF/25V,X7R
C0402
PR233
10K,1%
R0402
PC189
0.1uF/25V,X7R
C0603
PR313
PC185
0.01uF/25V,X7R
C0402
$
Vcore_IMON1
TestP TPC60
ns
PR216
2.49K,1%
R0402
PR226
10K,1%
R0603
PR239
1.58K,1%
R0402
CPU_GND
A
PC190
10uF/ 25V
C1210
PC192
0.1uF/10V,X7R
C0402
ISUMA
NTC thermistor
2510K
603.05K
801.71K
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A3
GND_ISL62881
Project Name
+VCC_CORE
Rev
C
C48

53
59
of
Date:
Sheet
5
+VDC
+V5S
+V3.3S
+V5AL
+V3.3AL
+V1.05S
+V1.5
+V1.8S
+V0.75S
AD+
BATT+
+V1.5S
{22,37,44,46,47,48,49,50,53,55}
{22,24,26,30,33,34,36,38,40,41,42,49,50,53}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,4
{22,30,40,41,46,47,48,51}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,56}
{23,24,25,29,30,48,55}
{8,11,14,15,47,55,56}
{11,16,27,29,30,47,55}
{14,15,47}
{41,44,46}
{44,45,52}
{35,37,39}
+V3.3AL
5
6
7
8
PD22
1N4148WS
SOD323
1
+VDC
PQ45
AO4468
SO8_50_150
PR255
20K
R0402
+V5AL
PR252
33K
R0402
V5S1
TestP
TPC60
ns
3
2
1
MAIN_OFF
PQ46
2N7002
PR257
1K
R0402
PR258
510K
R0402
PC202
0.01uF/25V,X7R
C0402
SOT23
PC203
1uF/10V,X7R
C0603
PD26
1N4148WS
SOD323
1
PQ59
AO4468
SO8_50_150
PC542
10uF/10V,Y5V
ns
PQ61
AO4468
SO8_50_150
ns
5
6
7
8
MAIN_ON
{42}
+V1.5
+V5S
5
6
7
8
PC205
1uF/10V,X7R
C0603
PQ44
AO4468
SO8_50_150
PR253
1K
R0402
+V3.3S
PC204
0.01uF/25V,X7R
C0402
5
6
7
8
PR254
10K
R0402
PR256
51K
R0402
3
2
1
PQ43
DTB114EK
SOT23
PC201
0.01uF/25V,X7R
C0402
V3_3S1
TestP
TPC60
ns
S
PR251
100K
R0402
dri1.5 4
3
2
1
3
2
1
PR283
100K
R0402
PR284
PC211
100K
R0402 0.01uF/25V,X7R
C0402
+V1.05S
+V5S
+V0.75S
dri1.5 4
PR281
10K
R0402
+V1.5S
PC212
1uF/10V,X7R
C0603
+V1.8S
+V3.3S
+V1.5
+VDC
+V1.5S
P$
P$
{25,39,42} PM_SLP_S4#
PR273
10K
R0402
2
3
PQ53
2N7002
SOT23
1
PR271
100
R0402
ns
PR272
510K
R0402
PQ54
2N7002
SOT23
V1_8DISCHG
PR275
PQ80
2N7002
SOT23
1
1
1
PQ52
2N7002
SOT23
1
PQ51
2N7002
SOT23
ns
PQ50
2N7002
SOT23
V1_8DISCHG
2
PR268
100
R0402
PR267
100
R0402
PR270
100
R0402
PR263
100
R0402
PR265
100
R0402
ns
PR264
100
R0402
2
1
PQ49
2N7002
SOT23
ns1
PQ48
2N7002
SOT23
PR262
100
R0402
ns
PR261
100
R0402
ns
PR259
100
R0402
P$
B
200K
R0402
MAIN_OFF
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
A3
Project Name
SYSTEM/DISCHARGE
Rev
C
C48

54
59
of
Date:
Sheet
5
+VDC
Rewave
5
6
7
8
PR354
10
R0402
PM
S_Top
G
PM
1
PM
PM
+V1.8S
+VDC
+V3.3S
PR335
51K
R0402
PM
PM
PR349
PR300
0
R0402
PR338
10
R0402
V3GPU_OFF
PQ71
2N7002
SOT23
1
2
PM
51K
PM
R0402
PM
PR346
20K
R0402
ns
ns
PQ68
AO3415
SOT23
PR337
1K
R0402
PM
C
PM
PM
PQ77
2N7002
SOT23
1
+V1.5
PM
+V1.05S
PR311
100
R0402
PM
PR336
510K
R0402
PM
PC220
1uF/10V,X7R
C0603
PM
{42} V1.8G_1.5G_ON
+V1.8GPU
<0.5A
PR302
510K
R0402
PQ66
2N7002
SOT23
PM
<0.5A
PR303
1K
R0402
{42} V3G_1.05G_ON
PM
PC219
1uF/10V,X7R
C0603
PC216
0.01uF/25V,X7R
C0402
PM
S_Top
PR306
220
R0402
PR305
220
R0402
PR297
0
R0402
1
PQ83
2N7002
SOT23
PM
S_Top
PR308
510K
R0402
PM
51K
PM
R0402
3
2
1
PR350
PR339
10
R0402
+V3.3GPU
change on 2009/11/11
V3_3GPU
TestP
TPC60
ns
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,4
{23,24,25,29,30,48,54}
{8,11,14,15,47,54,56}
{11,16,27,29,30,47,54}
{17,20,21,36,38}
{17,18,19,20}
{20}
{18,19}
{22,37,44,46,47,48,49,50,53,54}
{22,24,26,30,33,34,36,38,40,41,42,49,50,53,54}
3 1
+VDC
D
PQ86
AO4468
SO8_50_150
PM
S_Top
+V3.3S
+V1.05S
+V1.5
+V1.8S
+V3.3GPU
+V1.05GPU
+V1.8GPU
+V1.5GPU
+VDC
+V5S
PR307
51K
R0402
PM
PR304
51K
R0402
PM
+V3.3S
PQ70
2N7002
SOT23
PM
PM
5
6
7
8
5
6
7
8
2
PR286
100
R0402
PC218 PM
0.01uF/25V,X7R
C0402
PM
PM
PQ72
2N7002
SOT23
1
PM
PM
PM
PM
PQ73
2N7002
SOT23
1
PC213
1uF/10V,X7R
C0603
PM
PM
PM
PQ78
2N7002
SOT23
3A
2
1
PR294
100
R0402
0.53A
2.5A
+V1.5GPU
PR340
200K
R0402
3
2
1
3
2
1
3
2
1
3
2
1
PC214
1uF/10V,X7R
C0603
V1_5GPU
TestP
TPC60
ns
5
6
7
8
3
PM
PQ67
AO4468
SO8_50_150
PR296
20K,1%
R0402
PM
S
+V1.05GPU
PC217
0.01uF/25V,X7R
C0402
PM
V1_05GPU
TestP
TPC60
ns
PM
1
PQ75
2N7002
SOT23
PR299
20K,1%
PR309 R0402
200K PM
R0402
D
4
PR298
51K
R0402
PM
PQ63
AO4468
SO8_50_150
PQ64
AO4468
SO8_50_150
+VDC
PR301
51K
R0402
PM
PQ69
AO4468
SO8_50_150
ns
5
6
7
8
PC543
10uF/10V,Y5V
ns
+VDC
PC544
10uF/10V,Y5V
ns
PM
PM
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
B
Project Name
SYSTEM/DISCHARGE
Rev
C
C48
Date:
Sheet
55
59
of
5
1:MINIPCIE1 Footprint Change

2:KBCON1 Footprint Change
3:ADD GR53 GPU_RST pull high
4:BT USB P/N
5:U28/U29 Footprint Change
6:Speaker conn 2pin
7:EC 104pinPWRLED1PWR_LANLED12PINEC
8:J1
9:Charge1 Pin
10:Add PR350/PR307/PR308/PR354/PC216/PQ86/PQ83/PC215/R240/GR227/H4/R512/PWRLED1/C226
11:UH2 Footprint
12:AUDIO_USBPinPin1 to Pin24......Pin24 to Pin1
13:RJ45 Footprint
14:H26
15:H4
16:U34/R251/C215
17:PC198
18:LVDS_SEL_PCH
19:HDMI Hot plug detect EC
+V1.5
+V3.3S
+V3.3AL
{8,11,14,15,47,54,55}
{6,8,14,15,16,22,23,24,25,26,27,28,29,30,32,33,34,35,36,37,38,39,40,41,42,43,47,48,49,50,51,53,54,55}
{6,22,23,24,25,27,28,30,32,34,35,36,37,39,41,42,43,44,45,46,47,48,49,50,51,54}
+V1.5
+V3.3AL
+V1.5
+V3.3S
C599
0.1uF/10V,X5R
C588
C589
C590
C591
C594
C595
C598
C612
0.1uF/10V,X5R
0.1uF/10V,X5R
0.1uF/10V,X5R
0.1uF/10V,X5R
0.1uF/10V,X5R
0.1uF/10V,X5R
0.1uF/10V,X5R
0.1uF/10V,X5R
C597
C592
C593
0.1uF/10V,X5R
0.1uF/10V,X5R
0.1uF/10V,X5R
+V3.3AL
H20
FD7
FD8
FD2
GND
FD1
FD4
FD3
FD6
GND
H24
HOLE
HOLE
TH_315_118_PTH_315_118a
ns
ns
GND
GND
GND
H25
HOLE
TH_315_118_P
ns
HOLE
TH_315_118_P
ns
GND
HOLE
TH_315_118a
ns
H17
GND
HOLE
TH_315_118a
ns
HOLE
TH_315_394_118_P
ns
H21
GND
HOLE
TH_315_118a
ns
H16
GND
HOLE
TH_315_118a
ns
H23
HOLE
TH_315_118_P
ns
H18
HOLE
TH_175_236D92
ns
H15
GND
H22
HOLE
TH_315_118a
ns
H26
H19
GND
GND
FD5
1 1
1 1
1 1
1 1
1 1
FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS FMARKS
ns
ns
ns
ns
ns
ns
ns
ns
1
TOPSTAR TECHNOLOGY
Joseph
Page Name
Size
C
Project Name
SYSTEM/DISCHARGE
C48
Rev
C
Date:
Sheet
56
of
59
5
PWRSWVCC1
PR347
4.7K R0402
PQ39
MMBT2907
SOT23
1
10K
R0402
100K PWR_PWRSWVCC2
PR348
PWRLED1
R512
100 R0402 POWERLED+
PD35
BZT52C5V6S-F/5.6
SOD323
PC277
1000pF/50V,X7R
BAT54SPT
2
PC276
1000pF/50V,X7R
R964
PD34
1000pF/50V,X7R
C0402
PWRLED#
PSW1
DTSM-63N
BUTTON4A
1
PWR_LIDR#
PC275
BL-HB335A-TRB
PESD1
ESDPAD_R0603
EGA1-0603-V05
POWERLED+
TESD9
ns
POWERLED+
Change Power Switch to seperate Componets
PWR_+V3.3AL
PWR_Isense_SYSP
IOPR21MIOPR410K,
GND
PWR_+V3.3AL
PC274
0.1UF/10V,X7R
C0402
PU13
A180
SOT23_A
VS+ 1
Output
Power Button Switch
PWR_+V3.3AL
Lid IC
2 EGA1-0603-V05
ESDPAD_R0603
C226
1000pF/50V,X7R C0402
Power Button&Lan Conn
DC Jack
IO_AD+
AVDD33
3.3V
3.3V
AVDD18
1.8V
1.2V
EVDD18
1.8V
1.2V
DVDD15
1.5V
1.2V
EEDO
26
27
PWR_PCIE_TXP1_LAN
PWR_PCIE_TXN1_LAN
PWR_PCIE_RXP1_LAN
PWR_PCIE_RXN1_LAN
GND_JACK
C550
PWR_BUF_PLT_RST#
23
24
C549
C0402
29
0.1UF/10V,X7R 30
C0402
0.1UF/10V,X7R
20
19
PWR_PCIE_WAKE#
PWR_+V3.3S
R935
R936
LIO_GND
1K
LAN_TX0VDAC
U35
350uH/0.50uH 1:1
1CT:1CT
TD1+
MX1+ 23
TCT1
3
5
4
8111D
8111D
LAN_TX0+
LAN_TX2+
VDD3D3_LAN
VDAC
Place close to pin 16,37,46,53
LAN_TX2LAN_TX3+
VerD:LAN Delete Caps and change

some options followed demo
board and colay 8102E
By K' 080522
VDAC
LAN_TX3LAN_TX1-
Place close to Pin2

AVDD33
C548
0.1UF/25V,Y5V
C0402
C609
0.01uF/25V,Y5V
8111D
C602
0.1uF/25V,Y5V
C0402
8111D
Place close to pin 59
LAN_TX1+
C608
0.01uF/25V,Y5V
24
TD11CT:1CT
TD2+
MC1MX2+
22
20
TCT2
MCT2
21
19
17
MCT8
TCT3
MCT3
18
TD31CT:1CT
TD4+
MX3MX4+
16
14
TX3TX1-
MCT4
15
MCT5
MX4-
13
TX1+
TCT4
12
TD4-
48
47
45
44
EESK
EEDI
EEDO
EECS
HSIP
HSIN
HSOP
HSON
AVDD18_04
AVDD18_03
AVDD18_02
AVDD18_01
14
11
8
5
VCTRL15
VCTRL18
63
1
MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3
3
4
6
7
9
10
12
13
LAN_TX0+
LAN_TX0LAN_TX1+
LAN_TX1LAN_TX2+
LAN_TX2LAN_TX3+
LAN_TX3-
CKTAL2
CKTAL1
61
60
LAN_XTALOUT
LAN_XTALIN
PERSTB
LANWAKEB
36
ISOLATEB
54
55
56
57
LED3
LED2
LED1
LED0
64
RSET
62
GVDD
RTL8101E-GR
AVDD18
FB12
0.01uf caps need to be

close to PIN5
placed
C551
C0402
0.01uF/25V,X7R
DVDD15/VDD33
CTRL18
LIO_GND
add
25MHz
1
2
XS2_3d3
C561
C0402
27pF/50V,NPO
LIO_GND
VerC:Add 0.01uF followed demo

for better EMI performance
by Robin 080417
Y7
TP1
C562
C0402
27pF/50V,NPO
LIO_GND
C563
TP2
C564
MX2MX3+
10
C560
C0402
0.1UF/25V,Y5V
8101E
C547
C0402
0.1UF/10V,X7R
EVDD18
EVDD18_02
EVDD18_01
LIO_GND
MCT7
TX2TX3+
TD21CT:1CT
TD3+
RTL8111B/8101E circuit removes R68.

R68 is only used for RTL8111C(P)/8111D
application. Keep R68 and remove
C47/C48 to enable Switching regulator.
Remove R68, C48 and change C47 to 0
ohm to disable switching regulator. For
RTL8102E remove R68, C47 and C48.
MCT6
Tran24_1_7d1
8111D
8111D
C559
C0603
1uF/10V,Y5V
8101E
8111D uses 93C66 and keep R934.

Others use 93C46 and remove R934.
8
7
6
5
VCC
NC1
NC2
GND
LIO_GND
28
22
REFCLK_P
REFCLK_N
TX0+
TX2+
6
8
9
11
VDAC
MCT1
0
R0805
8111D
TX0-
2.49K,1% R0402
8102E\8111D
2K,1%
R0402
RSET
8101E
R939
LIO_GND
R978
C610
0.01uF/25V,Y5V
R0402
R937
VDD3D3_LAN
R0402
15K
LIO_GND
C611
0.01uF/25V,Y5V
CS
SK
DI
DO
U31
AT93C46-10SU-2.7
SO8_50_150
U32
PWR_CLK_PCIE_GLAN
PWR_CLK_PCIE_GLAN#
100M Lan(RTL8101E/8102E)
1
EESK 2
EEDI/AUX 3
4
PWR_Isense_SYSP
PWR_PWRSWVCC2
LIO_GND
ICTP
PWR_+V3.3AL
PWRLED#
PWR_LIDR#
10K is used only when 93c56 is used
R0402
DVDD15
EECS
PWR_CLK_PCIE_GLAN
PWR_CLK_PCIE_GLAN#
87216-XXXX
Colay follow demo board 09.12.24
AVDD33
ICTP
IO_AD+
RTL8102E/RTL8111DVDD3D3_LAN
52
49
43
41
38
32
21
15
PWR_BUF_PLT_RST#
PWR_PCIE_WAKE#
PWR_+V3.3S
GND_JACK
GND_JACK
RTL8101E
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
PWR_PCIE_TXP1_LAN
PWR_PCIE_TXN1_LAN
10K
8111D
IO_AD+
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
51
50
42
40
39
35
34
18
17
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
58
33
IO_AD+
PWR_PCIE_RXP1_LAN
PWR_PCIE_RXN1_LAN
C543
C544
C545
C546
C0402
C0402
C0402
C0402
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
0.1UF/25V,Y5V
VDD3D3_LAN
VDD3D3_LAN
Power domain chart
VDD15_08
VDD15_07
VDD15_06
VDD15_05
VDD15_04
VDD15_03
VDD15_02
VDD15_01
PC279
1uF/25V,Y5V
C0805
R0402
R934
VDD15_10
VDD15_09
AD-1
3.6K
VDD3D3_LAN
FB37
120ohm/100MHz,500mA
1
2FB0603
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
SHLD1
R933
PWR_+V3.3AL
add 8111D
PWRCONN2
G1
G2
G3
G4
G5
G6
G7
G8
G9
4A
53
46
37
16
FUSE1206
59
2
VDD33_04
VDD33_03
VDD33_02
VDD33_01
AVDD33_02
AVDD33_01
AD+
EGND1
EGND2
SHLD2
AD-2
25
31
1
2
PFB4
100ohm@100MHz,3A
FB0805
1
2
PFB5
100ohm@100MHz,3A
FB0805
1
2
PFB6
100ohm@100MHz,3A
FB0805
PC278
1uF/25V,Y5V
C0805
31
PF2
7A
32
PJ7
DC JACK 5P
PWR5P_DC1
ns
ns
C565
C573
330PF/50V,X7R
C0603
4.7uF/10V,Y5V
C0805
330PF/50V,X7R
C0603
330PF/50V,X7R
C0603
IO_CASE_GND
LIO_GND
LIO_GND
TD-
TX-
TX0-
TDC
CMT
MCT5
10
TD+
TX+
AVDD18
TX0+
LAN_TX1-
15
RD-
RX-
TX1-
L1
CTRL18
FB38
4.7uH/0.9A
C553
C0805
C552
C0402
0.1UF/25V,Y5V
10UF/6.3V,X5R
B
Colay 8111D follow demo board

8101E/8111D
0 R0805
Place close to AVDD18 Pins(Pin5,8)
14
RDC
RXC
MCT6
16
RD+
RX+
TX1+
C554
C555
C0402
C0402
0.1UF/25V,Y5V
0.1UF/25V,Y5V
8101E/8111D
8101E/8111D
C600
C0402
0.1uF/25V,Y5V
8111D
LAN_TX1+
C575
C0402
0.01UF/25V,Y5V
C574
C0402
0.01UF/25V,Y5V
C601
C0402
0.1uF/25V,Y5V
8111D
2
4
6
8
RJ45_TX3D52
AZC099-04S
SOT23_6
ns
RJ45_TX2+
RJ45_TX2RJ45_TX3+
RJ45_TX3-
RA0603_8
8111D
TX0TX0+
TX1TX1+
1
3
5
7
RN8
0x4
RA0603_8
2
4
6
8
9
11
1
3
5
7
8101E/8102E
TX2+
TX2TX3+
TX3-
5
4
RJ45_TX2RN9
0x4
N2
N1
LAN_TX0+
FB12
1CT:1CT
LAN_TX0-
add two cap place close to pin 11,14

R0805
1CT:1CT
VDAC
R972
N4
N3
U33
TRAN16_50_272
13
12
RJ45_TX2+
RJ45_TX3+
RJ45_TX0RJ45_TX0+
RJ45_TX1RJ45_TX1+
IO_CASE_GND
B
IO_CASE_GND
L1 close to Pin1,C553 close to L1

LIO_GND
8101E
8102E/8111D
Colay CHOCK AND RN
R974
R0805
0
8101E/8102E
C571
0.1UF/25V,Y5V
C0402
Place close to DVDD15

pin 15,21,43,49,58
Pins
C572
0.1UF/25V,Y5V
C0402
C605
C0402
0.1uF/25V,Y5V
8111D
C606
C0402
0.1uF/25V,Y5V
8111D
C607
C0402
0.1uF/25V,Y5V
8111D
R941
49.9,1%
R0402
8101E
AVDD18
R0402
8101E
LIO_GND
HOLE
TH_236_100
ns
DVDD15/VDD33
0
8111D
C603
8111D 10uF/6.3V,X5R
C0805
TX0+
TX0TX1+
TX2+
TX0+
TX0TX1+
TX2+
TX2TX1TX3+
TX3-
TX2TX1TX3+
TX3-
R943
49.9,1%
R0402
8101E
R944
49.9,1%
R0402
8101E
IO_CASE_GND
R945
R946 R947 R948 R949 R950
75
75
75
75
75
75
R0402 R0402 R0402 R0402 R0402 R0402
8101E/8102E
8101E/8102E 8101E/8102E
8101E/8102E
R976 R977
75
75
R0402 R0402
8111D
8111D
C578
C1206
1000pF/2000V
LIO_GND
IO_CASE_GND
place close to transformer
PH4
HOLE
TH_236_100
ns
HOLE
TH_315_118
ns
R975
R0805
VDD3D3_LAN
PH5
RJ45_TX1-
MCT8
MCT7
MCT5
MCT6
RJ45_TX2+
RJ45_TX2RJ45_TX3+
RJ45_TX3-
C577
0.01UF/25V,Y5V
C0402
8101E
place close to IC
PH6
R942
49.9,1%
R0402
8101E
C576
C0402
0.01UF/25V,Y5V
8101E
VDAC
R940
1
2
3
4
5
6
7
8
IO_CASE_GND
*8111C(P)/8111D's Pin58 is AVDD which

connects to DVDD because AVDD and
DVDD are connected together.
LAN_TX1-
C570
0.1UF/25V,Y5V
C0402
LAN_TX1+
C569
0.1UF/25V,Y5V
C0402
LAN_TX0-
C568
0.1UF/25V,Y5V
C0402
8101E/8102E
LAN_TX0+
C567
0.1UF/25V,Y5V
C0402
8101E/8102E
RJ45_TX0+
RJ45_TX0RJ45_TX1+
RJ45_TX2+
RJ45_TX2RJ45_TX1RJ45_TX3+
RJ45_TX3-
RJ45_TX0+
C566
10UF/6.3V,X5R
C0805
8101E
DVDD15
DVDD15/VDD33
RJ45
C558
C0805
1uF/25V,Y5V
C557
C0402
0.1UF/25V,Y5V
RJ1
RJ45
RJ45_SC
10
R973
0
R0805
8111D
Colay 8111D
D43
AZC099-04S
SOT23_6
ns
EVDD18
C556
C0402
0.1UF/25V,Y5V
R938
0 R0805
8101E/8111D
RJ45_TX1+
RJ45_TX0-
Place close to EVDD Pins(Pin 22,28)
C604
C0402
0.1uF/25V,Y5V
8111D
GND_JACK
GND_JACK
IO_CASE_GND
LIO_GND
TOPSTAR TECHNOLOGY
Joseph
Page Name
Power_LAN Board
Size
A1
C48
Project Name
Rev
C
Date:
Sheet
57
59
of
to others or used for any purpose other than that for which it was obtained with the
expressed written consent of TOPSTAR
5
A_+V5AL
A_USB_+V5AL
USB
IF1
1
100uF/10V,TAN
Co-layout CT32-CT6032
IR9
IC18
+
CT6032
ns
1.6A
FUSE1812
2
A_USB_OC#5
300K
IC19
100uF/10V,TAN
CT7343_28
IR10
560K
IC20
1000pF/50V,X7R
ns
USB2
3
2
GND
ICHK1
-DATA10
+DATA10
4
1
ns

A_USB_PN10
A_USB_PP10
3
2
90/100MHz 0.5A
L4_0805
USB_8
USB1F
620700400002
IC21
VCC1
-DATA1
+DATA1
HOLE0
HOLE1
HOLE2
HOLE3
5
6
7
8
IESD1
330PF/50V,X7R
IESD2
ESDPAD_R0603
EGA1-0603-V05
IR11
IR12
ESDPAD_R0603
EGA1-0603-V05
Aud-GND
A_USB_+V5AL
USB3
3
2
GND
ICHK2
-DATA11
+DATA11
ns
3
2
4
1
USB_AUDIO_CONN2
IC22
330PF/50V,X7R
IESD3
IR13
IR14
A_SURR_OUT_L
A_HP_DET
A_SURR_OUT_R
A_MIC2_REF
A_MIC2_L
A_MIC1_JD
A_MIC2_R
IESD4
ESDPAD_R0603
EGA1-0603-V05
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A_+INTSPR
A_-INTSPR
A_USB_PN11
A_USB_PP11
90/100MHz 0.5A
L4_0805
USB_8
USB1F
620700400002
VCC1
-DATA1
+DATA1
HOLE0
HOLE1
HOLE2
HOLE3
5
6
7
8
A_USB_OC#5
ESDPAD_R0603
EGA1-0603-V05
A_USB_PN10
A_USB_PP10
A_USB_PN11
A_USB_PP11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Aud-GND
25
26
25
26
24pin 0.5mm bot FFC

A_+V5AL
Audio
FB40
A_SURR_OUT_L
A_SURR_OUT_R
C579
100pF/50V,NPO
C0402
C580
100pF/50V,NPO
C0402
R951
22k
R0402
ns
R952
22k
R0402
ns
C581
0.1uF/10V,X7R
C0402
D45
EGA1-0603-V05
ESDPAD_R0603
ns
D44
EGA1-0603-V05
ESDPAD_R0603
ns
A_HP_DET
1
2SJ1512
FB0805
1 300ohm@100MHz,2A
FB0805
1 300ohm@100MHz,2A
FB39 2
4
5
3
2
LINE_OUT1
L
D46
EGA1-0603-V05
ESDPAD_R0603
ns
INTSPK2
INT_spkR 2Pin
CNS2_R
4 2 2
4
3
Aud-GND
Aud-GND Aud-GND
Aud-GND
Aud-GND
Aud-GND
Aud-GND
Aud-GND
Aud-GND
A_+INTSPR
A_-INTSPR
Aud-GND
D47
SOD323
1N4148WS
1
A_MIC2_REF
D48
1N4148WS
SOD323
R953
4.7K
R0402
FB0805
1 300ohm@100MHz,2A
FB0805
1 300ohm@100MHz,2A
A_MIC2_L
HOLE
TH_236_100
ns
A_MIC2_R
HOLE
TH_236_100
ns
FB42
UH3
Aud-GND
D50
EGA1-0603-V05
ESDPAD_R0603
ns
Aud-GND
C582
100pF/50V,NPO
C0402
ns
Aud-GND
C583
100pF/50V,NPO
C0402
ns
Aud-GND
C584
100pF/50V,NPO
C0402
Aud-GND
C585
100pF/50V,NPO
C0402
Aud-GND
D49
EGA1-0603-V05
ESDPAD_R0603
ns
C586
0.1uF/10V,X7R
C0402
Aud-GND
2SJ1512
A_MIC1_JD
Aud-GND
FB41
UH2
4
5
3
2
MIC_IN1 L
R954
4.7K
R0402
D51
EGA1-0603-V05
ESDPAD_R0603
ns
Aud-GND
Aud-GND
FD9
FD10
1
R340
R341
R352
FMARKS
ns
0
0
0
1
FMARKS
ns
FD11
1
FD12
1
1
FMARKS
ns
1
FMARKS
ns
FD13
1
1
A
FMARKS
ns
TOPSTAR TECHNOLOGY
Aud-GND
Joseph
Page Name
Size Project Name
Custom
USB_Audio Board
Rev
C
C48
58
of
59
Date:
Sheet
5
3.3V
AVCC
3.3V
1
2
3
4
5
6
7
CIN1
CIN2
CIN3
CIN4
11
13
GPIO2
GPIO3
GPIO4
GPIO7
GPIO9
GPIO11
LED1
LED2
LED3
LED4
22
21
19
18
14
12
TC1
TC2
4.7uF/6.3V,X5R
0.1uF/10V,X5R
TB_GND
TBR1 TBR2 TBR3

10K
10K
10K
TC3
24
0.1uF/10V,X5R
VSHILD
VBIAS
THD1/LED14
10
TB_GND
20
AVSS
8
9
DVSS2
AC_Shield
VBIAS
DVSS1
TBP1
AC_Shield
1 1
SCLK
SDA
INT#
15
16
17
OTP
23
3.3V
I2C_SCL
I2C_SDA
I2C_INT
+3.3V +5V
1 1
2 2
9 3 3
4 4
TC6
TC7
5 5
8 8 6 6
100pF/50V,NPO
100pF/50V,NPO
7 7
CNS7_0D5_RA1
Conn 6Pin
TP_CON3
TB_GND
TB_GND
TB_GND
9
VPP
OTP function (Power 6.5V)
25
ns
CIN1
CIN2
CIN3
CIN4
CIN7
CIN9
CIN11
120ohm@100MHz,500mA
DVCC
AVCC
TU1
IT7230
+3.3V
TFB1
Device address default is 00h.
TBR4
TBR5
33
33
I2C_SDA
I2C_SCL
I2C_INT
TB_GND
TB_GND
Button
+5V
TC4
TC5
4.7uF/6.3V,X5R
0.1uF/10V,X5R
LED3
LED4
LED2
TLED4
BL-HB334C-TRB
LED1
TLED3
BL-HB334C-TRB
TLED2
BL-HB334C-TRB
TLED1
BL-HB334C-TRB
TB_GND
TOPSTAR TECHNOLOGY
Joseph
Page Name
A
ns
CIN1 1
TU2
C_But_Squ_LED
ns
CIN2 1
TU3
C_But_Squ_LED
ns
CIN3 1
TU4
C_But_Squ_LED
Size
A4
ns
CIN4
Project Name
Touch_Board
Rev
C
C48
59
59
Date: Monday, January 25, 2010
Sheet
of
TU5
C_But_Squ_LED

Topstar C48 C46 C48 C46

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5

Topstar Digital technologies Co.,LTD

Board name: MotherBoard Schematic

02. System block & Index

Project name: C48

03. PWR Block & Description

04. Notes & Annotations

Initial Date: MAY.9, 2008

05. Schematic Modify and History

Hardware drawing by:

Hardware check by:

Power drawing by:

Power check by:

EMI Check by:

Manager Sign by:

C46 SYSTEM BLOCK Ver:A

PCIE mini Half-Card

C46 POWER BLOCK Ver:A

Friday, January 15, 2010

Primary DC system power supply(9V-19V)

Core voltage for processor

1.1V for CPU

1.05V for PCH core

0.75V DDR3 Termination voltage

1.5V power rail for DDR3

3.3V always on power rail

3.3V main power rail

5V for USB Device

5V main power rail

0.8--1.03V for GPU NB8M core voltage

1.5S for PCIE Device

1.8V for display votage

3.3V for external GPU

I2C SMB Address

1.05V for external GPU

1.8V for external GPU

1.5V for external GPU

Power States/AC mode

Board stack up description

Trace Impedence:50ohm +/-15%(Default)

LID switch from EC

Power switch from EC

Friday, January 15, 2010

C48 VerB to VerC change

5Audio Jack SMDDIPSymbolAudio

Size Project Name

No more than 500 mil

SMBUS ADD:1101 001X

Integrated resistors on differentail clk

Friday, January 15, 2010

PCI EXPRESS -- GRAPHICS

L33 0.1UF/10V,X7R GC217

49.9,1% R0402 H_CATERR# AK14

R0402 VCCPWRGOOD_1_R AN14

JTAG & BPM

DDR3 Compensation Signals

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY - B

CPU CORE SUPPLY

1.1V RAIL POWER

PEG & DMI

close to DDR pin

close to DDR pin

1, A minimum of 9 high frequency