Fundamentals of

Electrical Engineering
Electronic & Communication Engineering
Danang University of Technology

Lecture 5
The Operational Amplifier
(chapter 5)

Preview
Be able to describe and use the voltage and current
constraints in an ideal op amp
Be able to analyze simple circuits containing ideal op
amps
Understand the following circuits consisting of op
amps: inverting amplifier, summing amplifier, noninverting amplifier, difference amplifier
Understand the more realistic model for an op amp. Be
able to use this model to analyze simple circuits
containing op amps.

Op Amp
The operational amplifier (or op amp for short) is a
fundamental building block in circuit design.
Stuffed inside a chip are a bunch of transistors and other
elements that make up a near-ideal voltage controlled
voltage source (VCVS) with near-infinite gain.
We will start by assuming it is ideal
The more realistic model for an op amp will be studied at
the end of the chapter

The 741 Op Amp

The 741 is the godfather of all operational amplifiers
(amplifiers on a chip). Although most up-to-date designs
beat it for speed, low noise, etc, it still works well as a
general purpose device.

Circuit Symbol
The op amp has a special circuit symbol, a triangle with
two inputs and one output
All voltages are considered as voltage rises from the
common node
vp: between inverting input and common node
vn: between non-inverting input and common node

Voltage Transfer Characteristic

Output voltage is a function of the input voltage difference:

VCC
A(v p vn ) < VCC

v0 = A(v p vn ) VCC A(v p vn ) + VCC

A(v p vn ) > +VCC

+ VCC

Op Amp Properties
Operation in the linear region (LR):
A is called the gain of the op amp.
In an ideal op amp, A is infinite.
In a practical op amp, A is at least 10,000 while the dc
power supply voltages seldom exceed 20V
Thus, the input voltage difference must be less than 20/104
or 2mV. It is approximately true that vp = vn if the node
voltages are much larger than 2mV (virtual short condition).
How to ensure op amp operates in LR?

Ideal OA Constraint on Output Voltage

An ideal op amp is an ideal voltage controlled voltage
source. We can think of the op amp symbol being
replaced as follows:
If v0 is finite, this implies that:

v0
v p vn = = 0

v p = vn

Negative Feedback
How is it maintained at the input of the op-amp when the
op-amp is embedded in a circuit ?
Solution: By negative feedback (NF) from output to
inverting input
NF causes input voltage difference to decrease which
consequently causes output voltage to be decreased
and the op amp operates in LR

http://www.ecircuitcenter.com/Circuits/opfeedback1/opfeedback1.htm

Negative Feedback
Negative feedback can be used to ensure operation in
the linear region:
- If (vp vn) is too positive, then vo increases, and thus vn
is increased by feedback loop.
- If (vp vn) is too negative, then vo decreases, and thus
vn is reduced by feedback loop

http://www.ecircuitcenter.com/Circuits/opfeedback1/opfeedback1.htm

Extensions
Output voltage without NF ?
will normally saturate
Even with NF, are you sure the linear operation ?
NO
How to check if the op-amp functions at linear operation
region ?
Assuming linear operation, then performing
circuit analysis and checking results for contradictions.
Examples ?
Note that the positive & negative power supply voltages
do not have to be equal in magnitude

Op Amp Properties
Op amps have very high input resistance.
In an ideal op amp, the input resistance is infinite.
In a practical op amp, it is at least 1M.
Thus, it is approximately true that ip = in = 0. Note that
this constraint is not based on assuming the op amp is
configured to its linear region.

Ideal OA - Constraint On Input Currents

Ideally the equivalent input resistance is infinite, resulting
in the current constraint: i p = in
Kirchhoffs law:

i p + in + i0 + ic + + ic = 0
i0 = (ic + + ic )

The ideal op-amp constraint that ip=in=0 does not mean

that iO = 0

Exp 5.1

Exp 5.1

Ass. Pro. 5.1

Ass. Pro. 5.1

Inverting Amplifier
The input signal is inverted and scaled by Rf/Rs at the
op-amp output:

v p = 0 vn = 0
Rf
vs v0
At inv. input : in = is + i f =
+
v0 =
vs
Rs R f
Rs
Rf
R f VCC
LR : v0 VCC
vs VCC

Rs
Rs
vs
http://www.ecircuitcenter.com/Circuits/opinv/opinv.htm

Ass. Pro. 5.2

Ass. Pro. 5.2

Open Loop
If Rf is removed, the feedback is opened and the
amplifier is said to be operating open loop

vO = Avn
LR : vn VCC / A vs VCC / A
A is called open-loop gain

Summing Amplifier
The circuit adds input signals and scales result by Rf/Rs

ia + ib + ic + i f = in = 0
Rf
Rf
Rf
va vb vc v0
+
+
+
= 0 v0 =
va +
vb +
vc
Ra Rb Rc R f
Rb
Rc
Ra
Rf
(va + vb + vc )
For Ra = Rb = Rc = Rs : v0 =
Rs
http://www.ecircuitcenter.com/Circuits/opsum/opsum.htm

Ass. Pro. 5.3

Ass. Pro. 5.3

Ass. Pro. 5.3

Non-Inverting Amplifier
The input signal is scaled by Rf/Rs at the op-amp output:

v0 Rs
vn = v p = v g =
Rs + R f
Rf
v0 = 1 +
Rs

v g

Rf
LR : 1 +
Rs

VCC
<
vg

http://www.ecircuitcenter.com/Circuits/opnon/opnon.htm

Ass. Pro. 5.4

Difference Amplifier
The output voltage is proportional to input difference

vn va vn v0
+
=0
Ra
Rb
Rd
vp =
vb
Rc + Rd
Rd ( Ra + Rb )
Rb
v p = vn v0 =
vb va
Ra ( Rc + Rd )
Ra
Ra Rc
Rb
if
=
v0 =
(vb va )
Rb Rd
Ra
http://www.ecircuitcenter.com/Circuits/opdif/opdif.htm

Ass. Pro. 5.5

Ass. Pro. 5.5

Ass. Pro. 5.5

Difference Amplifier D&C Mode

Redefine inputs in terms of two other voltages:
Differential mode

vdm = vb va
Common mode:

vcm = (va + vb ) / 2
Represent input voltages in terms of dm and cm:

1
va = vcm vdm
2
1
vb = vcm + vdm
2

Difference Amplifier D&C Mode

Output of difference amplifier:

Difference Amplifier D&C Mode

In many applications,
differential mode signals
contain information of interest
whereas common mode
signal is the noise found in all
electric signals .
Example: electrocardiograph electrode measures voltages
produced by your body to regulate your heartbeat

Common Mode Rejection Ratio

An ideal diff. amp. Has zero common mode gain and
nonzero differential mode gain (normally large)
Two factors have an influence on ideal common mode gain:
Ra Rc
Resistance mismatches (?)
=
Rb Rd
Non-ideal op amp (?)
Suppose that resistor values do not precisely satisfy above
equation. Instead the relationship among the resistors is:

Common Mode Rejection Ratio

when resistance matched and

epsilon = 0, the Acm = 0 and the
Adm depends on Rb/Ra only

the equ.,

Common Mode Rejection Ratio

Realistic Model

ip
+

Ro

io

Ri - A(vp-vn)
in

vo
-

Modifications to the ideal model:

A finite input resistance Ri
A finite open-loop gain A
A non-zero output resistance R0
All assumptions on voltage, current and voltage transfer
characteristic are not hold any more.
http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm

Realistic Model

ip
+

Ro

Ri - A(vp-vn)
in

io
+

vo
-

Inverting-Amplifier

What happen when Ri

, A

and R0

0?

NonInverting-Amplifier

What happen when Ri

, A

and R0

0?

Ass. Pro. 5.6

Ass. Pro. 5.6

Ass. Pro. 5.6

Ass. Pro. 5.6

Ass. Pro. 5.6

NonInverting-Amplifier

NonInverting-Amplifier
Note that when Ri
, A
and R0 0, the circuit
produces the same output voltage as it was for ideal
noninverting amplifier
For the unloaded noninverting amplifier (RL= ), the
output voltage vo is simplified as:

Study Guide Section 5.1 & 5.2

a. Redraw Fig. 5.6, placing typical values of VCC and VCC/A on the
graph. Use the same scale for both axes. This graph will more
accurately represent why we make the idealized assumption that vp =
vn.
b. Fill in the blanks:
I. Ideally, the gain of an op amp A = _____________. This ideal
value leads to the simplifying assumption that
____________________________________ . In a real op amp, a typical
value for A is ___________ .
II. Ideally, the input resistance of an op amp Rin =
_______________ . This ideal value leads to the simplifying assumption
that ________________________ . In a real op amp, a typical value for Rin
is ____________________ .
c. Solve Assessment Problem 5.1 and Chapter Problem 5.1.

Study Guide Section 5.3

a. In this chapter you can analyze circuits containing ideal
op amps by recognizing a familiar configuration and
remembering the equation that describes its behavior, or by
analyzing the op amp circuit using the simplifying
assumptions of ideal op amps. One of the simplest op amp
circuits is the inverting amplifier, shown in Fig. 5.9. What
does inverting mean for this circuit? What does amplifier
mean for this circuit? What must be true about the ratio for
the feedback resistor to the input resistor is the inverting
amplifier amplifies its input?
b. Solve Assessment Problem 5.2 and Chapter Problem
5.6.

Study Guide Section 5.4

a. Write an equation for the output voltage of a summing
amplifier that has four input voltages (v1, v2, v3, and v4), a 5
k input resistor in each branch, and a 20k feedback
resistor.
b. For the summing amplifier described in part (a), suppose
v1 = 1V, v2 = 0.5 V, and v3 = 2 V. If the power supplies for
the op amp are 16 V, what range of values for v4 will
cause the op amp to remain in its linear operating region?
c. Solve Assessment Problem 5.5 and Chapter Problem
5.19.

Study Guide Section 5.5

a. Fill in the blanks: In an inverting amplifier, the input voltage is
connected to the _____________ terminal and the _____________
terminal is tied to ground. In a noninverting amplifier, the input voltage
is connected to the ___________ terminal and the ____________
terminal is tied to ground.
b. If you want a summing amplifier with a gain of 5, what must be the
relationship between the feedback resistor and the input resistor?
c. Can an inverting amplifier have a gain of 1? If so, what must the
relationship between the feedback resistor and the input resistor be? If
not, why not?
d. Can a noninverting amplifier have a gain of 1? If so, what must the
relationship between the feedback resistor and the input resistor be? If
not, why not?
e. Solve Assessment Problem 5.4 and Chapter Problem 5.22.

Study Guide Section 5.6

a. Fill in the blanks:
In a difference amplifier, the source voltage connected to the
__________ terminal appears in the output voltage equation
with a + sign, while the source voltage connected to the
____________ terminal appears in the output voltage equation
with a sign.
b. In the difference amplifier of Fig. 5.13, we can use
voltage division to determine vp as a function of vb if the op
amp is ideal (see Eq. 5.21). Why can we use voltage
division in this case?
c. Solve Assessment Problem 5.5 and Chapter Problem
5.30.

Study Guide Section 5.7

a. Describe the three values that comprise the more realistic model of
an op amp in symbols and in words.
b. What are the values of the quantities you described in part (a) for an
ideal op amp?
c. Show that Eq. 5.48 reduces to Eq. 5.10 for the values in part (b).
d. Show that Eq. 5.55 reduces to Eq. 5.18 for the values in part (b).
e. In the circuits of Figs. 5.16 and 5.17 we write KCL equations at the
output terminal of the op amp, labeled b in the circuits. In analyzing
circuits with ideal op amps we do not write a KCL equation at the output
terminal why?
f. Solve Assessment Problem 5.6. In parts (a) (c) of this problem you
might find it easier to allow vg = 1 V in the circuit containing the ideal op
amp model.