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i Hc S Phm K

Thut
Khoa in in T
B Mn in T Vin
Thng

CNG HA X HI CH NGHA VIT NAM


c Lp - T Do Hnh Phc
Ngythng nm 201..

PHIU CHM N MN HC 1
(Dnh cho ngi hng dn)
1.
2.
3.
4.

5.

6.
7.

8.

H tn sinh vin:......................................................................MSSV:..........................
Tn ti:......................................................................................................................
Ngi hng dn:..........................................................................................................
Nhng u im ca n:
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Nhng thiu st ca n:
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ngh: c bo v: B sung c bo v: Khng c bo v:
Cc cu hi sinh vin phi tr li trc t chm AMH:
a)...................................................................................................................................
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b)...................................................................................................................................
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c)...................................................................................................................................
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nh gi: im ( S v ch ):.......................................................................................
Ch k v h tn

LI CM N
Trc tin, ngi thc hin ti xin c gi li cm n su sc nht n ging vin
hng dn u Trng Hin tn tnh hng dn trong sut qu trnh tm hiu v
thc hin ti.
Ngi thc hin ti cng xin c gi li cm n n ton th qu Thy C trng
i Hc S Phm K Thut TP.HCM ni chung v Qu Thy C khoa in in T
ni ring tn tnh gip v truyn t nhng kin thc tht l qu bu.
Cui cng l li cm n n gia nh, bn b to iu kin, gip , ng vin
ngi thc hin hon thnh tt n mn hc 1.
D c gng nhng trong qu trnh thc hin khng trnh khi sai xt, knh mong
qu Thy C gp v ch dn c th hon thnh tt hn n mn hc ny.
Ngi thc hin ti xin chn thnh cm n !

Sinh vin thc hin

Chu

LI NI U
Ngnh in t vin thng l mt trong nhng ngnh quan trng v mang tnh quyt
nh cho s pht trin ca mt quc gia. S pht trin nhanh chng ca Khoa hc K
Thut lm cho ngnh in t vin thng ngy cng pht trin v t c nhiu thnh
tu mi. Nhu cu ca con ngi ngy cng cao l iu kin thun li cho ngnh in
t vin thng khng ngng pht minh ra cc sn phm mi c tnh ng dng cao, cc
sn phm a tnh nng, c bn v n nh ngy cng cao Nhng mt iu c
bn l cc sn phm u bt ngun t nhng linh kin ri: R, L, C, Diode, BJT,
FET.
V vy, ngi thc hin ti Thit k v thi cng mch o v iu khin nhit
ny ng dng nhng g hc vo mt mch thc t, hiu thm nguyn l lm
vic, cch thc hot ng ca mch, cng nh hiu thm v chc nng ca tng linh
kin in t trong mch.

MC LC
Trang
Trang ba lt ......................................................................................................................
Lch trnh thc hin n .................................................................................................
Li cm n ....................................................................................................................... i
Li ni u ...................................................................................................................... ii
Mc lc ........................................................................................................................... iii
Lit k bng .................................................................................................................... iv
Lit k hnh ..................................................................................................................... v
Chng 1: GII THIU .............................................................................................. 1
1.1.Mc tiu ca ti .................................................................................................... 1
1.2.Ni dung trnh by .................................................................................................... 1
Chng 2: KIN THC B TR.. ............................................................................ 2
2.1. Tng quan v vi iu khin MCS-51 ....................................................................... 2
2.1.1 Gii thiu.2
2.1.2 Vi iu khin AT89S522
2.1.3 S khi AT89S523
2.1.4.S chn AT89S52...4
2.1.5 nh k chu k my....7
2.1.6 T chc b nh8
2.2 ADC 0809...9 .
2.3. LM3512
2.4. LCD.13
2.4.1 Hnh dng v kch thc...13
2.4.2 Chc nng cc chn..14
2.4.3 S khi ca HD44780..15
2.4.4 Tp lnh ca LCD.19
2.4.5 Giao tip gia LCD v MPU24
2.4.6 Khi to LCD25

Chng 3: TNH TON V THIT K PHN CNG.26


3.1. S nguyn l..26
3.2 S mch in...26
3.3 Khi cm bin..27
3.4 Khi to in p chun.27
3.5 S ni chn cho ADC..28
3.6 S mch x l trung tm 89c51..29
3.7 Khi hin th.30
3.8 Khi ngun 5V.30
Chng 4: THIT K PHN MM.31
Ti liu tham kho ...................................................................................................... 37

LIT K BNG
Bng 2.1 Chc nng cc chn ca Port 3.5
Bng 2.4 Chc nng cc chn ca LCD.14
Bng 2.5 Chc nng chn RS v R/W theo mc ch s dng..17
Bng 2.6 Tp lnh ca LCD..20
Bng 2.7 Maximun Rating24
Bng 2.8 Min lm vic bnh thng24

LIT K HNH
Hnh 2.1 S khi ca AT89S523
Hnh 2.2 S chn AT89S52.4
Hnh 2.3 S chn ADC.9
Hnh 2.4 Cm bin nhit12
Hnh 2.5 Hnh dng ca loi LCD thng dng.13
Hnh 2.6 S chn ca LCD.14
Hnh 2.7 S khi ca HD44780 .16
Hnh 2.8: Mi lin h gia a ch ca DDRAM v v tr hin th ca LCD... 18
Hnh 2.9: Mi lin h gia a ch ca ROM v d liu to mu k t..19
Hnh 3.1 S nguyn l26
Hnh 3.2 S mch in..26
Hnh 3.3 Khi cm bin.27
Hnh 3.4 Khi to in p chun..27
Hnh 3.5 S ni chn ADC.28
Hnh3.6 S x l trung tm..29
Hnh 3.7 Khi hin th..30
Hnh 3.8 Khi ngun30

MCH O V IU KHIN NHIT

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CHNG 1: GII THIU


1.1 Mc tiu ca ti

Vn dng c cc l thuyt hc vo vic thit k mt mch thc t.


H thng li cc kin thc hc.
Nng cao k nng thit k v thi cng mch.
Gii thch chc nng , nhim v cc khi cng nh cc linh kin trong mch.

1.2 Ni dung trnh by


Cc l thuyt lin quan v mch nhit
Gii thch chc nng, nhim v cc khi, cc linh kin trong mch.
Tnh ton, thit k v thi cng mch.

CHNG 2:KIN THC B TR

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CHNG 2: KIN THC B TR


2.1.TNG QUAN V VI IU KHIN MCS-51
2.1.1.GII THIU
H vi iu khin MCS-51 do Intel sn xut u tin vo nm 1980 l cc IC
thit k cho cc ng dng hng iu khin. Cc IC ny chnh l mt h thng vi x
l hon chnh bao gm cc cc thnh phn ca h vi x l: CPU, b nh, cc mch
giao tip, iu khin ngt.
MCS-51 l h vi iu khin s dng c ch CISC (Complex Instruction Set
Computer), c di v thi gian thc thi ca cc lnh khc nhau. Tp lnh cung cp
cho MCS-51 c cc lnh dng cho iu khin xut / nhp tc ng n tng bit.
2.1.2.VI IU KHIN AT89S52
AT89S52 l vi iu khin do Atmel sn xut, ch to theo cng ngh CMOS
c cc c tnh nh sau:
- 8 KB PEROM (Flash Programmable and Erasable Read Only Memory), c kh
nng ti 1000 chu k ghi xo
- Tn s hot ng t: 0Hz n 24 MHz
- 3 mc kha b nh lp trnh
- 128 Byte RAM ni.
- 4 Port xut /nhp I/O 8 bit.
- 2 b Timer/counter 16 Bit.
- 6 ngun ngt.
- Giao tip ni tip iu khin bng phn cng.
- 64 KB vng nh m ngoi
- 64 KB vng nh d liu ngoi.
CHNG 2:KIN THC B TR

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- Cho php x l bit.


- 210 v tr nh c th nh v bit.
- 4 chu k my (4 s i vi thch anh 12MHz) cho hot ng nhn hoc chia.
- C cc ch ngh (Low-power Idle) v ch ngun gim (Power-down).
Ngoi ra, mt s IC khc ca h MCS-51 c thm b nh thi th 3 v 256
byte RAM ni.
2.1.3 S KHI AT89S52

Hnh 2.1 S khi ca AT89S52


CHNG 2:KIN THC B TR

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2.1.4 S CHN AT89S52

Hnh 2.2 S chn AT89S52


Port 0:
Port 0 l port c 2 chc nng cc chn 32 39 ca AT89C51:
- Chc nng IO (xut / nhp): dng cho cc thit k nh. Tuy nhin, khi dng
chc nng ny th Port 0 phi dng thm cc in tr ko ln (pull-up), gi tr
ca in tr ph thuc vo thnh phn kt ni vi Port.
Khi dng lm ng ra, Port 0 c th ko c 8 ng TTL.
Khi dng lm ng vo, Port 0 phi c set mc logic 1 trc .
- Chc nng a ch / d liu a hp: khi dng cc thit k ln, i hi phi s
dng b nh ngoi th Port 0 va l bus d liu (8 bit) va l bus a ch (8 bit
thp).
Ngoi ra khi lp trnh cho AT89C51, Port 0 cn dng nhn m khi lp trnh
v xut m khi kim tra (qu trnh kim tra i hi phi c in tr ko ln).
Port 1:

CHNG 2:KIN THC B TR

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Port1 (chn 1 8) ch c mt chc nng l IO, khng dng cho mc ch khc


(ch trong 8032/8052/8952 th dng thm P1.0 v P1.1 cho b nh thi th 3). Ti
Port 1 c in tr ko ln nn khng cn thm in tr ngoi.
Port 1 c kh nng ko c 4 ng TTL v cn dng lm 8 bit a ch thp
trong qu trnh lp trnh hay kim tra.
Khi dng lm ng vo, Port 1 phi c set mc logic 1 trc .
Port 2:
Port 2 (chn 21 28) l port c 2 chc nng:
- Chc nng IO (xut / nhp): c kh nng ko c 4 ng TTL.
- Chc nng a ch: dng lm 8 bit a ch cao khi cn b nh ngoi c a ch
16 bit. Khi , Port 2 khng c dng cho mc ch IO.
Khi dng lm ng vo, Port 2 phi c set mc logic 1 trc .
Khi lp trnh, Port 2 dng lm 8 bit a ch cao hay mt s tn hiu iu khin.
Port 3:
Port 3 (chn 10 17) l port c 2 chc nng:
- Chc nng IO: c kh nng ko c 4 ng TTL.
Khi dng lm ng vo, Port 3 phi c set mc logic 1 trc .
- Chc nng khc: m t nh bng 1.1
Bng 2.1: Chc nng cc chn ca Port 3
Bit

Tn

Chc nng

P3.0 RxD

Ng vo port ni tip

P3.1 TxD

Ng ra port ni tip

P3.2 INT0

Ngt ngoi 0

P3.3 INT1

Ngt ngoi 1

CHNG 2:KIN THC B TR

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P3.4 T0

Ng vo ca b nh thi 0

P3.5 T1

Ng vo ca b nh thi 1

P3.6 WR

Tn hiu iu khin ghi d liu ln b nh ngoi.

P3.7 RD

Tn hiu iu khin c t b nh d liu ngoi.

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NGUN:
Chn 40: VCC = 5V 20%
Chn 20: GND
PSEN (Program Store Enable):
PSEN (chn 29) cho php c b nh chng trnh m rng i vi cc ng
dng s dng ROM ngoi, thng c ni n chn OC (Output Control) ca
ROM c cc byte m lnh. PSEN s mc logic 0 trong thi gian AT89C51 ly
lnh.Trong qu trnh ny, PSEN s tch cc 2 ln trong 1 chu k my.
M lnh ca chng trnh c c t ROM thng qua bus d liu (Port0) v
bus a ch (Port0 + Port2).
Khi 8951 thi hnh chng trnh trong ROM ni, PSEN s mc logic 1.
ALE/PROG (Address Latch Enable / Program):
ALE/PROG (chn 30) cho php tch cc ng a ch v d liu ti Port 0
khi truy xut b nh ngoi. ALE thng ni vi chn Clock ca IC cht (74373,
74573).
Cc xung tn hiu ALE c tc bng 1/6 ln tn s dao ng trn chip v c
th c dng lm tn hiu clock cho cc phn khc ca h thng. Xung ny c th
cm bng cch set bit 0 ca SFR ti a ch 8Eh ln 1. Khi , ALE ch c tc dng
khi dng lnh MOVX hay MOVC. Ngoi ra, chn ny cn c dng lm ng vo
CHNG 2:KIN THC B TR

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xung lp trnh cho ROM ni (PROG).


EA /VPP (External Access) :
EA (chn 31) dng cho php thc thi chng trnh t ROM ngoi. Khi ni
chn 31 vi Vcc, AT89S52 s thc thi chng trnh t ROM ni (ti a 8KB), ngc
li th thc thi t ROM ngoi (ti a 64KB).
Ngoi ra, chn EA c ly lm chn cp ngun 12V khi lp trnh cho ROM.
RST (Reset):
RST (chn 9) cho php reset AT89C51 khi ng vo tn hiu a ln mc 1
trong t nht l 2 chu k my.
X1,X2:
Ng vo v ng ra b dao ng, khi s dng c th ch cn kt ni thm thch
anh v cc t nh hnh v trong s . Tn s thch anh thng s dng cho
AT89C51 l 12Mhz.

2.1.5 NH K CHU K MY
Mt chu k my bao gm 6 trng thi (12 xung clock). Mt trng thi bao gm
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2 phn ng vi 12 xung clock : Phase 1 v Phase 2. Nh vy, mt chu k my bao


gm 12 xung clock c biu din t S1P1 n S6P2 (State 1, Phase 1 State 6,
Phase 2). Chu k ly lnh v thc thi lnh m t nh hnh 1.4.
Tn hiu cht a ch ALE tch cc 2 ln trong mt chu k my (trong khong
thi gian S1P2 n S2P1 v t S4P2 n S5P1). T tn s xung ti chn ALE bng
1/6 tn s thch anh.
i vi cc lnh thc thi trong 1 chu k:
- Lnh 1 byte: c thc thi ti thi im S1P2 sau khi m lnh c cht vo
thanh ghi lnh ti S1P1.
- Lnh 2 byte: byte th 2 c c ti thi im S4 v s c thc thi ti thi
im S4.
i vi cc lnh thc thi trong 2 chu k:
Qu trnh ly lnh thc hin ti thi im S1 ca chu k u tin (byte m lnh
2.1.6.T CHC B NH

B nh ca h MCS-51 c th chia thnh 2 phn: b nh trong v b nh


ngoi. B nh trong bao gm 4 KB ROM v 128 byte RAM (256 byte trong 8052).
Cc byte RAM c a ch t 00h 7Fh v cc thanh ghi chc nng c bit (SFR) c
a ch t 80h 0FFh c th truy xut trc tip. i vi 8052, 128 byte RAM cao (a
CHNG 2:KIN THC B TR

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ch t 80h 0FFh) khng th truy xut trc tip m ch c th truy xut gin tip (xem
thm trong phn tp lnh).
B nh ngoi bao gm b nh chng trnh (iu khin c bng tn hiu
PSEN) v b nh d liu (iu khin bng tn hiu RD hay WR cho php c
hay ghi d liu). Do s ng a ch ca MCS-51 l 16 bit (Port 0 cha 8 bit thp v
Port 2 cha 8 bit cao) nn b nh ngoi c th gii m ti a l 64KB.

2.2 ADC 0809


B ADC 0809 l mt thit b CMOS tch hp vi mt b chuyn i t tng t sang
s 8 bit, b chn 8 knh v mt b logic iu khin tng thch. B chuyn i AD 8
bit ny dng phng php chuyn i xp x tip. B chn knh c th truy xut bt
knh no trong cc ng vo tng t mt cnh c lp.
Thit b ny loi tr kh nng cn thit iu chnh im 0 bn ngoi v kh nng iu
chnh t s lm trn ADC 0809 d dng giao tip vi cc b vi x l.
* S chn ADC 0809:

Hnh 2.3-S chn ADC


* ngha cc chn:
. IN0 n IN7 : 8 ng vo tng t.
. A, B, C : gii m chn mt trong 8 ng vo
. Z-1 n Z-8 : ng ra song song 8 bit
. ALE : cho php cht a ch
. START : xung bt u chuyn i
. CLK : xung ng h
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. REF (+) : in th tham chiu (+)


. REF (-) : in th tham chiu (-)
. VCC : ngun cung cp
* Cc c im caADC 0809:
. phn gii 8 bit
. Tng sai s cha chnh nh +/- LSB; +/- 1 LSB
. Thi gian chuyn i: 100us tn s 640 kHz
. Ngun cung cp + 5V
. in p ng vo 0 5V
. Tn s xung clock 10kHz 1280 kHz
. Nhit hot ng - 40oC n 85oC
. D dng giao tip vi vi x l hoc dng ring
. Khng cn iu chnh zero hoc y thang
* Nguyn l hot ng:
ADC 0809 c 8 ng vo tng t, 8 ng ra 8 bit c th chn 1 trong 8 ng vo tng
t chuyn i sang s 8 bit.
Cc ng vo c chn bng cch gii m. Chn 1 trong 8 ng vo tng t c thc
hin nh 3 chn ADDA , ADDB , ADDC nh bng trng thi sau:

Sau khi kch xung start th b chuyn i bt u hot ng cnh xung ca xung
start, ng ra EOC s xung mc thp sau khong 8 xung clock (tnh t cnh xung ca
xung start). Lc ny bit c trng s ln nht (MSB) c t ln mc 1, tt c cc bit
cn li mc 0, ng thi to ra in th c gi tr Vref/2, in th ny c so snh
vi in th vo in.
+ Nu Vin > Vref/2 th bit MSB vn mc 1.
+ Nu Vin < Vref/2 th bit MSB vn mc 0.
Tng t nh vy bit k tip MSB c t ln 1 v to ra in th c gi tr Vref/4 v
CHNG 2:KIN THC B TR

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cng so snh vi in p ng vo Vin. Qu trnh c tip tc nh vy cho n khi xc


nh c bit cui cng. Khi chn EOC ln mc 1 bo cho bit kt thc chuyn
i.
Trong sut qu trnh chuyn i chn OE c t mc 1, mun c d liu ra chn
OE xung mc 0.
Trong sut qu trnh chuyn i nu c 1 xung start tc ng th ADC s ngng chuyn
i.
M ra N cho mt ng vo ty l mt s nguyn.

Trong Vin: in p ng vo h so snh.


Vref(+): in p ti chn REF(+).
Vref(-): in p ti chn REF(-).

Vref(+) = Vcc = 5V th y thang l 256.


- Gi tr bc nh nht
1 LSB =5/(28 -1) = 0,0196 V/byte
Vy vi 256 bc Vin = 5V.
p vo ln nht ca ADC 0809 l 5V.

CHNG 2:KIN THC B TR

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Biu thi gian ca ADC 0809.

c dng thc hin cc in p u ra khc 0 - +5V.


2.3 LM35

Hnh 2.4 Cm bin nhit


o nhit c chnh xc ,tt nhin cn c mt u d thch hp. u d l mt
cm bin nhit c nhim v vn chuyn t nhit qua tn hiu in. C rt loi cm bin
nhng da vo l thuyt v thc t ca mch cn thit k ta dng phng php o bng IC
CHNG 2:KIN THC B TR

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cm bin nhit . Cc IC cm bin nhit c chnh xc cao, d tm gi thanh r. Mt


trong s l IC LM35, l loi thng dng trn th trng hin nay, ng thi n c nhng
c tnh lm ph hp vi thit k chi tit ca mch.
Mt s tnh cht c bn ca LM35
-

LM35 c bin thin theo nhit :10mV/1oC.


0V tng ng 0oC
chnh xc cao ,tnh nng cm bin rt nhy, nhit 25oC n c sai s khng qu
0,5oC. Vi tm o t -55oC n 150oC ,tn hiu ra tuyn tnh lin tc vi nhng thay
i ca tn hiu ng vo.
Thng s k thut:
Tiu tn cng sut thp
in p lm vic t 4V-30V
c tch hp b nh dng lm vic bn trong

2.4 LCD
* Gii thiu :
Ngy nay, thit b hin th LCD (Liquid Crystal Display) c s dng trong rt
nhiu cc ng dng ca VK. LCD c rt nhiu u im so vi cc dng hin th khc:
N c kh nng hin th k t a dng, trc quan (ch, s v k t ha), d dng a
vo mch ng dng theo nhiu giao thc giao tip khc nhau, tn rt t ti nguyn h
thng v gi thnh r
Tng Qut V LCD HD44780
2.4.1 Hnh dng v kch thc:
C rt nhiu loi LCD vi nhiu hnh dng v kch thc khc nhau, trn hnh 1 l loi
LCD thng
dng.

Hnh 2.5: Hnh dng ca loi LCD thng dng


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Khi sn xut LCD, nh sn xut tch hp chp iu khin (HD44780) bn trong lp


v v ch a cc chn giao tip cn thit. Cc chn ny c nh s th t v t tn
nh hnh 2 :

Hnh 2.6 : S chn ca LCD


2.4.2 Chc nng cc chn :
Bng 2.4 : Chc nng cc chn ca LCD
Chn

K
hiu

M t

Vss

VDD

Chn cp ngun cho LCD, khi thit k mch ta ni chn ny vi


VCC=5V ca mch iu khin

VEE

iu chnh tng phn ca LCD.

RS

Chn ni t cho LCD, khi thit k mch ta ni chn ny vi


GND ca mch iu khin

Chn chn thanh ghi (Register select). Ni chn RS vi logic 0


(GND) hoc logic 1 (VCC) chn thanh ghi.
+ Logic 0: Bus DB0-DB7 s ni vi thanh ghi lnh IR ca LCD
( ch ghi - write) hoc ni vi b m a ch ca LCD (
ch c - read)
+ Logic 1: Bus DB0-DB7 s ni vi thanh ghi d liu DR bn
trong LCD.

R/W

Chn chn ch c/ghi (Read/Write). Ni chn R/W vi logic

CHNG 2:KIN THC B TR

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0 LCD hot ng ch ghi, hoc ni vi logic 1


LCD ch c.
6

Chn cho php (Enable). Sau khi cc tn hiu c t ln bus


DB0-DB7, cc lnh ch c chp nhn khi c 1 xung cho php
ca chn E.
+ ch ghi: D liu bus s c LCD chuyn vo(chp
nhn) thanh ghi bn trong n khi pht hin mt xung (high-to-low
transition) ca tn hiu chn E.
+ ch c: D liu s c LCD xut ra DB0-DB7 khi pht
hin cnh ln (low-to-high transition) chn E v c LCD gi
bus n khi no chn E xung mc thp.

7 - 14

DB0 - Tm ng ca bus d liu dng trao i thng tin vi MPU.


DB7 C 2 ch s dng 8 ng bus ny :
+ Ch 8 bit : D liu c truyn trn c 8 ng, vi bit MSB
l bit DB7.
+ Ch 4 bit : D liu c truyn trn 4 ng t DB4 ti
DB7, bit MSB l DB7

15

Ngun dng cho n nn

16

GND cho n nn

* Ghi ch : ch c, ngha l MPU s c thng tin t LCD thng qua cc chn


DBx.
Cn khi ch ghi, ngha l MPU xut thng tin iu khin cho LCD thng qua
cc chn DBx.
2.4.3 S khi ca HD44780:
hiu r hn chc nng cc chn v hot ng ca chng, ta tm hiu s qua chp
HD44780 thng qua cc khi c bn ca n.

CHNG 2:KIN THC B TR

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Hnh 2.7 S khi ca HD44780


2.4.3.1 Cc thanh ghi :
Chp HD44780 c 2 thanh ghi 8 bit quan trng : Thanh ghi lnh IR (Instructor
Register) v thanh ghi d liu DR (Data Register)
- Thanh ghi IR : iu khin LCD, ngi dng phi ra lnh thng qua tm ng
bus DB0-DB7. Mi lnh c nh sn xut LCD nh a ch r rng. Ngi dng ch
vic cung cp a ch lnh bng cch np vo thanh ghi IR. Ngha l, khi ta np vo
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thanh ghi IR mt chui 8 bit, chp HD44780 s tra bng m lnh ti a ch m IR cung
cp v thc hin lnh .
- Thanh ghi DR : Thanh ghi DR dng cha d liu 8 bit ghi vo vng RAM
DDRAM hoc CGRAM
( ch ghi) hoc dng cha d liu t 2 vng RAM ny gi ra cho MPU ( ch
c). Ngha l, khi MPU ghi thng tin vo DR, mch ni bn trong chp s t ng
ghi thng tin ny vo DDRAM hoc CGRAM. Hoc khi thng tin v a ch c ghi
vo IR, d liu a ch ny trong vng RAM ni ca HD44780 s c chuyn ra DR
truyn cho MPU.
=> Bng cch iu khin chn RS v R/W chng ta c th chuyn qua li gi 2 thanh
ghi ny khi giao tip vi MPU. Bng sau y tm tt li cc thit lp i vi hai chn
RS v R/W theo mc ch giao tip.
Bng 2.5 : Chc nng chn RS v R/W theo mc ch s dng
RS

R/W

Chc nng

Ghi vo thanh ghi IR ra lnh cho LCD

c c bn DB7 v gi tr ca b m a ch DB0-DB6

Ghi vo thanh ghi DR

c d liu t DR

2.4.3.2 C bo bn BF: (Busy Flag)


Khi thc hin cc hot ng bn trong chp, mch ni bn trong cn mt khong thi
gian hon tt. Khi
ang thc thi cc hot ng bn trong chip nh th, LCD b qua mi giao tip vi bn
ngoi v bt c BF (thng qua chn DB7 khi c thit lp RS=0, R/W=1) ln bo cho
MPU bit n ang bn. D nhin, khi xong vic, n s t c BF li mc 0.
2.4.3.3 B m a ch AC : (Address Counter)
Nh trong s khi, thanh ghi IR khng trc tip kt ni vi vng RAM (DDRAM
v CGRAM) m thng qua b m a ch AC. B m ny li ni vi 2 vng RAM
theo kiu r nhnh. Khi mt a ch lnh c np vo thanh ghi IR, thng tin c ni
CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT

Trang 18

trc tip cho 2 vng RAM nhng vic chn la vng RAM tng tc c bao hm
trong m lnh.
Sau khi ghi vo (c t) RAM, b m AC t ng tng ln (gim i) 1 n v v ni
dung ca AC c xut ra cho MPU thng qua DB0-DB6 khi c thit lp RS=0 v
R/W=1 (xem bng tm tt RS - R/W).
2.4.3.4 Vng RAM hin th DDRAM : (Display Data RAM)
y l vng RAM dng hin th, ngha l ng vi mt a ch ca RAM l mt k
t trn mn hnh v khi bn ghi vo vng RAM ny mt m 8 bit, LCD s hin th ti
v tr tng ng trn mn hnh mt k t c m 8 bit m bn cung cp. Hnh sau y
s trnh by r hn mi lin h ny :

Hnh 2.8: Mi lin h gia a ch ca DDRAM v v tr hin th ca LCD


Vng RAM ny c 80x8 bit nh, ngha l cha c 80 k t m 8 bit. Nhng vng
RAM cn li khng dng cho hin th c th dng nh vng RAM a mc ch. Lu
l truy cp vo DDRAM, ta phi cung cp a ch cho AC theo m HEX
2.4.3.5 Vng ROM cha k t CGROM: Character Generator ROM
Vng ROM ny dng cha cc mu k t loi 5x8 hoc 5x10 im nh/k t, v
nh a ch bng 8 bit. Tuy nhin, n ch c 208 mu k t 5x8 v 32 mu k t kiu
5x10 (tng cng l 240 thay v 2^8 = 256 mu k t). Ngi dng khng th thay i
vng ROM ny.

CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT

Trang 19

Hnh 2.9: Mi lin h gia a ch ca ROM v d liu to mu k t.


Nh vy, c th ghi vo v tr th x trn mn hnh mt k t y no , ngi dng
phi ghi vo vng DDRAM ti a ch x (xem bng mi lin h gia DDRAM v v tr
hin th) mt chui m k t 8 bit trn CGROM. Ch l trong bng m k t trong
CGROM hnh bn di c m ROM A00.
2.4.3.6 Vng RAM cha k t ha CGRAM : (Character Generator RAM)
Nh trn bng m k t, nh sn xut dnh vng c a ch byte cao l 0000 ngi
dng c th to cc mu k t ha ring. Tuy nhin dung lng vng ny rt hn
ch: Ta ch c th to 8 k t loi 5x8 im nh, hoc 4 k t loi 5x10 im nh.
2.4.4 Tp lnh ca LCD :
Trc khi tm hiu tp lnh ca LCD, sau y l mt vi ch khi giao tip vi LCD :
* Tuy trong s khi ca LCD c nhiu khi khc nhau, nhng khi lp trnh iu
khin LCD ta ch c th tc ng trc tip c vo 2 thanh ghi DR v IR thng qua
cc chn DBx, v ta phi thit lp chn RS, R/W ph hp chuyn qua li gi 2
thanh ghi ny. (xem bng 2)

CHNG 2:KIN THC B TR

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* Vi mi lnh, LCD cn mt khong thi gian hon tt, thi gian ny c th kh


lu i vi tc ca MPU, nn ta cn kim tra c BF hoc i (delay) cho LCD thc
thi xong lnh hin hnh mi c th ra lnh tip theo.
* a ch ca RAM (AC) s t ng tng (gim) 1 n v, mi khi c lnh ghi vo
RAM. (iu ny gip chng trnh gn hn)
* Cc lnh ca LCD c th chia thnh 4 nhm nh sau :
Cc lnh v kiu hin th. VD : Kiu hin th (1 hng / 2 hng), chiu di d liu (8
bit / 4 bit),
Ch nh a ch RAM ni.
Nhm lnh truyn d liu trong RAM ni.
Cc lnh cn li .
Bng 2.6 : Tp lnh ca LCD
Hot ng

Tn lnh
Clear
Display

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DBx =

Lnh Clear Display (xa hin th) s ghi mt khong trng-blank (m hin
k t 20H) vo tt c nh trong DDRAM, sau tr b m a AC=0,
tr li kiu hin th gc nu n b thay i. Ngha l : Tt hin th, con tr
di v gc tri (hng u tin), ch tng AC.
Return
home

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DBx =

Lnh Return home tr b m a ch AC v 0, tr li kiu hin th gc nu


n b thay i. Ni dung ca DDRAM khng thay i.
Entry
mode set

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DBx = 0

[I/D] [S]

I/D : Tng (I/D=1) hoc gim (I/D=0) b m a ch hin th AC 1 n v


mi khi c hnh ng ghi hoc c vng DDRAM. V tr con tr cng di
CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT

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chuyn theo s tng gim ny.


S : Khi S=1 ton b ni dung hin th b dch sang phi (I/D=0) hoc sang
tri (I/D=1) mi khi c hnh ng ghi vng DDRAM. Khi S=0: khng dch
ni dung hin th. Ni dung hin th khng dch khi c DDRAM hoc
c/ghi vng CGRAM.
Display

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DBx =

on/off
control

[D]

[C]

[B]

D: Hin th mn hnh khi D=1 v ngc li. Khi tt hin th, ni dung
DDRAM khng thay i.
C: Hin th con tr khi C=1 v ngc li.
B: Nhp nhy k t ti v tr con tr khi B=1 v ngc li.
Chu k nhp nhy khong 409,6ms khi mch dao ng ni LCD l
250kHz.

Cursor

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DBx =

or
display
shift

[S/C] [R/L] *

Lnh Cursor or display shift dch chuyn con tr hay d liu hin th sang
tri m khng cn hnh ng ghi/c d liu. Khi hin th kiu 2 dng, con
tr s nhy xung dng di khi dch qua v tr th 40 ca hng u tin.
D liu hng u v hng 2 dch cng mt lc. Chi tit s dng xem bng
bn di:
S/C

R/L

Hot ng

Dch v tr con tr sang tri (Ngha l gim AC mt n v).

Dch v tr con tr sang phi (Tng AC ln 1 n v).

Dch ton b ni dung hin th sang tri, con tr cng dch


theo.

CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT


1

Trang 22

Dch ton b ni dung hin th sang phi, con tr cng dch


theo.

Function M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
set

DBx =

[DL] [N]

[F]

DL: Khi DL=1, LCD giao tip vi MPU bng giao thc 8 bit (t bit DB7
n DB0). Ngc li, giao thc giao tip l 4 bit (t bit DB7 n bit DB0).
Khi chn giao thc 4 bit, d liu c truyn/nhn 2 ln lin tip. vi 4 bit
cao gi/nhn trc, 4 bit thp gi/nhn sau.
N : Thit lp s hng hin th. Khi N=0 : hin th 1 hng, N=1: hin th 2
hng.
F : Thit lp kiu k t. Khi F=0: kiu k t 5x8 im nh, F=1: kiu k t
5x10 im nh.
Set
CGRA
M

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DBx = 0

1 [ACG][ACG][ACG][ACG][ACG][ACG]

address

Lnh ny ghi vo AC a ch ca CGRAM. K hiu [ACG] ch 1 bit ca


chui d liu 6 bit. Ngay sau lnh ny l lnh c/ghi d liu t CGRAM
ti a ch c ch nh.

Set

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0

DDRAM
address

DBx =

[AD] [AD] [AD] [AD] [AD] [AD] [AD]

Lnh ny ghi vo AC a ch ca DDRAM, dng khi cn thit lp ta


hin th
mong mun. Ngay sau lnh ny l lnh c/ghi d liu t DDRAM ti a
ch c ch nh.
Khi ch hin th 1 hng: a ch c th t 00H n 4FH. Khi ch
hin th 2 hng, a ch t 00h n 27H cho hng th nht, v t 40h n
67h cho hng th 2.

CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT

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Read BF M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
and

DBx =[BF] [AC] [AC] [AC] [AC] [AC] [AC] [AC]


(RS=0,R/W=1)

address
Nh cp trc y, khi c BF bt, LCD ang lm vic v lnh tip
theo (nu c) s b b qua nu c BF cha v mc thp. Cho nn, khi lp
trnh iu khin, phi kim tra c BF trc khi ghi d liu vo LCD.
Khi c c BF, gi tr ca AC cng c xut ra cc bit [AC]. N l a ch
ca
CG hay DDRAM l ty thuc vo lnh trc .
Write

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DBx =

data to

[Write data]

(RS=1,

R/W=0)
CG or
Khi thit lp RS=1, R/W=0, d liu cn ghi c a vo cc chn DBx t
DDRAM mch
ngoi s c LCD chuyn vo trong LCD ti a ch c xc nh t
lnh ghi a ch trc (lnh ghi a ch cng xc nh lun vng RAM
cn ghi)
Sau khi ghi, b m a ch AC t ng tng/gim 1 ty theo thit lp
Entry mode.
Read

M lnh : DBx = DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
DBx =

data

[Read data]

(RS=1,

R/W=1)
from CG
Khi thit lp RS=1, R/W=1,d liu t CG/DDRAM c chuyn ra MPU
or
thng qua cc chn DBx (a ch v vng RAM c xc nh bng lnh
DDRAM ghi a ch trc ).
Sau khi c, AC t ng tng/gim 1 ty theo thit lp Entry mode, tuy
CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT

Trang 24

nhin ni dung hin th khng b dch bt chp ch Entry mode.


2.4.5 Giao tip gia LCD v MPU :
- c tnh in ca cc chn giao tip :
LCD s b hng nghim trng, hoc hot ng sai lch nu bn vi phm khong c
tnh in sau y:
Bng 2.7 Maximun Rating
Chn cp ngun (Vcc-GND)

Min:-0.3V , Max+7V

Cc chn ng vo (DBx,E,)

Min:-0.3V , Max:(Vcc+0.3V)

Nhit hot ng

Min:-30C , Max:+75C

Nhit bo qun

Min:-55C , Max:+125C

c tnh in lm vic in hnh: (o trong iu kin hot ng Vcc = 4.5V n 5.5V,


T = -30 n +75C)
Bng 2.8: Min lm vic bnh thng
Chn cp ngun Vcc-GND

2.7V n 5.5V

in p vo mc cao VIH

2.2V n Vcc

in p vo mc thp VIL

-0.3V n 0.6V

in p ra mc cao (DB0-DB7)

Min 2.4V

in p ra mc thp (DB0-DB7)

Max 0.4V (khi IOL = 1.2mA)

Dng in ng vo (input leakage current)


ILI

-1uA n 1uA
Vcc)

Dng in cp ngun ICC

350uA(typ.) n 600uA

Tn s dao ng ni fOSC

190kHz n 350kHz (in hnh l


270kHz)

CHNG 2:KIN THC B TR

(khi IOH = -0.205mA)

(khi VIN = 0 n

MCH O V IU KHIN NHIT

Trang 25

2.4.6 Khi to LCD:


Khi to l vic thit lp cc thng s lm vic ban u. i vi LCD, khi to gip ta
thit lp cc giao thc lm vic gia LCD v MPU. Vic khi to ch c thc hin 1
ln duy nht u chng trnh iu khin LCD v bao gm cc thit lp sau :
Display clear : Xa/khng xa ton b ni dung hin th trc .
Function set : Kiu giao tip 8bit/4bit, s hng hin th 1hng/2hng, kiu k t
5x8/5x10.
Display on/off control: Hin th/tt mn hnh, hin th/tt con tr, nhp nhy/khng
nhp nhy.
Entry mode set : cc thit lp kiu nhp k t nh: Dch/khng dch, t tng/gim
(Increment).
2.4.6.1 Mch khi to bn trong chp HD44780:
Mi khi c cp ngun, mch khi to bn trong LCD s t ng khi to cho n. V
trong thi gian khi to ny c BF bt ln 1, n khi vic khi to hon tt c BF cn
gi trong khong 10ms sau khi Vcc t n 4.5V (v 2.7V th LCD hot ng).
Mch khi to ni s thit lp cc thng s lm vic ca LCD nh sau:
Display clear : Xa ton b ni dung hin th trc .
Function set: DL=1 : 8bit; N=0 : 1 hng; F=0 : 5x8
Display on/off control: D=0 : Display off; C=0 : Cursor off; B=0 : Blinking off.
Entry mode set: I/D =1 : Tng; S=0 : Khng dch.
Nh vy sau khi m ngun, bn s thy mn hnh LCD ging nh cha m ngun do
ton b hin th tt. Do , ta phi khi to LCD bng lnh.

CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT


Chng 3: TNH TON V THIT K PHN CNG
3.1 S nguyn l

Hnh 3.1 S nguyn l


3.2 S mch in

Hnh 3.2 S mch in


CHNG 2:KIN THC B TR

Trang 26

MCH O V IU KHIN NHIT

Trang 27

3.3 Khi cm bin:


5V
VIN

U3
LM35

Vout

2
R1
75

ADJ

VOUT

C1
1uF

0V

Hnh 3.3 Khi cm bin


in tr 75 ohm v t 1uF dng chng nhiu cho tn hiu u ra ca LM35.
3.4 Khi to in p chun

1K

R75

C20

14

U25:B

14

U25:A
2

C19

10MF
74HC14

74HC14

102

Hnh 3.4-Khi to in p chun


to in p chun cho Vref ta s dng s mch trn
in p u ra n nh ta chn tng tr R = R2+R3+R4 ln do ta chn R=20k
d iu chnh ta chn bin tr l 10k
Ta c in p ngun V=5v
5
IR= =0,25 mA
20
-

CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT

Trang 28

Gi Rdi l in tr t chn 2 ca bin tr xung mass


0.64
=2,56 k => chn R4=2,2k
0.25
Chn R2=18k
3.5 S ni chn cho ADC
Rdi=

U18
26
27
28
1
2
3
4
5

P2.4
EOC

6
7
9
RV13
10
11

3 12
16

IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
START
EOC
OUTPUT ENABLE
CLOCK
VCC

ADD A
ADD B
ADD C
ALE
2 -1MSB
2 -2
2 -3
2 -4
2 -5
2 -6
2 -7
2 -8LSB
GND

VREF(+)
VREF(-)
ADC0809

10K

Hnh 3.5- S ni chn ADC


1
F=
1.1RC
M tn s hot ng ca ADC l 600 700 Khz
Chn f= 660 Khz ;R =10K
=>C=

1
137 .10 12 F
1,1.10000 .660000

Chn C = 150 pF

CHNG 2:KIN THC B TR

25
24
23
22
21
20
19
18
8
15
14
17
13

P2.0
P1.7
P1.6
P1.5
P1.4
P1.3
P1.2
P1.1
P1.0

MCH O V IU KHIN NHIT

Trang 29

19

RST
XTAL1

10K R23

P0.0/AD0
P0.1/AD1
P0.2/AD2
P0.3/AD3
P0.4/AD4
P0.5/AD5
P0.6/AD6
P0.7/AD7

39
38
37
36
35
34
33
32

P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7

21
22
23
24
25
26
27
28

P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7

10
11
12
13
14
15
16
17

P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7

P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7

RP1

VCC
EA

XTAL

2
3
4
5
6
7
8
9

18

RP3

XTAL2
GND
PSEN
ALE

1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

1
2
3
4
5
6
7
8

P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7

P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
P3.0/RXD
P3.1/TXD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD

1
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7

RP2

11.0592

20
29
30

2
3
4
5
6
7
8
9

U4

10MF
KEY-TRON
40
31

4K7

RESET C4

2
3
4
5
6
7
8
9

4K7

RESET

c th truy cp ADC th chn CS phi mc thp do ta ni chn CS xung mass.


3.6 S mch x l trung tm 89c51 :

AT89XX

4K7

RP4

P2.1
1
2
3
4
5
6
7
8
9

4K7

P2.7
P2.6
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0

KHOI VI XU LI
Hnh3.6-S x l trung tm

Khi vi x l m nhim thc thi mi cng vic nhn d liu t b ADC gii m tn hiu
v xut d liu hin th ra mn hnh LCD, ng thi iu khin thit b khi nhit o qu
ngng ci t.
3.7 Khi hin th
CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT

D0
D1
D2
D3
D4
D5
D6
D7

RS
RW
E

GND
K

1
16

10K

P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7

P2.7

P2.6

VEE

VDD
A

4
5
6

2
15

LCD 16X2

LCD1

7
8
9
10
11
12
13
14

LCD16X2

Trang 30

Hnh 3.7-Khi hin th


Khi hin th LCD lm nhim v ly thng tin d liu t vi x l hin th thng tin cho
ngi dng bit
3.8 Khi ngun 5V:
U16

12V

7805

VI

VO

1N4007
DOMINO2

C6

D34
LED-Nguon

C7
1mF

1mF
330 R85

1000mF

C5

GND

2
1

D1

J1

KHOI NGUON
Hnh 3.8-Khi ngun
i vi tt c cc mch s dng vi x l th u phi dng ngun in chun l 5V. khi
dng in c a qua diode v sau qua cc t ngun lc ngun v i vo chn s
1 ca ic ngun 7805 v sau s ic 7805 s xut ra 1 in p chun 5V chn s 3
CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT

Trang 31

Trong tt c cc mch ngun th u c 1 con led bo ngun dng biu th trng thi
hot ng ca ic ngun v trn led c 1 con in tr dng hn dng cho led cho led
hot ng tt m khng b chy bi p v dng .
Cng thc tnh tr cho led: Rled= (Vcc-Vled)/Iled= (5V-2V)/10mA=0.3 K = 300 ohm. v
khng c in tr 300 ohm nn ta chn tr cho led l 330 ohm
Chng 4: THIT K PHN MM
Chng trnh phn mm:
#include <AT89X51.H>
#include <stdio.h>
#include<string.h>
#define RS P2_7
//#define RW P3_6//RW=0 => ghi
#define EN P2_6//RW=1 => doc
//RS=0 => code
//RS=1 => data
#define LCD_PORT P0
#define ADC_PORT P1
#define ALE P2_0
#define START
#define role

P2_4

P2_1

//===========================
void delay_ms(int n)
{

int k,j;
for(k=0;k<n;k++)
{

CHNG 2:KIN THC B TR

MCH O V IU KHIN NHIT


for(j=0;j<500;j++);
}
}
//==========================
void delay_5ms(){
int i,j;
for(i=0;i<250;i++)
for(j=0;j<4;j++){}
}
//===========================
void delay_15ms(){
int i,j;
for(i=0;i<250;i++)
for(j=0;j<100;j++){}
}
//============================
void LCDWriteCmd(unsigned char c) //CT con ghi du lieu len LCD
{
RS=0;
//RW=0;
LCD_PORT=c;
EN=1;
EN=0;
delay_5ms();
CHNG 2:KIN THC B TR

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MCH O V IU KHIN NHIT


}
//==============================
void LCDWriteData(unsigned char c) //CT con doc du lieu tu LCD
{
RS=1;
//RW=0;
LCD_PORT=c;
EN=1;
EN=0;
delay_5ms();
}
//=============================
void LCDcursorxy(int x, int y)
{
if((x<1||x>2)&&(y<1||y>16))
{
x=1;
y=1;
}
if(x == 1)
LCDWriteCmd(0x7F+y);
else
LCDWriteCmd(0xBF+y);
}
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//===============================
void LCD_init() // Khoi tao LCD
{
delay_15ms();
LCDWriteCmd(0x38);
LCDWriteCmd(0x0C);
// LCDWriteCmd(0x06);
LCDWriteCmd(0x01); // Xoa man hinh LCD
}
//================================
void LCD_clear()
{
LCDWriteCmd(0x01);
}
//===============================
void LCD_home()
{
LCDWriteCmd(0x80);
}
//=============================
void LCD_putstr(unsigned char *s)
{
while (*s)
{
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LCDWriteData(*s);
s++;
}
}
//============================
void HienThi_ADC(unsigned char t)
{
unsigned char v;
if(t<10)
{

LCDWriteData(t+48);

}else if(t<100){
LCDWriteData(t/10+48);
LCDWriteData(t%10+48);
}else{
v=t/10;
LCDWriteData(v/10+48);
LCDWriteData(v%10+48);
LCDWriteData(t%10+48);
}
}
//==========================================
void main (void)
{
unsigned char gt=0;

//gt la bie^n' cho gia tri 8bit ADC

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LCD_init();
LCDWriteCmd(0x80);
LCD_putstr("NHIET DO DAT:35C");
role = 0;
while(1)
{

ALE = 1;
START = 1;
delay_ms(1);

//

Bat dau chuyen doi gia tri tu ADC

// Tao tre de cap nhat du lieu tu ADC

START = 0;
ALE = 0;

//
// Nhan du lieu da duoc chuyen doi

gt=ADC_PORT;
if(gt>=35)role = 1;
else role = 0;
LCDWriteCmd(0xC0);
LCD_putstr("Nhiet do la:");
HienThi_ADC(gt);
LCDWriteData(223);
LCD_putstr("C");
//

delay_ms(150);

}
}

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MCH O V IU KHIN NHIT


TI LIU THAM KHO
[1]. Ngyn Tng Cng, H vi iu khin 8051
[2]. Ng Din Tp, Vi iu khin vi lp trnh C
[3]. Gio trnh Linh Kin in T v ng Dng, NXB Gio Dc

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TI LIU THAM KHO

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