Complete Major Document

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR
1. INTRODUCTION AND OVERVIEW OF ACTUATOR

AND BLDC MOTOR
1.1 OVERVIEW ACTUATOR
Electro Mechanical Actuators are used for the purpose of controlling aerospace
vehicles by deflecting control surfaces and/or thrust direction. These actuators can be
linear as well as rotary, i.e. output shaft of the actuator can move either in linear fashion
or in rotary fashion. The design and selection is done based on technical required space
and availability
1.1.1Fig: actuator and its parts

Particularly for aerospace applications, the Electro Mechanical Actuators should
be compact in size, light is weight and should be able to function reliably in the harsh
environmental conditions include severe vibrations, shock, bump, high altitude etc.
performance of the actuator should not deteriorate under these environment conditions
The actuator is driven by as brush less dc motor. Rotary motion of the motor is
transferred to the ball screw shaft through a reduction spur gear train. Rotary motion is
converted to linear motion is converted to linear motion is converted to linear motion by
the ball screw transmission mechanism. Nut or the ball screw moves in the linear and
controlled fashion to provide output motion. Control is done for the motor of brush less
dc motor. Motor of the output shaft is sensed by a position transducer. The position
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ECE DEPARTMENT (BITSW)
transducer is fitted to the output shaft. The position transducer LVDT (linear variable
differential transformer) output of the actuator.
In the present case, design of linear electro mechanical actuator has been carried
out as per technical and environmental specification. During the design, all parameter
space limitation, weight etc. were kept in mind. The report presents detailed design
calculations of Gears, Bearings, fasteners, ball screw, drawings, and solid models of Eye
End, Mid Plate, Body, End caps.
1.1.2Fig: Actuators used in solid structures and in robotic

Actuators are widely used in changing the direction and motion of missiles in
aerospace. Some of them are shown below.
1.1.3Fig: actuators used in missiles
1.2 OVERVIEW OF BLDC

In this project thesis, the application of the BLDC motors dealt is Electro
Mechanical Linear Actuators, which are used in the Missiles and Space Applications.
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Analog and digital controls of BLDC motor drives are also attempted to suit their
wide spread applications. There has been a continuous demand to reduce the control
hardware and thus cost of this drive. Digital control is advantageous since, digital control
structures eliminate drifts and, by using a programmable processor, the upgrades can be
easily accomplished by software. Hence Digital control is employed in the present
generation, for the motion control applications. Digital controllers can be Microprocessor
based, Micro Controller based or DSP based controllers.
Below are some of the articles published in relation to Digital control of BLDC
motors. This project thesis deals with the Digital control of the BLDC motors using DSP
controllers. Texas DSP controllers are one of the best controllers which suit the
requirements of this thesis application. Hence Tms DSP is being implemented here.
DSP solutions for BLDC motors, is a paper published by Texas Instruments.
This paper presents generic considerations on the control of Brushless Permanent Magnet
dc motors using the Tms320c24x. The complete solution proposal is presented .control
structures, power hardware topology, shaft position sensors, control hardware and
rEMArks on energy conversion efficiency can be found in this document.
Position Estimator and Simplified Current Control Strategy for Brushless-dc
motors, Using DSP Technology by Juan Dixon, Matias Rodrguez and Rodrigo Huerta,
Department of Electrical Engineering, Chile.
This paper describes a different way to sense the phase currents and to estimate
the rotor position of a Brushless dc motor. The current is sensed taking the absolute value
of two of the three phases, transforming this information in a dc current IMAX, which is
finally compared with a reference value from the accelerator pedal. With this method of
control, all the transistors of the inverter are commutated with the same PWM signal.
Based on the last property of the current controller developed, the paper proposes a
method to estimate the instantaneous position of the rotor
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1.2.1 Fig: cross sections BLDC motors

Avr443-sensor based control of three phase BLDC motor an application note
by Atmel Corporation. This article describes the control of BLDC motors using Micro
controllers. Sensored commutation is employed here with Hall sensors. Hardware design
is explained here.
Out of the Micro controller and DSP based controllers, any one of them can be
employed depending upon the requirements of the application. The applications which
require more memory space, high processing capability, high speed response, better
utilization of all the peripherals go for DSP based controllers. Actuator application of
BLDC motor control is one of them. Hence DSP based control is employed in this thesis.
There are two types of DSP based BLDC motor control. They are Sensored and
Sensor less controls. Both are gaining popularity and research is going on in both the
areas. They are used depending upon the applications. Sensor less commutation is
gaining importance in the present day and is best suitable for Fans, Pumps applications.
(Where the starting speed and time taken to start is not much important). Sensored
commutation of BLDC motors is employed in the actuator applications. Here the time
taken to start the motor and starting speed is much important.
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1.3 BLOCK DIAGRAM
1.3.1Fig Block Diagram of BLDC motor drive system

From all the above prospects, am carrying out this work with an objective to
control the speed of BLDC motors for EMA applications, as they are highly efficient and
best suited for Motion control applications. Control of the motors is done by using Texas
based DSP controllers. This project work carries out sensored commutations of BLDC
motors. Research is undergoing on both sensored and sensor less commutation
techniques. We have to choose the one that best suits the application. As far as EMA
application is considered, sensored commutation technique is employed in real time.
Mosfets are selected for switching purpose and power module is also designed.
In this work, a DSP based digital controller for BLDC motors is designed. This
controller will accept the rotor speed, position and will provide control signals to inverter.
An inverter is designed to control BLDC Motor.
This work deals with the design of the hardware for controller electronics, and
software implementation for a brushless dc motor drive system. The design and
realization of the drive system is divided into the following modules, first being the
design and software implementation of digital controller for TMS320LF2407, the second
is to design the Mosfet based inverter. And in the software implementation, DSP is
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programmed to achieve the closed loop position control of BLDC motor. Sensored
commutation of BLDC motors are implemented in this work.
As we know that the necessary condition for development of Mechanical moment

in any motor is, the angle between the fields produced by Armature and Field windings.
In case of dc motor the armature current is transferred from one winding to another for
each half electrical rotation with the help of Commutator and Brushes. But in case of
BLDC motor this is not possible as there are no Commutator and brushes; so we need to
switch the current in armature from one winding to another, depending on the rotor
position. This is achieved by incorporating an inverter and controlling the inverter
switches according to the rotor position of BLDC motor.
This rotor position information, which is necessary to switch the current in the
armature from one winding to another, can be obtained by two methods:
1. By using Sensors
By using Hall sensors the rotor position can be directly obtained in the
digital form. As sensors are used to obtain the rotor position, which is used for the
commutation, this method is called as Censored Commutation
1.3.2Fig: using magnets for sensing

From the wave shape of the back emf signals of the motor, we can obtain the position
of the rotor without the need of the sensors. This method of obtaining the position of the
rotor without any cost effective sensors is called as Sensor less Commutation.
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In present work a Mosfet based inverter is employed and a DSP Controller is used
to accept the signals from rotor by position sensors i.e. Hall Sensors technique, input
command signal and to produce the relevant firing signals for inverter switches i.e.
calculations of switching instants, sequence and duty cycle of controlling signals. These
signals are fed to inverter through driver circuit in order to enhance the power level of
signal and to isolate the low power circuit DSP from high power circuit h-bridge.
This work deals with the design of hardware, implementation and testing of
controller electronics for brushless dc motor drive system. This drive system is developed
for EMA applications. In EMA applications, to find the rotor position Hall sensors are
used and not sensor less techniques.
1.3.3 Fig: BLDC as motors and controller

This work is carried out at Rci. I was involved in programming of DSP controller,
hardware design of controller circuit and also in testing both board level and system
level. My contribution in this project was mainly in the software programming of
Peripherals of DSP, in C language in Code Composer Studio Software and in the
hardware design of the Controller and also simulation in matlab. I have also done the
testing of the circuits on the bread boards and on the pcbs. I was also involved in the final
system testing, viewing the results.
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1.3.4 Fig: print board of BLDC

Motion control is a new term presently used by engineers and it is an offspring of
electric motor drive technology which has undergone a dynamic evolution during the last
quarter century. The motion control technology is a synthesis of several diverse
disciplines, such as power semiconductor devices, converter circuits, electric motors,
control theory, signal electronics and microcomputers. Each of the component disciplines
has been undergoing an evolutionary process and is contributing to the overall
improvement of motion control technology. The introduction of microcomputers in the
early 1970s significantly influenced the motion control systems, by simplifying the
control hardware and adding intelligence as well as diagnostic capability to the system.
Intelligent motion control based on microcomputers is an area of intense study and
research today.
Motion control applications are diverse. In the home, applications include home
appliance drives for air conditioners, washers, dryers, blenders, vacuum cleaners etc. In
industry, motion control applications include general-purpose industrial drives,
numerically controlled machine tools, mill-drives, robots, computer peripherals and servo
drives. The application of drives is of tremendous interest today. The modern industrial
drive has shown phenomenal growth from performing simple tasks for adjustment and
space exploration. The computer peripheral industry has seen a rapid growth in the
application of motion control systems. In the US alone, electronic printers, disk drives
and tape drives used about 100 million motors in 1990.
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Motion control drive systems can be broadly divided into two groups:
1) Low performance motion control systems, such as fans, pumps, compressors and
blowers which normally do not need fast response and in some applications open-loop
operation is satisfactory;
2) High performance motion control systems such as robotics, servos, rolling mills and
machine tools which require fast dynamic response, parameter-insensitive control
characteristics and robustness.
This motion control application in this project is a High performance motion
control system. It is an Actuator application of BLDC motor which requires fast dynamic
response.
1.4 CONVERTER TECHNOLOGY

A power converter in a motion control system converts and controls power of the
electric motors. Various converter topologies have evolved for this purpose. The general
classification of converters on functions basis are: Ac-to-dc converter i.e rectifier, Dc-todc converter i.e chopper, Dc-to-ac converter i.e inverter, Ac-to-ac converter at same
frequency ac controller or different frequency cycloconverter.
In many practical power converter systems, more than one conversion process may be
combined.
Dc to Ac converter or Inverter topology is employed in this thesis. PWM signals
are fed as inputs to the Gates of the switches. Input is dc voltage and ac output is given to
the motor phases, in order to drive the motor.
Electric machines have been the workhorses of motion control systems. The three
basic electric machines dc, induction, and synchronous have served industrial needs for
nearly a century. In recent years, intense research effort has made other variations of
electric machines, such as brushless dc machines, permanent magnet machines, and
switched reluctance machines, viable alternatives in many applications.
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DC machines have traditionally dominated the domain of motion control systems.

Even now most industrial motion control drives use dc machines. Although the machine
is more expensive, the control principles and the converter equipment required are
somewhat simpler in dc drives. However, the main disadvantages are its commutators,
brushes and the frequent maintenance required for its operation. To overcome this, in this
thesis brushless dc motors are employed, which are highly efficient and have low cost.
BLDC motors have been proven to be best all-round type of motors for aerospace
applications because of their long life, high torque, high efficiency, and low heat
dissipation. The drive system is implemented using minimum hardware and major part of
control is realized through software.
1.5 CONTROL IMPLEMENTATIONS

Controllers play a significant role in the performance of power electronics
systems. The control electronics can be broadly grouped as follows:
Discrete control is hardware control
Microcomputer control software control.
In recent years, advancement in microelectronic chips has substantially reduced the

size and cost of the controllers and provided performance improvement.
Discrete Control
The discrete analog and digital hardware elements, such as op amps, logic
gates (nand/nor), counters, decoders etc. have been traditionally used in the control of
motion control systems. This type of control will be preferred for simple power electronic
equipment, such as portable house appliances. Dedicated hardware control provides
simplicity and fast response and can be used in high performance motion control systems.
But one of the drawbacks of this discrete control is that it can execute at a time only. So
in order to overcome this we added microcomputer control to continuously execute the
process without delay.
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2. LITERATURE SURVEY
Large, medium, small as well as micro BLDC motors are extensively sought for
applications in all sorts of motion control apparatus and systems. The marvelous increase
in the popularity of the BLDC motor drives among engineers bears testimony to its
industrial usefulness in terms of superior performance and relative size. High efficiency
due to reduced losses, low maintenance and low rotor inertia of the BLDC motor has
increased the dEMAnd of BLDC motors in high power servo and robotic applications.
Below are some of the articles published on the importance of BLDC motors and
their wide spread applications in various fields. Advances in Brushless dc Motor
Technology, Control, and Manufacture by
George Ellis kollmorgen
corporation
Radford , Virginia , USA , is a paper which deals with the BLDC motors ,
fundamentals and the differences between the BLDC and Brushed dc motors .
This paper was published at pcim-Europe, 1996. It focuses on the present importance
and applications of the BLDC motors.
AN885 --
Brushless
dc (BLDC)
Motor
Fundamentals
by -- Padma raja
Yedamale Microchip Technology Inc. Is a paper focuses on the BLDC motors ,

their
constructional
features ,
applications
, characteristics
and
Sensored
commutation . This is a published application note on BLDC motors by Microchip

technology.
Magnet Brushless dc Permanent Motors for Consumer Products s. benzoate,
z.q. zhu and d. home, City of Sheffield University. This paper describes the design and
performance of single-phase and three-phase
permanent
magnet
brushless dc
motors , employing bonded Node magnets , for retrofitting to a state - of - the - art
vacuum
cleaner . The performance of the
BLDC motors, in terms of their
torque/speed and efficiency/speed characteristics , and Emc and acoustic noise

emissions, is compared with that of the original universal motor.
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BLDC motors have been proven to be best all-around type of motors for aerospace
applications because of their long life, high torque, high efficiency, and low heat
dissipation.
This paper compares various types of motors and stresses that BLDC motors are
the suitable motors in the aerospace applications. Selection of the optimum electric motor
for space flight operations results in a safe, reliable, effective, efficient and economical
electric motor power source for space flight. Brushless direct current motors provide the
lightest weight alternative for most applications.
Application Report, spraa76january 2005, DSP control of electro-hydraulic
servo actuators, deals with some of the issues involved in controlling linear hydraulic
Actuators and the suitability of the DSPs for such systems.
3. BLDC MOTORS AND COMMUTATION TECHNIQUES
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In this chapter, fundamentals of BLDC motors, their constructional features, their

characteristics are explained. The sensored commutation techniques of BLDC motor are
explained in detail. Control methods of BLDC motor are also explained. Finally, BLDC
motor application in Actuators is explained.
3.1 BRUSHLESS DC MOTOR

Brushless dc motor is one kind of permanent magnet synchronous motor, having
permanent magnets on the rotor and trapezoidal shape back emf. The BLDC motor is
conventionally defined as a permanent magnet synchronous motor with a trapezoidal
back emf waveform shape.
Fig 3.1.1: BLDC waveforms

The BLDC motor employs a dc power supply switched to the stator phase
windings of the motor by power devices, the switching sequence being determined from
the rotor position. The phase current of BLDC motor, in typically rectangular shape, is
synchronized with the back emf to produce constant torque at a constant speed.
The mechanical commutator of the brush dc motor is replaced by electronic
switches, which supply current to the motor windings as a function of the rotor position.
This kind of ac motor is called brushless dc motor, since its performance is similar to the
traditional dc motor with commutators.
In brushed dc. Motor, while the rotor passes by the alternate N and S poles,
direction of current in the armature conductors is made reversed to make the torque
unidirectional. This is done with the help of commutators and brushes. This type of
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commutation suffers from flash over at high-speed &high current, resulting power losses
& serious damages. To overcome this problem the concept of Brushless dc motor is
developed.
3.2 CONSTRUCTIONAL FEATURES

The construction of modern Brushless dc motors is very similar to the ac motor,
known as the permanent magnet synchronous motor. The stator windings are similar to
those in a polyphase ac motor, and the rotor is composed of one or more permanent
magnets. Brushless dc motors are different from ac synchronous motors in that the former
incorporates some means to detect the rotor position (or magnetic poles) to produce
signals to control the electronic switches. The most common position/pole sensor is the
Hall element, but some motors use optical sensors. It is important to know the rotor
position in order to understand which winding will be energized following the energizing
sequence. Rotor position is sensed using Hall Effect sensors embedded into the stator.
Whenever the rotor magnetic poles pass near the Hall sensors, they give a high or low
signal, indicating the N or S pole is passing near the sensors.
Based on the combination of these three Hall sensor signals, the exact sequence of
commutation can be determined.illustrates the structure of a typical three-phase Brushless
dc motor.
Fig 3.2.1: Dissembled view of BLDC motor
3.3 STATOR
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The stator of a BLDC motor consists of stacked steel laminations with windings
placed in the slots that are axially cut along the inner periphery. Traditionally, the stator
resembles that of an induction motor; however, the windings are distributed in a different
manner. Most BLDC motors have three stator windings connected in star fashion. Each
of these windings are constructed with numerous coils interconnected to form a winding.
Fig 3.3.1: Stator of a BLDC motor.
Fig 3.3.2: Trapezoidal Back emf- pm BLDC Motors

There are two types of stator windings variants: trapezoidal and sinusoidal
motors. This differentiation is made on the basis of the interconnection of coils in the
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stator windings to give the different types of back Electromotive Force. As their names
indicate, the trapezoidal motor gives a back emf in trapezoidal fashion and the sinusoidal
motors back emf is sinusoidal,
Fig 3.3.3: sinusoidal back emf.-pm Synchronous Motors

In addition to the back emf, the phase current also has trapezoidal and sinusoidal
variations in the respective types of motor. This makes the torque output by a sinusoidal
motor smoother than that of a trapezoidal motor. However, this comes with an extra cost,
as the sinusoidal motors take extra winding interconnections because of the coils
distribution on the stator periphery, thereby increasing the copper intake by the stator
windings.
3.4 ROTOR
The rotor is made of permanent magnet and can vary from two to eight pole pairs
with alternate North and South poles. Based on the required magnetic field density in the
rotor, the proper magnetic material is chosen to make the rotor. Ferrite magnets are
traditionally used to make permanent magnets. As the technology advances, rare earth
alloy magnets are gaining popularity. The ferrite magnets are less expensive but they
have the disadvantage of low flux density for a given volume. In contrast, the alloy
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material has high magnetic density per volume and enables the rotor to compress further
for the same torque.
Also, these alloy magnets improve the size-to-weight ratio and give higher torque
for the same size motor using ferrite magnets. Neodymium i.e Nd, Samarium Cobalt i.e
SmCo and the alloy of Neodymium, Ferrite and Boron i.e NdFeB are some examples of
rare earth alloy magnets. Circular core with magnets on the periphery Circular core with
rectangular magnets embedded in the rotor.
Fig 3.4.1: Rotor magnet cross sections

The following are ratings of the BLDC Motor used in this work:
Power rating
: 756W
Torque
: 1N.m
Armature inductance : 0.8mH

No. of Poles
:8
Type of connection
:Y
Rated voltage
: 28V
Rated current
: 10A
Rated Speed
: 6000 rpm
Torque constant
: 0.044V/(rad/sec)
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Stator core length
: 55mm
Stator diameter
: 48mm
The comparison of the BLDC motors with Brushed dc and Induction motor
Table3.4.1: Comparison of BLDC motors with Brushed dc motors

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Table 3.4.2: Comparison of BLDC motors with ac induction motor
3.5 TRANSFER FUNCTION OF BLDC MACHINE

The simple dynamic model of the brushless dc motor with the effect of inductance
included is as follows.
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Ra
La
E
g
Fig 3.5.1: Equivalent circuit for Brushless dc motor.

Where
V = Applied voltage (volts)
ia = Armature current (amps)
Jm = Total inertia of motor armature plus load
T = Load torque (N-m)
Ke = Motor voltage constant (v/rad/sec)
m= Motor velocity (rad/sec)
Kt = Motor torque constant (N-m/A),
La= Motor winding inductance (Henries)
Ra = Armature resistance (ohms)
The electrical equation of the motor is
V = iaRa + La
dia
+ Eg
dt
(eq 1.1)
The back emf is equal to Kem

In BLDC machine the magnetic field is constant due to permanent magnets thus
electromagnetic torque is proportional to current
i.e. T= kt I
(eq 1.2)
The mechanical equation of the machine is

T= Jm (dm /dt) + Bm + Tl
(eq 1.3)
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To obtain the transfer function between speed and applied voltage, the differential
equations are transformed into the frequency domain.
V= (Ls + R) I + ke m
(eq 1.4)
Substituting quation e.q. 1.2

T = ((V ke) kt)/ (Ls + R)
(eq 1.5)
As the load torque does not affect the transfer function it can be neglected. Thus the
mechanical differential equation transforms to
T=Jmsm + Bm
(eq 1.6)
Equating the two equations we get.

Vkt- kektm = (Ls + R)m [Jms+ B]
From this the transfer function between speed and voltage is
m(s)/V(s) = kt / [(Ls + R ) [ Jms + B ] + kekt]
m(s)/V(s) = kt / [(Ls + R ) [ Jms + B ] + kekt
3.6 TORQUE/ SPEED CHARACTERISTICS

Figure below shows an example of torque/speed characteristics. There are two
torque parameters used to define a BLDC motor, peak torque and rated torque.
During continuous operations, the motor can be loaded up to the rated torque. As
discussed earlier, in a BLDC motor, the torque rEMAins constant for a speed range up to
the rated speed. The motor can be run up to the maximum speed, which can be up to
150% of the rated speed, but the torque starts dropping. Applications that have frequent
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starts and stops and frequent reversals of rotation with load on the motor, dEMAnd more
torque than the rated torque. This requirement comes for a brief period, especially when
the motor starts from a standstill and during acceleration. During this period, extra torque
is required to overcome the inertia of the load and the rotor itself. The motor can deliver a
higher torque, maximum up to peak torque, as long as it follows the speed torque curve.
Fig 3.6.1: Torque/speed Characteristics.
3.7 COMMUTATION OF BLDC MOTOR

Unlike a brushed dc motor, the commutation of a BLDC motor is controlled
electronically. To rotate the BLDC motor, the stator windings should be energized in a
sequence. It is important to know the rotor position in order to understand which winding
will be energized following the energizing sequence.
In the BLDC motor, the commutation can be of two types, Sensored and Sensor
less. In the sensored commutation, sensors are used to determine the rotor position, while
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in the sensor less commutation the rotor position can be obtained from the back Emf
wave shape with out using any sensors to detect the position of the rotor.
Sensored Commutation
As the name specifies, in sensored commutation, the commutation of BLDC
motor is done with the help of sensors. These sensors can be of Hall type, Encoders,
Resolvers etc. In this project work, the sensored commutation is implemented using the
hall sensors mounted on the motor.
Sensored Commutation using Hall sensors
As the name specifies, in the sensored commutation of BLDC motors, the rotor
position is sensed using Hall Effect sensors embedded into the stator. Most BLDC
motors have three Hall sensors embedded into the stator on the non-driving end of the
motor. Whenever the rotor magnetic poles pass near the Hall sensors, they give a high or
low signal, indicating the N or S pole is passing near the sensors. Based on the
combination of these three Hall sensor signals, the exact sequence of commutation can be
determined. Hall sensors work on the principle of the Hall Effect theory, which is
explained here.
Hall Effect Theory
If an electric current carrying conductor is kept in a magnetic field, the magnetic
field exerts a transverse force on the moving charge carriers which tends to push them to
one side of the conductor. This is most evident in a thin flat conductor. A buildup of
charge at the sides of the conductors will balance this magnetic influence, producing a
measurable voltage between the two sides of the conductor. The presence of this
measurable transverse voltage is called the Hall Effect after E. H. Hall who discovered it.
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Fig 3.7.1: A Typical BLDC motor drive with sensored commutation
3.8 THEORY OF OPERATION

Each commutation sequence has one of the windings energized to positive power
i.e current enters into the winding, the second winding is negative i.e current exits the
winding and the third is in a non-energized condition. Torque is produced because of the
interaction between the magnetic field generated by the stator coils and the permanent
magnets. Ideally, the peak torque occurs when these two fields are at 90 to each other
and falls off as the fields move together. In order to keep the motor running, the magnetic
field produced by the windings should shift position, as the rotor moves to catch up with
the stator field. What is known as Six-Step Commutation defines the sequence of
energizing the windings. Commutation Sequence
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Fig3.8.1: Hall Sensor signal, Back emf, torque and output waveforms
Hall sensor signals with respect to back emf and the phase current. The switching
sequence that should be followed with respect to the Hall sensors
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Fig 3.8.2: Winding energizing sequence with respect to hall sensor

Every 60 electrical degrees of rotation, one of the Hall sensors changes the state.
Given this, it takes six steps to complete an electrical cycle. In synchronous, with every
60 electrical degrees, the phase current switching should be updated. However, one
electrical cycle may not correspond to a complete mechanical revolution of the rotor. The
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number of electrical cycles to be repeated to complete a mechanical rotation is

determined by the rotor pole pairs. For each rotor pole pairs, one electrical cycle is
completed. So, the number of electrical cycles/rotations equals the rotor pole pairs. The
block diagram of the controller used to control a BLDC motor. Q0 to Q5 are the power
switches controlled by the DSP controller. Based on the motor voltage and current
ratings, these switches can be mosfets, or igbts, or simple bipolar transistors.
Fig 3.8.3: Controller block diagram
3.9 BRUSHLESS COMMUTATION

From the above sections, the commutation sequence can be understood and can be
summarized as follows. The Sensored BLDC motor employs three hall sensors present in
the stator of BLDC motor at an angle of 60 Electrical, for sensing the rotor position. The
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three hall sensors signals will be coming at an angle of 60 electrical. Each hall sensor
will give high signal for 180 deg electrical. The three hall sensors correspond to three
phases of the motor. Let H1, H2, H3 corresponds to phase A, phase B, phase C of Motor
respectively.
In square wave operation dc current is fed from the supply to the motor with two
lines for an interval of 60. During this interval the third line carries no current and is
idle. At the end of each period the current commutates from one of the conducting lines
into the idle line. There are normally two transistors conducting. The three phase bridge
circuit connected to A,B,C connected motor is shown in figure below.
Fig3.9.1: Three Phase Bridge mosfet inverter connected to BLDC motor

Basically the inverter of BLDC motor can operate in the following two modes
1) 2/3 angle switch on mode
2) Voltage and current control PWM mode.
2 /3 angle switch on mode: The six switches S1- S6 of the inverter shown in Fig above
operate in such a way so as to place the input dc current symmetrically for 2 /3 angle at
the centre of each phase voltage wave. It can be seen that at any instant, two switches are
on, one in the upper group and another in the lower group. As seen from figure above
each switch conducts for 120 degrees and conduction pattern changes every 60 degrees.
The rotor position sensor dictates the switching or commutation of the devices at the
precise instants of the wave.
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Voltage and current control PWM mode- In the above method the inverter
switches were controlled to give commutator function only. In addition to the
commutator function it is possible to control the switches in the PWM chopping mode for
controlling voltage and current continuously at the machine terminal.
There are essentially two chopping mode feedback mode or hard chopping and
freewheeling mode or soft chopping. In both these modes the devices are turned on and
off on a duty cycle basis to control the machine average current and average voltage. In
the feedback mode both the switches are chopped together i.e. during the off time the
voltage applied to the load is zero. In the freewheeling mode chopping control is done
with only one switch i.e. during the off time the voltage applied to the load is VD.
In this project soft chopping technique is used i.e. all the upper switch S1, S3 and
S5 are kept on sequentially in the middle of the respective positive voltage half cycles.
The bottom switches S2, S4, and S6 are chopped respectively. This configuration
minimizes the current ripple for a given chopping frequency or alternatively minimizes
the chopping frequency required to limit the current ripple to a given level.
Figure3.9.2: Hall Sensor Signals and Transistor

The figure above shows the hall sensor signals and the transistors switching which helps
in deriving the commutation logic for driving the BLDC motor.
29
Hall sensor will be on if a north pole comes under it. And it will be off if a south
pole comes under it. The BLDC motor rotates by the interaction between pm Field of
rotor and stator field.
At to instant: H1 is on, H2 and H3 off

It implies that North Pole is under phase A and south pole under phase B and
Phase C. To create force the phase A should conduct current in forward direction and
phase B or Phase C should conduct in the other direction. It implies Phase AC should
conduct to rotate motor in one direction forward. Phase CA should conduct to rotate
motor in other direction.
At to+60 instant: H1 is on, H2 is on, and H3 is off

It implies that North Pole is under phase A and phase B, south-pole under Phase
C. To create force the phase B should conduct current in forward direction and Phase C
should conduct in the other direction. It implies Phase BC should conduct to rotate motor
in one direction forward. Phase CB should conduct to rotate motor in other direction.
At to+120 instant: H1 is off, H2 is on, and H3 is off

It implies that South Pole is under phase A and phase C, North Pole under PhaseB. To create force the phase B should conduct current in forward direction and Phase A
should conduct in the other direction. It implies Phase BA should conduct to rotate motor
in one direction forward. Phase AB should conduct to rotate motor in other direction.
At to+180 instant: H1 is off, H2 is on, and H3 is on

It implies that south-pole is under phase A, North Pole under Phase-B and phase
C. To create force the phase C should conduct current in forward direction and Phase A
should conduct in the other direction. It implies Phase CA should conduct to rotate motor
in one direction forward. Phase AC should conduct to rotate motor in other direction.
30
At to+240 instant: H1 is off, H2 is off, and H3 is on

It implies that south-pole is under phase-A and Phase-B, North-Pole under PhaseC. To create force the phase C should conduct current in forward direction and Phase B
should conduct in the other direction. It implies Phase CB should conduct to rotate motor
in one direction forward. Phase BC should conduct to rotate motor in other direction.
At to+300 instant: H1 is on, H2 is off, and H3 is on

It implies that North-Pole is under phase-A and Phase-C, South Pole under PhaseB. To create force the phase A should conduct current in forward direction and Phase B
should conduct in the other direction. It implies Phase AB should conduct to rotate motor
in one direction forward. Phase BA should conduct to rotate motor in other direction.
According to the transitions of the hall signals, the corresponding phases are
energized by driving the gate signals to the power devices. The table can also be
developed showing which two transistors to be on at that corresponding hall signal.
3.10 CONTROLLING A BLDC MOTOR

Two parameters of a normal dc motor are very easy to control, the speed and the
direction. To control the speed, vary the input voltage. To change the direction, simply
reverse the polarity.
The speed is often controlled with pulse width modulation, which is the same for
normal and brushless motors. To be able to run a brushless motor, information of angular
position for example hall sensors methods of the rotor is necessary. Current has to be
directed through two of the three phases. The position of the rotor decides which phases
should be active.
As we have previously discussed, the Hall sensors may be at 60 or 120 phase
shift to each other. When deriving a controller for a particular motor, the sequence
defined by the motor manufacturer should be followed. If the PWM signals are switched
on or off according to the sequence, the motor will run at the rated speed. This is
31
assuming that the dc bus voltage is equal to the motor rated voltage, plus any losses
across the switches.
To vary the speed, these signals should be Pulse Width Modulated at a much
higher frequency than the motor frequency. As a rule of thumb, the PWM frequency
should be at least 10 times that of the maximum frequency of the motor. When the duty
cycle of PWM is varied within the sequences, the average voltage supplied to the stator
reduces, thus reducing the speed. Another advantage of having PWM is that, if the dc bus
voltage is much higher than the motor rated voltage, the motor can be controlled by
limiting the percentage of PWM duty cycle corresponding to that of the motor rated
voltage. This adds flexibility to the controller to hook up motors with different rated
voltages and match the average voltage output by the controller, to the motor rated
voltage, by controlling the PWM duty cycle. There are different approaches of controls.
If the PWM signals are limited in the c DSP controller, the upper switches can be turned
on for the entire time during the corresponding sequence and the corresponding lower
switch can be controlled by the required duty cycle on PWM.
The potentiometer is connected to the analog-to-digital converter channel for
setting a speed reference. Based on this input voltage, the PWM duty cycle should be
calculated.
BLDC motors are a type of synchronous motor. This means the magnetic field
generated by the stator and the magnetic field generated by the rotor rotates at the same
frequency.
With variable frequency control the synchronous motor may operate in two modes:
True synchronous mode
Self controlled mode.
1) True synchronous mode: In this mode the supply frequency is controlled from an
independent oscillator, as in the case of induction machine. For a given frequency setting,
the machine runs at a fixed speed, independent of the variation in load supply voltage and
32
field current. Hence the speed can be controlled precisely in open loop by precisely
controlling the frequency.
2) Self control mode: A permanent magnet motor is generally operated in this mode.
A self-controlled variable speed drive have number of advantages which make then
superior to induction and dc motor variable speed drive. The advantage is that the
operation of a BLDC motor in the self-controlled mode eliminates hunting and stability
problems, and permits the realization of versatile control characteristics of a dc motor
without the limitation associated with commutator and brushes, such as limits on the
maximum speed, voltage and power, frequent maintenance, inability to operate in
contaminated and explosive environment and so on.
3.11 BLDC MOTOR APPLICATION IN ACTUATORS

Actuators are used in aerospace, military and industrial applications for control
purposes. As these are meant for aerospace and military applications they must be linear,
reliable and accurate even when varying temperature and space environment. They must
be properly tested at ground level and all control parameters should be determined which
will determine the dynamics of the system. There are two types of actuators,
electrohydraulic actuators and electromechanical actuators generally used in aerospace
applications.
Electro hydraulic actuators contain servo valves and a cylinder with a piston. This
servo valve is a device, which allows the flow of hydraulic oil, which was pumped with
some pressure at some rate according to the given command to the valve. This oil in turn
forces the piston to move in and out hence responding to the position command. The flow
of the oil is proportional to the command given to the valve.
Electromechanical actuator contains an electric motor; generally the motor will be
a brushed dc motor, brushless dc motor, and stepper motor or switch reluctance motor.
The motor is controlled using analog controller or a digital controller. The rotary motion
of the motor is converted to linear motion through ball screw arrangement. According to
the given command to the motor control electronics the ball screw will be moved.
33
The Electro hydraulic actuators are advantageous in the sense that they are
having large Torque to weight ratio. The biggest disadvantages of the hydraulic actuators
are the number of subsystems they require. Electro hydraulic actuators requires pump
motor for pumping the oil with required pressure, reservoir for supplying oil, low
pressure and high pressure filters and pipe lines for connecting these subsystems.
Moreover the hydraulic systems are very sensitive and should be maintained periodically.
The electromechanical actuators are free from all these disadvantages. They dont require
much subsystem and are not so sensitive. But the force they produce is less, anyhow the
force can be increased by increasing the capacity of the motor which makes the design
complicated. Thus the BLDC motors are the best suited motors for servo applications and
areprominently employed in Actuator applications because of their advantages over
brushed dc motors or Induction motors.
The advantages of the BLDC motors can be tabulated as follows.
Table 3.11.1: Advantages of BLDC motors

34
4. DSP CONTROLLERS AND PERIPHERALS

This chapter briefly explains about architecture of the DSP, peripherals of DSP
and the applications of the DSP controllers. Traditionally motor control was designed
with analog components as they are easy to design and can be implemented with
relatively inexpensive components. Improvements over analog designs. DSP technology
allows both a high level of performance as well as system cost reduction. Texas
instruments launches a new DSP, the TMS320LF2407a, specifically designed for the
digital motor control segment. This device combines a 16-bit fixed-point DSP core with
microcontroller peripherals in a single chip solution and is part of a new generation of
DSPs called the DSP controllers.
4.1 ANALOG CONTROLLERS AND DIGITAL CONTROLLERS

There is a wide spread use of the digital controllers because of the limitations of
the analog components. The first drawback inherent to any analog component is aging
and temperature variations, which cause the system to need regular adjustment. Further
more the reliability of the system decreases as the component count increases and finally,
any system upgrade would be difficult as the design is hardwired. The second drawback
resides in the limitations in the effectiveness of analog control structures. Digital control
structures eliminate drifts and by using a programmable processor, the upgrades can be
easily accomplished by software.
The following tables give the comparison between the analog and digital
Controllers
Analog Controller
Component drift / Unstable.
Hard wired / Not flexible.
Limited to classical control theory
Large parts for complex systems.
Digital Controller
Band width limitations. (Sampling loop).
Numerical problems (Quantization/rounding).
A/D or D/A boundary. (resolution, speed, cost)
CPU performance limitations
Table 4.1.2: Disadvantages of analog and digital controllers

Analog Controller
Digital Controller
35
High Band width
In-sensitive to environment(Temperature, drift)
High Resolution
High Reliability.
Easy to Understand / use
Software programmable/ Flexible Solution.
Relatively Low cost.
Precise / Predictable Behavior.

Advanced control possible
(Non-linear /multi variable).
Can perform multiple loops and other functions.
Table 4.1.1: Advantages of both analog and digital controllers

Thus, each of the analog and digital controllers, have both advantages and
disadvantages. We have to choose the controller that best suits for our application. From
the above comparison, we can see that though digital controllers have some drawbacks,
they comparatively render better performance than the Analog controllers and are best
suited for advanced control applications.
The Digital controllers can be Micro Processor based, Micro Controller based or
DSP based controllers. Before considering the differences between micro controllers and
DSPs, in the following section, we will consider the importance of DSPs.
Why Use DSPs?
The innovation of DSP control into power electronic designs is an excellent example of
the advantages provided by major technological advances.
1. Reduction in the size and weight of the unit. As with calculators in the early
1970s, technological advancement allows equipment to become smaller and
lighter. Smaller and lighter can translate into several cost reductions including
labor, transportation, and materials.
2. Increased performance. The fast math-intensive functions and high execution
speed allow for faster control response and correction to achieve desired
parameters and therefore a better performing machine.
36
3. Automation of in-house testing. The DSP software allows for automation of the
testing process, thus reducing the labor content of the technical staff.
4. Increased design flexibility. The software within the DSP can be easily modified
to optimize the application once in use in the field or if the application changes
once the unit is installed.
5. An increase in application flexibility.
The application that the equipment
addresses can be easily modified via software changes as opposed to design

changes.
6. A reduction in energy consumption. Active harmonic cancellation and better
energy management achieved by the real-time control of the DSP and the software
that controls it reduces energy consumption. Etc...
Because of the several advantages of the DSP controllers, they find many
advanced applications.
The following figure explains that the DSP controller is a mcu with high processing DSP
core, which has both control code and math code efficiency.
Fig 4.1.1: Importance of DSPs.

37
4.2 DSP CONTROLLER

The innovation of DSP control into power electronic designs is an excellent
example of the advantages provided by major technological advances. By replacing
classic control with DSP control, the primary advantages are achieved by replacing
hardware with flexible software. The advantages are more dramatic because they just
extend to reducing cost and increasing performance over classic designs.
The feature of the DSP core and the micro controller are combined on to a single
chip and is referred to as a DSP Controller.
DSP Applications
There are several areas in which DSP controllers are employed. Some of them are:
INDUSTRIAL:
Automation, Building control, HVAC, Advanced sensing and
measurement, power supplies, Medical equipment and more.
AUTOMOTIVE:
Electronic Power steering, integrated power starter / alternator, Brushless
fuel pumps, active suspension, radar for collision etc.
APPLIANCE:
Motor control: for refrigerators, washing machines, induction ovens,
vacuum cleaners etc.
CONSUMER:
Printers, copiers, tape drivers, toys, power supply for digital TVs, power
line modem etc.
COMPUTING:
Fan control, Hard disk and tape drives.
Some applications in the field of the motor drives are given below.
Active Power Factor Correction and Harmonic Cancellation
Power Supplies
Uninterruptible Power Supplies & Systems
38
Inverters i.e. AC/DC, DC/DC, DC/AC, AC/AC Frequency Changer
4.3 SELECTION OF DSP

For motor control application the selection of DSP is the main criterion, a high speed
DSP from 40 MIPS onward is required. PWM and dead band logic for six channels
should be available in DSP. As hall code sensing is highest priority task, capture unit
should be available in DSP. On chip 10/12bit ADCs is required for current / tacho /
position and command sensing. And an on chip flash for high speed programming and
emulation is required.
As the first DSP optimized for digital motor control, the TMS320LF2407 supports
the power switching device commutation, command generation, control algorithm
processing, data communications and system monitoring functions. The tms320 family
consists of fixed-point, floating-point, multiprocessor digital signal processors and fixedpoint DSP controllers. Tms320 DSPs have architecture designed specifically for realtime signal processing. The characteristics that make the tms320 family the right choice
for a wide range of processing applications:
1
Very flexible instruction set
Inherent operational flexibility
High-speed performance
Innovative parallel architecture
Cost effectiveness
6
Devices within a generation of a tms320 platform have the same CPU structure but
different on-chip memory and peripheral configurations. By integrating memory and
peripherals onto a single chip, tms320 devices reduce system costs and save circuit board
space. The several generation products of the tms devices are shown below starting from
the control optimized c2000 devices to the high performance c6000 devices.
39
Fig 4.3.1: DSP product generation
Fig 4.3.2: TMS nomenclature.
40
4.4 ARCHITECTURAL OVERVIEW

TMS320LF2407 uses modified Harvard architecture. The advanced features
include the ability to initialize data memory from program memory. This minimizes the
system cost by eliminating the need for a data rom and maximizes data memory
utilization. The most important reason for basing the 'c2407 on the harvard architecture is
speed. Separate data and program space allow simultaneous fetching of program
instructions and data. In a mathematically Intensive application, this effectively doubles
algorithm throughput compared to standard von Neumann-type processors.
The 2407 device are composed of three main functional units a 2407 DSP core,
internal memory and peripherals. In addition to these three functional units there are
several level system level features of 2407 that are distributed. These system features
include the memory map, device reset, interrupts, digital input/output clock generation,
and low power operation. Most operation can be performed quickly from the available
registers. These registers are called special function registers (sfrs) are used to
communicate with the on chip peripherals. Below fig shows the architecture of the
processor.
Fig 4.4.1: functional block diagram of the 2407DSP controller
41
On Board Peripherals used for Motor control.

The Lf2407 device contains peripherals optimized for motor/motion control application
for many systems this device provide a low cost high performance solution. The
peripheral of the 2407 can be classified as
1) Event manager peripheral
2) Non Event manager peripheral
Event manager
The event manager consists of the following blocks.
a. General purpose timers
b. Compare units
c. Capture units
d. Quadrature encoder pulse circuit.
a. General purpose timer:
There are two timers in each event manager. The general purpose timer includes
1. One 16 bit up and up/down counter Txcnt
2. One 16 bit timer compare register Txcmpr
3. One 16 bit timer period register Txpr
4. One 16 bit control register Txcon
5. One gp timer compare output pins TxPWM/Txcmp
The general purpose timer provides a time base for the operation of the compare units,
and associated PWM circuits to generate PWM outputs they also provide time base for
the capture unit. General Purpose timer can also be used to generate a sampling period in
the control systems.
b. Compare units
There are three compare units. Each compare units has two associated PWM
outputs. They have the capability beyond the GP timer compare, and features
42
Programmable hardware dead band. The time base for the compare units is provided by
the GP timer 1. The registers associated with Compare units are
1. One 16 bit compare control register Comcona
2. one 16 bit action control register Actra
3. one 16 bit dead band timer control register Dbtcona
4. three 16 bit compare register Cmprx
c. Capture unit
There are three capture units, and each is associated with a capture input pin. Each
capture unit can choose gp timer 1 or 2 as its time base. The value of gp timer 1 or 2 is
captured and stored in the corresponding two level deep FIFO stack when a specified
transition is detected on a capture input pin. In the project the capture unit is used to
capture hall sensors signal of the BLDC motor. The counter value is stored in two level
deep FIFO stack. The speed of the motor can be calculated with the help of the value
stored in the FIFO stack i.e. the distance between the two hall sensors signal divided by
time taken for the two capture units to occur. The registers associated with capture unit
are
1. one 16 bit capture control register Capcom
2. one 16 bit capture fifo status register Capfifo
3. Three two level deep fifo stack Capxfifo
d. Quadrature encoder pulse (QEP)

The qep circuit, when enabled, decodes and counts the quadrature encoded input pulses
on cap1/qep0 and cap2/qep1. The qep circuit can be used to interface with an optical
encoder to get position and speed information from the rotating machine. When the qep
circuit is enabled, the capture function on cap1 and cap2 pins is disabled. The time base
for qep is provided by gp timer 2.
43
Nonevent manager peripherals

a. Watchdog Timer
The watchdog timer provides a safeguard against CPU crashes by automatically
initiating a reset if it is not serviced by the CPU at regular intervals. In this project, this
helps protect the motor and drive electronics when control is lost due to a CPU lockup.
Any CPU reset will revert the PWM outputs to a high impedance state, which will turn
off the power converters.
b. Digital Input Output
There are six digital input output port. These ports can be configured either as input or
output with the help of mux control register. In this project three pins of port and are
configured as output port which drives the lower mosfets of inverter. The registers
associated with input output port are
1. Three input output mux control register
2. Three input output data and direction register.
The following shows the pin number (function) of the port A used in the project.
a. Pin 12 (PWM1) to bottom switch of leg A.
b. Pin 13 (PWM2) to bottom switch of leg B.
c. Pin - 14 (PWM3) to bottom switch of leg C.
d. Pin 27 (IOPA0) to top switch of leg A.
e. Pin 28 (IOPA1) to top switch of leg B.
f. Pin 4 (IOPA7) to top switch of leg C.
g. Pin - 21 (CAP1) from hall sensor 1.
h. Pin - 22 (CAP2) from hall sensor 2.
i. Pin 23 (CAP3) from hall sensor 3.
j. Pin 33 (Ground)
c. Interrupts
The lf2407 core of the lf2407 processor supports six mask able and two non-mask able
interrupts. These interrupts are then fanned out and shared among numerous on chip
peripherals and external pins. Interrupts can be generated by internal or external sources
44
or by software interrupts instructions. A reset function, a non-mask able interrupt, and a

power-drive protection interrupt are also supported by lf2407. Three core interrupts have
been dedicated to event manager peripherals with the rEMAining three sharing with nonevent manager Peripherals. In this project int4 interrupt has been used which is connected
to the capture three capture pins. Thus this interrupts generates an interrupts when a
transition occurs in hall sensors signal.
The frequency at which the interrupt is serviced depends on the speed of the rotor
and the number of poles. The registers associated with the interrupts are
1. Interrupt mask register
2. Interrupt flag register.
4.5 PULSE WIDTH MODULATED OUTPUT

The switching frequency of the PWM signal is selected as 20 kHz. The PWM signal is
generated by the timer. The counter register of the timer is set first. This register counts
from 0 to ffff, generating a triangular wave. The compare register is loaded with the speed
error or the desired value at which the motor should run. When the value in counter
register is equal to the compare register, an interrupt occurs, and PWM signal is
generated whose width depends on error signal. This can be seen from the fig .the PWM
signal of varying duty cycle is shown in fig. Source code for PWM generation has been
included in the appendix.
Fig 4.5.1 pulse width modulation output

45
DSP core, interrupts, memory

The brief introduction of the DSP core, memory and the interrupt structures are
explained in the following sections. The CPU is also explained here, which has the highly
precise arithmetic capability with multipliers, barrel shifters etc.
Device reset and interrupts
The TMS320X240XA software-programmable interrupt structure supports flexible
on-chip and external interrupt configurations to meet real-time interrupt-driven
application requirements. The lf240xa recognizes three types of interrupt sources. Reset
hardware- or software-initiated is arbitrated by the CPU and takes immediate priority
over any other executing functions. All mask able interrupts are disabled until the reset
service routine enables them. The lf240xa devices have two sources of reset: an external
reset pin and a watchdog timer time-out (reset).
Hardware-generated interrupts are requested by external pins or by on-chip
peripherals. There are two types:
External interrupts are generated by one of four external pins corresponding to
the interrupts xint1, xint2, pdpinta, and pdpintb. These four can be masked both by
dedicated enable bits and by the CPU interrupt mask register (imr), which can mask each
mask able interrupt line at the DSP core.
Peripheral interrupts are initiated internally by these on-chip peripheral modules:
event manager a, event manager b, spi, sci, can, and ADC. They can be masked both by
enable bits for each event in each peripheral and by the cpu imr, which can mask each
mask able interrupt line at the DSP core.
Software-generated interrupts for the lf240xa devices include
The intr instruction. This instruction allows initialization of any lf240xa interrupt
with software. Its operand indicates the interrupt vector location to which the CPU
branches. This instruction globally disables mask able interrupts (sets the intm bit to 1).
46
The NMI instruction. This instruction forces a branch to interrupt vector location
24h. This instruction globally disables mask able interrupts. 240xa devices do not have
the NMI hardware signal; only software activation is provided.
The trap instruction. This instruction forces the CPU to branch to interrupt vector
location 22h. The trap instruction does not disable mask able interrupts intm is not set to
1; therefore, when the CPU branches to the interrupt service routine, that routine can be
interrupted by the mask able hardware interrupts.
An emulator trap. This interrupt can be generated with either an intr instruction
or a trap instruction. Six core interrupts int1int6 are expanded using a peripheral
interrupt expansion module identical to the f24x devices. The pie manages all the
peripheral interrupts from the 240xa peripherals and is grouped to share the six core level
interrupts.
Peripheral Interrupt Expansion Controller (PIE)
The 240xa CPU supports one non-mask able interrupt and six mask able
prioritized interrupt requests int1int6 at the core level. The 240xa devices have many
peripherals, and each peripheral is capable of generating one or more interrupts in
response to many events at the peripheral level.
Because the C240xA CPU does not have sufficient capacity to handle all
peripheral interrupt requests at the core level, a centralized interrupt controller (PIE) is
required to arbitrate the interrupt requests from various sources such as peripherals and
other external pins. The block diagram of Pie is shown below.
47
Fig 4.5.2: Block diagram of PIE Controller

48
4.6 INTERNAL MEMORY OF DSP

The DSP devices are configured with the following memory modules:
Dual-access random-access memory
Single-access random-access memory
Flash
ROM
Boot ROM
Fig 4.6.1: Connections of the DSP target board and emulator
49
The peripherals interface to the internal memory interface of the CPU through the
bus interface. All on-chip peripherals are accessed through the peripheral bus, pbus. At
lower frequencies, all peripheral accesses reads and writes are zero-wait-state, singlecycle accesses. All peripherals, excluding the watchdog timer counter, are clocked by the
CPU clock.
The integrated peripherals of the DSP are described in the following subsections:
1. Two event-manager modules (eva, evb)
2. Enhanced analog-to-digital converter (ADC) module
3. Serial communications interface (sci) module
4. Serial peripheral interface (spi) module
5. Pll-based clock module
6. Digital I/O and shared pin functions
7. External memory interfaces (for lf2407a only)
8. Watchdog (WD) timer module.
Event manager modules (eva, evb)
The event-manager modules include general-purpose (gp) timers, fullcompare/PWM units, capture units, and quadrature-encoder pulse (qep) circuits. Eva and
evb timers compare units, and capture units function identically. However, timer/unit
names differ for eva and evb.
The shows the module and signal names used. The shows the features and
functionality available for the event-manager modules and highlights Eva nomenclature.
The function of gp timers, compare units, capture units, using eva nomenclature
are explained in the next chapter on the software implementation using DSP controllers.
50
Table 4.6.1: module and signal names for eva and evb
Enhanced Analog to Digital Converter (ADC) Module
A simplified functional block diagram of the ADC module is shown in figure
above, the ADC module consists of a 10-bit ADC with a built-in sample-and-hold (s/h)
circuit.
Functions of the ADC module include:
10-bit ADC core with built-in s/h.
16-channel, muxed inputs
Auto sequencing capability provides up to 16 auto conversions in a single

session. Each conversion can be programmed to select any 1 of 16 input channels
Sequencer can be operated as two independent 8-state sequencers or as one large

16-state sequencer (i.e., two cascaded 8-state sequencers)
51
Sixteen result registers (individually addressable) to store conversion values.
Note: All fractional values are truncated.
Multiple triggers as sources for the start-of-conversion (soc) sequence
S/w software immediate start

Eva event manager a (multiple event sources within eva)
Evb event manager b (multiple event sources within evb)
Ext external pin (adcsoc)
Flexible interrupt control allows interrupt request on every end-of-sequence (Eos)
or every other Eos. Sequencer can operate in start/stop mode, allowing multiple timesequenced triggers to synchronize conversions.eva and evb triggers can operate
independently in dual-sequencer mode.
The ADC module in the 240xa has been enhanced to provide flexible interface to
event managers a and b. The ADC interface is built around a fast, 10-bit ADC module
with a total minimum conversion time of 375 ns (s/h + conversion). The ADC module has
16 channels, configurable as two independent 8-channel modules to service event
managers a and b. The two independent 8-channel modules can be cascaded to form a 16channel module.
Although there are multiple input channels and two sequencers, there is only one
converter in the ADC module. The two 8-channel modules have the capability to auto
sequence a series of conversions; each module has the choice of selecting any one of the
respective eight channels available through an analog mux.in the cascaded mode, the auto
sequencer functions as a single 16-channel sequencer. On each sequencer, once the
52
conversion is complete, the selected channel value is stored in its respective result
register.
Auto sequencing allows the system to convert the same channel multiple times,
allowing the user to perform over sampling algorithms. This gives increased resolution
over traditional single-sampled conversion results.
.
Fig 4.6.2: Block diagram of the 240xa ADC module

Digital controllers are having many advantages compared to analog controllers.
Out of micro controller based and DSP based digital controllers, DSP based controllers
are used for motor control applications as they are fast in operation and have an
additional DSP core compared to micro controllers. The architecture of TMS320LF2407
DSP controllers and their peripherals are discussed in detail with diagrams.
53
5. HARDWARE IMPLEMENTATION OF CONTROLLER.

Traditionally motor control was designed with analog components as they are
easy to design and can be implemented with relatively inexpensive components.
However, there are several drawbacks with analog systems. Digital systems offer
improvements over analog designs. DSP technology allows both a high level of
performance as well as system cost reduction.
Texas instruments launches a new DSP, the TMS320LF2407, specifically
designed for the digital motor control segment. This device combines a 16-bit fixed-point
DSP core with microcontroller peripherals in a single chip solution and is part of a new
generation of DSPs called the DSP controllers. This chapter deals with the control
hardware and explanation in detail about the operation of each interface circuitry.
5.1 OVER VIEW OF THE EMA SYSTEM

As mentioned in previous chapters, the main application of brush less dc motor is
in control of electro-mechanical rotary actuator (EMA). Control is performed by using
dedicated motion control digital signal processor (DSP), tms 320f2407. Basic block
diagram of EMA with controller is shown in figure below. The target EMA is having
LVDT for sensing the linear position of the actuator. Phase winding commutation can be
done either by using Hall Effect sensors mounted on the stator of the motor or by sensor
less commutation.
The controller of an actuator receives the position command in either analog or in
digital form. It also receives position feedback in analog form from LVDT, and rotor
position signal information from hall sensors. With these inputs the control loops will be
implemented inside the DSP to generate corresponding commutation logic to control
position of the actuator. Pulse width modulation (PWM) technique is used where mosfets
are switched at the rate of 18 kHz for controlling the motor current. Motor current is
sensed by a low ohmic non-inductive, smd resistors and fed to the hex bridge driver
for pulse-by-pulse current limiting.
54
Fig 5.1.1: Block diagram controller with EMA

Hardware design.
A digital controller is realized in two PCB modules by using surface mount
electronic components. First PCB module contains digital control hardware and the
second PCB module is power board. The switching of the motor current at the rate of 18
kHz generates switching noise, which may interfere with the other sensitive electronic
circuitry. Hence these boards are housed in a compact aluminum machined housing for
attenuating the radiated noise.
Digital Control Hardware Module
This section gives a brief overview of the control hardware, explanation in detail
about the operation of each interface. The focus is thereby on design considerations,
features and components used for controller and the interface circuitry.
55
Key Features
DSP Selection
In the previous chapter, we have seen the architecture of the TMS320LF2407
DSP, which is used for the work. In this section, the reasons behind the selection of this
DSP are explained.
For actuator control application the selection of right DSP is the main criteria. The
DSP may have to execute velocity loop & position loop parameters in 0.5msec time-tick
for achieving 200-300hz of velocity loop bw & 20-30hz of position loop bandwidth. A
high speed DSP of 40 MIPS may execute 20 k instructions in 0.5msec. PWM and dead
band logic for six channels should be available in DSP. A high speed capture unit should
be available in DSP for hall code processing.
On chip 10/12bit ADC is required for position command as well as for feedback
sensing. On chip flash memory required for permanent storing of executable code.
56
For a space constrained design like this, the most important design factor is the
availability of a compact DSP IC. TMS320LF2407 available in 64-pin lqfp, package and
having all motor control peripherals on chip is selected.
This device combines a 16-bit fixed-point DSP core operating at 3.3v with
integrated on chip memory and peripherals save board space as well as gives compact
solution for this application.
5.2 ARCHITECTURAL OVERVIEW OF TMS320LF2407

TMS320LF2407 uses modified Harvard architecture. The advanced features
include the ability to initialize data memory from program memory. This minimizes the
system cost by eliminating the need for a data rom and maximizes data memory
utilization. The most important reason for basing the 'c2407 on the harvard architecture is
speed. Separate data and program space allow simultaneous fetching of program
instructions and data. In a mathEMAtically intensive application, this effectively doubles
algorithm throughput compared to standard von Neumann-type processors.
The 2407 device are composed of three main functional units a 2407 DSP core,
internal memory and peripherals. In addition to these three functional units there are
several level system level features of 2407 that are distributed.
These system features include the memory map, device reset, interrupts, digital
input/output clock generation, and low power operation. Most operation can be
performed quickly from the available registers. These registers are called special function
registers (sfrs) are used to communicate with the on chip peripherals. Fig 3.5 shows the
architecture of the processor.
57
Fig 5.2.1 Architecture of TMS320LF2407

Key Features of LF2407:
High performance static cmos technology

o 40-mips performance
o 25-ns instruction cycle time (40mhz)
o Low power 3.3v design
On chip memory
o Flash memory of up to 16k words with 256-word boot rom
o Programmable code security feature
o 1k words of data/program ram
Event manager module

o Two 16 bit general purpose timers
o Eight 16-bit PWM channels
o Three capture units for time stamping of external events
58
Center- and/or edge-aligned PWM generation and programmable dead band
8 channel, 10-bit analog-to-digital converter (adc)
Serial communications interface (sci)
Jtag-compliant scan-based emulation
Extended operating temperature range: -40o c to 125o c
4 pin tqfp pag (lf2403a).
5.3 FUNCTIONAL BLOCK DIAGRAM

The functional block diagram of TMS320LF2407 evaluation module. This
functional block diagram describes the necessary interface blocks to interface with the
internal peripherals of DSP and also describes the power management to
TMS320LF2407. TMS320LF2407 receives position command and position feedback
from actuator; these two signals are fed to adc0 and adc1 of DSP. Hall signals are
interfaced with the capture unit of DSP. Based on these inputs control algorithms and
computation logic developed through DSP software programming
59
Fig 5.3.1 Functional block diagram of TMS320LF2407

In EMA applications, typical analog signal sources are
A] Position command
B] Position F/B
C] DC bus voltage
D] Motor phase current
E] Motor phase voltage.
For an ADC, operating on 3.3v, the sensing and amplification stages must
produce a signal swing of 0 to 3.3v at the input of ADC. Position command and position
feedback signals swings from 10v to +10v, these analog signals are scaled to + 1.65v by
using potential dividers realized by suitable values of resistors. This signal is converted to
0 to 3.3v by summing this signal with the 1.65v ref. This is implemented by noninverting amplifier with unity gain. The clamping circuit is implemented to clamp the
voltage to a safe value. This is to achieve maximum signal magnitude and signal-to-noise
ratio at the ADC input.
During power-on self-test condition for checking of internal ADC, the 1.65v
signal which is generated by the regulator is connected to one of the input channel of the
ADC. The shunt resistor on the power board generates 0.5v corresponding to 20a. This
signal is scaled to 0 to 3.3v by using non-inverting amplifier. The gain of this amplifier is
6.6.
Anti-aliasing Filter
Anti-aliasing filters are provided at the each input signal of ADC. This filter is for
smoothing and filtering purpose. An anti-aliasing filter is an analog filter which has a
twofold purpose. First, it ensures that the bandwidth of the signal to be sampled is limited
to the desired frequency range. Thus any frequency components of the signal above the
folding frequency fs/2 are sufficiently attenuated so that the amount of signal distortion
due to the aliasing is negligible. Secondly, it limits the additive noise spectrum and other
60
interference. By pre-filtering the additive noise power which falls within the bandwidth
of the desired signal is reduced.
The resistor in series must be carefully chosen typically low values around 100
ohms to match the impedance requirement of the ADC and along with the filter capacitor
to provide the correct cut-off frequency. This also helps stabilize the op-amp preventing
noise generation because of instability of the op amp circuitry. The filter capacitor also
helps balance the switching transient and charging and discharging of the internal sample
and hold capacitor during sample and hold. In addition, digital filters with a properly
selected cut-off frequency can be implemented in the DSP controller to take out certain
correlated and uncorrelated noise.
OP-AMP TLC2274
The amplifiers in this analog interface is planned to realize by using tlc2274. The
tlc2274 is quad operational amplifiers from texas instruments. These devices offer
comparable ac performance while having better noise, input offset voltage, and power
dissipation than existing cmos operational amplifiers. This devices exhibit rail-to-rail
output performance for increased dynamic ranging single- or split-supply applications.
The tlc2274 exhibit high input impedance and low noise, is excellent for small-signal
conditioning and for interfacing with analog-to-digital converters (adcs).
Specifications of tlc2274
A] Quad Op-Amp in SO-14 package with CMOS technology.
b] Single and Dual supply operation from 3.3V to 5V, +/- 5V to +/- 8V
c] Low input offset voltage 950V
d] High gain bandwidth of 2MHz
e] Operating temperature range -40 to 85 C
f] Max. Junction temperature 150 C
g] Storage temperature range -60 C to 150 C
h] High slew rate 3.6V/
61
Features of LM4051:
a] Small package: SOT-23
b] Reverse breakdown voltage options of 1.225V and adjustable
c] Output voltage tolerance (A grade, 25C) 0.1 %( max)
d] Low output noise (10 Hz to 10 kHz) 20Vrms
e] Wide operating current range 60A to 12mA
f] Industrial temperature range -40C to +85C
i] Low temperature coefficient 100 ppm/C (max)
PWM Interface
DSP TMS320LF2407 is having six PWM output pins. The PWM interface is used
to interface the PWM i/os i.e. Control signals to drive the power switches. This DSP
having two general purpose timers and three comparators, each comparator generates two
PWM outputs.
The PWM signals generated by the DSP are at 3.3v logic level. These signals
cannot drive the mosfets directly which are selected in the design, their turn-on gate
voltage is 10v to 15v.
Gate driver which accepts 3.3v logic inputs and gives 15v is required for the
design. Ir2132s from international rectifiers is selected as a gate driver. It is a 3-phase
gate driver uses charge pump technique to supply sufficient gate voltages for upper
mosfets.
It is also having cycle-by-cycle current limit feature with over-current detection
and fault generation. A fig 4.6 show describes the typical design topology using ir2132s
gate driver.
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Fig 5.3.2: Block diagram of PWM interface Block
Pulse By Pulse Current Limit

In an actuator application, every time a new position command is issued, motor
accelerates from rest. Generally motor resistance being low (here it is @ 1 ohm) a large
current flows through motor as well as semiconductor switches. If not controlled or
limited, this may damage the power switches. Also during direction reversal of the motor,
the motor winding current reaches to a dangerous proportion. To avoid this, a pulse-bypulse current limit is implemented inside a position loop. Here every cycle a power
switch is put on, motor current is observed for crossing a limit. If the limit is crossed a
power switch is put off for the rest of cycle.
The 3-phase driver ir2132 contains pulse by pulse current limit feature with
over-current detection and fault generation. An on-chip ground-referenced operational
amplifier provides analog feedback of bridge current via an external current sense resistor
(r sense) which is placed on power board. A current trip function, which terminates all six
outputs, is also derived from this resistor. An open drain /fault signal indicates if an overcurrent or under-voltage shutdown has occurred. Both operational amplifier and
comparator are available within ir2132, so just two resistors are needed externally. The
over-current trip is set internally to 0.5v. Two external resistors are required to set the
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gain of the on-chip operational amplifier. A fig. Below shows the detailed topology of
current limit.
If over current or under voltage condition occurs the comparator output sets the
fault logic, this causes six outputs of gate driver to go in inactive state. This fault o/p is
taken out and it can be used to implement software over current protection. Lower side
PWM i/p from DSP connected to clear logic of driver. Each new pulse clears the fault
logic and all gate drive outputs become active.
Fig 5.3.3: IR2132 current limit

RS-485 interface:
One of the important features of Mdmc Is Rs-485 multi-drop communication i.e.
communication between multiple distributed processors which are connected to single
serial bus. Communication based on Master and Slave structure, where each slave unit
has its unique address and responds only to packets addressed to this unit.
Main Features of RS-485 Communication:
Transmission technique
: Bidirectional half duplex
Mode of operation
: Differential
Voltage levels
: + 1.5V to + 7 V
Distance of transmission
: up to 4000ft
64
Data rate
: 100kbps/10Mbps
Transmission Media
: Twisted shielded pair
No. of slaves
: 32
Data transmission between
: Master to Slave
Slave to Master
Broadcast
Protocol
: Command/Response
In actuation system obc has to communicate with four actuator controllers, so RS485 communication is most suitable for this application. This gives compact, cost
optimized and simple solution rather than 1553 communication which is used in the
existing missile systems. Typical RS-485 interface diagram for actuation systems is
shown in below fig. Here master is obc (on-board-computer) and all four controllers are
slaves.
The
max3491
low-power,
high-speed
transceiver
for
RS485/RS-422
communication operates from a single +3.3v power supply. The device contains one
differential transceiver consisting of a line driver and receiver. The transceiver operates at
data rates up to 10mbps, driver and receiver propagation delays are very low about 50ns.
This will support full duplex communication.
Fig 5.3.4: Block diagram for RS485 interface

65
Description
The max3483, max3485, max3486, max3488, max3490, and max3491 are 3.3v,
low-power transceivers for rs-485 and rs-422 communication. Each part contains one
driver and one receiver. The max3483 and max3488 feature slew-rate-limited drivers that
minimize emi and reduce reflections caused by improperly terminated cables, allowing
error-free data transmission at data rates up to 250kbps. The partially slew-rate-limited
max3486 transmits up to 2.5mbps. The max3485, max3490, and max3491 transmit at up
to 10mbps.
Drivers are short-circuit current limited and are protected against excessive power
dissipation by thermal shutdown circuitry that places the driver outputs into highimpedance state. The receiver input has a fail-safe feature that guarantees a logic-high
output if both inputs are open circuit. The max3488, max3490, and max3491 feature full
duplex communication, while the max3483, max3485, and max3486 are designed for
half-duplex communication.
Features
Operate from a single 3.3v supplyno charge pump!
Interoperable with +5v logic
8ns max skew (max3485/max3490/max3491)
Slew-rate limited for errorless data transmission (max3483/max3488)
2na low-current shutdown mode (max3483/max3485/max3486/max3491)
-7v to +12v common-mode input voltage range
Allows up to 32 transceivers on the bus
Full-duplex and half-duplex versions available
Industry standard 75176 pin out (max3483/max3485/max3486)
Current-limiting and thermal shutdown for driver overload protection
Power Management for TMS320LF2407

The input power is 28vdc to the dcm2407.
The power required to operate the internal circuitry of the TMS320LF2407
A] 5vdc to power hall sensors
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-5vdc is obtained from a 2w, dc-dc converter having following specifications

Dc-dc converter type: nmh2405s from Newport, USA
Output power
: 2w at @ 850 c ambient
Nominal input voltage
: 24vdc
Input voltage range
: +/-10 %
Efficiency
: 65 %
As the input voltage range for the above dc-dc converter is limited, a three
terminal regulator 78m24cdt in dpak is used to regulate the input voltage which is
varying from 24v to 35 vdc.
B] 3.3v for DSP core and i/os:
The power requirement for DSP core and for all ics selected for this design is
3.3v. Tps7301qd voltage regulator from texas instruments is selected to fulfill above
requirement. This regulator is integrated with reset circuit (reset output). If the regulated
output drops to 95% of its regulated value, the reset o/p will be low for 200msec. This
delay can be used to reset the DSP during power on condition. Reset o/p is open drain, so
it is pulled up to 3.3v through resistor.
Specifications of tps301qd
The programmable output
: 3.3v for 5v input.
The dropout voltage
: typically 35 mv at an output current 100 ma
Output current
: 500ma
Package
: tssop20
Power dissipation
: 805mw at 125c case temperature
Operating temperature range
: -45c to +85c
The tps73xx devices are members of a family of micro power low-dropout (ldo)
voltage regulators. They are differentiated from the tps71xx and tps72xx ldos by their
integrated delayed microprocessor-reset function. If the precision delayed reset is not
required, the tps71xx and tps72xx should be considered.
C] 15vdc to ir2132 (gate driver)
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The power requirement for gate driver is 15v. This is produced by series resistor
and 15v zener diode.
Dsp power on reset

Power-on reset and manual reset for the DSP is provided by the tps3836e18q1.this chip is available in small package (sot23) and mil grade temperature range. Reset
output of this IC is active low and open drain, one pull-up resistor is required for this
output. During power on, reset is asserted when the supply voltage v dd becomes higher
than 1.1v.
Thereafter, the supervisory circuit monitors vdd and keeps reset output active as
long as vdd remains below the threshold voltage v it (2.93v) it is having internal delay
timer that starts after vdd has risen above the threshold voltage vit. Ct, this pin will assert
fixed delay time of10msec or 200msec, it will assert 10msec, if it is connected to gnd and
it asserts 200msec delay if it is connected to vdd. To reset the tms320lf2403a, a 200msec
delay is required, so ct is connected to vdd. Mr is the manual reset; push button switch is
connected to this pin to introduce hardware reset to the processor.
Dsp clock
This DSP is having internal pll (phase locked loop) block, which is having
internal multiplier. A 10 MHz external crystal oscillator from andhra electronics is
selected for the design. Maximum multiplying factor of the DSP is 4, with this multiplier
and 10 MHz clock we can operate DSP at 40 MHz (maximum operating frequency is 40
MHz). This will operate at 3.3v and gives 3.3v, 10 MHz square wave output. DSP core
requires 3.3v. More than 3.3v clock will damage the DSP. The internal pll-based clock
module is operated in external clock source operation.
This mode allows the internal oscillator to be bypassed. The device clocks are
generated from an external clock source input on the xtal1/clkin pin. In this case, an
external oscillator clock is connected to the xtal1/clkin pin. The pll module uses an
external loop filter circuit for jitter minimization. This loop filter circuit is connected
between the pllf and pllf2 pins. The pll has a 3-bit ratio control to select different CPU
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clock rates. These bits are located in the system control and status register 1 (scsr1), and
can be programmed in software code.
6. DRIVER ASPECTS AND HARDWARE

IMPLEMENTATION OF POWER MODULE
In this chapter a review is made on the type of power semiconductor switches that
are suitable and why mosfet is selected for this drive system.
Power module has to drive 28v/ 10a BLDC motor. It will be realized by using nchannel mosfet hex bridge. Here 3-phase gate driver ir2132 from international rectifiers
is selected to drive all upper and lower mosfets and is available in so-20 package. This
driver IC will be on the controller board. The hardware design of the power module is
explained.
6.1 DESIGN ASPECTS OF INVERTER

The Figure below shows the basic schEMAtic of proposed three phase bridge
inverter with wye connected motor phase windings (A, B, and C)
Fig 6.1.1: Inverter Bridge circuit.
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The six switches (s1- s6) of the inverter are power electronic devices, operate in
such a way so as to place the input dc current symmetrically for 2 /3 angle at the centre
of each phase (a, b, c) voltage wave. At any instant, two switches are on, one in the
upper group and another in the lower group, energizing each phase of the motor. By
controlling the sequence of the phases to be energized the required rotation is produced.
The power converter of the BLDC machine is also called as electronic
commutator, as the function of the converter is same as that of the commutator in dc
machines. The switches in case of this converter are switched on only for 120 degrees
and there is 60-degree elapse in between the top and bottom switch. As a result of this
there is an inherent dead band present in the converter circuit, which will not allow both
the top and bottom switch to switch on at a time. The inverter losses also decrease
considerably as only two switches one from top and another from bottom are switched on
at any particular instant. There are two switches in each leg and an anti parallel diode for
each switch to allow freewheeling current. The main disadvantage of this topology is the
higher number of switches required in each phase which makes the converter expensive.
Here the inverter is designed to control a BLDC motor using PWM technique.
Selection of Power Device
The power semiconductor devices available can be categorized into three groups viz.
1) The devices such as diodes which are turned on and off by the action of the circuit;
2) Devices like thyristors and triacs, which can be turned on by the gate, control but
require separate circuit implementation to turn them off.
3) Those devices such as bipolar transistors, gate turn-off thyristors (gtos) and power
mosfets which can be turned on and off by the gate signal.
The final groups of devices are preferred in power electronics as they simplify
circuitry, but they all have their advantages and disadvantages. For example gtos are
available in high-voltage and high current ratings but limited to lower frequencies (less
than a few kHz) and require high power gate control. Bipolar junction transistors (bjts)
offer simpler driving than gtos but they are limited to lower voltages (<1500v), while
70
mosfets offer high speed operation (100 kHz typical) and are very easy to drive but are
limited to lower voltages and currents.
The first stage in selecting the correct power-switching element for your motor
drive application understands the motor being driven. Understanding the ratings of the
motor is an important step in the process as it is often the corner points of operation that
will determine the choice of the power switching element. The voltage, current and power
ratings vary significantly with the different types of motors. Motor ratings can also vary
significantly within the same motor type. A key point to note is the value of the start-up
current (sometimes given as stall current or locked-rotor current). The startup current
value can be up to three times the value of the steady-state operating current. As
mentioned previously, it is these corner points of operation that will determine the
necessary ratings of the drive element. Because of the various voltage and current ratings
for the various motor types, the selected drive device ratings will have to vary as well,
depending on the application and design goals.
Mosfet or igbt, whats best for your application?
The two main choices for power-switching elements for motor drives are the
mosfet and igbt. The bipolar transistor used to be the device of choice for motor control
due to its ability to handle high currents and high voltages. This is no longer the case. The
mosfet and igbt have taken over the majority of the applications. Both the mosfet and igbt
devices are voltage controlled devices, as opposed to the bipolar transistor, which is a
current-controlled device. This means that the turn-on and turn-off of the device is
controlled by supplying a voltage to the gate of the device, instead of a current. This
makes control of the devices much easier.
71
Fig 6.1.2: Symbols of MOSFET and IGBT.

The similarities between the mosfet and the igbt end with the turn-on and turn-off
of the devices being controlled by a voltage on the gate. The rest of the operation of these
devices is very different. The main difference being that the mosfet is a resistive channel
from drain-to-source, whereas the igbt is a pn junction from collector-to-emitter. This
results in a difference in the way the on-state power dissipations are calculated for the
devices. The conduction losses for these devices are defined as follows:
The key difference seen in these two equations for power loss is the squared term
for current in the mosfet equation. This requires the rds-on of the mosfet to be lower, as
the current increases, in order to keep the power dissipation equal to that of the igbt.
In low voltage applications, this is achievable as the rds-on of mosfets can be in
the 10s of milli-ohms. At higher voltages (250v and above), the rds-on of mosfets do not
get into the 10s of milli-ohms. Another key point when evaluating on-state losses is the
temperature dependence of the rds-on of the mosfet versus the vce-sat of an igbt. As
temperature increases, so does the rds-on of the mosfet, while the vce-sat of the igbt tends
to decrease (except at high current). This means an increase in power dissipation for the
mosfet and a decrease in power dissipation for the igbt. taking all of this into account, it
would seem that the igbt would quickly take over the applications of the mosfet at higher
voltages, but there is another element of power loss that needs to be considered that is
the losses due to switching. Switching losses occur as the device is turned on and off with
current ramping up or down in the device with voltage from drain-to-source (mosfet) or
72
collector-to-emitter Switching losses occur in any hard-switched application and can

often dominate the power losses of the switching element. The igbt is a slower switching
device than the mosfet and, therefore, the switching losses will be higher. An important
point to note at this juncture is that as igbt technology has progressed over the past 10
years, various changes have been made to improve the devices with different
applications. This is also true of mosfets, but even more so for igbts.
Some of the generally accepted boundaries of operation when comparing the IGBT and
mosfet are:
For application voltages < 250v, mosfets are the device of choice. In searching many
igbt suppliers, you will find that the selection of igbts with rated voltages below 600v is
very small.
For application voltages > 1000v, igbts are the device of choice. As the voltage rating of
the mosfet increases, so does the rds-on and size of the device. Above 1000v, the rds-on
of the mosfet can no longer compete with the saturated junction of the igbt.
Between the 250v and 1000v levels described above, it becomes an application specific
choice that revolves around power dissipation, switching frequency and cost of the
device.
The comparisons of switching characteristics of all devices are tabulated as shown below.
Table6.1.1: Comparison of Switching- Devices Characteristics
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6.2 POWER MOSFET STRUCTURE AND ITS OPERATION

Discrete power mosfets employ semiconductor processing techniques that are
similar to those of today's VLSI circuits, although the device geometry, voltage and
current levels are significantly different from the design used in VLSI devices. The metal
oxide semiconductor field effect transistor (mosfet) is based on the original field effect
transistor introduced in the 70s.
Figure6.2.1: Power MOSFET Symbol.
Fig 6.2.2: Powers MOSFET schematic

.
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7. SOFTWARE IMPLEMENTATION AND TESTING

This chapter basically deals with the software implementation i.e. DSP
programming for development of the Hall Commutation decoding logic. The developed
commutation logic is tested for open loop system. This chapter presents the overall
software structure. This chapter also briefly explains about the main registers of DSP
used for software implementation. A program is also developed for closed loop system.
All the programming is implemented in the C language.
7.1 PWM GENERATION THROUGH EVENT MANAGER

This section presents brief description of the event manager of DSP, and the
registers to be configured for PWM generation.TMS320LF2407a device offers two event
manager modules which have been optimized for digital motor control and power
conversion applications. This peripheral of DSP is most important; the capabilities of this
module include center- and/or edge-aligned PWM generation, programmable dead band
to prevent shoot-through faults, and synchronized analog-to-digital conversion. The event
manager basically consists of general purpose timers, compare units, and capture units.
Up to eight PWM waveforms (outputs) can be generated simultaneously by each event
manager: three independent pairs (six outputs) by the three full-compare units with
programmable dead bands, and two independent PWMs by the gp-timer compares.
General Purpose Timers
There are two gp timers in each module. The gp timers can be operated
independently or synchronized with each other. There are three continuous modes of
operations for each gp timer in up- or up/down-counting operations.
Gp timers also provide the time base for the other event-manager sub modules.
These timers can be used as independent time bases for the generation of a sampling
period in a control system. The figure 5.1 shows the block diagram of gp timer. (x= 2 or
4, when x= 2 y=1, n=2, when x=4 y = 3 and n=4).
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Fig 7.1.1: Block Diagram of GP Timer

As shown in figure6.1, the gp timer can be configured using these following
registers. One readable and writeable (rw) 16-bit up and up/down counter register txcnt (x
= 1, 2, 3, 4). This register stores the current value of the counter and keeps incrementing
or decrementing depending on the direction of counting.
One rw 16-bit timer compare register (shadowed), txcmpr. One rw 16-bit timer
period register (shadowed), tx pr. Rw 16-bit individual timer control register, txcon. One
gp timer Compare output pin, TxCMP (x = 1, 2, 3, 4). And overall control register,
76
GPTCONA/B, specifies the action to be taken by the timers on different timer events, and
indicates the counting directions of the GP timers, As each GP timer has four possible
modes of counting operation Stop/Hold mode, Continuous Up-Counting mode,
Directional Up-/Down-Counting mode, Continuous Up-/Down-Counting mode.
Each gp timer has an associated compare register txcmpr and a PWM output pin
txPWM. The value of a gp timer counter is constantly compared to that of its associated
compare register. A compare match occurs when the value of the timer counter is the
same as that of the compare register. Compare operation is enabled by setting txcon[1] to
one. If it is enabled, the following happens on a compare match:
The compare interrupt flag of the timer is set one clock cycle after the match
A transition occurs on the associated PWM output according to the bit
configuration in gptcona/b, one device clock cycle after the match
if the compare interrupt flag has been selected by the appropriate gptcona/b bits
to start adc, an adc start signal is generated at the same time the compare interrupt flag is
set. A peripheral interrupt request is generated by the compare interrupt flag if it is
unmasked.
7.2 PWM TRANSITION

The transition on the PWM output is controlled by an asymmetric and symmetric
waveform generator and the associated output logic, and depends on the following:
bit definition in gptcona/b
counting mode the timer is in
counting direction when the counting mode is continuous-up/-down mode
The asymmetric/symmetric waveform generator generates an asymmetric or
symmetric PWM waveform based on the counting mode the gp timer is in.
Asymmetric waveform generation.
77
An asymmetric waveform is generated when the gp timer is in continuous upcounting mode. When the gp timer is in this mode, the output of the waveform generator
changes according to the following sequence:
Zero before the counting operation starts rEMAins unchanged until the compare
match happens
Toggles on compare match
rEMAins unchanged until the end of the period
resets to zero at the end of a period on period match, if the new compare value
for the following period is not zero.
The output is one for the whole period, if the compare value is zero at the
beginning of a period. The output does not reset to zero if the new compare value for the
following period is zero. This is important because it allows the generation of PWM
pulses of 0% to 100% duty cycle without glitches. The output is zero for the whole period
if the compare value is greater than the value in the period register. The output is one for
one cycle of the scaled clock input if the compare value is the same as that of the period
register. One characteristic of asymmetric PWM waveforms is that a change in the value
of the compare register only affects one side of the PWM pulse.
78
Fig 7.2.1: GP Timer Compare/PWM Output in Up-Counting Mode

Symmetric Waveform Generation
A symmetric waveform is generated when the gp timer is in continuous up-downcounting modes. When the gp timer is in this mode, the state of the output of the
waveform generator is determined by the following:
Zero before the counting operation starts
REMAins unchanged until first compare match
Toggles on the first compare match
REMAins unchanged until the second compare match
Toggles on the second compare match
REMAins unchanged until the end of the period
Resets to zero at the end of the period if there is no second compare match, and
the new compare value for the following period is not
79
Fig 7.2.2: GP Timer Compare/PWM Output in Up-/Down-Counting Modes

To generate a PWM output with a gp timer, a continuous up- or up-/down
counting mode can be selected. Edge-triggered or asymmetric PWM waveforms are
generated when a continuous-up count mode is selected. Centered or symmetric PWM
waveforms are generated when a continuous-up/-down mode is selected.
To set up the gp timer for the PWM operation, do the following:
set up txpr according to the desired PWM (carrier) period
set up txcon to specify the counting mode and clock source, and start the operation
load txcmpr with values corresponding to the on-line calculated widths (duty cycles) of
PWM pulses.
The period value is obtained by dividing the desired PWM period by the period of
the gp timer input clock, and subtracting one from the resulting number when the
continuous up-counting mode is selected to generate asymmetric PWM waveforms.
When the continuous up-/down-counting mode is selected to generate symmetric PWM
waveforms, this value is obtained by dividing the desired PWM period by two times the
period of the gp timer input clock. The gp timer can be initialized the same way as in the
previous example. During run time, the gp timer compare register is constantly updated
80
with newly determined compare values corresponding to the newly determined duty
cycles.
Compare units.
There are three (full) compare units (compare units 1, 2, and 3) in the eva module
and three (full) compare units (compare units 4, 5, and 6) in the evb module. Each
compare unit has two associated PWM outputs. The time base for the compare units is
provided by gp timer 1 (for eva) and by gp timer 2 (for evb) the compare units in each ev
module include:
Three 16-bit compare registers (cmpr1, cmpr2, and cmpr3 for eva and cmpr4,
cmpr5, and cmpr6 for evb), all with an associated shadow register.
One 16-bit compare control register (comcona for eva, and comconb for evb).
One 16-bit action control register (actra for eva, and actrb for evb), with an
associated shadow register, (rw)
Six PWM (3-state) output (compare output) pins (PWMy, y = 1, 2, 3, 4, 5, 6 for eva
and PWMz, z = 7, 8, 9, 10, 11, 12 for evb)
Fig 7.2.3: Compare Unit Block Diagram
81
All three kinds of PWM waveform generations with compare units and associated
circuits require configuration of the same event manager registers. The setup process for
PWM generation includes the following steps:
Setup and load actrx (actra)
Setup and load dbtconx, if dead-band is to be used
initialize cmprx
Setup and load comconx (comcona)
Setup and load t1con (for eva) or t3con (for evb) to start the
Operation.
rewrite cmprx with newly determined values.
The PWM circuits are designed to minimize CPU overhead and user intervention
when generating pulse width modulated waveforms used in motor control and motion
control applications.
PWM generation with compare units and associated PWM circuits are controlled
by the following control registers:
T1con, comcona, actra, and dbtcona (in case of eva). The operation mode of the compare
units is determined by the bits in comconx.
In this section the description of test setup for this work is presented. Firstly all
the interface circuitry of digital controller was tested on breadboard before the design
being finalized for manufacturing of PCB. It's a fact that not all manufactured boards are
good. Hence firstly the board level testing is conducted, accordingly the test setup is
arranged. Secondly, after the board level testing, the test setup is arranged so as to test as
a system called as the system level testing.
Firstly all the PCBs are tested on bare board for the electrical testing i.e. for
continuity, isolation and hi-pot testing.
In the board level testing, basically the board is tested during the product
prototype phase. Testing at this stage helps avoid the costly mistake of assembling a
defective board. It can be prevented from assembling precious, costly or scarce
82
components on a bad board. If an untested bare board is assembled, any functional

problems will require troubleshooting to determine whether the board or the assembly is
at fault. Testing the bare board saves time since any functional problems can be isolated
to the assembly. The Bare board test is conducted mainly to identify the fault, the faults
may be short and/or leakage, or an absence of expected circuit continuity, a leak or
"leaking network" is a type of short exhibiting a high resistance value.
Once the bare board testing is completed, the devices can be mounted on to the
board. In the controller board firstly only the DSP, the crystal oscillator and the regulator
is mounted. The output of regulator is 3.3v; it is ensured that the 3.3v is being supplied to
all the supply pins of DSP. As the crystal oscillator clock is 10 MHz, it can be ensured
that the mounted DSP is functional. If it is functional it gives the clockout signal at the
test point of the board.
Each interface circuitry is verified by mounting all the devices and verifying the
devices mounted are functional.
System Level Testing
In system level testing the control hardware and the power electronics hardware
is hard wired as shown in block diagram, making it an integrated test setup. This testing
primarily focused on implementation of commutation logic and control system concepts
in software programming. The software is based on two modules, the initialization and
the run module .The first module is performed only once at the beginning. The second
module is BLDC control dedicated software. It is basically implementing the
commutation logic in open loop and closed loop systems
83
Fig7.2.4: Block Diagram of Test Setup
Fig7.2.5: Flowchart Showing the Global Structure

Software Implementation of Commutation Logic
As the BLDC motor in this application is fed with direct current and at any instant
two phases are on, hence only two switches are conducting current. There are two ways
to get the desired current into the right phase pair, hard chopping and soft chopping
operation. In this application the PWM strategy is soft chopping with symmetrical
84
modulation. The commutation principle of BLDC motor as explained in chapter 2 is used

to develop the logic algorithm.
The commutation instants are given in a tabular form given below:
Table 7.2.1: Commutation Instants for sensored Implementation.
7.3 DSP PROGRAMMING

The DSP programming is implemented in c language. The tms320lf2403a DSP is
supported by a set of software development tools which includes an optimizing c
compiler, an assembler, a linker, an archiver, a full speed emulator. The platform used in
this work is code composer studio (ccs) v2.2 which has extended DSP code development
tools by integrating editor, debugger, simulator, and emulation analysis into one entity.
Code composer provides a rich debugging environment that allows to step
through the code, set breakpoints, and examine registers as your code executes, also with
85
a set of debugging and real-time analysis capabilities. The code composer studio ide
supports all phases of the development cycle shown here.
Fig7.3.1: Software Development Flow

As seen from the flow chart showing gobal structure, we have two modes of
operation. Initialization set up and run mode.
DSP controller initialization setup
In the initialization module, the DSP controller resources (core settings and
peripheral settings) have to be configured. In the core settings the system and status
registers has to be configured, for the setting of pll unit and to allocate the saram to
program memory. Firstly set the pll unit so that CPU clock runs at 40 MHz clock as the
crystal oscillator mounted on the board is 10 MHz As for the development stage the
watchdog unit has to be disabled. And last thing in the core initialization is to mask the
interrupts mainly from capture unit, PWM unit and ADC unit.
In the peripheral initialization, as full compare units are used to generate the
pulsed signals to drive power electronics switches. Compare units is set to generate
symmetrical non-complementary PWM signals at the frequency of 20 kHz with timer1 as
time base and with dead band unit disabled. The PWM resolution is equal to CPU clock
period. And the ADC unit is set to receive the start of conversion from software program
and to generate interrupt request to the core when the conversion is finished.
86
The second step is the variable initialization; in this program 11 variables are needed.
They can be sorted into three categories, variables which are dedicated to commutation
algorithm, position loop, ADC unit.
Run mode
The system level experimental setup is arranged in this run mode. Firstly the
implementation of commutation logic is performed on open loop system, accordingly the
setup is arranged with no feedback of position signals. Secondly the closed loop is
implemented with position signals fed back to ADC unit of DSP controller. The following
section describes the two modules, open loop and closed loop system.
Open loop speed control of BLDC motor:
The compare values of timers and PWMs are implemented in software as shown
in table 6.3 below. This allows the motor to commutate and rotate in the direction as
written in the software. The open loop speed control of the motor can be obtained by
varying the duty ratio i.e. by varying the values of timer compares and PWM compares.
The motor speed is varied from zero to max by varying the duty ratio in the software. The
flow chart for commutation and speed control is shown below and the software code is
given in appendix.
The operation of the controller for sensored techniques except that the hall
sensors are used to get the information of the next phase which comes in to conduction
87
Table7.3.1: Commutation Logic with the corresponding Compare and Timer values
Fig 7.3.2: Flow Chart for Open Loop
88
Closed loop Position control of BLDC motor:

The BLDC motor will be used in electromechanical actuator in the final
application. The electromechanical actuator should be controlled in closed loop where the
loop is to be closed in this application. The rotary potentiometer is used as feedback
element in the position loop. For implementing the closed loop position control the ADC
modules of the DSP are to be configured. The position loop is implemented with only
proportional control with proportional gain KP properly tuned to get required frequency
response.
Two ADC channels of the ADC module of DSP are configured to cater for input
command (reference) and feedback (from potentiometer). The 1st channel is configured as
input command and 8th channel as feedback command. The ADC interrupt service routine
is written in software. The results of two ADC channels are stored in result registers
result0 and result1 respectively. The error is calculated by taking difference of result0 and
result1 registers. The result registers are right shifted since the ADC is 10 bit and the
result registers are 16-bit.
The duty ratio of the PWM signal is varied according to error. The proportional gain
is multiplied with error so as to amplify the response and is tuned to get required
response. The error magnitude determines the duty ratio and error direction will
determine the motor direction (reverse or forward). The flow chart for closed loop control
is given below.The software code for closed loop position control is given in appendix.
89
Fig 7.3.3: Flow Chart of Closed Loop
90
7.4 CODDING
The execution of the program is done in code studio composer 3.1 version
/******
Digital controller for Electromechanical Actuation system
Developed at CAD, RCI.
******/
#include DSP2812x device h
// DSP2812x header file include file
#include DSP2812x examples h
// DSP2812x examples include file
#define PERIOD 300;
// proto type statements for functions found within this file
Interrupt void adc_isr (void);
Interrupt void cap_isr (void);
//global variables used in this example:
Unit16 conversion count;
Unit16 voltage1 [10];
Int ep,ep1,d,x,cmd,fbk,kp,vfbk,kv,ev,vcmd,ev1;
Long into t, y;
Void forward motion ()
{
d (kp*ep1)/16;
t=gpiodataregs.GPADAT.all;
If (t==65279||t==64767)
{
Evbregs.CMPR6=d;
}
Else
{
Evbregs.CMPR6=0;
If (t==65023||t==63999)
{
91
Evbregs.CMPR4=d;
}
Else
{
Evbregs.CMPR4=0;
}
If (t==64511||t=64255)
{
Evbregs.CMPR5=d;
}
Else
{
Evbregs.CMPR5=0
}
If (t==64767||65023)
{
Evarers.CMPR2=300;
Evarers.CMPR3=0;
Evarers.CMPR1=0;
}
Else if (t==63999||t==64511)
{
Evarers.CMPR2=300;
Evarers.CMPR3=0;
Evarers.CMPR1=0;
}
}
Void reverse motion ()
{
d(kp*ep1)/16;
t=gpiodataregs.GPADAT.all;
If (t==63999||t==64511)
{
92
Evbregs.CMPR6=d;
}
Else
{
Evbregs.CMPR6=0;
If (t==64255||t==65279)
{
Evbregs.CMPR4=d;
}
Else
{
Evbregs.CMPR4=0;
}
If (t==64767||t=65023)
{
Evbregs.CMPR5=d;
}
Else
{
Evbregs.CMPR5=0
}
If (t==64767||65023)
{
Evarers.CMPR2=300;
Evarers.CMPR3=0;
Evarers.CMPR1=0;
}
Else if (t==64511||t==64255)
{
Evarers.CMPR2=300;
Evarers.CMPR3=0;
Evarers.CMPR1=0;
}
93
Else if (t==65279||t==64767)
{
Evarers.CMPR2=300;
Evarers.CMPR3=0;
Evarers.CMPR1=0;
}
Void position control ()
{
KP=4;
Kv=1;
Cmd=voltage1[0];
Fbk=voltage2[0];
Vfbk=voltage3[0];
Ep=cmd-fbk;
Vcmd=kp*ep+2120;
Ev=vcmd-vfbk;
If (ep<0)
{
Ep1=-ep;
}
Else
{
Ep1=ep;
}
If(ev<0)
{
Ev1=-ep;
}
Else
{
Ev1=ep;
94
}
If (ep<0)
{
Reverse motion ()
}
Else
{
Forward motion ();
}
}
Void control ()
{
Position control ();
}
getch ();
95
7.5 RESULTS
1. Gate wave forms of all mosfets in the bridge are shown with varying duty Ratio from
zero to 100%.
2. The voltage waveform for different duty ratios across three phases is measured.
3. Hall sensor signals rotor position signals are shown.
The following figures show the results.
7.5.1 Screen shot
7.5.2 Screen shot

96
7.5.3 Screen shot
7.5.4 Screen shot
97
7.5.5 Screen shot
7.5.6 Screen shot
98
7.5.7 Screen shot
7.5.8 Screen shot
99
7.5.9 Screen shot
7.5.10 Screen shot
100
7.5.11 Screen shot
7.5.12 Screen shot
101
7.5.13 Screen shot
7.5.14 Screen shot
102
7.5.15 Screen shot
7.5.16 Screen shot
103
7.5.17 Screen shot

Configuration for Closed loop control
BLDC motor is coupled to a linear LVDT which is again coupled to linear

actuator and tested with different commands.
For triangular command
7.5.18 Screen shot

104
For Step command
7.5.19 Screen shot
For Sine command
7.5.20 Screen shot
105
7.6 RESULTS
1.
Gate wave forms of all Mosfets in the bridge are shown with varying duty ration
from zero to 100%
2.
Hall sensor signals are taken and the frequency is calculated for different duty
ratios by which speed can be calculated.
3.
The speed measured by tachometer is compared with values calculated from hall
sensor signal frequency.
4.
The voltage waveform for different duty ratios across three phases is measured.
5.
In closed loop the position command of various wave forms sine, triangular and
step command are given to the motor and the feedbacks are measured and
analyzed.
6.
The position commands are given to the closed loop motor with different
proportional gain. Kp
106
8. CONCLUSION
The applications of brushless dc (BLDC) motors and drives have grown
significantly in recent years in the appliance industry and the automotive industry. This
project provides an understanding of the functionality of a BLDC motor, explains how
such a motor is driven, and describes all the necessary components and the necessity of
knowing the positioning of a BLDC motor in agreement with the obtained results, the
efficiency of the used DSP can be proven, due to fast response of control signals
observed, and good stiffness with the position control. The DSP allows the
implementation of a lower cost and compact system, because it groups all inputs and
outputs in only one device.
The performance of the developed DSP based digital controller of the BLDC
motor drive has revealed that the algorithm developed to analyze the behavior of the
BLDC motor drive system work satisfactorily in real time implementation
The obtained results showed that the process runs fast. The positioning controller
strategy has been optimized and good chances are that it will become more robust. The
further modifications in the control structure are also easily possible by changing the
software. This project has wide range of future research possibilities.
107
9. FUTURE SCOPE
Future research will be devoted to expand the control strategy proposed here, and
to implement sensor less control in the algorithmic approach to exploit synergies in view
of reducing design time and enhancing the performance of the system. Many novel
methods of sensor less commutation are under research. Machine saliency could be used
for rotor position estimation .New machine design also is an alternate solution to sensor
less operation. Some research is going on to add the special sensing winding to the
machine to indicate the rotor position. There are no Hall-type sensors; therefore, the
system is robust. This design of BLDC motor is not standardized yet. Optimized design
of the BLDC motor that achieves higher efficiency with lower cost is desirable.
108
10. REFERENCES
1. An application note an885 from microchip technology incorporated, brushless dc
(BLDC) motor fundamentals 2003.
2. An application note an857 from microchip technology incorporated, brushless dc
motor control made easy, 2002.
3. Advances in brushless dc motor technology, control, and manufacture by George
Ellis kollmorgen corporation Radford, Virginia, USA...
4. Permanent magnet brushless dc motors for consumer products by s. Bentouati,
z.q. Zhu and d. Howe, university of Sheffield.
5. Selection of electric motors for aerospace applications practices no. Pd-ed-1229,
by NASA.
6. Texas instruments DSP solutions for BLDC motors, literature number: bpra055
march 1997.
7. Texas instruments, tms320lf/lc240xa DSP controllers reference guide system and
peripherals literature number: spru357b December 2001.
7.
Texas instruments, implementation of a speed controlled brushless dc drive using

tms320f240, literature number: bpra064, July 1997.
8.
Deng Bing, pan junmin, research and development of control system in digital
valve electric actuator, iecon01, conference of the IEEE industrial electronics
society, 2001.
9.
C&d technologies, datasheet of nml series isolated 2w single output dc-dc

converters, 2000.
10.
Texas instruments, datasheet of tlc2274, advanced operational amplifiers,

February 1997 revised July 2000.
11.
Texas instruments data-sheet TMS320LF2407a, tms320lf2406a, tms320lf2403a,

DSP controllers
12.
Tms320lf240x DSP controllers/peripheral library and specific devices - reference

guide- texas instruments. Literature number spru161d.
14. Review of sensor less methods for brushless dc by james p. Johnson

Ehsani yilcan giizelgiinler member, eee fellow, IEEE member, IEEE.
109
10. WEBSITES
1. www.ti.com
2. www.ieee.com
3. www.iete.com
110

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DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

1. INTRODUCTION AND OVERVIEW OF ACTUATOR

1.1.1Fig: actuator and its parts

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

1.1.2Fig: Actuators used in solid structures and in robotic

1.1.3Fig: actuators used in missiles

1.2 OVERVIEW OF BLDC

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

1.2.1 Fig: cross sections BLDC motors

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

1.3 BLOCK DIAGRAM

1.3.1Fig Block Diagram of BLDC motor drive system

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

As we know that the necessary condition for development of Mechanical moment

1.3.2Fig: using magnets for sensing

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

1.3.3 Fig: BLDC as motors and controller

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

1.3.4 Fig: print board of BLDC

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

1.4 CONVERTER TECHNOLOGY

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

DC machines have traditionally dominated the domain of motion control systems.

1.5 CONTROL IMPLEMENTATIONS

Discrete control is hardware control

Microcomputer control software control.

In recent years, advancement in microelectronic chips has substantially reduced the

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

George Ellis kollmorgen

Yedamale Microchip Technology Inc. Is a paper focuses on the BLDC motors ,

commutation . This is a published application note on BLDC motors by Microchip

cleaner . The performance of the

BLDC motors, in terms of their

torque/speed and efficiency/speed characteristics , and Emc and acoustic noise

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

3. BLDC MOTORS AND COMMUTATION TECHNIQUES

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

In this chapter, fundamentals of BLDC motors, their constructional features, their

3.1 BRUSHLESS DC MOTOR

Fig 3.1.1: BLDC waveforms

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

3.2 CONSTRUCTIONAL FEATURES

Fig 3.2.1: Dissembled view of BLDC motor

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

Fig 3.3.1: Stator of a BLDC motor.

Fig 3.3.2: Trapezoidal Back emf- pm BLDC Motors

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

Fig 3.3.3: sinusoidal back emf.-pm Synchronous Motors

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

Fig 3.4.1: Rotor magnet cross sections

Armature inductance : 0.8mH

ECE DEPARTMENT (BITSW)

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

Stator core length

Table3.4.1: Comparison of BLDC motors with Brushed dc motors

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

Table 3.4.2: Comparison of BLDC motors with ac induction motor

3.5 TRANSFER FUNCTION OF BLDC MACHINE

DSP BASED EMBEDDED DIGITAL CONTROLLER FOR ACTUATOR

Fig 3.5.1: Equivalent circuit for Brushless dc motor.

The back emf is equal to Kem

The mechanical equation of the machine is