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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO.

6, JUNE 2008

2497

Effect of Zero-Vector Placement in a Dual-Inverter


Fed Open-End Winding Induction-Motor Drive
With a Decoupled Space-Vector PWM Strategy
Veeramraju T. Somasekhar, Srirama Srinivas, and Kommuru Kranti Kumar

AbstractAn open-end winding induction-motor drive with


two two-level inverters achieves three-level inversion. The drawback of this configuration is the presence of a high zero-sequence
current, stressing the semiconductor switching devices and the
motor. To avoid this, two isolated dc power supplies are needed
to feed individual inverters. In this paper, it is shown that it
is possible to operate this drive with a single dc power supply,
with reasonable engineering compromises. The new decoupled
space-vector-based pulsewidth modulation (PWM) strategy proposed in this paper achieves this objective. This PWM strategy
exploits the dependence of the zero-sequence voltage on the placement of the zero-vector of individual inverters. It is shown that
the zero-sequence voltage of the dual-inverter system is suppressed
by forcing the zero-sequence voltage of the individual inverters
to a value of zero, in the average sense, in each sampling-time
interval. This strategy, therefore, achieves a dynamic balancing
of the zero-sequence current. It is also shown that this PWM
scheme achieves the center spacing of effective-time period for the
dual-inverter drive and its associated advantages. In addition, the
effect of the placement of the zero-vector for individual inverters
on the dual-inverter drive is investigated, and the experimental
results are presented.
Index TermsDual-inverter, induction motor, open-end winding, placement of zero-vector, space-vector pulsewidth modulation
(PWM), zero-sequence voltage.

I. I NTRODUCTION

ULTILEVEL inverters using different circuit topologies


have been extensively researched [1][4]. A survey of
various pulsewidth-modulation (PWM) schemes for the inverters is reported in [5]. Improvised PWM schemes for the
multilevel inverters are presented in [6][8]. The neutral-point
potential problem in the neutral point clamped topology has
been the focus of many researchers, and recent methods to
overcome this problem are presented in [9][12].
Three-level inverters are gaining popularity and are slowly
acquiring acceptability of industry. The pioneering work of
Stemmler and Guggenbach [13] had shown that three-level inversion could be realized with the open-end winding induction
motor driven with two two-level inverters at either end. This
circuit configuration attracted the interest of many researchers,
Manuscript received August 8, 2007; revised December 31, 2007.
V. T. Somasekhar and S. Srinivas are with the Department of Electrical Engineering, National Institute of Technology, Warangal 506 021, India (e-mail:
vtsomasekhar@rediffmail.com; srsrini12@yahoo.co.in).
K. K. Kumar was with the Department of Electrical Engineering, National
Institute of Technology, Warangal 506 021, India. He is now with Cognizant
Technology Solutions, Andhra Pradesh 502324, India (e-mail: kranthi_bmp@
yahoo.co.in).
Digital Object Identifier 10.1109/TIE.2008.918644

owing to the advantages such as the absence of neutral-point


fluctuation, more redundant space-vector combinations, etc.,
and their work is well documented in [14][16]. This power
circuit suffers from the disadvantage of requiring two isolated
power supplies that would absorb the zero-sequence voltage;
otherwise, the zero-sequence current in the motor phases could
be high and, thus, harm the motor and the semiconductor
switches owing to low zero-sequence impedance [12], [17]. It
is shown in [18] that, with the use of auxiliary switches, this
zero-sequence voltage can be absorbed. A few PWM schemes
with an exclusive use of those switching combinations that
contribute to zero-sequence voltage with a value of zero are
presented in [19] and [20]. However, the switching resources
in these schemes are underutilized.
The effect of the placement of the zero-vector time period, in
a sampling-time interval, for a two-level inverter with spacevector modulation (SVM) is described in [21]. It has been
shown that a better spectral performance is obtained with a
centric placement of the block comprising of the active vectors (hereafter, called as the effective-time block) in a given
sampling-time interval, compared to the cases where it is placed
elsewhere [21]. A unified SVM strategy has been proposed for a
conventional two-level inverter in [22], where it is shown that a
generality is imparted to SVM technique through the flexibility
in the placement of the zero-vector. The choice in the placement
of the zero-vector could result in either center-spaced (continuous) or discontinuous (non center-spaced) PWM methods. This
methodology is extended to the dual-inverter configuration in
this paper, which results in a generalized PWM scheme for the
same configuration.
In the work reported in [23], it is shown that a strategic placement of the effective-time block with the alternate
subhexagonal-center PWM scheme described in [24] achieves
the annihilation of the sample-averaged zero-sequence voltage
in a dual-inverter fed open-end winding induction-motor drive
and is named as the Sample-Averaged Zero-sequence Elimination (SAZE) PWM strategy, for the sake of an easy reference.
In this paper, the effect of the distribution of the zero-vector,
or alternatively, the placement of the effective-time block for
the dual-inverter drive, which employs the decoupled PWM
strategy presented in [25], is reported. It is interesting to note
that one of the variants of the decoupled PWM strategy achieves
the following twin objectives: 1) center spacing the effectivetime period block within the sampling-time interval Ts and
2) the annihilation of the sample-averaged zero-sequence voltage. Of these two features, the former minimizes the ripple in

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 6, JUNE 2008

Fig. 1. Schematic of the dual-inverter fed open-end winding induction-motor drive with isolated power supplies.

operated with two isolated dc power supplies is shown in Fig. 1.


Each inverter has eight switching states independent of the
other, and the respective space-vector locations are shown in
Fig. 2. In Fig. 2, a + means that the top switch of a leg
is turned on, while a means that the bottom switch of
the leg is turned on. Therefore, for the dual-inverter scheme,
a total of 64 switching combinations are possible, which are
spread over 19 locations, as shown in Fig. 3. The symbols vao ,
vbo , and vco denote the three phase pole voltages of inverter-1,
and the symbols va o , vb o , and vc o denote the same for
inverter-2 (Fig. 1). As aforementioned, this paper reports the
effect of placement of the effective-time block for the dualinverter drive, which employs the decoupled PWM strategy.
The basic decoupling PWM strategy [24] and the SAZE PWM
strategy [23] are briefly reviewed in the following sections, as a
prologue, to facilitate the understanding of the effects of the zerovector placement in the PWM schemes proposed in this paper.

Fig. 2. Space-vector locations of the individual inverters.

the motor-phase current, while the latter facilitates the operation


of the dual-inverter drive with a single dc power supply.
It is well established that, in a conventional two-level inverter
with discontinuous SVM, the switching is reduced by 33% with
an attendant reduction of the switching power loss. In this case,
the effective-time period block is pushed to one of the corners of
a sampling-time interval. However, in a dual-inverter fed openend winding drive, such a noncentric placement of the effective
time would result in a significant zero-sequence voltage and
would call for an electrical isolation for the elimination of
the zero-sequence current. The effect of this additional degree
of freedom involved in the placement of the effective time
elsewhere within the sampling-time interval for the dual twolevel inverter scheme with the decoupled space-vector PWM
scheme is described in this paper.
The implementation of all the variants of the proposed PWM
schemes depends entirely on the instantaneous phase reference
voltages. They do not involve sector identification or lookup tables. The experimental results are presented with all the variants
of effective-time placement, covering the entire speed range.

III. D ECOUPLED PWM-S WITCHING S TRATEGY FOR THE


D UAL -I NVERTER AND E FFECTIVE -T IME P LACEMENT
The PWM-switching strategy is based on the observation that
the reference-voltage space vector Vsr can be resolved into two
halves of equal and opposite components as Vsr /2 and Vsr /2.
By subtracting the later from the former, the reference can
be synthesized [25]. In Fig. 3, the vector OV represents the
actual reference space vector (Vsr ). This is resolved into
two halves OV1 (|Vsr /2|) and OV2 (|Vsr /2|1800 + ).
The first component OV1 is synthesized by inverter-1, and
the second component OV2 is realized by inverter-2. The
instantaneous phase reference voltages corresponding to the
actual reference-voltage vector Vsr (OV) are denoted as va , vb ,
and vc . Consequently, the three instantaneous phase reference
voltages are va /2, vb /2, and vc /2 and va /2, vb /2, and
vc /2 for inverter-1 and inverter-2, respectively. The switching
times of the top switching devices of inverter-1 (Tga1 , Tgb1 , and
Tgc1 ), which are based on va /2, vb /2, and vc /2, respectively,
are obtained using switching algorithm presented in [22]. From
these timings, the timings for the top switches of inverter-2 are
obtained by adopting the procedure described in [25]. These
switching-time periods corresponding to inverter-2 are given by

II. D UAL -I NVERTER F ED O PEN -E ND W INDING


I NDUCTION -M OTOR D RIVE

Tga2 = Ts Tga1
Tgb2 = Ts Tgb1
Tgc2 = Ts Tgc1 .

The schematic of a three-level inverter realized with dual


two-level inverter fed open-end winding induction-motor drive

In the decoupled PWM-switching scheme, the component


OV1 is synthesized by inverter-1 in the average sense, using

SOMASEKHAR et al.: EFFECT OF ZERO-VECTOR PLACEMENT IN A WINDING INDUCTION-MOTOR DRIVE

Fig. 3.

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Resultant space-vector combinations in the dual-inverter scheme.

SVM by switching among the states 8127 (Fig. 2) for


the time periods of T0 /2T1 T2 T0 /2, respectively, for
the on sequence. Similarly, the component OV2 is synthesized by inverter-2, in the average sense, by switching
among the states 8 5 4 7 (Fig. 2) for the time periods
of T0 /2T1 T2 T0 /2, respectively, for the on sequence. This
leaves the effective time of the individual inverters at the center
of the sampling time period, as Tgx2 = Ts Tgx1 (where x =
a, b, c) [25].

TABLE I
ZERO-SEQUENCE VOLTAGES PRODUCED BY INVERTER-1

IV. D ECOUPLED SAZE (DSAZE) PWM A LGORITHM


The SAZE PWM algorithm, presented in [23], wherein the
dual-inverter system is viewed as a single entity, can be further
extended to annihilate the zero-sequence voltage in the average
sense for the individual inverters. This PWM scheme is named
the DSAZE scheme, as it is an amalgamation of the decoupled
PWM proposed in [25] and the SAZE PWM proposed in [23].
When inverter-1 assumes a state of 1(+ ), the pole
voltages of that inverter are given by
vao = Vdc /4
vbo = Vdc /4
vco = Vdc /4
as inverter-1 is supplied by a dc voltage with value of Vdc /2
volts.
The zero-sequence voltage corresponding to this state is
therefore given by
VZS (1) = (1/3) [vao + vbo + vco ] = Vdc /12.

Table I shows the zero-sequence voltage produced by inverter-1


as it assumes various states.
When the sample corresponding to inverter-1 is situated in
sector-1, the sequence 8127 is switched (during the on
sequence) with the time periods of T0 /2T1 T2 T0 /2. With
the decoupled PWM strategy described in [23], wherein the
null vector period T0 is equally distributed among the state
8( ) and 7(+ + +), the sample-averaged zero-sequence
voltage is therefore given by
VZS (averaged over Ts )
= 1/Ts [{(Vdc /4) (T0 /2)} + {(Vdc /12) (T1 )}
+ {(Vdc /12) (T2 )} + {(Vdc /4) (T0 /2)}]



Vdc
1
=
(T2 T1 ) .
Ts
12

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 6, JUNE 2008

Fig. 4. Dual inverter fed from a single dc-power supply with DSAZE PWM.

Thus, it is seen that the sample-averaged zero-sequence voltage


is not equal to zero unless T2 = T1 .
However, the zero-sequence voltages associated with the
inverter states given in Table I shows that it is possible to
force the sample-averaged zero-sequence voltage to a value of
zero by an unequal distribution if the zero-vector time (T0 )
among the competing states of 8( ) and 7(+ + +), which
produce equal and opposite zero-sequence voltages of Vdc /4
and Vdc /4, respectively. If the states 8( ) and 7(+ + +)
are switched for time periods xT0 and (1 x)T0 , respectively,
so that the sum of dwell times in the zero-vector adds up to
T0 , it is possible to force the sample-averaged zero-sequence
voltage to a value of zero.
Thus, when the sample for inverter-1 is situated in sector-1,
in the on sequence
VZS (averaged over Ts )
=

1
[(xT0 ) (Vdc /4) + (T1 ) (Vdc /12)
Ts
+ (T2 ) (Vdc 12) + (1 x)T0 (Vdc /4)] = 0

xT0 =

T2 T1
T0
+
.
2
6

(1)

The time shift that would be required for balancing the zerosequence volt-second is obtained as
Toset = (1 x)To Tmin

V. P HASE C LAMPED D ECOUPLED PWM S CHEME B ASED


ON THE P LACEMENT OF THE Z ERO -V ECTOR

and is simplified as
Toset = Ts /2.

As aforementioned, phase-leg switching-time periods need


not be calculated separately for inverter-2. Once the switching times for inverter-1 (Tga1 , Tgb1 & Tgc1 ) are calculated,
the switching times for the other inverter are simply obtained by subtracting them from the sampling-time interval as
aforementioned.
Fig. 5(a) shows the placement of the effective times of the
individual inverters (Te1 and Te2 ) along with the resultant
placement of the effective-time period block (Te ) for the dualinverter scheme. It is shown in Fig. 5(a) that the effective
time of the dual-inverter drive is placed exactly at the center
of the sampling-time interval. The actual switching modes of
individual inverters for the on sequence in sector-1 are shown
in Fig. 5(b).
The result presented in (2) can be alternately interpreted.
In the work reported in [22], it is shown that the offset time
period determines the modulation scheme in a conventional
two-level inverter. If the offset time is equal to T0 /2 Tmin ,
center-spaced SVM is obtained, while an offset time of Ts /2
would result in the sine-triangle modulation. It is known that,
with SVM, one obtains about 15% more voltage for the same
dc-link voltage, compared to the sine-triangle PWM technique.
Therefore, a dc-voltage boost of 15% is required with the
DSAZE PWM technique to derive the rated motor voltage as
compared to the center-spaced SVM described in [25].

(2)

In a similar manner, the Toset times can also be calculated for


the off sequence in the other sectors, and this, again, works out
to be equal to Ts /2. Thus, with a simple offset-time of Ts /2,
the average value of the zero-sequence voltage is forced to a
value of zero. In other words, a dynamic balancing of zerosequence voltage is achieved. The dynamic balancing of the
zero-sequence voltage results in a dynamic balancing of the
zero-sequence current, as the former causes the latter.
Thus, the degree of freedom in the placement of effectivetime period is well exploited to achieve the operation of a dualinverter drive, which facilitates the operation of the drive with a
single dc-link voltage source, as shown in Fig. 4, instead of two
isolated dc power supplies (Fig. 1).

It is possible to push the effective-time period block to a


corner of a given sampling time period so that one phase of the
individual inverters is clamped and only the other two phases
are switched. Thus, instead of six switchings in a samplingtime interval Ts , as in the case of decoupled PWM and the
DSAZE PWM, only four switchings are affected in this case,
reducing the number of switchings by 33%. In the SAZE PWM
technique, the placement of the effective-time period at the
leading edge of the sampling-time period causes a different
zero-sequence voltage as compared to the case in which the
effective-time period is pushed to the trailing edge of the
sampling-time period (Ts ). With this DSAZE PWM scheme,
the placements, wherein the effective-time period block placed
either at the leading or at the trailing edge of a given samplingtime period, result in the same zero-sequence voltage.

SOMASEKHAR et al.: EFFECT OF ZERO-VECTOR PLACEMENT IN A WINDING INDUCTION-MOTOR DRIVE

Fig. 5.

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(a) Effective-time placement of the individual inverters and the dual inverter. (b) Actual switching modes of the dual inverter.

Fig. 6. Placement of effective times of the individual inverters within the


sampling-time interval; cases (c) and (d) result in identical performance of the
dual-inverter drive.

The reason for this feature is the zero-vector combinations,


namely, 88 and 77 [Fig. 5(b)], which cause the same zerosequence voltage, with a value of zero [23]. Fig. 6 shows all the
four possibilities in the placement of the effective-time block of
the individual inverters. Of these four cases, the placement of
the effective-time period block, as shown in Fig. 6(c) and (d),
result in an identical zero-sequence voltage, as aforementioned.
Thus, with this PWM scheme, there are only three variants. It
may be noted that electrical isolation is mandatory for Fig. 6(a),
(c), and (d).
VI. O VERMODULATION
The procedure for the implementation of overmodulation
for the DSAZE PWM-switching scheme is the combination

of the procedure adopted for the decoupled scheme and the


SAZE PWM scheme. If the dual-inverter scheme is driven with
two isolated power supplies, then the outer hexagon GIKMPR
(Fig. 3) is traced by tracing the hexagons of individual inverters,
as shown in Fig. 2, by adopting the procedure described in [22].
Since the null vector switching-time period T0 = 0, the same
procedure can be adopted for the case when Toset = Tmin .
In other words, for both the cases wherein two isolated power
supplies are used, the outer hexagon GIKMPR is traced, as the
effective-time period block (Te ) fills up the entire sampling
period (Ts ), making T0 = 0. However, the dc-link voltage
is underutilized for the DSAZE PWM, as one must provide
adequate room to affect a time shift of Ts /2 to eliminate the
zero-sequence voltage in the average sense. Consequently, the
inner hexagon HJLNQS is traced by the locus of the amended
sample. The same two-stepped procedure described in [23] is
also adopted here. Once the final instantaneous phase reference voltages are obtained (corresponding to the point on the
hexagon HJLNQS), they are divided into two equal halves and
are realized by the PWM algorithm described in [22], with a
time offset of Ts /2, instead of T0 /2 Tmin .

VII. E XPERIMENTAL V ERIFICATION AND D ISCUSSION


The proposed decoupled PWM-switching scheme is experimentally verified on a 5-hp three-phase open-end winding
induction motor with V/f control in the entire speed range.
The gating signals for the dual inverter are generated with
TMS320LF2407A DSP platform.
The gate signals generated by the DSP and experimentally
obtained waveforms of the A-phase pole voltages of the two
inverters, the A-phase motor-phase voltage, the zero-sequence
voltage, the normalized harmonic spectra of the difference
in pole voltages, and the no-load motor-phase current for a

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 6, JUNE 2008

Fig. 8. Motor-phase voltage and motor-phase current with Toset =


T0 /2 Tmin for (a) mi = 0.7 and (b) overmodulation. Voltage scale: X-axis:
5 ms/div; Y -axis: 100 V/div. Current Scale: X-axis: 5 ms/div; Y -axis: 1 A/div.

Fig. 7. Results for an mi = 0.4 with Toset = T0 /2 Tmin . (a) Gating


pulses generated by DSP. (b) Experimentally obtained A-phase pole voltage
of inverter-1 and inverter-2, X-axis: 10 ms/div; Y -axis: 100 V/div. (c) Experimentally obtained motor-phase voltage, X-axis: 10 ms/div; Y -axis: 100 V/div.
(d) Experimentally obtained zero sequence voltage, X-axis: 10 ms/div; Y -axis:
100 V/div. (e) Normalized harmonic spectrum of the difference in A-phase pole
voltages. (f) Experimentally obtained motor-phase current at no-load, X-axis:
10 ms/div; Y -axis: 1 A/div.

modulation index (mi ) of 0.4 are shown in Fig. 7, with the


effective-time period block placed exactly at the center of
the sampling-time interval, i.e., with Toset = T0 /2 Tmin .
The bottom trace of Fig. 7(a) is obtained by the subtraction of
the middle trace (pole voltage of inverter-2) from the top trace
(pole voltage of inverter-1). This signal is a scaled down replica
of the difference in the A-phase pole voltages of the individual
inverters. Fig. 8 shows the motor-phase voltage and the no-load
motor-phase current for mi = 0.7 and overmodulation with
Toset = T0 /2 Tmin (resulting in center-spaced PWM).
It is observed that, for the two cases of placement of the
effective time on either corners of a sampling-time interval, the
results obtained are same. Hence, the results for one case are
only presented here. Fig. 9 shows the results for mi of 0.4,
while Fig. 10 shows the motor-phase voltage and the no-load

Fig. 9. Results for an mi = 0.4 with Toset = Tmin . (a) Gating pulses
generated by DSP. (b) Experimentally obtained A-phase pole voltage of
inverter-1 and inverter-2, X-axis: 10 ms/div; Y -axis: 100 V/div. (c) Experimentally obtained motor-phase voltage, X-axis: 10 ms/div; Y -axis: 100 V/div.
(d) Experimentally obtained zero-sequence voltage, X-axis: 10 ms/div; Y -axis:
100 V/div. (e) Normalized harmonic spectrum of the difference in A-phase pole
voltages. (f) Experimentally obtained motor-phase current at no-load, X-axis:
10 ms/div; Y -axis: 1 A/div.

SOMASEKHAR et al.: EFFECT OF ZERO-VECTOR PLACEMENT IN A WINDING INDUCTION-MOTOR DRIVE

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Fig. 10. Motor-phase voltage and motor-phase current with Toset = Tmin
for (a) mi = 0.7 and (b) overmodulation. Voltage scale: X-axis: 5 ms/div;
Y -axis: 100 V/div. Current Scale: X-axis: 5 ms/div; Y -axis: 1 A/div.

motor-phase current for mi = 0.7 and overmodulation with the


effective time placed on the left corner of a sampling-time
interval, i.e., with Toset = Tmin . The experimental results
with the DSAZE PWM, which achieves the dynamic balancing of the zero-sequence voltage, implemented by affecting a
time shift of Toset = Ts /2, are shown in Figs. 11 and 12.
In this case, the dual-inverter drive is fed only with a single
dc power supply (Fig. 4) instead of two isolated dc power
supplies.
Fig. 7(e) shows the normalized harmonic spectrum of the
difference in pole voltages with a center-spaced PWM, corresponding to the bottom trace of Fig. 7(a). Of these spectral
components, all the triplen harmonic components, which constitute the zero-sequence voltage (for example, the 3rd and the
45th harmonic components) are dropped across the points O
and O (Fig. 1). Consequently, the normalized harmonic spectrum of the actual motor-phase voltage is similar to the one
shown in Fig. 7(e), except for the aforementioned harmonic
components.
From the motor-phase voltage waveforms for the three cases
[Figs. 7(c), 9(c), and 11(c)], it is evident that, in the case
where the effective-time period block is pushed to a corner of
the sampling-time period, the switching frequency is reduced
as compared to the other two cases. The motor-phase voltage
waveforms show a similar appearance in the former two cases,
as two isolated power supplies are used to supply the individual
inverters. However, the motor-phase voltage waveform with the
DSAZE PWM scheme, which achieves a dynamic balancing
of the zero-sequence voltage, is different as compared to the
former two waveforms and shows up three levels. In the former
two cases, the zero-sequence voltage shown in Figs. 7(d) and
9(d) is dropped across the points O and O (Fig. 1). However,
in the later case, only a single dc-power supply is used to
feed both the inverters (Fig. 4), forcing the points O and O
to be equipotential. The reduced switching in the second case
manifests as an increased ripple in the motor-phase current,
which is quite conspicuous from the waveforms shown in
Figs. 7(f), 9(f), and 11(e).
With the DSAZE PWM scheme, the zero-sequence current
is suppressed, owing to the dynamic balancing of the zerosequence voltage. As a result, the spectrum of the motor-phase
voltage is similar to the one obtained with the center-spaced

Fig. 11. Results for an mi = 0.4 with Toset = Ts /2. (a) Gating pulses generated by DSP. (b) Experimentally obtained A-phase pole voltage of inverter1 and inverter-2, X-axis: 10 ms/div; Y -axis: 100 V/div. (c) Experimentally
obtained motor-phase voltage, X-axis: 10 ms/div; Y -axis: 100 V/div. (d)
Normalized harmonic spectrum of the difference in A-phase pole voltages. (e)
Experimentally obtained motor-phase current at no load, X-axis: 10 ms/div;
Y -axis: 1 A/div.

Fig. 12. Motor-phase voltage and motor-phase current with Toset =


Ts /2 for (a) mi = 0.7 and (b) overmodulation. Voltage scale: X-axis:
5 ms/div; Y -axis: 100 V/div. Current scale: X-axis: 5 ms/div; Y -axis: 1 A/div.

PWM scheme, which demands electrical isolation [Figs. 11(d)


and 7(e)]. Consequently, the motor-phase currents in both cases
are similar in appearance [Figs. 11(e) and 7(f)], demonstrating
the effectiveness of the DSAZE PWM scheme.

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 6, JUNE 2008

Fig. 13. Motor-phase voltage and motor-phase current in the dual-inverter system when fed from a single power supply with mi = 0.4. Voltage scale: X-axis:
10 ms/div; Y -axis: 100 V/div. Current scale: X-axis: 10 ms/div; Y -axis: 1 A/div.

Finally, the normalized harmonic spectra presented for


these three cases for mi = 0.4 [Figs. 7(e), 9(e), and 11(d)]
demonstrate that the distribution of the zero-sequence voltage
(the triplen components) is different for different placements
of the effective-time period block, within the sampling-time
interval. This fact could also be asserted by the inspection of
the waveforms of the zero-sequence voltages in these cases
[Figs. 7(d) and 9(d)].
In order to cross verify the effect of zero-sequence content
in the motor-phase voltages, the dual-inverter drive is run
with a single power supply for all the three variants of the
decoupled PWM scheme for mi = 0.4, and the results are
shown in Fig. 13. From these results, it may be noted that,
in the former two cases, a strong zero-sequence current flows
[Fig. 13(a) and (b)] for a relatively low-input dc-link voltage of
150 V, indicating the necessity of electrical isolation. With the
DSAZE PWM scheme, the zero-sequence current is suppressed
by dynamically balancing the zero-sequence voltage. It may be
noted that the results shown in Fig. 13(c) for the dual-inverter
scheme corresponds to the case in which both inverters are fed
from a single dc-link voltage of 250 V. This, again, reinforces
the efficacy of the DSAZE PWM scheme.
Hence, it is evident that the twin objectives of dynamic
balancing of the zero-sequence voltage and center spacing of
the effective time are simultaneously accomplished with the
DSAZE PWM scheme. Thus, with this PWM scheme, the dual
inverter can be fed from a single dc power supply, obviating
the need of two isolated dc power supplies and other expensive
equipment, such as chokes or auxiliary switches.
VIII. C ONCLUSION
In this paper, the effects of the placement of the zero-vector
for a dual-inverter fed open-end winding induction-motor drive
were investigated. The decoupled PWM scheme, proposed in
[25], is further improvised so that the dual-inverter system
can be operated with a single dc-power supply. This PWM
scheme is named as DSAZE PWM scheme, which is very
easy to implement. It is implemented by a simple readjustment
of the offset time from T0 /2 Tmin to Ts /2. DSAZE PWM
scheme achieves the dual advantage of dynamic balancing of
the zero-sequence voltage and center spacing the effectivetime period. However, a 15% boost in the dc-link voltage is
needed to derive the rated motor-phase voltage with DSAZE
PWM scheme. In this case, it is envisaged that the disadvantage
of underutilizing the dc voltage is easily outweighed by the
advantage of operating with a single dc power supply, without

compromising much on the motor-phase current waveform, as


in the case of the SAZE PWM scheme.
Compared to the SAZE PWM scheme, the DSAZE PWM
scheme requires double switching and the attendant switching
power loss. A compromising solution seems to be the option
wherein Toset = Tmin or Toset = Ts Tmax . With this
scheme, the switching is slightly higher (four to three in favor
of the SAZE PWM), but the motor-phase current waveform
is better and dc-bus utilization is not compromised. However,
with this option, the electrical isolation becomes mandatory.
Thus, at higher power levels, where electrical isolation could be
mandatory, this variant of the decoupled PWM scheme could be
an attractive proposition.
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2505

Veeramraju T. Somasekhar received the graduate degree from the Regional Engineering College
Warangal (presently, National Institute of Technology), Warangal, India, in 1988, the postgraduate
degree with specialization in power electronics from
the Indian Institute of Technology, Bombay, India,
in 1990, and the doctoral degree from the Indian
Institute of Science, Bangalore, India, in 2003.
He was an R&D Engineer with M/s Perpetual
Power Technologies, Bangalore, and a Senior Engineer with M/s Kirloskar Electric Company Ltd.,
Mysore, India. Since 1993, he has been with the Department of Electrical
Engineering, National Institute of Technology. His current interests include
multilevel inversion with open-end induction motors, ac drives, and pulsewidthmodulation strategies.

Srirama Srinivas received the graduate degree in


electrical engineering from the College of Engineering, Osmania University, Hyderabad, India, in
1997, and the postgraduate degree from the Regional
Engineering College, Warangal, India, in 2002. He
is currently working toward the Ph.D. degree at the
National Institute of Technology, Warangal.
Since 1997, he has been with the Department of
Electrical Engineering, National Institute of Technology. His research interests include multilevel inverters, multilevel pulsewidth-modulation switching
strategies, multilevel inversion realized through open-end winding inductionmotor drives, dc and ac drives, etc.

Kommuru Kranti Kumar received the graduate degree in electrical engineering from Sri Venkateswara
Hindu College of Engineering, Nagarjuna University, Andhra Pradesh, India, in 2003, and the
postgraduate degree from the National Institute of
Technology, Warangal, India, in 2007.
He is currently a Programmer Analyst with Cognizant Technology Solutions, Andhra Pradesh, India.

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