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Training Manual

60PS11 Plasma Display


Advanced Single Scan Troubleshooting

1080p

Published January, 2010

OUTLINE
Overview of Topics to be Discussed
Section 1

Contact Information, Preliminary Matters, Specifications,


Plasma Overview, General Troubleshooting Steps,
Disassembly Instructions, Voltage and Signal Distribution
Section 2

Circuit Board Operation, Troubleshooting and Alignment of :


Switch mode Power Supply
Y-SUS Board Delivers Logic Signals and FG5V to both upper and lower boards.
Y-Drive Boards (2) Upper and Lower. Either can run separately.
Z-SUS Output Board (Also uses one Z-SUB board for bottom panel connector)
Control Board
X Drive Boards (3)
Main Board
Does not use a Main Power Switch.
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January 15, 2010 60PS11 Plasma

Overview of Topics to be Discussed

60PS11 Plasma Display


Section 1
This Section will cover Contact Information and remind the Technician of
Important Safety Precautions for the Customers Safety as well as the Technician
and the Equipment.
Basic Troubleshooting Techniques which can save time and money sometimes
can be overlooked. These techniques will also be presented.
This Section will get the Technician familiar with the Disassembly, Identification and
Layout of the Plasma Display Panel.
At the end of this Section the Technician should be able to Identify the Circuit
Boards and have the ability and knowledge necessary to safely remove and
replace any Circuit Board or Assembly.

January 15, 2010 60PS11 Plasma

Preliminary Matters (The Fine Print)

IMPORTANT SAFETY NOTICE


The information in this training manual is intended for use by persons possessing an adequate
background in electrical equipment, electronic devices, and mechanical systems. In any attempt
to repair a major Product, personal injury and property damage can result. The manufacturer or
seller maintains no liability for the interpretation of this information, nor can it assume any
liability in conjunction with its use. When servicing this product, under no circumstances should
the original design be modified or altered without permission from LG Electronics. Unauthorized
modifications will not only void the warranty, but may lead to property damage or user injury.
If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for
service, they must be returned to their original positions and properly fastened.

CAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power
is required for diagnosis or test purposes, disconnect the power immediately after performing
the necessary checks. Also be aware that many household products present a weight hazard.
At least two people should be involved in the installation or servicing of such devices.
Failure to consider the weight of an product could result in physical injury.

January 15, 2010 60PS11 Plasma

CONTACT INFORMATION
Customer Service (and Part Sales)

(800) 243-0000

Technical Support (and Part Sales)

(800) 847-7597

USA Website (GCSC)

aic.lgservice.com

Customer Service Website

us.lgservice.com

LG Web Training

lge.webex.com

LG CS Academy

lgcsacademy.com http://136.166.4.200

LG Learning Academy

LCD-DV: 32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 47LG90
PLASMA: 42PG20, 42PQ20, 60PS11, 50PG20, 50PS80, 50PS60
Available on the
Plasma page

Plasma Panel
Alignment Handbook

New Training Materials on


the Learning Academy site

Published January 2010 by LG Technical Support and Training


LG Electronics Alabama, Inc.
201 James Record Road,
Huntsville, AL, 35813.

January 15, 2010 60PS11 Plasma

ESD Notice

(Electrostatic Static Discharge)

Todays sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage
the electronics in a manner that renders them inoperative or reduces the time until their next failure.
Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively,
you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before
removing a replacement part from its package, touch the anti-static bag to a ground connection point or
unpainted metal in the product. Handle the electronic control assembly by its edges only. When
repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.

Regulatory Information
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to
Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction
manual, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate
the receiving antenna; Increase the separation between the equipment and the receiver; Connect the
equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the
dealer or an experienced radio/TV technician for help.

January 15, 2010 60PS11 Plasma

Safety and Handling, Checking Points


Safety & Handling Regulations
1.

Approximately 10 minute pre-run time is required before any adjustments are performed.

2.

Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.

3.

Always adjust to the specified voltage level (+/- volt) unless otherwise specified.

4.

Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supply
and Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.

4.

C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.

5.

The PDP Module must be carried by two people. Always carry vertical NOT horizontal.

6.

The Plasma television should be transported vertically NOT horizontally.

7.

Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.

8.

Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.

9.

New Panels and Frames are much thinner than previous models. Be Careful with flexing these panels. Be careful
with lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.

10. New Plasma models have much thinner cabinet assemblies and mounts.
Be extremely careful when moving the set around as damage can occur.

Checking Points to be Considered


1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
3. Check details of defective condition and history. Example: Y-SUS or Y-Drive Board Failure, Mal-discharge on screen, etc.

January 15, 2010 60PS11 Plasma

Basic Troubleshooting Steps


Define, Localize, Isolate and Correct
Look at the symptom carefully and determine what circuits could be causing the
Define
failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and check
for possible overheated components. Capacitors will sometimes leak dielectric material and
give off a distinct odor. Frequency of power supplies will change with the load, or listen for
relay closing etc. Observation of the front Power LEDs may give some clues.
Localize After carefully checking the symptom and determining the circuits to be checked
and after giving a thorough examination using your senses the first check should always be
the DC Supply Voltages to those circuits under test. Always confirm the supplies are not
only the proper level but be sure they are noise free. If the supplies are missing check the
resistance for possible short circuits.
Isolate
To further isolate the failure, check for the proper waveforms with the
Oscilloscope to make a final determination of the failure. Look for correct Amplitude
Phasing and Timing of the signals also check for the proper Duty Cycle of the signals.
Sometimes glitches or road bumps will be an indication of an imminent failure.
Correct The final step is to correct the problem. Be careful of ESD and make sure to
check the DC Supplies for proper levels. Make all necessary adjustments and lastly always
perform a Safety AC Leakage Test before returning the product back to the Customer.

January 15, 2010 60PS11 Plasma

60PS11 PRODUCT INFORMATION SECTION

This section of the manual will discuss the specifications of the


60PS11 Advanced Single Scan Plasma Display Television.

January 15, 2010 60PS11 Plasma

60PS11 Specifications

1080P PLASMA HDTV


60" Class (59.5" diagonal)

1080P Full HD Resolution


For Full Specifications
600 Hz sub field driving
See the Specification Sheet
1,500 cd/m2 Brightness
XD Engine
2000,000:1 Dynamic Contrast Ratio
Smart Energy Saving
3x HDMI V.1.3 with Deep Color (2 Rear, 1 side).
AV Mode II (Cinema, Sports, Game)
Clear Voice
LG SimpLink Connectivity
Invisible Speaker System
100,000 Hours to Half Brightness (Typical)
PC Input
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January 15, 2010 60PS11 Plasma

60PS11 Logo Familiarization Page 1 of 2


FULL HD RESOLUTION 1080P HD Resolution Pixels: 1920 (H) 1080 (V)
Enjoy twice the picture quality of standard HDTV with almost double the pixel
resolution. See sharper details like never before. Just imagine a Blu-ray disc
or video game seen on your new LG Full HD 1080p TV.
HDMI (1.3 Deep Color) Digital multi-connectivity
HDMI (1.3 Deep color) provides a wider bandwidth (340MHz,
10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors,
and also drastically improves the data-transmission speed.
Invisible Speaker
Personally tuned by Mr. Mark Levinson for LG
TAKE IT TO THE EDGE newly introduces Invisible Speaker system,
guaranteeing first class audio quality personally tuned by Mr. Mark
Levinson, world renowned as an audio authority. It provides Full Sweet
Spot and realistic sound equal to that of theaters with its Invisible
Speaker.
Dual XD Engine
Realizing optimal quality for all images
One XD Engine optimizes the images from RF signals as another XD
Engine optimizes them from External inputs. Dual XD Engine presents
images with optimal quality two times higher than those of previous
models.

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January 15, 2010 60PS11 Plasma

60PS11 Logo Familiarization Page 2 of 2


AV Mode "One click" Cinema, THX Cinema, Sport, Game mode.
TAKE IT TO THE EDGE is a true multimedia TV with an AV Mode
which allows you to choose from 4 different modes of Cinema, Sports
and Game by a single click of a remote control.

Clear Voice Clearer dialogue sound


Automatically enhances and amplifies the sound of the human voice
frequency range to provide high-quality dialogue when background
noise swells.
Save Energy, Save Money
It reduces the plasma displays power consumption.
The default factory setting complies with the Energy Star requirements
and is adjusted to the comfortable level to be viewed at home.
(Turns on Intelligent Sensor).

Save Energy, Save Money


Home electronic products use energy when they're off to power features like clock
displays and remote controls. Those that have earned the ENERGY STAR use as much
as 60% less energy to perform these functions, while providing the same performance at
the same price as less-efficient models. Less energy means you pay less on your energy
bill. Draws less than 1 Watt in stand by.

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January 15, 2010 60PS11 Plasma

600Hz Sub Field Driving


(600 Hz Sub Field Driving)

600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process
(vs. Comp. 8 sub-field/frame)

No smeared images during fast motion scenes

Original Image

10 Sub Fields Per Frame

Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.

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January 15, 2010 60PS11 Plasma

60PS11 Remote Control

BOTTOM PORTION

p/n MKJ42519617
TOP PORTION

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January 15, 2010 60PS11 Plasma

60PS11 Rear and Side Input Jacks

Music and
Photos
Software
Upgrades

USB

HDMI 3
SIDE
INPUTS

AC In

REAR
INPUTS

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January 15, 2010 60PS11 Plasma

60PS11 Dimensions

Power:

There must be at least 4 inches of Clearance on all sides

380W (Typical)
0.19W (Stand-By)

3-1/2"
88.9mm

57-13/16"
1468.1mm

8-13/16"
224.2mm

17-1/8"
435mm

40-1/2"
1028.7mm

23-5/8"
600mm

15-3/4"
400mm

15-3/4"
400mm

37-3/8"
949.96mm

Model No.
Serial No.
Label

Remove 7 screws
to remove stand
for wall mount
3-1/8"
78.74mm

Weight:

117 lbs with Stand


104 lbs without Stand

60-11/16"
780mm

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15-5/8"
396.24mm

DISASSEMBLY SECTION

This section of the manual will discuss Disassembly, Layout and Circuit
Board Identification, of the 60PS11 Advanced Single Scan Plasma Display Panel.
Upon completion of this section the Technician will have a better
understanding of the disassembly procedures, the layout of the printed
circuit boards and be able to identify each board.
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January 15, 2010 60PS11 Plasma

Removing the Back Cover

To remove the back cover, remove the 36 screws


Indicated by the arrows.
(The Stand does not need to be removed).
PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH
Of the screws when replacing the back cover.
Improper type can damage the front.

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January 15, 2010 60PS11 Plasma

Circuit Board Layout


Y-Drive
Upper

Panel Voltage Label


Panel ID Label

FPC

Power Supply
(SMPS)

FPC

FPC

FPC

Z-SUS
Y-SUS

FPC

FPC

Z-SUB
FPC

Side Input
(part of main)

Control

FPC

TCP
Heat Sink

Y-Drive
Lower
IR/LED
Board

FPC

Main Board
AC In

Left X

Keyboard

Center X

Invisible Speakers

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Right X
Conductive Tape Under Main Board

January 15, 2010 60PS11 Plasma

Disassembly Procedure for Circuit Board Removal


Notes: 1) All Plugs listed are from left to right Pin 1,2, 3, ETC.
2) Remember to be cautious of ESD as some semiconductors are CMOS and prone to static failure.

Switch Mode Power Supply Board Removal


Disconnect the following connectors: P811, P812, P813, P814 and SC101.
Remove the 10 screws holding the SMPS in place.
Remove the board.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Also, re-confirm VSC, -Vy and Z-Bias as well.
Y-SUS Board Removal

After replacing the Y-SUS,


check the connectors for solder break.

Disconnect the following connectors: P302, P307 and Ribbon Cable P101.
Remove the 9 screws holding the Y-SUS in place.
Remove the Y-SUS by lifting slightly to clear standoff and slid it to the right, disconnecting the Y-Drives.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm VSC, -Vy and Z-bias as well.
Y-Drive Boards Removal

After replacing the Y-Drive,


check the connectors for solder breaks.

Disconnect the following Flexible Ribbon Connectors P101~P104 and/or P201~P204:


Disconnect the following Connectors P114~P116 and/or P214~P216.
Remove the 4 screws holding either of the Y-Drive boards in place.
Remove the Y-Drive by lifting slightly and sliding the board to the left unseating
the connectors from the Y-SUS Board.

Board Standoff

Collar

Note: Y, Z-SUS and Y-Drive boards are mounted on board stand-offs that have a small collar.
The board must be lifted slightly to clear these collars. Behind each board are Chocolate (dense rubber
like material) that act as shock absorbers. They may make the board stick when removing.

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January 15, 2010 60PS11 Plasma

Disassembly Procedure for Circuit Board Removal (2)


Z-SUS Board Removal
Disconnect the following connectors: P100, P101.
Disconnect the following connectors: P102, P104 and P105. These are the FPC cables. Pull the locking
caps to the right. Pull out carefully the Flexible Printed Circuits (FPCs) and slide them out to the right.
Remove the 6 screws holding the Z-SUS in place and the one holding the Z-SUB in place.
Lift the Z-SUS up and remove the board. Remove the Z-SUB by pulling it off the Z-SUS.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm VS, -Vy and Z-bias as well.
Main Board Removal
Disconnect the following connectors: P1001, P1003, P1005 and P1006.
Remove the 2screws holding on the decorative plastic piece on the right side.
Remove the 4 screws holding the Main board in place and Remove the board.
Control Board Removal
Disconnect the following connectors: P5 LVDS, P2, P200, P1 Ribbon, P101, P102 and P104 Ribbon by
lifting up the locking tab. Remove the 4 screws holding the Control board in place Remove the board.
Front Key and LED Board Removal
KEY BOARD:
Remove the 2 screws holding the Key board in place. Remove the board by lifting the board upward.
Disconnect P101.
FRONT IR/INTELLIGENT SENSOR and POWER BUTTON:
Remove the 2 screws.
Note; The left hand screw has a Grounding Strap. Remove the Board.
Disconnect P101 and P102.

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January 15, 2010 60PS11 Plasma

X Drive Circuit Board Removal Continued

Press
Inward

Make sure AC is removed and Lay the Television down carefully on


a padded surface.
Remove the Back Cover and the Stand.
Carefully remove the LVDS Cable P5 from the Control Board by
pressing the Locking Tabs together and pull the connector straight
back using a rocking motion to remove the cable.
(This prevents possible damage). See illustration to the right.

Press
Inward

LVDS Cable
Connector

(A) Remove the Stand (7 Screws removed during back removal).


(B) Remove the Stand Metal Support Bracket (8 Screws) 2 Plastic tap
thread and 6 Metal thread. Disconnect the Ground strap and remove
the AC connector to the SMPS. Place bracket off the side.
Press
(C) Remove connector P1001 to Front IR board and P1005 to the Speakers.
Inward
(D) Remove the 4 screws from the Main Board Mounting Bracket.
Carefully reposition the Main Board and Mounting Bracket up and off to the right side.
(E) Remove the Vertical support Braces marked E. Note: There is a Left and a Right brace. (4 Screws per/bracket)
2 Plastic tap thread and 2 Metal thread.
(F) Remove the 15 screws holding the Heat Sink. (Warning: Never run the set with this heat sink removed). Note: There is
a large piece of conductive tape over the right side of the Right X Board that must be removed. Also, note that there is
a long piece of Chocolate heat transfer material attached all the way across the underside of the heat sink.
X-DRIVE LEFT, CENTER AND RIGHT REMOVAL:
Disconnect all TCP ribbon cables from the defective X-Drive board and all other Ribbon cables going to the board.
Remove the 6 screws in either the Left or Right X-Drive board or the 5 screws holding the Center X-Drive in place.
Remove the board. Reassemble in reverse order. Recheck Va / Vs / VScan / -VY / Z-Drive.
Note: There are piece of Chocolate heat transfer material under each TCP. Do not tear or remove.

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January 15, 2010 60PS11 Plasma

Getting to the X Circuit Boards

A
LVDS Cable
Stand should have already be removed

Warning:
Never run the TV with the
TCP Heat Sink removed

E
Left

E
Right

F
Heat Sink
Ground
Strap

C
D

A
Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.

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January 15, 2010 60PS11 Plasma

Left and Right X Drive Removal


After removing the back cover, the Main board is lifted out of the way, the 15 screws removed from heat sink
covering the TCPs and connectors to the TCPs are removed, the X-Drive boards can be removed.
There may be tape on these connectors.

Disconnect connector P121

P110
P210
P310
Are all the
same

P121

Remove tape (if present) and Gently pry the


locking mechanism upward and remove the ribbon
cable from the connector.

Va from the Y-SUS to Left X Only


Carefully lift the TCP ribbon up and off.
It may stick, be careful not to crack TCP.
(See next page for precautions)

Removing Connectors to the TCPs.


Gently lift the locking mechanism
upward on all TCP connectors
Left X: P101~108
Center X: P201~207
Cushion (Chocolate)
Right X: P301~308
TCP

Flexible ribbon cable connector

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January 15, 2010 60PS11 Plasma

TCP (Tape Carrier Package) Generic Removal Precautions


TCP Connector Removal

Lift up the lock as shown by arrows.


(The Lock can be easily broken.
It needs to be handled carefully.)

The TCP has two small tab on each


side which have to be lifted up
slightly to pull the connector out.
Note: TCP is usually stuck down
to the Chocolate heat transfer
material, be Very careful when
lifting up on the TCP ribbon cable.

Pull TCP apart as shown by arrow.


(TCP Film can be easily damaged.
Handle with care.)

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January 15, 2010 60PS11 Plasma

Left and Right X Drive Removal


Remove the 6 screws for either left or right board or 5for the center. 13 total for all three.
(The screws between the Left and Center or the Center and Right boards, secures both boards)

The Left X Board drives the right side of the screen vertical electrodes
The Center X Board drives the Center of the screen vertical electrodes
The Right X Board drives the left side of the screen vertical electrodes

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January 15, 2010 60PS11 Plasma

CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT


ALIGNMENT SECTION

60PS11 Plasma Display


This Section will cover Circuit Operation, Troubleshooting and
Alignment of the Power Supply, Y-SUS Board, Y-Drive Boards, Z-SUS
Board, Control Board, Main Board and the X Drive Boards.

At the end of this Section the technician should understand the operation
of each circuit board and how to adjust the controls. The technician
should be able with confidence to troubleshoot a circuit board failure,
replace the defective circuit and perform all necessary adjustments.
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January 15, 2010 60PS11 Plasma

60PS11 SIGNAL and VOLTAGE DISTRIBUTION DIAGRAM


Y Drive
Upper

FPCs

5VFG (5V) measured


from Floating Ground

Step 1: RL ON (5V, 12V, 5V Det) Out


Step 2: M5 On (M5V) Out
Step 3: VS On (Va, Vs and 17V) Out

VSC (140V) measured


from Floating Ground

SMPS OUTPUT VOLTAGES IN STBY


STB +5V (also AC Det)

P101
Floating
Ground
P102

P103

P104

5VFG

P304 Data, Clock (i2c)


Vscan, FG5V

P116
P111
Drive Data
Clock (i2c)

P211
P201

P306 Data, Clock (i2c)


Floating Gnd (FG)

P103
P115

n/c

Note:
Va not used
by Y-SUS

Note: Va not used

M5V

M5V, Vs, Va

P813

SK101

P814

SMPS
Relay On +5V, 12V
Turn On
M5 On M5V
Commands VS On 17V, Va, Vs

AC
Input
Filter

P101
P305 Data, Clock (i2c)
Floating Gnd (FG)
Floating
Ground

Logic Signals

M5V 17V

Y Drive
Lower

17V
Note: 17V not used
by Control

Va

P200

P2

CONTROL
Board

P101 3.3V
P102

RGB Logic
Signals

Display Panel Horizontal


Electrodes Reset, Sustain

P5

P104

RGB Logic
Signals
3.3V

3.3V
P220

P311 P331
X-Board-Center

LVDS
P1006

MAIN Board

5V STBY
IR, Power LED,
Intelligent Sensor

P204

P205

3.3V
Key Board
Pull Up
Control Keys
Power Button

X-Board-Right

Va

Va
P203

P310
P320

FPCs

Speakers

P1003

P1101
P1005

P221

P206

P301

P302

Display Panel Vertical Address (Color Address)

28

P105

Video

Set in
Stand By:
STB +5
AC Voltage
Det

3.3V

P232 P211

P106

Display Enable

P210
P110
P120

P121

X-Board-Left

P202

P102

P103

17V

Display Enable
LVDS

P307

P201

Z SUS
Board
P100

P1

P308 Floating Gnd (FG)

P216

P104

Z Drive Control Signals


P303 Data, Clock (i2c)
Vscan, FG5V

P215

FPCs

P101

5VFG

P214

P203

SMPS
Board

M5V, Vs, Va

Y-SUS Board

P202

P204

P811

P812

P301 Floating Gnd


(FG)

P114
P101

n/c
FPCs

P302

SMPS OUTPUT VOLTAGES IN RUN


STB5V, +5V, 17V, 12V to Main Board
Vs, Va and M5V to Y-SUS, Z-SUS Board
M5V to Control Board

Display Panel
Horizontal
Electrodes
Sustain

P303

P304

P305

P306

Panel Label Explanation


(9)
(1)

(10)

(8)

(2)

(11)

(3)
(4)
(5)
(6)

(12)
(13)
(14)
(15)

(7)

(1) Panel Model Name


(2) Bar Code
(3) Manufacture No.
(4) Adjusting Voltage DC, Va, Vs
(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb)
(6) Trade name of LG Electronics
(7) Manufactured date (Year & Month)
(8) Warning

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(9) TUV Approval Mark


(10) UL Approval Mark
(11) UL Approval No.
(12) Panel Model Name
(13) Max. Watt (Full White)
(14) Max. Volts
(15) Max. Amps

January 15, 2010 60PS11 Plasma

Adjustment Notice

All adjustments (DC or Waveform) are adjusted in WHITE WASH.


Customers Menu, Select Options, select ISM select WHITE WASH.

It is critical that the DC Voltage adjustments be checked when;


1)
SMPS, Y-SUS or Z-SUS board is replaced.
2)
Panel is replaced, Check Va/Vs since the SMPS does not come with new panel
3)
A Picture issue is encountered
4)
As a general rule of thumb when ever the back is removed
ADJUSTMENT ORDER IMPORTANT
DC VOLTAGE ADJUSTMENTS
1) POWER SUPPLY: Va Vs (Always do first)
2) Y-SUS: Adjust Vy, Vscan,
3) Z-SUS: Adjust Z-Bias (VZB)
WAVEFORM ADJUSTMENTS
1) Y-SUS: Set-Up, Set-Down

The Waveform adjustment is only necessary


1) When the Y-SUS board is replaced
2) When a Mal-Discharge problem is encountered
3) When an abnormal picture issues is encountered

Remember, the Voltage Label MUST be followed,


it is specific to the panels needs.
Manufacturer
Bar Code

Set-Up

-VY

Vscan

Ve

Z_BIAS

Panel
Rear View

All label references are from a specific panel.


They are not the same for every panel encountered.

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January 15, 2010 60PS11 Plasma

SWITCH MODE POWER SUPPLY SECTION


This Section of the Presentation will cover troubleshooting the Switch Mode Power Supply for
the Single Scan Plasma. Upon completion of the section the technician will have a
better understanding of the operation of the Power Supply Circuit and will be able to
locate voltage and test points needed for troubleshooting and alignments.

DC Voltages developed on the SMPS


Adjustments VA and VS.

Always refer to the Voltage Sticker located on the back of the panel, in the upper Left
Hand side for the correct voltage levels for the VA, VS, -VY, Vscan, and Z Bias as these
voltages will vary from Panel to Panel even in the same size category.
Set-Up and Ve are just for Label location identification and are not adjusted in this panel.

SMPS P/N EAY59547002


Check the silk screen label on the top center of the Power Supply board to identify the correct part
number. (It may vary in your specific model number).
On the following pages, we will examine the Operation of this Power Supply.

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January 15, 2010 60PS11 Plasma

Switch Mode Power Supply Overview


The Switch Mode Power Supply Board Outputs to the :

Y-SUS and
Z-SUS Boards

Main Board

Adjustments

VS

Drives the Display Panels Horizontal Electrodes.

VA

To Y-SUS, fused then to the X-Boards. (Not used by Z-SUS).


Primarily responsible for Display Panel Vertical Electrodes.

M5V

Used to develop Bias Voltages on the Y-SUS, X-SUS Boards.

STBY 5V

Microprocessor Circuits

17V

Audio B+ Supply

12V

Tuner B+ Circuits

5V

Signal Processing Circuits

There are 2 adjustments located on the Power Supply Board VA and VS. The
M5V is pre-adjusted and fixed. All adjustments are made with relation to Chassis
Ground. Use Full White Raster 100 IRE
VA

RV901

VS

RV951

32

January 15, 2010 60PS11 Plasma

Power Supply Board Layout

33

January 15, 2010 60PS11 Plasma

Power Supply Circuit Layout


Primary
Source

P812
To Y-SUS

P811
To Y-SUS

8Amp/250V
0V Stby
382V Run
Fuse F801

PFC
Circuit

VA Source
VS Source

VA VR951

17V Source
VS VR901

P813
To Control

Bridge
Rectifiers

IC701
Sub Micon

RL101

RL103

Main Fuse
F101

AC Input
SC 101

STBY 5V
5V, 12V
Source

P814
To MAIN

15Amp/250V

34

January 15, 2010 60PS11 Plasma

Power Supply Basic Operation


AC Voltage is supplied to the SMPS Board at Connector SC101 from the AC Input assembly. Standby 5V is developed from
160V source supply (which during run measures 380V measured from the primary fuse F801).
This supply is also used to generate all other voltages on the SMPS.
The STBY5V (standby) is B+ for the Controller (IC701) on the SMPS and output at P814 pins 11 and 23 then sent to the
Main board for Microprocessor (IC1) operation. AC Detection (AC Det) is generated on the SMPS, by rectifying a small
sample of the A/C Line at D102 and associated circuitry and routed to the Controller (IC701) where it outputs at P814 pin 18
and sent to P1006 pin 18 to the Main Board where it is sensed and monitored by the Main Microprocessor (IC1). The AC
Det in this set works differently than most. If AC Det is missing the Microprocessor will turn off the television in about 10
seconds after turn on. This will happen each time turn on is attempted.
When the Microprocessor (IC1) on the Main Board receives an ON Command from either the Power button or the
Remote IR Signal, it outputs a high called RL ON at Pin 19 of P814. This command causes the Relay Circuit to close
both Relays RL101 and RL102 bringing the PFC source up to full power by increasing the 160V standby to 380V run
which can be read measuring voltage at Fuse F801 from Hot Ground. At this time the run voltages 12V, and +5V
sources become active and are sent to the Main Board via P814 (12V at pins 5 and 6 and +5V at pins 9,10, and 12).
The 5V detect line from the SMPS Board to the Main Board can be measured at pin 17 of P814. It is not used.
The next step is for the Microprocessor (IC1) on the Main Board to output a high on M5V ON Line to the SMPS at P814 Pin
21 which is sensed by the Controller (IC701) turning on the M5V line and output at P811 pins 9 and 10 to the Z-SUS P101
pins 9 and 10 and P812 pins 9 and 10 and Y-SUS boards P302 pins 9 and 10. It is also sent out P813 pins 1~4 to the
Control board P200 pins 1~4.
Full Power occurs when the Microprocessor (IC1) on the Main Board brings the VS-ON line high at Pin 20 of P814 of the
SMPS Board. VS-ON is routed to the Controller (IC701) which turns on the 17V Audio, VA, and the VS supplies. VA and
VS output at P811 to the Z-SUS board and P812 to the Y-SUS board. (VA pins 6 and 7 and VS pins 1 and 2). The 17V
Audio supply outputs to the Main board at P814 pins 1 and 2 and used for Audio processing and amplification.
AUTO GND Pin 22 of P814: This pin is grounded on the Main board. When it is grounded, the Controller IC701 works in
the normal mode, meaning it turns on the power supply via commands sent from the Main board. When this pin is floated
(opened), it pulls up and turns the Controller IC701 on in the Auto mode. In this state, the Controller turns on the power
supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect.

35

January 15, 2010 60PS11 Plasma

60PS11 POWER SUPPLY START UP SEQUENCE


In Stand-By Primary side is 4.57V
In Run (Relay On) Primary side is 391V

POWER SUPPLY
(SMPS)
AC In

9
Vs
Reg

5V/12V
Regulators
Stand
By 5V Reg

AC
Det.

Stand By
5V

5V Det.

7
Not
Used

14

17V
Reg

5V 12V

Va
Reg

16

16

Vs
15

Va
15

17V

Relay
On

10

M5V
Reg

M5V
On

Vs
On

14

14

Va

Vs

M5V

Va

Vs M5V

15

16

10

15

16

Y-SUS PWB
Va
15

AC Det.
If missing,
set turns
off within
10 sec.

5V MST
Switch
Q303
Other

12V Video
+5V HDMI EDID
And other input circuits
Power
Switch

At point 4 TV is in
Stand-By state. It is
Energy Star Compliant.
Less than 1 Watt

Circuits
3.3V Reg
IC301
Reset
Q302

3.3VST

2
4

MAIN
PWB

3.3V
11

Power On

36

11

13

17V

Y DRIVE Upper
12
13

13
15

X PWB
Left

STBY 5V

14

Control PWB

Y DRIVE Lower

6
5V
Relay
Mnt
On
Microprocessor
IC1

10

17V

11

5V
Floating
Gnd

17V Audio
5V Mnt

12

10

Z-SUS PWB

17V

5VFG

M5V

2
5

15

Front IR
Board

X PWB
Center
Remote
Or Key

15

X PWB
Right

Power Supply Va and Vs Adjustments


Important: Use the Panel Label
Not this book for all voltage adjustments.
Use Full White Raster White Wash
Va TP
P811
Pin 6 or 7

Example
Voltage Label

VA
Voltage

VS
Voltage

Vs TP
P811
Pin 1 or 2

Vs Adjust:
Place voltmeter on pin 1 or 2
of P811 or P812. Adjust
VR951 until the reading
matches your label.
Va Adjust:
Place voltmeter on pin 6 or 7
of P811 or P812. Adjust
VR901 until the reading
matches your label.

37

January 15, 2010 60PS11 Plasma

60PS11 SMPS STATIC TEST UNDER LOAD


Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs
turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load. If
this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK.
Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk
screen on the SMPS and place each supply voltage under the appropriate load.

100W

100W

4 or 5 or 8

P811 or P812
Check Pins 6 or 7
for Va voltage

Gnd
P812

Vs

Pins 1 or 2
P811 or P812
Check Pins 1 or 2
for Vs voltage

PFC
Circuit

Hot Ground:
Represents a Shock
Hazard

P812
10) M5V
9) M5V
8) Gnd
7) VA
6) VA
5) Gnd
4) Gnd
3) n/c
2) VS
1) VS

VR951
VS Adj

IC804

IC604

Not Hot
or Cold

F101 (AC)
15A/250V

F801
8A/250V
391V Run
4.57V STBY

IC503

P811
1) VS
2) VS
3) n/c
4) Gnd
5) Gnd
6) VA
7) VA
8) Gnd
9) M5V
10) M5V

P811

P813

P813
Check Pins 1~4
For M5V

VR901
VA Adj

P814
IC701

RL101RL102
N

CN701
n/c

SC101

Any time AC is applied to the SMPS, STBY 5V and AC DET should


be present.
If AC Det is missing, the TV will come on, but after 10 seconds the
television will shut off. This will happen each time the TV is turned
on.

Note:
Always test the SMPS under a load using the 2 light bulbs.
Abnormal operational conditions may result if not loaded.

38

P814
Check Pins 11 or 23 for 5V
SBY

Check Pins 1 or 2 for


17V

Check Pin 18 for


AC Det (5V)

Check Pins 5 or 6 for


12V

Check Pin 9,10,12 for


(+5V)

Power Supply Static Test (Forcing on the SMPS in stages)


WARNING: Remove AC when adding
or removing any plug or resistor.
P811 and P812 disconnected from the Y-SUS and Z-SUS boards.
P813 disconnected from the Control board.
P1006 disconnected from the Main board.
Use the holes in the connector P1006 side to insert the resistor or jumper leads.

(A) Ground the Auto Ground (Pin 22) on P814.


(B) When AC is applied, Check P814 AC_Det (Pin 18) for 5V and Stand-By
5V (Pins 11 and 23) for 5V.
(C) 100 watt resistor added from STBY 5V (Pins 12 or 23)
(Note pins 9-10 or 12 are not on yet).
to RL_ON (Pin 19) closes relays RL101 and RL103 turning on
the 5V and 12V Supplies.
(D) 100 watt resistor added from 5V (Pins 9 ~ 12) to M5 ON (Pin 21)
turns on the M5V (P811 or P812 pins 9, 10) and (P813 Pins 1~4) lines.
(E) 100 watt resistor added from STBY 5V (Pins 9~12) to VS ON
(Pin 20) brings the;
17V (P814 pins 1 and 2) lines high.
VA (P811/P812 Pins 6 and 7 Va) lines high.
VS (P811/P812 pins 1 and 2 Vs) lines high.

39

January 15, 2010 60PS11 Plasma

SMPS Connector P814 Identification, Voltages and Diode Check


P814 CONNECTOR SMPS" to Main" P1006
Pin

Label

STBY

Run

Diode Mode

Pin

Label

STBY

Run

Diode Mode

17V

0V

17V

2.2V

17V

0V

17V

2.2V

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

12V

0V

12V

1.89V

12V

0V

12V

Open

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

5V

5V

5V

1.99V

10

5V

5V

5V

1.99V

11

Stby 5V

5V

5V

2.17V

12

5V

5V

5V

1.99V

13

Gnd

Gnd

Gnd

Gnd

14

Gnd

Gnd

Gnd

Gnd

15

Gnd

Gnd

Gnd

Gnd

16

Gnd

Gnd

Gnd

Not Used

17

5V Det

.15V

5V

1.09V

18

AC Det

5V

5V

2.75V

19

RL On

0V

3.73V

Open

20

VS On

0V

3.2V

Open

21

M5 ON

0V

3.24V

Open

22

Auto Gnd

Gnd

Gnd

2.78V

23

Stby 5V

5V

5V

2.17V

24

0V

0V

Open

Key On

aNote: The 17V turns on when the VS On command arrives.


cNote: The Key On line is not used in this model.
bNote: The 5V/12V turns on when the RL-On command arrives.

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

40

January 15, 2010 60PS11 Plasma

SMPS Connector SC101 and P811 Identification, Voltages and Diode Check
SC101 AC INPUT
Connector

Pin Number

SC101

1 and 3

Standby

Run

120VAC

120VAC

P812 CONNECTOR "Power Supply to Y-SUS P302

Diode Mode
Open

P811 CONNECTOR "Power Supply to Z-SUS P101

Pin

Label

STBY

Run

Diode
Mode

Pin

Label

STBY

Run

Diode
Mode

1, 2

*Vs

0V

*196V

Open

1, 2

*Vs

0V

*196V

Open

n/c

n/c

n/c

n/c

n/c

n/c

n/c

n/c

4, 5

Gnd

0V

0V

Gnd

4, 5

Gnd

0V

0V

Gnd

6, 7

*Va

0V

*68V

Open

6, 7

*Va

0V

*68V

Open

Gnd

0V

0V

Gnd

Gnd

0V

0V

Gnd

0V

5V

0.093V

9, 10

0V

5V

0.093V

9, 10

M5V

M5V

* Note: This voltage will vary in accordance with Panel Label


a

Note: The Diode Mode test on the M5V line reads almost a short. This is normal.

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

41

January 15, 2010 60PS11 Plasma

SMPS P813 Connector Pin ID and Voltages and Diode Test


Voltage and Diode Mode Measurements for the Control Board.
Note: There are no voltages in Stand-By mode.

P813 Power Supply Board to P200 CONNECTOR "Control Board

Pin

Label

Run

Diode Mode

M5V

5V

0.093V

M5V

5V

0.093V

M5V

5V

0.093V

M5V

5V

0.093V

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

P813
1

Diode Mode Readings taken with all connectors Disconnected, (Unless Specified). Black lead on Gnd. DVM in Diode Mode.

42

January 15, 2010 60PS11 Plasma

Y-SUS BOARD SECTION

(Overview)

Y-SUS Board develops the V-Scan drive signal to the Y-Drive boards.
This Section of the Presentation will cover alignment and troubleshooting the Y-SUS Board
for the Single Scan Plasma. Upon completion of the Section the technician will have a better
understanding of the operation of the circuit and will be able to locate voltage and
Diode mode test points needed for troubleshooting and alignments.

Adjustments
DC Voltage and Waveform Checks
Diode Mode Measurements

Operating Voltages
SMPS Supplied

VA
VS
M5V

VA supplies the Panel Vertical Electrodes (Routed to the Left X-Board)


VS Supplies the Panel Horizontal Electrodes.
M5V Supplies Bias to Y-SUS.

Y-SUS Developed

-VY VR902
VSC VR901
V SET UP VR602
V SET DN VR601
17V

-VY Sets the Negative excursion of the Y-SUS Drive Waveform


VSC Set the amplitude of the complex waveform.
SET UP sets amplitude of the Top Ramp of the Drive Waveform
SET DOWN sets the Pitch of the Bottom Ramp of the Drive Waveform
To the Control Board then routed to the Z-SUS board

Floating Ground

FG 5V
FG 15V

Used on the Y-Drive boards (Measured from Floating Gnd)


Used in the Development of the V-Scan signal (Measured from Floating Gnd)

43

January 15, 2010 60PS11 Plasma

Y-SUS Block Diagram


Distributes Vs and M5V

Power Supply Board - SMPS

Distributes M5V

Simplified Block Diagram of


Y-Sustain Board

Distributes
VA

Left X Board

Distributes Vs, Va and M5V


Distributes
17V

Receive M5V, Va, Vs


from SMPS

Distributes VA

Circuits generate
Y-Sustain Waveform

Z-SUS Board

Distributes 17V

Control Board

Generates Vsc and -Vy


from M5V by DC/DC Converters
Also controls Set Up/Down

FETs amplify Y-Sustain


Waveform

Generates Floating Ground


5V by DC/DC Converters

Logic signals needed to scan the panel

Y-Drive Boards
Receive Scan Waveform

Display Panel

Logic signals needed to generate drive waveform

44

January 15, 2010 60PS11 Plasma

Y-SUS Board Layout


All pins Floating Gnd
Pins 1 ~4 Logic (Drive)
Signals to the Y-Drive
Upper board

P30
1

P3
06

Pins 5~6 and 9~12 Logic


(Drive) Signals to the
Y-Drive Upper board
Floating Gnd 5V
Pins 7 and 8

FS302 (Vs)
6.3A 250V

c
P304

VS, VA and M5V


Input from the SMPS
P302
FS301 (VS)
10A/125V
FS303
(M5V)
10A/125V

P301 and P308 All Pins


are Floating Ground

Pins 1
and 2

17V (pins 1~4)


to Control for Z-SUS
Pins 11
and 12

SET UP
VR 602

P303

c
P305

-VY TP

FS901
(M5V)
5A/125V

-VY ADJ
VR902
P101

P3
08

Pins 11 ~12 Logic


(Drive) Signals to the
Y-Drive Lower board

Logic Signals from


the Control Board

V SET DN
VR 601

Floating Gnd 5V
Pins 5 and 6
Pins 1 ~4, 7~8 Logic
(Drive) Signals to the
Y-Drive Lower board

Ribbon

VSC TP
R306

VSC ADJ
VR901

All pins Floating Gnd

45

P307

Va to Left
X Board
Pins 5~7

January 15, 2010 60PS11 Plasma

Y-SUS Board
Component
Layout Drawing

46

January 15, 2010 60PS11 Plasma

VSC and -VY Adjustments

CAUTION: Use the actual panel label and not the book for exact voltage settings.

These are DC level Voltage Adjustments

Set should run for 15 minutes, this is the Heat Run mode.
Set screen to White Wash.
1) Adjust Vy to Panel Label voltage (+/- 1V)
2) Adjust VSC to Panel Label voltage (+/- 1V)
-Vy

VSC

Bottom of board Just below Heat Sinks

P308

Voltage Reads
Positive

+
VR902
-Vy Adj

-Vy TP Marked

VR901
VSC Adj

VSC TP
R306

47

January 15, 2010 60PS11 Plasma

Y-Drive Signal Overview


Y-Drive Lower Test Point
(Center Left of Board)

Overall signal observed 4mS/div

P202

P215

d Highlighted signal from waveform


above observed 400uS/div

60~106 VRms

NOTE: The Waveform Test


Points are fragile. If by
accident the land is torn and
the run lifted, make sure
there are no lines left to right
in the screen picture.

514V p/p

e Highlighted signal from


waveforms above observed
100uS/div

There are several other test points on either the


Upper or Lower Y-Drive boards that can be used.
Basically any output pin on any of the FPC
to the panel are OK to use.

100uS

48

January 15, 2010 60PS11 Plasma

Locking on to the Y-Drive Waveform Tip


Note, this TP (VS_DA) can be used as an
External Trigger for scope when locking onto
the Y-Drive (Scan) or the Z-Drive signal.

49

January 15, 2010 60PS11 Plasma

Observing (Capturing) the Y-Drive Signal for Set Up Adjustment


Set must be in WHITE WASH
All other DC Voltage adjustments should have already been made.

Fig 1:
As an example of how to lock in to the Y-Drive Waveform.
Fig 1 shows the signal locked in at 4ms per/div.
Note the 2 blanking sections.
The signal for SET-UP is outlined within the Waveform
Fig 2:
At 2mSec per/division, the waveform to use for
SET-UP Is now becoming clear.
Now, the two blanking signal are still present.

Outlined
Area

Blanking

Area to
be adjusted

FIG1
4mS

FIG2
2mS

Blanking

Fig 3:
At 100us per/div. the signal for SET-UP is now easier to
recognize. It is outlined within the Waveform.
Remember, this is the first large signal to the right of blanking.

Fig 4:
At 400uSec per/division, the adjustment for SET-UP
can be made.
It will make this adjustment easier if you use
the Expanded mode of your scope.

50

Area to
be adjusted

Area to
be adjusted

FIG3
100uS

Blanking

FIG4
40uS

January 15, 2010 60PS11 Plasma

Observing (Capturing) the Y-Drive Signal for Set Up Adjustment


Set must be in WHITE WASH
All other DC Voltage adjustments should have already been made.

Fig 1:
As an example of how to lock in to the Y-Drive Waveform.
Fig 1 shows the signal locked in at 4ms per/div.
Note the 2 blanking sections.
The signal for SET-DN is outlined within the Waveform
Fig 2:
At 2mSec per/division, the waveform to use for
SET-DN is now becoming clear.
Now the two blanking signals are still present.

Blanking

Area to
be adjusted

FIG2
2mS

Blanking

Fig 3:
At 100us per/div. the signal for SET-DN is now easier to
recognize. It is outlined within the Waveform.
Remember, this is the first large signal to the right of blanking.

Fig 4:
At 20uSec per/division, the adjustment for
SET-DN can be made.
It will make this adjustment easier if you use the
Expanded mode of your scope.

Outlined
Area

FIG1
4mS

Area to
be adjusted

51

Area to
be adjusted

FIG3
100uS
Blanking

FIG4
20uS

January 15, 2010 60PS11 Plasma

Set Up and Set Down Adjustments

Set must be in WHITE WASH


All other DC Voltage adjustments should have already been made.

Observe the Picture while making these adjustments. Normally, they do not have to be done.
P202

P215
VR602
A
Y-Drive Test Point
Lower Y-Drive

VR601
SET-UP ADJUST:
1) Adjust VR602 and set the (A) portion of the signal to
match the waveform above. (20uSec 10uSec)

SET-DN ADJUST:
2) Adjust VR601 and set the (B) time of the signal to match
the waveform above. (160uSec 5uSec)
ADJUSTMENT LOCATIONS:
Just right of the bottom left heat sink.

52

January 15, 2010 60PS11 Plasma

Set Up Adjustment Too High or Low


Set Up swing is Minimum 280V Max 335V

Panel Waveform Adjustment

100uSec
The center begins to wash out and arc due to SET UP

(SET UP) Too High


Full Counter Clock Wise

100uSec

Very little alteration to the picture, the wave form indicates a


distorted SET UP. The peek widens due to the SET UP
peeking too quickly.

Ramp (SET UP) Too Low


Full Clock Wise

53

January 15, 2010 60PS11 Plasma

Set Down Adjustment Too High or Low


Set Dn swing is Minimum 73uS Max 166uS+

Panel Waveform Adjustment

100uSec
Normal
169uSec
NOTE: If abnormal settings cause
shutdown, remove the LVDS from
Control board and make necessary
adjustments.
Then reconnect LVDS cable, select
White Wash and adjust correctly.

110V off
the Floor
Floor
(SET DN) Too High 166uSec
Full Clock Wise

All of the center washes out due to increased SET_DN time.

100uSec
Normal
169uSec

(SET DN) Too Low


Counter Clock Wise

The center begins to wash out and arc due to decreased SET DN time.

54

January 15, 2010 60PS11 Plasma

Y-SUS BOARD TROUBLESHOOTING

TIP: Use P304 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

Y-SUS Board develops the V-Scan drive


signal to the Y-Drive boards.

P/N EBR55492901

This Section of the Presentation will cover


troubleshooting the Y-SUS Board for the
Single Scan Plasma.

C326

55

January 15, 2010 60PS11 Plasma

Y-SUS Board P306 to P115 Connector Explained


To Upper Y-Drive

P306 Pins 1~4

TIP: Use P304 pins 1 or 2 or the Right Side of C326 to test


for Y Scan signal if the Y-Drive boards are removed

P306

P115

(4mSec per/div)
The signal for all 4 pins looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.

c
Y-Drive Upper
Board

Y-SUS Board

5~12) FGnd
4) Data Odd Out
3) Data Even Out
2) OC2 T Even
1) STB T

Pin 4 (412V p/p) with Y-Drives


Pin 3 (400V p/p) with Y-Drives
Pin 2 (394V p/p) with Y-Drives
Pin 1 (416V p/p) with Y-Drives

P306 Pins 1~4 are Logic (Drive) Signals to the Y-Drive Upper.
P304 carries the Y-Drive signals to the upper via pins 1 and 2.

56

January 15, 2010 60PS11 Plasma

Y-SUS P306 Connector Diode Mode Testing

P306

P115

Checking the Y-SUS Board P306


NOTE: Disconnected from the Y-DRIVE boards
Readings from Floating Ground (Pins 5~12)
RED LEAD
Blk Lead FG
Floating Gnd 5~12) FGnd
4) Data Odd Out
3) Data Even Out
2) OC2 T Even
1) STB T

0V
1.58V
1.58V
1.58V
1.58V

BLACK LEAD
Red Lead FG
0V
0.679V
0.679V
0.679V
0.679V

c
Meter in the Diode Mode

Y-Drive Board should be


disconnected for this test.

57

January 15, 2010 60PS11 Plasma

Y-SUS Board P304 to P116 Connector Explained


To Upper Y-Drive

Pins 1 and 2 Y-Scan signal

TIP: Use P304 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

VScan
140V
(from FG)

P116

P304

Y-Drive Upper
Board

Y-SUS Board

392V p/p (No Y-Drives)

396V p/p (With Y-Drives)


12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
4) FGnd
3) n/c
2) VScan
1) VScan

58

FG5V measured from


Pins 7 or 8 to
Floating Gnd
Use any pin on P301
P304 Pins 5~6 and 9~12 are
Logic (Drive) Signals to the
Y-Drive upper.
Pins 1~2 carries the Y-Drive
signals to the upper Y-Drive.

January 15, 2010 60PS11 Plasma

Y-SUS P304 Diode Mode Testing


Y-Drive Upper
P116

Y-SUS Board
P304

Checking the Y-SUS Board P304


NOTE: Disconnected from the Y-DRIVE boards
Readings from Floating Ground (Pin 4)
RED LEAD
Blk Lead FG

Y-Drive Board should be


disconnected for this test.

12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
Floating Gnd 4) FGnd
3) n/c
2) VScan
1) VScan

1.59V
1.59V
1.60V
1.59V
1.69V
1.69V
Open
Open
0V
Open
Open
Open

BLACK LEAD
Red Lead FG
0.68V
0.68V
0.66V
0.68V
0.534V
0.534V
Open
Open
0V
Open
Open
Open

Meter in the Diode Mode

59

January 15, 2010 60PS11 Plasma

Y-SUS Board P305 to P215 Connector Explained


To Lower Y-Drive

P305 Pins 11~12

TIP: Use P303 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

P305

P215

(4mSec per/div)
The signal for both pins looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.

c
Y-Drive Upper
Board

12) OC2 B Even


11) STB B
1~10) FGnd

Pin 12 (392V p/p) with Y-Drives


Pin 11 (402V p/p) with Y-Drives

Y-SUS Board
P305 Pins 11~12 are Logic (Drive) Signals to the Y-Drive Upper.
P303 Pins 11 and 12 carries the Y-Drive signals to the lower.

60

January 15, 2010 60PS11 Plasma

Y-SUS P305 Connector Diode Mode Testing


Y-Drive Lower

Y-SUS Board

P215

P305

Checking the Y-SUS Board P305


NOTE: Disconnected from the Y-DRIVE boards
Readings from Floating Ground (Pins 1~10)
RED LEAD
Blk Lead FG
12) OC2 B Even
11) STB B
Floating Gnd 1~10) FGnd

1.6V
1.6V
0V

BLACK LEAD
Red Lead FG
0.68V
0.68V
0V

c
Meter in the Diode Mode
Y-Drive Board should be
disconnected for this test.

61

January 15, 2010 60PS11 Plasma

Y-SUS Board P303 to P214 Connector Explained


To Lower Y-Drive

Pins 1 and 2 Y-Scan signal

TIP: Use P303 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

P303

P214

VScan
140V
(from FG)

Y-Drive Lower

Y-SUS Board

392V p/p (No Y-Drives)


396V p/p (With Y-Drives)

12) VScan
11) VScan
10) n/c
9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd

62

All signals for pins 1~4 and 7~8 looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
They will read about 400V p/p.

FG5V measured from Pins 5 or 6 to


Floating Gnd
Use any pin on P308
P303 Pins 1~4 and 7~8 are
Logic (Drive) Signals to the
Y-Drive lower.
Pins 11~12 carries the Y-Drive
signals to the lower Y-Drive.

January 15, 2010 60PS11 Plasma

Y-SUS P303 Diode Mode Testing


Y-Drive Lower

Y-SUS Board

P214

P303

Checking the Y-SUS Board P303


NOTE: Disconnected from the Y-DRIVE boards
Readings from Floating Ground (Pin 9)
RED LEAD
Blk Lead FG

Y-Drive Board should be


disconnected for this test.

12) VScan
11) VScan
10) n/c
Floating Gnd 9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd

Open
Open
Open
0V
Open
Open
1.69V
1.69V
1.6V
1.59V
1.6V
1.6V

BLACK LEAD
Red Lead FG
Open
Open
Open
0V
Open
Open
0.53V
0.53V
0.68V
0.68V
0.68V
0.68V

Meter in the Diode Mode

63

January 15, 2010 60PS11 Plasma

Y-SUS Floating Ground (FG 15V) and (FG 5V) Checks


Voltage Measurements for the Y-SUS Board
FG 5V Test Point (Floating Ground 5V)
Leaves the Y-SUS board on P304 pins 7 and 8. and P303 pins 5 and 6.
Checked at Q909 or Anode D814
Standby: 0V

Floating Ground
checks must be
made from
Floating Ground.
Use any pin on
P301 or P216.

Run: 5V

T901

Location: Bottom Right

Diode Check: 1.69V

T902

FG 5V
Test Point
FG 15V
Test Point

Floating
Gnd
Q909
Q908
FG15V Test Point Floating Ground 15V
Checked at Q908 or Anode D913.
Standby: 0V

Floating
Gnd

Run: 15.2V Diode Check: 1.5V

64

January 15, 2010 60PS11 Plasma

Y-SUS 17V Generation Checks


Voltage Measurements for the Y-SUS Board
17V Test Point
Used in the Y-SUS for Waveform Creation and Leaves the
Y-SUS board on P101 pins 45~50 to the Control Board.
Checked at Cathode Side D909 and/or D910.
Standby: 0V

Run: 17V

Location: Bottom Right

Diode Check: 1.18V

17V
Test Point
Cathode Side
D909 and D910

T902

65

January 15, 2010 60PS11 Plasma

YSUS P302 to SMPS P812 Plug Information


Voltage and Diode Mode Measurement

P302

P302 CONNECTOR "Y-SUS" to "Power Supply" P812


Pin

Label

Run

Diode Mode

Vs

*196V

Open

Vs

*196V

Open

n/c

n/c

n/c

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Va

*68V

Open

Va

*68V

Open

Gnd

Gnd

Gnd

M5V

5V

1.29V

10

M5V

5V

1.29V

* Note: This voltage will vary in accordance with Panel Label


Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

66

January 15, 2010 60PS11 Plasma

Y-SUS P307 to X Drive P121 Plug Information


P307
Voltage and Diode Mode Measurements for the Y-SUS Board
P307 CONNECTOR "Y-SUS" to "X-Drive Left P121

Pin

Label

Run

Diode Mode

VA

*68V

Open

VA

*68V

Open

VA

*68V

Open

VA

*68V

Open

n/c

n/c

n/c

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

67

January 15, 2010 60PS11 Plasma

P101 Y-SUS to Control Board P1 Connector and M5V FS901 Information


Voltage Measurements
for the Y-SUS Board

Location: Right Lower


P101

Location

FS201
15V Pins 45 through 50

TIP: For Voltage readings,


Use the TP to the left of the connector

FS901
(M5V)
5A/125V

FS901 Diode Check


0.093V (In Circuit)
1.29V (No Connectors)

Location: Just Below Bottom


Right Heat Sink

FS901 Protects T902 for FG15V and FG5V Creation

68

January 15, 2010 60PS11 Plasma

Y-SUS P101 to Control P111 Plug Voltage Checks


There are No Stand By Voltages on this Connector

Y-SUS" P101 CONNECTOR to Control" P1


Label

Run

Diode

Label

Run

Diode

15V

17.8V

1.18V

26

DELTA_VY_ON_OFF

0.7V

Open

15V

17.8V

1.18V

27

GND

Gnd

Gnd

15V

17.8V

1.18V

28

DELTA_VY1

0.68V

Open

15V

17.8V

1.18V

29

GND

Gnd

Gnd

15V

17.8V

1.18V

30

SET_UP2

0V

Open

15V

17.8V

1.18V

31

GND

Gnd

Gnd

NC

NC

NC

32

SET_UP1

0.1V

Open

OC2_ODD

2.84V

Open

33

GND

Gnd

Gnd

GND

Gnd

Gnd

34

SET_DN2

4.9V

Open

10

OC1_ODD

1.87V

Open

35

GND

Gnd

Gnd

11

GND

Gnd

Gnd

36

SET_DN1

3.48V

Open

12

CLK

0.3V

Open

37

CTRL_OE

0V

Open

13

GND

Gnd

Gnd

38

GND

Gnd

Gnd

14

DATA_ODD

0V

Open

39

PASS_TOP

1.4V

Open

15

GND

Gnd

Gnd

40

GND

Gnd

Gnd

16

DATA_EVEN

0V

Open

41

DELTA_VY2

0.7V

Open

17

GND

Gnd

Gnd

42

GND

Gnd

Gnd

18

GND

Gnd

Gnd

43

ER_UP

0.2V

Open

19

STB

4.3V

Open

44

GND

Gnd

Gnd

20

GND

Gnd

Gnd

45

ER_DN

0.1V

Open

21

OC2_EVEN

2.8V

Open

46

GND

Gnd

Gnd

22

GND

Gnd

Gnd

47

SUS_UP

0.1~0.4V

Open

23

GND

Gnd

Gnd

48

GND

Gnd

Gnd

24

OC1_EVEN

1.85V

Open

49

SUS_DN

4V

Open

25

GND

Gnd

Gnd

50

GND

Gnd

Gnd

Pin

Pin

Diode Mode Readings


taken with all connectors
Disconnected.
DVM in Diode Mode.

69

January 15, 2010 60PS11 Plasma

Y-SUS How to Check the Output FETs (1 of 2)


Name is printed on the components. Readings In Circuit.
45F122
Q71~Q74
Q81~Q88
Blk

Reverse: 0.64V

Reverse: Open

Reverse: Open

Blk Red

Red

Red Blk

Shown: 0.69V

Shown: 0.5V

Shown: 0.46V

Reverse: 0.69V

Reverse: Open

Reverse: Open

Blk Red

Red Blk

Shown: 0.58V

Shown: 0.49V

Shown: 1.99V

Reverse: 1.77V

Reverse: Open

Reverse: Open

Red

RF2001
D41~D42
D71~D74
D81~D82
D708
Blk

Shown: 0.94V

Red

K3453
*Q48
Q49
Blk

Shown: 0.35V

Red

51N25
Q41~Q47
Blk

Shown: 0.6V

Blk Red

Red Blk

Shown: Shorted

Shown: 0.37V~0.38V

Shown: 0.37~0.38V

Reverse: Shorted

Reverse: Open

Reverse: Open

0.3 Ohms

Blk Red

70

Red Blk

January 15, 2010 60PS11 Plasma

Y-DRIVE BOARD SECTION (Y-Drive Explained)


TIP: See additional Service Tips beginning on page 131.

Y-Drive Boards work as a path supplying the


Sustain and Reset waveforms which are made
in the Y-Sustain board and sent to the Panel
through Scan Driver ICs.

P103

The Y-Drive Boards supply a waveform which


selects the horizontal electrodes sequentially
starting at the top and scanning down the
panel.

P114

* 60PS11 uses 12 Driver ICs on 2 Y-Drive Boards

P215
P202
Y-Drive (V Scan) WAVEFORM

Y-Drive WAVEFORM TEST POINTS

Warning: To facilitate scope attachment, solder


a small wire (Stand Off) at this point.
Be very careful, these are fragile and can peal off
with excessive heat or stress.

71

January 15, 2010 60PS11 Plasma

Upper Y-Drive Layout


TIP:
The connectors
to the Y-SUS
board are very
easy to
misalign and
plugged in.
The Connector
will be below
the actual pins
on the Y-SUS.
Look carefully.
See Tip section
page 133-134.

PANEL
SIDE

FG5V Volts from the


Y-SUS board and Logic
Signals from the Control
through the Y-SUS
board are supplied to
the Upper Y-Drive
Board on Connectors
P115 and P116.
The Y-Drive signal
(VSC) from the Y-SUS
board is supplied to the
Upper Y-Drive Board on
Connector P116.

Y-SUS
SIDE

72

January 15, 2010 60PS11 Plasma

Y-Drive Board P115 to P306 Connector Explained


Upper Y-Drive

P115 Pins 1~4

TIP: Use P304 pins 1 or 2 or the Right Side of C326 to test


for Y Scan signal if the Y-Drive boards are removed

P306

P115

(4mSec per/div)
The signal for all 4 pins looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.

c
Y-Drive Upper
Board

Y-SUS Board

5~12) FGnd
4) Data Odd Out
3) Data Even Out
2) OC2 T Even
1) STB T

Pin 4 (412V p/p) with Y-Drives


Pin 3 (400V p/p) with Y-Drives
Pin 2 (394V p/p) with Y-Drives
Pin 1 (416V p/p) with Y-Drives

P115 Pins 1~4 are Logic (Drive) Signals to the Y-Drive Upper.
P116 carries the Y-Drive signals to the upper via pins 1 and 2.

73

January 15, 2010 60PS11 Plasma

Y-Drive Upper P115 Connector Diode Mode Testing

P306

P115

Checking the Y-Drive Board P115


NOTE: Disconnected from the Y-SUS board
Readings from Floating Ground (Pins 5~12)
RED LEAD
Blk Lead FG
Floating Gnd 5~12) FGnd
4) Data Odd Out
3) Data Even Out
2) OC2 T Even
1) STB T

0V
Open
Open
Open
Open

BLACK LEAD
Red Lead FG
0V
0.849V
0.849V
0.87V
0.854V

c
Meter in the Diode Mode

Y-SUS Board should be


disconnected for this test.

74

January 15, 2010 60PS11 Plasma

Y-Drive Board P116 to P304 Connector Explained


Upper Y-Drive

Pins 1 and 2 Y-Scan signal

TIP: Use P304 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

VScan
140V
(from FG)

P116

392V p/p without Y-Drives

P304

Y-Drive Upper
Board

Y-SUS Board

396V p/p with Y-Drives

12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
4) FGnd
3) n/c
2) VScan
1) VScan

75

FG5V measured from


Pins 7 or 8 to
Floating Gnd
Use any pin on P114
P116 Pins 5~6 and 9~12 are
Logic (Drive) Signals to the
Y-Drive upper.
Pins 1~2 carries the Y-Drive
signals to the upper Y-Drive.

January 15, 2010 60PS11 Plasma

Y-Drive Upper P116 Diode Mode Testing


Y-Drive Upper
P116

Y-SUS Board
P304

Checking the Y-Drive Upper Board P116


NOTE: Disconnected from the Y-SUS board
Readings from Floating Ground (Pin 4)
RED LEAD
Blk Lead FG

Y-SUS Board should be


disconnected for this test.

12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
Floating Gnd 4) FGnd
3) n/c
2) VScan
1) VScan

Open
Open
Open
Open
Open
Open
1.81V
1.86V
0V
Open
Open
Open

BLACK LEAD
Red Lead FG
0.85V
0.87V
0.87V
0.87V
0.60V
0.60V
0.39V
0.40V
0V
Open
0.747V
0.747V

Meter in the Diode Mode

76

January 15, 2010 60PS11 Plasma

Lower Y-Drive Layout


TIP:
The connectors
to the Y-SUS
board are very
easy to
misalign and
plugged in.
The Connector
will be below
the actual pins
on the Y-SUS.
Look carefully.
See Tip section
page 133-134.

PANEL
SIDE

FG5V Volts from the


Y-SUS board and Logic
Signals from the Control
through the Y-SUS
board are supplied to
the Lower Y-Drive
Board on Connectors
P214 and P215.
The Y-Drive signal
(VSC) from the Y-SUS
board is supplied to the
Upper Y-Drive Board on
Connector P214.

Y-SUS
SIDE

77

January 15, 2010 60PS11 Plasma

Y-Drive Board P215 to P305 Connector Explained


To Lower Y-Drive

P215 Pins 11~12

TIP: Use P303 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

P305

P215

(4mSec per/div)
The signal for both pins looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.

c
Y-Drive Upper
Board

12) OC2 B Even


11) STB B
1~10) FGnd

Pin 12 (392V p/p) with Y-Drives


Pin 11 (402V p/p) with Y-Drives

Y-SUS Board
P215 Pins 11~12 are Logic (Drive) Signals to the Y-Drive Upper.
P214 Pins 11 and 12 carries the Y-Drive signals to the lower.

78

January 15, 2010 60PS11 Plasma

Y-Drive Lower P215 Connector Diode Mode Testing


Y-Drive Lower

Y-SUS Board

P215

P305

Checking the Y-Drive Lower Board P215


NOTE: Disconnected from the Y-DRIVE boards
Readings from Floating Ground (Pins 1~10)
RED LEAD
Blk Lead FG
12) OC2 B Even
11) STB B
Floating Gnd 1~10) FGnd

Open
Open
0V

BLACK LEAD
Red Lead FG
0. 875V
0.857V
0V

c
Meter in the Diode Mode
Y-SUS Board should be
disconnected for this test.

79

January 15, 2010 60PS11 Plasma

Y-Drive Board P214 to P303 Connector Explained


Lower Y-Drive

Pins 1 and 2 Y-Scan signal

TIP: Use P303 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

P303

P214

VScan
140V
(from FG)

396V p/p with Y-Drives


392V p/p without Y-Drives

Y-Drive Lower

Y-SUS Board

12) VScan
11) VScan
10) n/c
9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd

80

All signals for pins 1~4 and 7~8 looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
They will read about 400V p/p.

FG5V measured from Pins 5 or 6 to


Floating Gnd
Use any pin on P216
P214 Pins 1~4 and 7~8 are
Logic (Drive) Signals to the
Y-Drive lower.
Pins 11~12 carries the Y-Drive
signals to the lower Y-Drive.

January 15, 2010 60PS11 Plasma

Y-Drive Lower P214 Diode Mode Testing


Y-Drive Lower

Y-SUS Board

P214

P303

Checking the Y-Drive Lower Board P214


NOTE: Disconnected from the Y-DRIVE boards
Readings from Floating Ground (Pin 9)
RED LEAD
Blk Lead FG

Y-SUS Board should be


disconnected for this test.

12) VScan
11) VScan
10) n/c
Floating Gnd 9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd

Open
Open
Open
0V
Open
Open
Open
Open
Open
Open
Open
Open

BLACK LEAD
Red Lead FG
0.749V
0.749V
Open
0V
0.859V
0.859V
0.60V
0.60V
0.874V
0.874V
0.857V
0.874V

Meter in the Diode Mode

81

January 15, 2010 60PS11 Plasma

Y-Drive P111 and P211 Not Used

TIP: This is so you will be aware that these connections


are not used and not hunt for a lost connection.

P111 on the Upper Y-Drive and P211 on the Lower Y-Drive is not used, No connection.
Y-Drive Upper

Y-Drive Lower

82

January 15, 2010 60PS11 Plasma

Removing (Panel) Flexible Ribbon Cables from Y-Drive Upper or Lower


Flexible Ribbon Cables shown are from a different model, but process is the same.
To remove the Ribbon Cable from the connector first carefully lift the Locking Tab from
the back and tilt it forward ( lift from under the tab as shown in Fig 1).
The locking tab must be standing straight up as shown in Fig 2.
Lift up the entire Ribbon Cable gently to release the Tabs on each end. (See Fig 3)
Gently slide the Ribbon Cable free from the connector.
Be sure ribbon tab is released
By lifting the ribbon up slightly,
before removing ribbon.
Gently Pry
Up Here
Locking tab in
upright position

Fig 1

Fig 2

Fig 3

To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated
securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).

83

January 15, 2010 60PS11 Plasma

Incorrectly Seated Y-Drive Flexible Ribbon Cables


The Ribbon Cable is clearly improperly seated
into the connector. You can tell by observing the
line of the connector compared to the FPC, they
should be parallel.
The Locking Tab will offer a greater resistance to
closing in the case.
Note the cable is crooked. In this case the Tab on
the Ribbon cable was improperly seated at the
top. This can cause bars, lines, intermittent lines
abnormalities in the picture.
Remove the ribbon cable and re-seat it correctly.

84

January 15, 2010 60PS11 Plasma

Y-Drive Buffer Troubleshooting


YOU CAN CHECK FOR A SHORTED BUFFER ICs OUTPUT USING THIS PROCEDURE
BACK SIDE

FRONT SIDE

BUFFER IC FLOATING GROUND (FGnd)

Using the Diode Test on the DVM, check


the pins for shorts or abnormal loads.

RED LEAD On
Floating Ground

BLACK LEAD On ANY


Output Lug Reads 0.80V

Indicated by white outline


Reversing the leads reads Open

FRONT SIDE OF Y-DRIVE BOARD

135 Output Pins per/FPC (Flexible Printed Circuit) 67 on the


front and 68 on the back.
8 Ribbon cables (Horizontal Electrodes) totaling 1080 lines
Any of these output lugs can be tested.

1080 Total Horizontal Electrodes are actually used controlling


Vertical resolution

Look for shorts indicating a defective Buffer IC

85

January 15, 2010 60PS11 Plasma

Z-SUS SECTION
This Section of the Presentation will cover troubleshooting the Z-SUS Board Assembly.
Upon completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting and all alignments.

Locations

DC Voltage and Waveform Test Points


Z BIAS Alignment
Diode Mode Test Points

Operating Voltages Power Supply Supplied

VS
M5V

Control Board Supplied


But developed on the Y-SUS

17V

Developed on Z-SUS

Z Bias

86

January 15, 2010 60PS11 Plasma

Z-SUS Block Diagram


M5V and VS

Power Supply Board

Y-SUS Board
17V

Control Board
Receives
Logic
Signals

M5V and VS

17V

Z-SUS board receives VS and


M5V SMPS and 17V from the
Control board

Circuits generate erase,


sustain waveforms

Generates Z Bias 100V


Via 3 FPC
Flexible
Printed
Circuits

NO IPMs

FET Makes Drive waveform

Display

Simplified Block Diagram of Z-SUS (Sustain) Board

87

PDP

Z-SUB

Panel

January 15, 2010 60PS11 Plasma

Z-SUS SECTION
P/N EBR55492601
FS102
VS
6.3A/250V

P104
FPC

P101
VS and M5V
Input from
the Y-SUS

No IPMs

P101
FS100
M5V
10A/125V
Logic Signals from
the Control board
Also +15V generated
on the Y-SUS and routed
through the Control
board.

Z-SUS
Waveform
Test Point
FL103

Z-SUS
Output
FETs

Z-SUS
Waveform
Development
FETs

Z-Bias TP
Top of R457
To Chassis Gnd

Z-SUS
Waveform
Development
FETs

P105
FPC

Z-Bias
VR200
To Z-SUB

FS101
17V
2.5A/125V

P100
P103

88

January 15, 2010 60PS11 Plasma

Z-SUS Waveform
The Z-SUS (in combination with the Y-SUS)
generates a SUSTAIN Signal and an ERASE
PULSE for generating SUSTAIN and
DISCHARGE in the Panel.

Y-Drive

This waveform is supplied to the panel


through FPC (Flexible Printed Circuit) P102,
P104 and also P103 to the Z-SUB P106 which
connects to the panel via P105.
Z-Drive

Z Drive
Waveform

Oscilloscope Connection Point.

Sustain

Reset

Reset

FL103 to check Z Output waveform.


Right Hand side Center.

(Vzb) Z Bias VR201

Blanking

50V/div

Vzb voltage
100V 1V

400uS/div

TIP: The Z-Bias (VZB) Adjustment is a


DC level adjustment.
This is only to show the effects
of Z-Bias on the waveform.

223V p/p

This Waveform is just for reference to observe the effects of Zbz adjustment

89

January 15, 2010 60PS11 Plasma

VZB (Z-Bias) VR201 Adjustment


Read the Voltage Label on the back of the upper left hand
side of the panel when adjusting VR201.

Z Bias

Bottom Center of Z-SUS Board

VZB (Z-Bias) TP
Top Side R457

VZB (Z Bias)
VR201

Set should run for 15 minutes, this is the Heat Run mode.
Set screen to White Wash mode or 100 IRE White input.
Measured from Chassis Ground

Adjust VZ (Z-Bias) to Panel Label ( 1V)

Lower Right of Z-SUS Board

90

January 15, 2010 60PS11 Plasma

Connector P101 to SMPS P811 Voltages and Diode Checks


Voltage and Diode Mode Measurements
P101 Location: Top Left
P101 CONNECTOR Z-SUS" to SMPS" P811

Pin 1

Pin

Label

Run

Diode Mode

1, 2

VS

*196V

Open

n/c

n/c

n/c

4,5

Gnd

Gnd

Gnd

6,7

VA

*68V

Open

Gnd

Gnd

Gnd

9, 10

M5V

5V

Open

* Note: This voltage will vary in accordance with Panel Label

There are no Stand-By voltages on this connector


Note: In a Diode Mode test of the M5V
fuse (FS100) the reading are:
In Circuit: 0.093V.
No Connectors: Open
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

91

January 15, 2010 60PS11 Plasma

Connector P100 to Control P2 Voltages and Diode Checks


Voltage and Diode Mode Measurements
P100 Location:
Bottom Left hand side

P100 CONNECTOR Z-SUS" to Control" P2

Pin

Label

Run

Diode Mode

15V (17V)

17V

1.9V

15V (17V)

0.05V

1.9V

15V (17V)

1.8V

1.9V

15V (17V)

1.7V

1.9V

CTRL OE

0.06V

Gnd

ER UP

0.19V

Open

ER DN

0.22V

Open

Gnd

Gnd

Gnd

Z Bias

3.16V

Open

10

Gnd

Gnd

Gnd

11

Z SUS Up

0.4V

Open

12

Z SUS Dn

0.6V

Open

Pin 1

There are no Stand-By voltages on this connector

FS101 17V Fuse


Diode Check
0.97V (In Circuit)
1.9V (No Connectors)

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

92

January 15, 2010 60PS11 Plasma

Z-SUS How to Check the Output FETs


Name is printed on the components. Readings In Circuit.

Shown:

45F122

A 1.08V
B

AQ10~Q13
BQ14~17

Shown:

0.65V

Reverse:

Reverse: 0.59V

AQ20~Q23
Blk

Red

A 1.06V

AQ30~Q31

Blk

Red

RF2001

Reverse: A 1.03V
B Open

AD407~D409

Short

Reverse: A 1.53V
B Open
Blk Red

Shown:

Reverse: Short

AD414~D415
Blk

Red

Reverse:

Open

Reverse: 0.354V
Blk Red

Reverse: A Open
B Short

Shown: A 0.367V
B 0.356V

Open

Reverse: Open

0.1 Ohms

BD416~D417

0.355V

Shown: A 0.515V
B Short

Open

Blk Red

Shown:

AD20~D23

0.94V

Shown:

Blk Red

Shown:

B 0.748V

BQ32

Open

Blk Red

Shown:

51N25

Blk Red

93

January 15, 2010 60PS11 Plasma

CONTROL BOARD SECTION


This Section of the Presentation will cover troubleshooting the Control Board Assembly. Upon
completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting.

DC Voltage and Waveform Test Points


Diode Mode Test Points

Signals Main Board Supplied Panel Control and LVDS (Video) Signals
Control Board Generated Y-SUS and Z-SUS Drive Signals (Sustain)
X Board Drive Signals (RGB Address)

Operating Voltages
SMPS Supplied
Y-SUS Supplied
Developed on the Control Board

+5V (M5V) Developed on the SMPS


+17V (Routed to the Z-SUS)
+1.8V for internal use
+3.3V for internal use
+3.3V for the X-Boards (TCPs)
94

January 15, 2010 60PS11 Plasma

Control Board Component Identification

Part
Number
Label

95

January 15, 2010 60PS11 Plasma

Checking the Crystal X2Clock on the Control Board


Check the output of the Oscillator (Crystal) X2.
The frequency of the sine wave is 50 MHZ.
Missing this clock signal will halt operation of the panel
drive signals.

Osc. Check: 50Mhz

X2

CONTROL
BOARD
CRYSTAL
LOCATION

96

January 15, 2010 60PS11 Plasma

Control Board Signal (Simplified Block Diagram)


The Control Board supplies Video Signals to the TCP (Tape Carrier Package) ICs.
If there is a bar defect on the screen, it could be a Control Board problem.

Control Board to X Board


Address Signal Flow

Basic Diagram of Control Board


IC201

This Picture shows Signal Flow Distribution to help determine the


failure depending on where the it shows on the screen.

MCM

CONTROL BOARD

DRAM DRAM

Resistor Array

MCM
DRAM

X-DRIVE BOARD

16 bit words

IC201
EEPROM

PANEL

2 Buffer
Outputs
per TCP

There are 23 total TCPs.

128 Lines per Buffer


256 Lines output Total

To Center X-Board

97

5760 Vertical Electrodes


1920 Total Pixels (H)

January 15, 2010 60PS11 Plasma

Control Board Connector P1 to Y-SUS P101 Voltages and Diode Mode Checks
P111 These pins are very close together. When taking Voltage measurements use Caution.
Pin c

P1 Label Silk Screen

Pins 1 through 6
Receive 17V from the Y-SUS.
The +17V is not used by the
Control board, it is routed to the
Z-SUS leaving on P2 Pins 9~12.

All the rest are delivering


Y-SUS Waveform development and
Y-Drive logic signals to the Y-SUS
Board (Y-Drive logic signals are simply
routed right through the Y-SUS to the
Y-Drive boards).

Starting at pin 7 every pin not identified is ground.

98

January 15, 2010 60PS11 Plasma

Control P1 to Y-SUS P101 Plug Information

Pin 1 on Control is Pin 50 on Y-SUS.


Note: There are no voltages in Stand-By mode

P1 Connector "Control Board to Y-SUS P101


Pin

Label

Run

Diode Mode

Pin

Label

Run

Diode Mode

15V

17.8V

Open

26

DELTA_VY_ON_OFF

0.7V

1.44V

15V

17.8V

Open

27

GND

Gnd

Gnd

15V

17.8V

Open

28

DELTA_VY1

0.68V

1.44V

15V

17.8V

Open

29

GND

Gnd

Gnd

15V

17.8V

Open

30

SET_UP2

0V

1.44V

15V

17.8V

Open

31

GND

Gnd

Gnd

NC

NC

NC

32

SET_UP1

0.1V

1.44V

OC2_ODD

2.84V

1.44V

33

GND

Gnd

Gnd

GND

Gnd

Gnd

34

SET_DN2

4.9V

1.44V

10

OC1_ODD

1.87V

1.44V

35

GND

Gnd

Gnd

11

GND

Gnd

Gnd

36

SET_DN1

3.48V

1.44V

12

CLK

0.3V

1.44V

37

CTRL_OE

0V

1.44V

13

GND

Gnd

Gnd

38

GND

Gnd

Gnd

14

DATA_ODD

0V

1.44V

39

PASS_TOP

1.4V

1.44V

15

GND

Gnd

Gnd

40

GND

Gnd

Gnd

16

DATA_EVEN

0V

1.44V

41

DELTA_VY2

0.7V

1.44V

17

GND

Gnd

Gnd

42

GND

Gnd

Gnd

18

GND

Gnd

Gnd

43

ER_UP

0.2V

1.44V

19

STB

4.3V

1.44V

44

GND

Gnd

Gnd

20

GND

Gnd

Gnd

45

ER_DN

0.1V

1.44V

21

OC2_EVEN

2.8V

1.44V

46

GND

Gnd

Gnd

22

GND

Gnd

Gnd

47

SUS_UP

0.1~0.4V

1.44V

23

GND

Gnd

Gnd

48

GND

Gnd

Gnd

24

OC1_EVEN

1.85V

1.44V

49

SUS_DN

4V

1.44V

25

GND

Gnd

Gnd

50

GND

Gnd

Gnd

99

January 15, 2010 60PS11 Plasma

Control Board LVDS Signals

Pins are close together.

LVDS Cable P5 on Control board shown.


Press two outside tabs inward to release.

LVDS

Video Signals from the Main Board to the Control Board are referred
to as Low Voltage Differential Signals or LVDS. The video is
delivered in 20 bib LVDS format. Their presence can be confirmed
with the Oscilloscope by monitoring the LVDS signals with SMPTE
Color Bar input. Loss of these Signals would confirm the failure is on
the Main Board or the LVDS Cable itself.
Example of LVDS Video Signal

Example of Normal Signals measured at 1V p/p at 10Sec

Pins 12~15, 19~20, 22~25, 28~31,35~36, 38~41.


Pins 16, 17 and 32, 33 are clock signals for the data.

100

January 15, 2010 60PS11 Plasma

Control Board LVDS P5 Connector Voltages and Diode Check


Pins 7~10, 47~51 are n/c
Pins 1, 11, 18, 21, 34, 37, 44~46 are Gnd

P5 Connector "Control Board to Main P1003


PIN

LABEL

RUN

DIODE

PIN

LABEL

RUN

DIODE

0.89V

22

RB2+

1.26V

0.7V

RC2-

1.27V

0.8V

41

RA1-

40

RA1+

1.19V

0.94V

20

39

RB1-

1.29V

0.84V

19

RC2+

1.20V

0.9V

38

RB1+

0V

0.94V

17

RCLK2-

1.22V

0.9V

36

RC1-

1.27V

0.94V

16

RCLK2+

1.26V

0.9V

35

RC1+

1.20V

0.84V

15

RD2-

1.16V

0.9V

33

RCLK1-

0V

0.88V

14

RD2+

1.29V

0.9V

32

RCLK1+

1.23V

0.9V

13

RE2-

1.18V

0.9V

31

RD1-

1.26V

0.9V

12

RE2+

1.3V

0.9V

30

RD1+

1.18V

0.9V

Module SDA

3.28V

Open

29

RE1-

1.26V

0.9V

2.8V Display Enable

2.8V

0.5V

28

RE1+

1.24V

0.7V

Module SCL

3.28V

Open

25

RA2-

1.0V

0.9V

ROM TX

3.28V

Open

24

RA2+

1.45V

0.9V

ROM RX

0.5V

Open

23

RB2-

1.2V

0.8V

1.46V

51

P5

Gnd
40
35
30
25
20
15
Gnd

5
2

Blue Pins indicate 24 bit


(12 bit differential) video signal

Note: There are no voltages in Stand-By mode.

101

January 15, 2010 60PS11 Plasma

Control Board P2 Connector Pin ID and Voltages


Voltage and Diode Mode Measurements for the Control Board.
Note: There are no voltages in Stand-By mode.

P2

P2 CONNECTOR " Control Board to Z-SUS Board P100

Pin

Label

Run

Diode Mode

SUS-DN

0.7V

1.49V

SUS-UP

0.4V

1.49V

Gnd

Gnd

1.49V

Z Bias

3V

1.48V

Gnd

Gnd

Gnd

ER-DN

0V

1.48V

ER-UP

0V

1.48V

CTRL-OE

0V

1.4V

15V

17.8V

1.32V

10

15V

17.8V

1.32V

11

15V

17.8V

1.32V

12

15V

17.8V

1.32V

17.8V
1

P2 Label

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

102

January 15, 2010 60PS11 Plasma

Control Board (EMI Filter) Explained


1

The two EMI Filters just below P200 are surface mount mini
devices which shunt high frequencies to ground. These high
frequencies are generated on the SMPS.
Each EMI filter has 4 pins.
The top and bottom are the B+ route, the two side solder
points are Chassis Gnd.

NOTE: The Black wire on


P200 is not pin 1.

P200
FL4 or FL5
(5V EMI filters)
5V

Gnd
FL4 (5V)

Gnd

FL5 (5V)

5V

103

January 15, 2010 60PS11 Plasma

Control Board P200 Connector Pin ID and Voltages

P200

Voltage and Diode Mode Measurements for the Control Board.


Note: There are no voltages in Stand-By mode.
1
P200 CONNECTOR "Control Board to Power Supply P813

Pin

Label

Run

Diode Mode
Disconnected

M5V

5V

0.9V

M5V

5V

0.9V

M5V

5V

0.9V

M5V

5V

0.9V

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

NOTE: The Black wire on


P200 is not pin 1.

Note: In a Diode Mode test of the M5V


In Circuit: 0.093V.
No Connectors: 0.9V

Diode Mode Readings taken with all connectors Disconnected, (Unless Specified). Black lead on Gnd. DVM in Diode Mode.

104

January 15, 2010 60PS11 Plasma

Control P1 to Y-SUS
P101 Plug Information

Pin 1 on Control is
Pin 50 on Y-SUS

Voltage Measurements for


the Control Board.
Note: There are no voltages
in Stand-By mode.

105

January 15, 2010 60PS11 Plasma

P101 Connector "Control Board to Left X Board P110

1~4 pins 3.3V TP

1~4

P101 Connector to the Left X-Board P110


Pin

Run

Diode Mode

Pin

Run

Diode Mode

1~4

3.3V

0.67V

33

1.0V

0.97V

1.0V

0.97V

34

1.27V

0.97V

1.27V

0.97V

36

1.0V

0.97V

1.0V

0.97V

37

1.27V

0.97V

1.27V

0.97V

39

1.0V

0.97V

11

1.0V

0.97V

40

1.27V

0.97V

12

1.27V

0.97V

41

1.0V

0.97V

13

1.0V

0.97V

42

1.27V

0.97V

14

1.27V

0.97V

44

1.0V

0.97V

15

1.0V

0.97V

45

1.27V

0.97V

16

1.27V

0.97V

46

1.0V

0.97V

18

1.0V

0.97V

47

1.27V

0.97V

19

1.27V

0.97V

49

1.0V

0.97V

20

1.0V

0.97V

50

1.27V

0.97V

21

1.27V

0.97V

51

1.0V

0.97V

23

1.0V

0.97V

52

1.27V

0.97V

24

1.27V

0.97V

53

1.0V

0.97V

26

1.0V

0.97V

54

1.27V

0.97V

27

1.27V

0.97V

56

1.87V

1.2V

28

1.0V

0.97V

57

1.87V

1.2V

29

1.27V

0.97V

58

3.22V

1.2V

31

1.0V

0.97V

59

0.49V

1.1V

32

1.27V

0.97V

60

0.49V

1.1V

106

Pin 1
White hash
marks count
as 5

10

20
30
40
50

60

59
58
57

56

Pins with no TP are Gnd.

January 15, 2010 60PS11 Plasma

P102 Connector "Control Board to Center X Board P210


5

White hash marks


count as 5
Pin 1

1~4

10

20

30

56

40

3.3V TP
1ST 4 pins

60

50

P102 Connector to the Center X-Board P110


Pin

Run

Diode
Mode

Pin

Run

Diode
Mode

Pin

Run

Diode
Mode

Pin

Run

Diode
Mode

1~4

3.3V

0.67V

21

1.27V

0.97V

37

1.27V

0.97V

53

1.0V

0.97V

1.0V

0.97V

22

1.0V

0.97V

39

1.0V

0.97V

54

1.27V

0.97V

1.27V

0.97V

24

1.0V

0.97V

40

1.27V

0.97V

56

1.0V

1.2V

1.0V

0.97V

25

1.27V

0.97V

42

1.0V

0.97V

57

1.27V

1.2V

10

1.27V

0.97V

27

1.0V

0.97V

43

1.27V

0.97V

58

1.0V

1.2V

12

1.0V

0.97V

28

1.27V

0.97V

45

1.0V

0.97V

59

1.27V

1.1V

13

1.27V

0.97V

30

1.0V

0.97V

46

1.27V

0.97V

60

1.0V

1.1V

15

1.0V

0.97V

31

1.27V

0.97V

48

1.0V

0.97V

16

1.27V

0.97V

33

1.0V

0.97V

49

1.27V

0.97V

18

1.0V

0.97V

34

1.27V

0.97V

51

1.0V

0.97V

Note:
There are no voltages in
Stand-By mode.

19

1.27V

0.97V

36

1.0V

0.97V

52

1.27V

0.97V

107

Pins with no TP are Gnd.

January 15, 2010 60PS11 Plasma

P104 Connector "Control Board to Right X Board P310


60

P104 Connector to the Right X-Board P310


Pin

Run

Diode Mode

Pin

Run

Diode Mode

1~4

3.3V

0.67V

33

1.0V

0.98V

1.0V

0.98V

34

1.27V

0.98V

1.27V

0.98V

36

1.0V

0.98V

1.0V

0.98V

37

1.27V

0.98V

1.27V

0.98V

39

1.0V

0.98V

11

1.0V

0.98V

40

1.27V

0.98V

12

1.27V

0.98V

41

1.0V

0.98V

13

1.0V

0.98V

42

1.27V

0.98V

14

1.27V

0.98V

44

1.0V

0.98V

15

1.0V

0.98V

45

1.27V

0.98V

16

1.27V

0.98V

46

1.0V

0.98V

18

1.0V

0.98V

47

1.27V

0.98V

19

1.27V

0.98V

49

1.0V

0.98V

20

1.0V

0.98V

50

1.27V

0.98V

21

1.27V

0.98V

51

1.0V

0.98V

23

1.0V

0.98V

52

1.27V

0.98V

24

1.27V

0.98V

53

1.0V

0.98V

26

1.0V

0.98V

54

1.27V

0.98V

27

1.27V

0.98V

56

1.87V

0.49V

28

1.0V

0.98V

57

1.87V

0.49V

29

1.27V

0.98V

58

3.22V

3.22V

31

1.0V

0.98V

59

0.49V

1.87V

32

1.27V

0.98V

60

0.49V

1.87V

108

White hash
marks count
as 5

50
40
56
30
20
10

Pin 1

5
1~4
3.3V TP
Note:
There are no voltages in Stand-By mode.
Pins with no TP are Gnd.

January 15, 2010 60PS11 Plasma

X BOARD (LEFT, RIGHT and CENTER) SECTION


The following section gives detailed information about the X boards.
These boards deliver the Color information signal developed on the
Control board to the TCPs, (Taped Carrier Packages). The TCPs are
attached to the vertical FPCs, (Flexible Printed Circuits) which are
attached directly to the panel. The X boards are the attachment
points for these FPCs.
These boards have no adjustment.
These boards receive their main B+ from the:
Originally developed on the Switched Mode Power Supply
Va (Voltage for Address) is routed through the Y-SUS board
and then to the Left X board via P121 pins 1~4. Va also
leaves P120 and is sent to the Center X via P220. Then it
leaves on P221 and goes to the Right X P320.
Control board develops 3.3V and routes to each X board via
ribbon connectors P110, P210 and P310.
109

January 15, 2010 60PS11 Plasma

X Board Additional Information


There are three X boards, the Left, Center and the Right
(As viewed from the rear of the set).
The three X boards have very little circuitry. They are basically signal
and voltage routing boards.
They route the Va to all of the Taped Carrier Packages (TCPs).
Va is introduced to the Left X board first, then the Left X sends
Va to the Center X and then the Center X sends Va to the Right X.
They route the Logic (Color) signals from the Control board
to all of the Taped Carrier Packages (TCPs). Including VPP which is
generated on each of the 3 X boards.
The X boards have connectors to 23 TCPs, 8 on the left and right and
7 on the center. The Center X board has connections to 7 TCPs.
There are a total of 23 TCPs and each TCP has 2 buffers. So there
are a total of 46 buffers feeding the panels 5760 vertical electrodes.

110

January 15, 2010 60PS11 Plasma

X Board TCP Heat Sink Warning


NEVER run the television with this heat sink removed.
Damage to the TCPs will occur and cause a defective panel.

The Vertical
Address buffers
(TCPs) have one
heat sink
indicated by the
arrow.
It protects all 23
TCPs as.

111

January 15, 2010 60PS11 Plasma

X Board Layout Primary Circuit Diode Check


The three X-Boards have two similar circuit layouts for the connections going to the TCPs., as shown below.

VPP

VPP

Gnd

Gnd

Gnd

On any Va (0.54V) TCPs connected.


On any Va (0.85V) TCPs disconnected.
On 3.3V (0.483V) TCPs connected.
On 3.3V (0. 562V) TCPs disconnected.
On any VPP (0.425V) TCPs connected.
On any VPP (0.426V) TCPs disconnected.

VP

VP
On the below:

VA source
disconnected from
Left X board

On any Gnd

On any Gnd

3.3V

VA

3.3V

VA

VPP

On the below:

On any Va (Open) TCPs connected.


On any Va (Open) TCPs disconnected.
On 3.3V (1.3V) TCPs connected.
On 3.3V (Open) TCPs disconnected.
On any VPP (Open) TCPs connected.
On any VPP (Open) TCPs disconnected.

112

January 15, 2010 60PS11 Plasma

TCP (Tape Carrier Package)


This shows the layout of the bottom ribbon cables connecting to the Panels Vertical electrodes,
(Address Bus). Note that each ribbon cable has a solid state device called a TCP attached.

X Drive Board

Y-SUS Board

Logic
X_B/D

Frame
Rear panel Vertical Address
Front panel Horizontal Address

256 Vertical
Electrodes

Va

Control Board
Chocolate

ctor
Conne

TCP
Taped Carrier
Package

128 lines

256 total lines

128 lines

Con
nect
or
Flex
ibl
Cabl e
e

TCP
Attached directly
to Flexible cable

Heat Sink

Back side of TCP Ribbon

113

January 15, 2010 60PS11 Plasma

TCP Testing

Must be checked on flexible cable.

On any Gnd

On any Va (0.58V)
On 3.3V (0.72V)
On any VuP (0.729V)
On any VDn (1.54V)

Reverse leads reads Open

Gnd

Va

On the below:

VPP Gnd

Gnd
3.3V VPP
Va

n/c

n/c
1

10 15 20

114

25 30

35

40 45

50

Look for any TCPs


being discolored.
Ribbon Damage.
Cracks, folds
Pinches, scratches,
etc

January 15, 2010 60PS11 Plasma

TCP 3.3V B+ Check


For Connectors P101, P102
and P104 on the Control
board, see Control board
section.

Warning: DO NOT attempt to run the set with the


Heat Sink over the TCPs removed.

Red Lead On 3.3V (0.42V)


Black Lead On 3.3V (0.62V)
This also test IC100, IC200 and IC300

Checking IC304 for 3.3V, use center pin.


IC304
0V

3.3V for TCPs


IC304 on
Control Board

3.3V
5V

3.3V in on Pins 57 ~ 60 on any connector

Left X Board P110

Center X Board P210

Right X Board P310

All Connectors to All TCPs look very


similar for the 3.3V test point. The
upside down L trace at pins 34 and 35 of
each connector. There will be a small
Surface Mount Cap. for the 3.3V line.
Example here from P303. You can only
check for continuity, you can not run
the set with heat sink removed.

115

January 15, 2010 60PS11 Plasma

TCP Visual Observation. Damaged TCP


Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed.
After a very short time, these ICs will begin to self destruct due to overheating.
This damaged TCP can,
a) Cause the Power Supply to shutdown. (VA shorted, 3.3V shorted).
b) Generate abnormal vertical bars, (colored noise).
c) Cause the entire area driven by the TCP to be All White
d) Cause the entire area driven by the TCP to be All Black
e) Cause a Single Pixel Width Line defect. Red, Green or Blue.

TCP
Tapped
Carrier
Package
Look for burns, pin
holes, damage, etc.

116

January 15, 2010 60PS11 Plasma

Left X Drive P121 Connector to Y-SUS P307 Information


Voltage and Diode Mode Measurement (No Stand-By Voltages)

P121 CONNECTOR " X-Drive Left Board" to "Y-SUS P307


Pin

Label

Run

Diode Mode

VA

*68V

Open

VA

*68V

Open

VA

*68V

Open

VA

*68V

Open

NC

NC

NC

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

* Note: This voltage will vary in accordance with Panel Label.


There are no Stand-By voltages on this connector.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

117

January 15, 2010 60PS11 Plasma

P110 Connector Left X Board to Control P101


Leave Connector P310 Connected to the Control Board P104
Pin

Run

Diode Mode

Pin

Run

Diode Mode

0.49V

1.1V

29

1.27V

0.97V

0.49V

1.1V

30

1.0V

0.97V

3.22V

1.2V

32

1.27V

0.97V

1.87V

1.2

33

1.0V

0.97V

1.87V

1.2V

34

1.27V

0.97V

1.27V

0.97V

35

1.0V

0.97V

1.0V

0.97V

37

1.27V

0.97V

1.27V

0.97V

38

1.0V

0.97V

10

1.0V

0.97V

40

1.27V

0.97V

11

1.27V

0.97V

41

1.0V

0.97V

12

1.0V

0.97V

42

1.27V

0.97V

14

1.27V

0.97V

43

1.0V

0.97V

15

1.0V

0.97V

45

1.27V

0.97V

16

1.27V

0.97V

46

1.0V

0.97V

17

1.0V

0.97V

47

1.27V

0.97V

19

1.27V

0.97V

48

1.0V

20

1.0V

0.97V

49

21

1.27V

0.97V

22

1.0V

24

White hash marks


count as 5

57~60

57~60 pins
3.3V TP

Pins with no TP are Gnd.


56

Gnd

51

Gnd

44

Gnd

39

Gnd

36

Gnd

0.97V

31

Gnd

1.27V

0.97V

26

Gnd

50

1.0V

0.97V

23

Gnd

0.97V

52

1.27V

0.97V

18

Gnd

1.27V

0.97V

53

1.0V

0.97V

13

Gnd

25

1.0V

0.97V

54

1.27V

0.97V

Gnd

27

1.27V

0.97V

55

1.0V

0.97V

28

1.0V

0.97V

57~60

3.3V

0.67V

118

January 15, 2010 60PS11 Plasma

P210 Connector "Center X Board to Control Board P102


Leave Connector P210 Connected to the Control Board P102
Pin

Run

Diode Mode

Pin

Run

Diode Mode

0.49V

1.1V

29

1.27V

0.97V

0.49V

1.1V

30

1.0V

0.97V

3.22V

1.2V

32

1.27V

0.97V

1.87V

1.2

33

1.0V

0.97V

1.87V

1.2V

34

1.27V

0.97V

1.27V

0.97V

35

1.0V

0.97V

1.0V

0.97V

37

1.27V

0.97V

1.27V

0.97V

38

1.0V

0.97V

10

1.0V

0.97V

40

1.27V

0.97V

11

1.27V

0.97V

41

1.0V

0.97V

12

1.0V

0.97V

42

1.27V

0.97V

14

1.27V

0.97V

43

1.0V

15

1.0V

0.97V

45

16

1.27V

0.97V

17

1.0V

19

White hash marks


count as 5

57~60 pins
3.3V TP

57~60
Pins with no TP are Gnd.
56

Gnd

0.97V

51

Gnd

1.27V

0.97V

44

Gnd

46

1.0V

0.97V

39

Gnd

0.97V

47

1.27V

0.97V

36

Gnd

1.27V

0.97V

48

1.0V

0.97V

31

Gnd

20

1.0V

0.97V

49

1.27V

0.97V

26

Gnd

21

1.27V

0.97V

50

1.0V

0.97V

23

Gnd

22

1.0V

0.97V

52

1.27V

0.97V

18

Gnd

24

1.27V

0.97V

53

1.0V

0.97V

13

Gnd

25

1.0V

0.97V

54

1.27V

0.97V

Gnd

27

1.27V

0.97V

55

1.0V

0.97V

28

1.0V

0.97V

57~60

3.3V

0.67V

119

January 15, 2010 60PS11 Plasma

P310 Connector Right X Board to Control P104


Leave Connector P310 Connected to the Control Board P104
Pin

Run

Diode Mode

Pin

Run

Diode Mode

0.49V

1.1V

29

1.27V

0.97V

0.49V

1.1V

30

1.0V

0.97V

3.22V

1.2V

32

1.27V

0.97V

1.87V

1.2

33

1.0V

0.97V

1.87V

1.2V

34

1.27V

0.97V

1.27V

0.97V

35

1.0V

0.97V

1.0V

0.97V

37

1.27V

0.97V

1.27V

0.97V

38

1.0V

0.97V

10

1.0V

0.97V

40

1.27V

0.97V

11

1.27V

0.97V

41

1.0V

0.97V

12

1.0V

0.97V

42

1.27V

0.97V

14

1.27V

0.97V

43

1.0V

0.97V

15

1.0V

0.97V

45

1.27V

0.97V

16

1.27V

0.97V

46

1.0V

0.97V

17

1.0V

0.97V

47

1.27V

0.97V

19

1.27V

0.97V

48

1.0V

20

1.0V

0.97V

49

21

1.27V

0.97V

22

1.0V

24

White hash marks


count as 5

57~60

57~60 pins
3.3V TP
Pins with no TP are Gnd.
56

Gnd

51

Gnd

44

Gnd

39

Gnd

36

Gnd

31

Gnd

0.97V

26

Gnd

1.27V

0.97V

23

Gnd

50

1.0V

0.97V

18

Gnd

0.97V

52

1.27V

0.97V

13

Gnd

1.27V

0.97V

53

1.0V

0.97V

Gnd

25

1.0V

0.97V

54

1.27V

0.97V

27

1.27V

0.97V

55

1.0V

0.97V

28

1.0V

0.97V

57~60

3.3V

0.67V

120

January 15, 2010 60PS11 Plasma

P120, P220, P221 and P320 X Board Connector Information (Va distribution)
White hash marks count as 5

P120

Left X

16~30
Gnd

P220

P221

Center X

Center X

16~30
Gnd

1~15
Gnd

P320

Right X

1~15
Gnd

13~15
nc

13,14,17,19,
22,24 nc

1~12
Va

19~30
Va
7,9,12,14,1
7,18 nc

13,14,17,19,
22,24 nc

On any Gnd
On any Va (0.54V) TCPs connected.
On any Va (0.84V) TCPs disconnected.

1~12
Va

19~30
Va
7,9,12,14,1
7,18 nc

On any Gnd
On any Va (Open)
TCPs connected
or disconnected

Note: Va voltage will vary by panel, check your specific panels voltage label.

121

January 15, 2010 60PS11 Plasma

MAIN Board SECTION


The following section gives detailed information about the Main board. This board
contains the Microprocessor, Audio section, video section and all input, outputs. It
also receives all input signals and processes them to be delivered to the Control
board via the LVDS cable. The main tuner (VSB, 8VSB and QAM) is located on the
main board. This board is also where the televisions software upgrades are
accomplished through the USB input.
This board has no adjustment.
The Main Board Receives its operational voltage from the SMPS:
DURING STAND-BY: From SMPS
STBY 5V Distributes STBY 5V to the Front IR Board and drives front Power LEDs
DURING RUN: (STBY 5V remains): From SMPS
+5V from the Switched Mode Power Supply
12V for Tuner (Stepped down to 5V)
17V for Audio

Distributes Key 1 and Key 2 to the Front IR Board then to the Front key board.
Receives Intelligent Sensor data from the Front IR Board.
Drives front Power LEDs

122

January 15, 2010 60PS11 Plasma

Main Board Layout and Identification


P1001
to Ft IR

P1006 to
SMPS

IC302
+1.2V_VDDC
regulator

IC203
DDR

USB
In

P1003
LVDS

X501
IC504 Crystal

X1 Micro
Crystal

IC503
9V Reg

IC204
Memory IC
PC
Audio

P1005
Audio

IC1001
Audio
Amp

IC1 Mstar Micro


and Video
Processor

TU501
Tuner

Optical
Audio

HDMI

RS232

IC504
Tuner
Controller

PC

Remote

S-In

123

Rear
Inputs

HDMI

IC805
HDMI
EDID

RF
In

January 15, 2010 60PS11 Plasma

Main Board Drawing (Front Side) Component Layout

124

January 15, 2010 60PS11 Plasma

Main Board Back Side (Regulator Checks)


IC304
1.8V_MST
Regulator

IC201
NVRAM

D951

D801

IC202
HDCP
EEPROM

Q951
L502

IC301
3.3V-VST
Regulator

Q302

IC802/3
HDMI EDID
&
SimpLink

IC601
RS232
RX/TX

Q503
IC502 +1.2V
PVSB
regulator

IC505
Tuner
5V Reg

D1001
Q1001

Q504

Q891

IC305
3.3V_MST
Regulator

Q303

Q501

Q502

IC303
5V-MST
Switch

D802

IC803

D628
Q892

Q601
IC602
RS232
EEPROM

Tuner
Pin 1

125

D627

IC802
D890

D633

January 15, 2010 60PS11 Plasma

Main Board Drawing (From the 11X17 Foldout) Component Locations

126

January 15, 2010 60PS11 Plasma

Main Board Tuner Check (Shield Off) Pins Exposed TDVW-H103F


Data Pin 9 Clock Pin 8
Only present during
Channel Change

TU501

Video Pin 19 Video Test Point


SIF Pin 16 Audio Test Point
DIG IF (-) Pin 13
DIG IF (+) Pin 12
Digital Channel Test Point
Data Pin 9
Clock Pin 8

Pin 4 Tuner B+ (5V)


Main Board
Pin 1

127

January 15, 2010 60PS11 Plasma

Main Board Tuner Video and


SIF Output Check
USING COLOR BAR SIGNAL INPUT

MAIN Board

Note: NTSC Only


Video Out Signal only when
receiving an analog Channel.
2.24Vp/p

Pin 19 Analog
Video Signal

Tuner Location

Pin 16 SIF
Signal

500mV / 10uSec

450mVp/p

700mVp/p
200mV / 2uSec
Note: Pin 12 and Pin 13
Dig IF Signal
8VSB or QAM
Only when receiving a
Digital Channel.

100mV / 1uSec

128

January 15, 2010 60PS11 Plasma

Main Board Crystal X1 and X501 Check

X1 (1.5V DC) / (2.4V p/p)


12Mhz

X1 Runs all the time


X501 Runs only when set is on
X1

X501

X501 (1.5V DC) / (110mV p/p)


25Mhz

MAIN Board
Crystal Location

129

January 15, 2010 60PS11 Plasma

Main Board P1003 (Removing the LVDS Cable

(1) Using your fingernail, lift up the locking mechanism.


Since the locking tab is very thin and fragile, its best to lift
slightly one end, then work across the locking tab
a little at a time, back and forth until the tab is released.
(2) Pull the Cable from the Connector
130

January 15, 2010 60PS11 Plasma

Main Board P1003 LVDS Video Signal Test Points


P1003 LVDS Connector

38
37c
Pin

36

LVDS Waveform TPs

40

39

35

33
30

32

29

28

P1003
Location
s
cation
o
L
P
T

24

27
22

23

21
MAIN Board

17
14

16

12

Note: These numbers actually indicate the actual


pin number on the connector P1003

131

19

20

13

11

January 15, 2010 60PS11 Plasma

Main Board P1003 LVDS Video Signal Check


Pins 11, 12, 16 and 17
Waveform TP see 1 page back
Pin 12 (R1024)

Pin 11 (R1023)

Pin 17 (R1020)

Pin 16 (R1019)

132

SMTP Color Bar Signal Input

January 15, 2010 60PS11 Plasma

Main Board P1003 LVDS Video Signal Check


Pins 21, 22, 27 and 28
Waveform TP see 2 pages back.
Pin 22 (R1016)

Pin 21 (R1015)

Pin 28 (R1012)

Pin 27 (R1011)

133

SMTP Color Bar Signal Input

January 15, 2010 60PS11 Plasma

Main Board Plug P1003 LVDS Voltages


Voltage and Diode Test for the Main Board

Pin c

P1003 Main Board Connector to P5 "Control Board


PIN

LABEL

RUN

DIODE

PIN

LABEL

RUN

DIODE

11

RA1-

1.46V

0.89V

30

RB2+

1.26V

0.7V

12

RA1+

1.19V

0.94V

32

RC2-

1.27V

0.8V

13

RB1-

1.29V

0.84V

33

RC2+

1.20V

0.9V

14

RB1+

0V

0.94V

35

RCLK2-

1.22V

0.9V

16

RC1-

1.27V

0.94V

36

RCLK2+

1.26V

0.9V

17

RC1+

1.20V

0.84V

37

RD2-

1.16V

0.9V

19

RCLK1-

0V

0.88V

38

RD2+

1.29V

0.9V

20

RCLK1+

1.23V

0.9V

39

RE2-

1.18V

0.9V

21

RD1-

1.26V

0.9V

40

RE2+

1.3V

0.9V

22

RD1+

1.18V

0.9V

46

Module SDA

3.28V

Open

23

RE1-

1.26V

0.9V

47

2.8V Display Enable

2.8V

0.5V

24

RE1+

1.24V

0.7V

48

Module SCL

3.28V

Open

27

RA2-

1.0V

0.9V

49

ROM TX

3.28V

Open

28

RA2+

1.45V

0.9V

50

ROM RX

0.5V

Open

29

RB2-

1.2V

0.8V

NOTE: This is a 51 pin


connector.
Pins 6-8, 15, 18, 31, 34, 41 and
51 are Ground (Gnd).
Pins 1-5, 9-10, 25-26, 42-45 are
No Connection (n/c).

Blue Pins indicate 20


bit differential video
signal

Note: There are no


voltages in Stand-By
mode.

Diode Mode Check with the Board Disconnected.

134

January 15, 2010 60PS11 Plasma

Main Board Plug P1001 to Ft Keys

Pin c

Voltage and Diode Mode Measurements for the Main Board


P1001 CONNECTOR "MAIN Board" to "Front Keys"
For Voltages when
each Key is
pressed, see the
Key Board section.

7&8
Intelligent
Sensor

Stand
By 5V

Pin

Label

STBY

Run

Diode Check

IR

4.86V

3.93V

2V

Gnd

Gnd

Gnd

Gnd

Key1

3.27V

3.27V

1.9V

Key2

3.27V

3.27V

1.9V

P Key

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

EYEQ-SCL

0V

3.28V

2V

EYEQ-SDA

0V

3.28V

2V

Gnd

Gnd

Gnd

Gnd

10

STBY 5V

5V

4.9V

1.25V

11

3.3VST

0.34V

5.1V

0.6V

12

Gnd

Gnd

Gnd

Gnd

13

LED R

2.94V

0V

1.87V

14

LED W

0V

2.91V

1.7V

15

PWM

Gnd

Gnd

0.94V

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

135

January 15, 2010 60PS11 Plasma

Main Board Plug P1006 to Power Supply Voltages and Diode Check

Pin c front

Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
P1006

* Pins 9, 10, 12: (+5V) Turned on by Relay On Command.

P1006 CONNECTOR "Main" to "SMPS Board" P814


Pin

Label

STBY

Run

Diode Mode

Pin

Label

STBY

Run

Diode Mode

17V

0V

17V

Open

17V

0V

17V

Open

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

12V

0V

12V

Open

12V

0V

12V

Open

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

+5V

0V

5.14V

1.0 V

10

+5V

0V

5.14V

1.0 V

11

Stby 5V

4.94V

5.15V

1.0 V

12

+5V

0V

5.14V

1.0 V

13

Gnd

Gnd

Gnd

Gnd

14

Gnd

Gnd

Gnd

Gnd

15

Gnd

Gnd

Gnd

Gnd

16

n/c

n/c

n/c

Gnd

17*

5V Det

0V

4.7V

Open

18*

AC Det

4.9V

4.9V

Open

19

RL On

0V

3.2V

Open

20

VS On

0V

3.2V

Open

21

M5 ON

0V

3.2V

Open

22

Auto Gnd

Gnd

Gnd

Gnd

23

Stby 5V

4.94V

5V

1.3V

24*

Key On

Gnd

Gnd

Open

* Pin 18: AC DET if missing will cause the set to turn


off after 10 seconds.

* Pin 17: 5V Det not used.

136

January 15, 2010 60PS11 Plasma

Main Board Speaker Plug P1005


Voltage and Diode Mode Measurements for the Main Board Speaker Plug
P1005 CONNECTOR "Main" to "Speakers"

Pin

Label

SBY

Run

Diode Mode

R-

0V

8.5V

Open

R+

0V

8.5V

Open

L-

0V

8.5V

Open

L+

0V

8.5V

Open

Right (-)
P1005
Right (+)
Speaker
Connector Left (-)
Left (+)

Board
Location

MAIN Board
Diode Mode Check with the Board Disconnected. DVM in the Diode mode.

137

January 15, 2010 60PS11 Plasma

FRONT IR, POWER LED and SIDE KEY Board SECTION


The following section gives detailed information about the Front IR,
Power LED and Side Key Boards. These boards contains the
Infrared Receiver, Intelligent Sensor, Side Keys and Power LEDs
section.
The front Intelligent Sensor IC communicates with the Main Board
Microprocessor via Clock and Data lines.
These boards have no adjustments.
The Front Control Board (IR and Intelligent Sensor) receives its main
B+ from the Main Board:
STBY 5V from the Main Board. This voltage is originated
on the Switched Mode Power Supply
3.3V generated on the Main Board.
The Front Power LEDs are driven by 2 separate pins from
the Main board.
138

January 15, 2010 60PS11 Plasma

Front Control (IR and Intelligent Sensor) Board and Power LED Board Location
Ground Strap

Front IR Board

Key Board

Ground Strap

Lower Left Side (As viewed from rear).

139

January 15, 2010 60PS11 Plasma

Front Power LED and IR Board Layout


Ground
snap

Power
LEDs

IR
Sensor
P101

Intelligent
Sensor
On Front

P102
P101

Front IR
Board

140

January 15, 2010 60PS11 Plasma

Front IR and Intelligent Sensor Board Layout


Intelligent Sensor

IC3

IR and Power LED


filter

IC2
P102
P101

Infrared Sensor
Co

d
ve
o
m
Re
r
ve

Power Button

Infrared Sensor

All three switches are the Power


On/Off Switch Assy.

Power
LED

Power
LED

Plastic Power Button Removed

141

January 15, 2010 60PS11 Plasma

Front IR and Intelligent Sensor Board Voltages


IC3

IC2

IC1 IR Receiver
G: Ground
V: 4.8V
O: 4.7V

Intelligent
Sensor

G: Ground
V: B+
O: Output

IR
Receiver

IC3
1: Gnd
2: 3.27V
3: 5.14V

Q101 Red LED Driver


Q102 Green LED Driver
Q101 and Q102
D103

B: 0.799V
C: 0V
E: Gnd

Red on
Left

Red On in Stand-By
Green On in Run

Green on
Right

D102
Red on
Green on
Left
Right

Power LEDs

142

January 15, 2010 60PS11 Plasma

Front IR and Intelligent Sensor Board Testing

143

January 15, 2010 60PS11 Plasma

Front Control Board Connector P101 Voltage and Pin Identification


P101

P1 CONNECTOR " Front Control Board" to P1001 "Main Board"


Pin

Label

STBY

Run

Diode Check

IR

4.86V

3.93V

Open

Gnd

Gnd

Gnd

Gnd

Key1

3.27V

3.27V

Open

Key2

3.27V

3.27V

Open

PKey

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

7&8
Intelligent
Sensor

EYEQ-SCL

0V

3.28V

Open

EYEQ-SDA

0V

3.28V

Open

Gnd

Gnd

Gnd

Gnd

Stand
By 5V

10

STBY 5V

5V

4.9V

Open

11

3.3VST

0.34V

5.1V

2V

12

Gnd

Gnd

Gnd

Gnd

13

LED R

2.94V

0V

1.19V

14

LED W

0V

2.91V

1.16V

15

PWM

Gnd

Gnd

Open

For Voltages when


each Key is
pressed, see the
Key Board section.

Not Used

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

144

January 15, 2010 60PS11 Plasma

Front IR Board Plug P102 to Side Key (Voltages and Pin Identification)
Voltage and Diode Mode Measurements for the Main Board

For Voltages when each Key is pressed, see the Key Board section.

P102 CONNECTOR Ft IR Board" to "Ft Key P101


Pin

Label

STBY

Run

Diode Mode

Key 1

3.27V

3.27V

Open

Key 2

3.27V

3.27V

Open

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Gnd

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

145

January 15, 2010 60PS11 Plasma

SIDE KEY SECTION (Board Layout and Identification)


SW103

SW107

SW108

SW105

SW106

SW104

SW102

P101
To Ft IR Board

146

January 15, 2010 60PS11 Plasma

Side Key Assembly


Resistance and
Diode Mode
Checks

Diode Mode
Readings taken with
all connectors
Disconnected. Black
lead on Gnd. DVM
in Diode Mode.

P101 Resistance Measurements with Key pressed.


KEY

Pin 1 measured
from Gnd

KEY

Pin 2 measured
from Gnd

CH (Up)

0.61K Ohms

Volume (+)

3.6K Ohms

CH (Dn)

9K Ohms

Volume (-)

0.62K Ohms

Input

3.66K Ohms

Enter

22K Ohms

Menu

9K Ohms

P101 Voltage Measurements with Key pressed.


KEY

Pin 1 measured
from Gnd

KEY

Pin 2 measured
from Gnd

CH (Up)

0.19V

Volume (+)

0.86V

CH (Dn)

1.57V

Volume (-)

0.19V

Input

0.88V

Enter

2.2V

Menu

1.56V

P101 Connector Side Key" to IR/LED Control Board J2 (No Key Pressed)
Pin

Label

STBY

Run

Diode Mode

KEY 1

3.3V

3.3V

Open

KEY 2

3.3V

3.3V

Open

Gnd

Gnd

Gnd

Open

Gnd

Gnd

Gnd

Open

147

January 15, 2010 60PS11 Plasma

60PS11 SERVICE TIP SECTION


This section give known failure tips to
help isolate the problem quickly.

148

January 15, 2010 60PS11 Plasma

Tip: How to Check the Z-SUS if the Y-SUS Has Failed


Turn the Set On with Remote or disconnect P814.

Leave P811 to
P101 Connected

This supplies
VS and 5V to
the Z-SUS

When you apply AC to the


SMPS, check the Z-Bias
waveform TP
223V P/P signal

17V pins
1 or 2
Jump 17V to
FS101
This supplies
5V to the
Control board

Leave P813 to
P200 Connected

All this
assumes the
Power supply
and Control
board are
working
correctly.
D6 and D7
should be on.

Leave
P2 to P100
Connected

17V is normally made


on the Y-SUS.

This supplies drive


signals Z-SUS

149

January 15, 2010 60PS11 Plasma

60PS11 TIP: Panel has a Brief Flash during start up, then No Picture.
Floating Ground checks must be made from Floating Ground. Use any pin on P204, P203, P205 or P208.

TIP:
SYMPTOM:
The panel indicates a brief flash during start up, then No Picture symptom.
CHECKS:
1. Z-SUS does not produce a correct signal. (All voltages check normal except 17V).
2. Y-SUS does not produce a correct signal. (No negative portion).
3. On Y-SUS: 17V starts off at 17V then very quickly drops to 5V.
4. Floating Ground 5V and 15V are not produced. (See pages 60~61 for more details).
5. Removing all connectors on the Z-SUS board (Except the panel connectors) does
not change test results.
6. Removing Y-Drive boards cause all voltages to return to normal.
Including the Y-Drive signal checked on the right side of C213.
7. Reconnecting all connectors on the Z-SUS board shows it is not creating a
correct waveform. Just spikes. (17V now stays up).
8. Using the Diode Checks for the Y-Drive boards do not indicate a problem.
(See pages 67, 70, 71 and 74 for more details).
FIX:
Replacing the Z-SUS board fixed the problems.

150

January 15, 2010 60PS11 Plasma

No Remote Function Service Tip:


TIP:
SYMPTOM:
When the set turns on and a picture appears, the bottom of the picture
shows the Input selection screen.
The Remote did not work.
The Front Function Keys did not work. (Except the Main Power Switch).
CHECKS:
1. Main Board: Reading the Key 1 and Key 2 lines found that Key 2 was at 0.8V.
Key 1 read normal at 3.3V. (See page 124 for more details).
2. Feeling the Function buttons found that the right hand button (as viewed from the
rear) did not feel the same as the others. It was stuck.
FIX:
1. Removing and repositioning the button assembly freed up the button. The set
return to normal function. (See page 116 for more details).

151

January 15, 2010 60PS11 Plasma

of the Picture is missing Top or Bottom Tip:


TIP:
SYMPTOM:
When the set turns on, the Top or Bottom of the picture is black. It is possible that
the whole picture could be black if more than one connector is involved.
CHECKS:
1.Look careful the connections between the Y-SUS and Upper and Lower Y-Drive
boards. It is very possible that the can be improperly seated.
See next page for additional information.
FIX:
1.Remove and reseat the board correctly.
2.Note: This can happen if this board is replaced or pulled off to perform checks.

Improperly Seated
Connector

Note the pins are


visible across the
top inside of the
connector.

Properly Seated
Connector

Note now the pins are


not visible across the
top inside of the
connector.

152

January 15, 2010 60PS11 Plasma

of the Picture is Dimmed Down (Shadowed) Top or Bottom Tip:


TIP:
SYMPTOM:
When the set turns on, either the Top or Bottom of the picture looks like it has a
shadow, (darker). It is possible that the whole picture could be the same if it
involves multiple connectors.
FIX:
1. 12 pin Retainer (P/N EAG61050702), Clip.
2. Note: Place Clip on all Connectors from Y-SUS to the Y-Drive boards.
Clip
(P/N EAG61050702)
Connector
Before

Clip

Connector
After

153

January 15, 2010 60PS11 Plasma

60PS11 INTERCONNECT DIAGRAM SECTION

11 X 17 Foldout Section
This section shows the Interconnect Diagram Drawing.
Use the Adobe Acrobat version to zoom in for easier reading.
The Interconnect Diagram has a great deal of quick reference
servicing aids. Use this in conjunction with the Training Manual.
For Printing purposes, print to 11X17 paper size.

154

January 15, 2010 60PS11 Plasma

60PS11 (60H3 Panel) CIRCUIT INTERCONNECT DIAGRAM


NOTE: Diode tests are conducted with the board disconnected.

4mS
0V

100uS

P101

FPC

VR601
Set-Dn

FPC

P115~P306
5~12) FGnd
4) Data Odd Out
3) Data Even Out
2) OC2 T Even
1) STB T

VSC
1,2

To Check FG5V to the Y Drive, measure


across capacitor C170/C270
All Y-Drive voltages measured from FGnd.

FS302 (VS)
6.3A/250V

FPC

Y-SUS

VSC
11,12

+
Waveform
P202
VSC

P
2
1
5

FPC

17V

0V

17V

17V

17

5V Det

0V

4.7V

5V

Gnd

Gnd

Gnd

Gnd

18

AC Det

4.9V

4.9V

5V

5, 6

12V

0V

12V

12V

19

RL On

0V

3.2V

0V

7, 8

Gnd

Gnd

Gnd

Gnd

20

Vs On

0V

3.2V

0V

9, 10

5V

0V

5.14V

5V

21

0V

3.2V

0V

4.94V 4.94V

0V

0V

11

Stby 5V

5V

22

M5 On
Auto Gnd

12

5V

0V

5.14V

5V

23

Stby5V

13, 14

Gnd

Gnd

Gnd

Gnd

24

Key On

Gnd

Gnd

Gnd/nc

15, 16 Gnd (n/c)

0V

0V

Run
5V
Gnd

R640

P214~P303
12) VScan
11) VScan
10) n/c
9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd

FS901 Diode Check


0.097V (In Circuit)
1.29V (No Connectors)
D909/910 Diode Check
D909 Cathode Side
D910 0.093V (I.C.)
1.18V (N.C.)

FG15V

R639

C326

VR901
VScan

P501
N/C

FG5V

IC908

IC909

P307
Floating Gnd

P215~P305
12) OS2 B Even
11) STB B
9~1) All FGnd

Va

P204

Diode Check
Open

P102

Y-SUS and Y Drive Signals


FS901 Protects T902 for
FG15V and FG5V Creation

Short across pins 1 and


2 of P6 Auto Gen to
generate a test pattern.
(Note: Must Remove
LVDS Cable).

P200

D6
IC306

P202

nc
Gnd

P103

Pin
1,2,3,4
5
6,7

P104

Run
VA Voltage
nc
Gnd

P105

nc
Gnd

P110
3.3V in
on Pins
57~60

P120
Va out
on Pins
1~12

P106

P107

P108

Diode Check
Open

P2
IC5

L
*FL5
P5 V
M5V
IC303
IC302
D
D7
IC7 1 (0V)
S
IC12
2 (3.3V)
Control
1 (0V)
929Hz
3 (5.0V)
X2 IC11
2 (2.5V)
VS-DA
P101
3 (5.0V)
Pin 1-4 is
Pin 1-4 is
IC1
IC6 3.3V to TCP
3.3V to TCP 1 (0V)
from
IC304
from IC304 2 (3.3V)
1 (0V) 2 (3.3V) 3 (5V)
3 (5.0V)
P6
Pin 1-4 is 3.3V to
P104
IC16
IC304
TCP from IC304
P3
AUTO
N/C
GEN
*FL4
M5V

* If the complaint is no
video and shorting the
points (AutoGen) causes
video to appear suspect
the Main board or LVDS
cable.

3.3V and X-Drive


Center RGB Signals

IC201 NV RAM
1,2) Gnd
3,4) Gnd
5,6) 3.29V
7) Gnd
8) 3.29V

LVDS

P202

P203

P204

3
4,5
6,7
8

1.9V
1.9V
Open
Open
Open
Gnd
Open

Label
*VS
n/c
Gnd

Diode
Open
n/c
Gnd

*VA
Gnd

Open
Gnd

M5V

2V

9,10

P205

IC202 HDCP
1,2) Gnd
3) 3.29V
4) Gnd
5,6) 3.29V
7) Gnd
8) 3.3V

Pin
1
2
3
4
5
6
7
8

Label
IR
Gnd
Key 1
Key 2
PKEY
Gnd
EyeSCL
EyeSDA

STBY
4.86V
Gnd
3.27V
3.27V
0V
Gnd
0V
0V

Run
4.95V
Gnd
3.27V
3.27V
0V
Gnd
3.28V
3.28V

Z-SUS

VZB TP
R457 Top
To Gnd
Cushion

VR201
VZB Adj

P100

17V

FS101 (17V)
2.5A/125V

IC302
1.3V VDDC REG
1) 5.4V 5) 0.9V
2) 4.95V 6) 0.9V
3) 1.3V 7) 4.9V
4) Gnd 8) 3.6V

P1006
1 2

3 B

D1001
A

IC1001
C

R+
Audio
Amp

IC803

STBY Run

9
10
11
12
13
14

Gnd
5VST
3.3VST
Gnd
LED R
LED W

Gnd
5V
0.34V
Gnd
2.94V
0V

Gnd
5V
5.1V
Gnd
0V
2.91V

15

PWM

0V

0V

A
A

IC301

Q892
C

D804

D627
Q890

Q1002

IC1

A A

12Mhz

MAIN BOARD

A A

IC304

IC305

Gnd

0.6V

Gnd

3.3V

1.85V

5V

3.3V

Q501
C

IC502

IC202

USB

IC502
In Out Gnd

IC503 IC505
Tuner Tuner
9V Reg 5V Reg

12V

3.8V

3.0V

In 0V/3.3V

Gnd

5.0V

4.9V

Out 0V/1.2V

8V

8V

TUNER TU501
TDVW-H103F

ZD601

IC602

IC204
X501

D502

25Mhz

Out

Gnd

C Q601

C
D633

LVDS

S (0V)
S (3.3V)
G (3.3V) G (0V)
D (3.3V) D (3.3V)

3.3VST 1.8VMST 3.3VMST 1.2VPVSB Reg


Reg
Reg
On = Digital CH
Reg

A A
C
BE

P1003

Q504
B EGS

IC601

IC802
BE

Pin Label

E B
Q1001

D628
C

5) 0V
6) 5.1V
IC804

IC201

Micro/Video
Processor

Reset IC1
D303 B E
C
Q302
A-C
A C
X1
B
C
E

4 3

BE

3) 3.2V
4) 0V

Q504
Analog Digital

Q801
1 2

D805
A
C
A

1) 5.1V
2) Gnd

2
C

IC804 USB

IC304
1 23

IC203

IC305

P1005 L1013

IC804 USB
POWER
4) 0V
1) 5V
2) Gnd 5) 0V
3) 3.3V 6) 5V

LVDS
Processor

Q303 3
GS
IC301
21
D
IC302
C
Q301
L318

D802 A A

P103
P106

P107
N/C

Main Front Side Regulators

P1001

To
Speakers
(All Pins
8.5V)

Z-Drive
Waveform
FL103

FS100 (M5V)
10A/125V

FS101 Diode Check


0.93V (In Circuit)
1.9V (No Connectors)

L1012

P1001

FS102 Diode Check


Open (In Circuit)
Open (No Connectors)

FS100 Diode Check


Open (In Circuit)
Open (No Connectors)

IC503
9V Reg

P101 (Ft Keys) to P102 (Ft IR)


Pin Label Both Diode Check
1 Key 1 3.3V
Open
2 Key 2 3.3V
Open
3, 4 Gnd
Gnd
Gnd

234Vp/p

FS102 (VS)
6.3A/250V

IC602, IC802
1) 5V
2) 4.6V
3) 4.6V
4) 3.3V
5,6,7,8) Gnd

Ft IR P102 P101
Intelligent
Sensor

400us

To run the Z-SUS without the


Y-SUS. Jump Audio 17V from
SMPS to pin 1 of P100.

* (Vs) Variable according


to Panel Label
Va is not used by Z-SUS

Gnd
Open
Open

P101 Ft Keys

X-Board Center
P201

Pin
1,2

And Power SW

Va
P220
Va in on
Pins 19~30

Diode
2V
Gnd

Diode
1.9V
1.9V

Main Back Side Regulators

P102

3.3V and
X-Drive
Left RGB
Signals
P307 Y-SUS

P101

Pin 1~5 (17V)

Gnd
M5V

To Test Control board:


Disconnect all connectors except the SMPS. When set
turned on, observe Control board LED. If its on, most
likely Control board is OK.
If M5V is not present on P200 pins 1~4, jump STBY 5V
fro SMPS P814 Pin 24.

P216~P308
All Pins FGnd

P121
Run
VA Voltage
nc
Gnd

Ribbon Cable

5V

M5V
Gnd

Run
17V
17V
17V
17V
0.06V
0.19V
0.22V
Gnd
3.16V

SMPS Test Unplug P814 to Main board.


Apply AC, all voltage should run.
See Auto Gen on the Control board to perform a Panel Test.
If all supplies do not run when A/C is reapplied, disconnect P811,
P812, P813 to isolate the excessive load. Use two (100W) light bulbs
in series connected between Vs and Gnd to place SMPS under a load.

5V

Diode
2V
Gnd

Run
5V
Gnd

Label
15V (17V)
15V (17V)
15V (17V)
15V (17V)
CTRL OE
ER UP
ER DN
GND
Z Bias

GND
Gnd
11 Z SUS UP 0.4V
12 Z SUS DN 0.6V

P813 SMPS to Control


Pin Label
1~4 M5V
Gnd
5~8

5V

4.94V 4.94V

P200 Control to SMPS


Pin Label
1~4 M5V
Gnd
5~8

P1

T902

T901

P
3
0
8

C326

P203

FPC

FS901
(M5V)
5A/125V

VR902
-VY

17V

VSC TP
Across R306

Pin
1,2,3,4
5
6,7

STBY Run No Load

3, 4

FS303 Diode Check


0.93V (In Circuit)
1.29V (No Connectors)

Pins (45~50) 17V


From D909/D910

VR601
SET DN

-Vy TP
Top R306
Floating Gnd
Bottom R640

VSC
(*140V)
From FG

Y-Drive
Lower

Label

With the unit on, if D7 is not on, check 5V supply.


If present replace the Control PCB.
If missing, see (To Test Control Board)

VR602
SET UP

P
3
0
5

P
2
1
6

Pin

FS301 Diode Check


Open (In Circuit)
Open (No Connectors)

FS303
(M5V)
10A/125V

P101

FG5V
7/8

No Load

7
8
9
10

CN701
n/c

SC101

STBY Run

Pin
1
2
3
4
5
6

P814

1, 2

To Check for Y-SUS Drive Waveform


With the Y-Drive boards Disconnected
Use the bottom leg of C326.
Or Pins 1~2 of P304
Or Pins 11~12 of P303
392V p/p (Flat bottom)

P
3
0
3

P
2
1
4

F101 (AC)
15A/250V

Note: IC304 (3.3V Regulator) routed to all X Boards

P211

P201

FPC

P
3
0
4

FS301 (VA)
10A/125V

P111

C270 -

FPC

P
1
1
6

FS302 Diode Check


Open (In Circuit)
Open (No Connectors)

Label

39V (AC) rms

P811 SMPS
to P101 Z-SUS

P100 Z-SUS
to P101 Control

VR901
VA Adj

160V STBY
391V RUN
4.57V STBY

Z-Drive Creation Signals

P104

FG5V
7,8

P
3
0
6

Open

P814 SMPS to Main

P
3
0
1

P
1
1
5

*Vs

Pin

VSC
C170

1~2

P811
P813

AC In

P302

P
1
1
4

P103

FPC

Waveform

Gnd
nc

VS Adj
VR951

0V

P101

P102
VSC
(*140V)
From FG

Gnd
nc

F801
8A/250V

* (Vs) Variable according


to Panel Label

P114~P301
All Pins FGnd

P116~P304
12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
4) FGnd
3) n/c
2) VScan
1) VScan

Diode
2V
Gnd
Open

4-5
3

514V P/P

Connect Scope between Waveform TP on Y-Drive and Gnd


Use RMS information just to check for board activity.

Y-Drive
Upper

P111
P211
Not
Connected

Pin Label
9,10 M5V
Gnd
8
6-7 *Va

150uSec
5uSec

SMPS
POWER SUPPLY

P812

Connect Scope
between Waveform TP
on Z board and Gnd
Use RMS information
just to check for board
activity.

P104

50VAC rms
White
59~106VAC rms
Picture

VR602
Set-up
20uSec
5uSec

Step 1: RL On command turns on 5V and 12V. Also 5V Det from SMPS (pins 9, 10, 12) when 5V turns on.
Step 2: M5 On command Turns on M5V
17V turns on with
5V Det from SMPS when
Step 3: Vs On command Turns on Va first then VS
Vs On command
5V (9~11) turns on

P102

Y-DRIVE WAVEFORM

Z-SUS Signal

P105

Waveform TP
On Either Y-Drive Board

Q502

IC504
HDMI

EB C
Q503
E B
SIF 16
(5V) 15
DIF - 13
DIF + 12

19 Video

C=4.7V
A=0V

IC805

A=5V
D806

TUNER

(5V) 4
1

Grayed Out ICs are located on Back

Q891
C

IC505
2

Tuner
5V Reg

3 2 1

3.3V and X-Drive Right RGB Signals


P210
3.3V in on
Pins 57~60
P206

P221
Va out on
Pins 1~12
P207

Va

P320
Va in on
Pins 19~30
P301

P310
3.3V in on
Pins 57~60
P302

X-Board Right
P303

P304

P305

P306

P307

P308

60PS11 LVDS
P1003
WAVEFORMS

P1003 LVDS (Pin 11) 5uSec / 718mV

P1003 LVDS (Pin 12) 5uSec / 565mV

P1003 LVDS (Pin 13) 5uSec / 479mV

P1003 LVDS (Pin 14) 5uSec / 594mV

P1003 LVDS (Pin 11) 2uSec / 718mV

P1003 LVDS (Pin 12) 2uSec / 565mV

P1003 LVDS (Pin 13) 2uSec / 479mV

P1003 LVDS (Pin 14) 2uSec / 594mV

P1003 LVDS (Pin 15) 5uSec / 648mV

P1003 LVDS (Pin 16) 5uSec / 414mV

P1003 LVDS (Pin 17) 5uSec / 717mV

P1003 LVDS (Pin 18) 5uSec / 624mV

P1003 LVDS (Pin 15) 2uSec / 648mV

P1003 LVDS (Pin 16) 2uSec / 414mV

P1003 LVDS (Pin 17) 2uSec / 717mV

P1003 LVDS (Pin 18) 2uSec / 624mV

P1003 LVDS (Pin 19) 5uSec / 702mV

P1003 LVDS (Pin 20) 5uSec / 563mV

P1003 LVDS (Pin 21) 5uSec / 82mV

P1003 LVDS (Pin 22) 5uSec / 140mV

P1003 LVDS (Pin 19) 2uSec / 702mV

P1003 LVDS (Pin 20) 2uSec / 563mV

P1003 LVDS (Pin 21) 2uSec / 82mV

P1003 LVDS (Pin 22) 2uSec / 140mV

Connector P1003
Configuration
indicates
signal pins.
2

10

12

11

14

13

16

15

18

17

20

19

22

21

24

23

26

25

NOTE: LVDS P1003


Information
There are actually 12
pins carrying Video 2
pins are carrying clock
signals (17 and 18) to
the Control board. With
high activity video, pins
21 and 22 would have
signals present.
WAVEFORMS:
Waveforms taken using
SMTP Color Bar input. All
readings give their Time
Base related to scope
settings.
All waveforms taken from
the P1003.

End of Presentation

This concludes the Presentation


Thank You

156

January 15, 2010 60PS11 Plasma

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