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Overview of Topics to be Discussed
Section 1
CAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power
is required for diagnosis or test purposes, disconnect the power immediately after performing
the necessary checks. Also be aware that many household products present a weight hazard.
At least two people should be involved in the installation or servicing of such devices.
Failure to consider the weight of an product could result in physical injury.
CONTACT INFORMATION
Customer Service (and Part Sales)
(800) 243-0000
(800) 847-7597
aic.lgservice.com
us.lgservice.com
LG Web Training
lge.webex.com
LG CS Academy
lgcsacademy.com http://136.166.4.200
LG Learning Academy
LCD-DV: 32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 47LG90
PLASMA: 42PG20, 42PQ20, 60PS11, 50PG20, 50PS80, 50PS60
Available on the
Plasma page
Plasma Panel
Alignment Handbook
ESD Notice
Todays sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage
the electronics in a manner that renders them inoperative or reduces the time until their next failure.
Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively,
you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before
removing a replacement part from its package, touch the anti-static bag to a ground connection point or
unpainted metal in the product. Handle the electronic control assembly by its edges only. When
repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.
Regulatory Information
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to
Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction
manual, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate
the receiving antenna; Increase the separation between the equipment and the receiver; Connect the
equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the
dealer or an experienced radio/TV technician for help.
Approximately 10 minute pre-run time is required before any adjustments are performed.
2.
Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.
3.
Always adjust to the specified voltage level (+/- volt) unless otherwise specified.
4.
Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supply
and Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.
4.
C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.
5.
The PDP Module must be carried by two people. Always carry vertical NOT horizontal.
6.
7.
Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.
8.
Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.
9.
New Panels and Frames are much thinner than previous models. Be Careful with flexing these panels. Be careful
with lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.
10. New Plasma models have much thinner cabinet assemblies and mounts.
Be extremely careful when moving the set around as damage can occur.
60PS11 Specifications
11
12
600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process
(vs. Comp. 8 sub-field/frame)
Original Image
Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.
13
BOTTOM PORTION
p/n MKJ42519617
TOP PORTION
14
Music and
Photos
Software
Upgrades
USB
HDMI 3
SIDE
INPUTS
AC In
REAR
INPUTS
15
60PS11 Dimensions
Power:
380W (Typical)
0.19W (Stand-By)
3-1/2"
88.9mm
57-13/16"
1468.1mm
8-13/16"
224.2mm
17-1/8"
435mm
40-1/2"
1028.7mm
23-5/8"
600mm
15-3/4"
400mm
15-3/4"
400mm
37-3/8"
949.96mm
Model No.
Serial No.
Label
Remove 7 screws
to remove stand
for wall mount
3-1/8"
78.74mm
Weight:
60-11/16"
780mm
16
15-5/8"
396.24mm
DISASSEMBLY SECTION
This section of the manual will discuss Disassembly, Layout and Circuit
Board Identification, of the 60PS11 Advanced Single Scan Plasma Display Panel.
Upon completion of this section the Technician will have a better
understanding of the disassembly procedures, the layout of the printed
circuit boards and be able to identify each board.
17
18
FPC
Power Supply
(SMPS)
FPC
FPC
FPC
Z-SUS
Y-SUS
FPC
FPC
Z-SUB
FPC
Side Input
(part of main)
Control
FPC
TCP
Heat Sink
Y-Drive
Lower
IR/LED
Board
FPC
Main Board
AC In
Left X
Keyboard
Center X
Invisible Speakers
19
Right X
Conductive Tape Under Main Board
Disconnect the following connectors: P302, P307 and Ribbon Cable P101.
Remove the 9 screws holding the Y-SUS in place.
Remove the Y-SUS by lifting slightly to clear standoff and slid it to the right, disconnecting the Y-Drives.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm VSC, -Vy and Z-bias as well.
Y-Drive Boards Removal
Board Standoff
Collar
Note: Y, Z-SUS and Y-Drive boards are mounted on board stand-offs that have a small collar.
The board must be lifted slightly to clear these collars. Behind each board are Chocolate (dense rubber
like material) that act as shock absorbers. They may make the board stick when removing.
20
21
Press
Inward
Press
Inward
LVDS Cable
Connector
22
A
LVDS Cable
Stand should have already be removed
Warning:
Never run the TV with the
TCP Heat Sink removed
E
Left
E
Right
F
Heat Sink
Ground
Strap
C
D
A
Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.
23
P110
P210
P310
Are all the
same
P121
24
25
The Left X Board drives the right side of the screen vertical electrodes
The Center X Board drives the Center of the screen vertical electrodes
The Right X Board drives the left side of the screen vertical electrodes
26
At the end of this Section the technician should understand the operation
of each circuit board and how to adjust the controls. The technician
should be able with confidence to troubleshoot a circuit board failure,
replace the defective circuit and perform all necessary adjustments.
27
FPCs
P101
Floating
Ground
P102
P103
P104
5VFG
P116
P111
Drive Data
Clock (i2c)
P211
P201
P103
P115
n/c
Note:
Va not used
by Y-SUS
M5V
M5V, Vs, Va
P813
SK101
P814
SMPS
Relay On +5V, 12V
Turn On
M5 On M5V
Commands VS On 17V, Va, Vs
AC
Input
Filter
P101
P305 Data, Clock (i2c)
Floating Gnd (FG)
Floating
Ground
Logic Signals
M5V 17V
Y Drive
Lower
17V
Note: 17V not used
by Control
Va
P200
P2
CONTROL
Board
P101 3.3V
P102
RGB Logic
Signals
P5
P104
RGB Logic
Signals
3.3V
3.3V
P220
P311 P331
X-Board-Center
LVDS
P1006
MAIN Board
5V STBY
IR, Power LED,
Intelligent Sensor
P204
P205
3.3V
Key Board
Pull Up
Control Keys
Power Button
X-Board-Right
Va
Va
P203
P310
P320
FPCs
Speakers
P1003
P1101
P1005
P221
P206
P301
P302
28
P105
Video
Set in
Stand By:
STB +5
AC Voltage
Det
3.3V
P232 P211
P106
Display Enable
P210
P110
P120
P121
X-Board-Left
P202
P102
P103
17V
Display Enable
LVDS
P307
P201
Z SUS
Board
P100
P1
P216
P104
P215
FPCs
P101
5VFG
P214
P203
SMPS
Board
M5V, Vs, Va
Y-SUS Board
P202
P204
P811
P812
P114
P101
n/c
FPCs
P302
Display Panel
Horizontal
Electrodes
Sustain
P303
P304
P305
P306
(10)
(8)
(2)
(11)
(3)
(4)
(5)
(6)
(12)
(13)
(14)
(15)
(7)
29
Adjustment Notice
Set-Up
-VY
Vscan
Ve
Z_BIAS
Panel
Rear View
30
Always refer to the Voltage Sticker located on the back of the panel, in the upper Left
Hand side for the correct voltage levels for the VA, VS, -VY, Vscan, and Z Bias as these
voltages will vary from Panel to Panel even in the same size category.
Set-Up and Ve are just for Label location identification and are not adjusted in this panel.
31
Y-SUS and
Z-SUS Boards
Main Board
Adjustments
VS
VA
M5V
STBY 5V
Microprocessor Circuits
17V
Audio B+ Supply
12V
Tuner B+ Circuits
5V
There are 2 adjustments located on the Power Supply Board VA and VS. The
M5V is pre-adjusted and fixed. All adjustments are made with relation to Chassis
Ground. Use Full White Raster 100 IRE
VA
RV901
VS
RV951
32
33
P812
To Y-SUS
P811
To Y-SUS
8Amp/250V
0V Stby
382V Run
Fuse F801
PFC
Circuit
VA Source
VS Source
VA VR951
17V Source
VS VR901
P813
To Control
Bridge
Rectifiers
IC701
Sub Micon
RL101
RL103
Main Fuse
F101
AC Input
SC 101
STBY 5V
5V, 12V
Source
P814
To MAIN
15Amp/250V
34
35
POWER SUPPLY
(SMPS)
AC In
9
Vs
Reg
5V/12V
Regulators
Stand
By 5V Reg
AC
Det.
Stand By
5V
5V Det.
7
Not
Used
14
17V
Reg
5V 12V
Va
Reg
16
16
Vs
15
Va
15
17V
Relay
On
10
M5V
Reg
M5V
On
Vs
On
14
14
Va
Vs
M5V
Va
Vs M5V
15
16
10
15
16
Y-SUS PWB
Va
15
AC Det.
If missing,
set turns
off within
10 sec.
5V MST
Switch
Q303
Other
12V Video
+5V HDMI EDID
And other input circuits
Power
Switch
At point 4 TV is in
Stand-By state. It is
Energy Star Compliant.
Less than 1 Watt
Circuits
3.3V Reg
IC301
Reset
Q302
3.3VST
2
4
MAIN
PWB
3.3V
11
Power On
36
11
13
17V
Y DRIVE Upper
12
13
13
15
X PWB
Left
STBY 5V
14
Control PWB
Y DRIVE Lower
6
5V
Relay
Mnt
On
Microprocessor
IC1
10
17V
11
5V
Floating
Gnd
17V Audio
5V Mnt
12
10
Z-SUS PWB
17V
5VFG
M5V
2
5
15
Front IR
Board
X PWB
Center
Remote
Or Key
15
X PWB
Right
Example
Voltage Label
VA
Voltage
VS
Voltage
Vs TP
P811
Pin 1 or 2
Vs Adjust:
Place voltmeter on pin 1 or 2
of P811 or P812. Adjust
VR951 until the reading
matches your label.
Va Adjust:
Place voltmeter on pin 6 or 7
of P811 or P812. Adjust
VR901 until the reading
matches your label.
37
100W
100W
4 or 5 or 8
P811 or P812
Check Pins 6 or 7
for Va voltage
Gnd
P812
Vs
Pins 1 or 2
P811 or P812
Check Pins 1 or 2
for Vs voltage
PFC
Circuit
Hot Ground:
Represents a Shock
Hazard
P812
10) M5V
9) M5V
8) Gnd
7) VA
6) VA
5) Gnd
4) Gnd
3) n/c
2) VS
1) VS
VR951
VS Adj
IC804
IC604
Not Hot
or Cold
F101 (AC)
15A/250V
F801
8A/250V
391V Run
4.57V STBY
IC503
P811
1) VS
2) VS
3) n/c
4) Gnd
5) Gnd
6) VA
7) VA
8) Gnd
9) M5V
10) M5V
P811
P813
P813
Check Pins 1~4
For M5V
VR901
VA Adj
P814
IC701
RL101RL102
N
CN701
n/c
SC101
Note:
Always test the SMPS under a load using the 2 light bulbs.
Abnormal operational conditions may result if not loaded.
38
P814
Check Pins 11 or 23 for 5V
SBY
39
Label
STBY
Run
Diode Mode
Pin
Label
STBY
Run
Diode Mode
17V
0V
17V
2.2V
17V
0V
17V
2.2V
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
12V
0V
12V
1.89V
12V
0V
12V
Open
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
5V
5V
5V
1.99V
10
5V
5V
5V
1.99V
11
Stby 5V
5V
5V
2.17V
12
5V
5V
5V
1.99V
13
Gnd
Gnd
Gnd
Gnd
14
Gnd
Gnd
Gnd
Gnd
15
Gnd
Gnd
Gnd
Gnd
16
Gnd
Gnd
Gnd
Not Used
17
5V Det
.15V
5V
1.09V
18
AC Det
5V
5V
2.75V
19
RL On
0V
3.73V
Open
20
VS On
0V
3.2V
Open
21
M5 ON
0V
3.24V
Open
22
Auto Gnd
Gnd
Gnd
2.78V
23
Stby 5V
5V
5V
2.17V
24
0V
0V
Open
Key On
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
40
SMPS Connector SC101 and P811 Identification, Voltages and Diode Check
SC101 AC INPUT
Connector
Pin Number
SC101
1 and 3
Standby
Run
120VAC
120VAC
Diode Mode
Open
Pin
Label
STBY
Run
Diode
Mode
Pin
Label
STBY
Run
Diode
Mode
1, 2
*Vs
0V
*196V
Open
1, 2
*Vs
0V
*196V
Open
n/c
n/c
n/c
n/c
n/c
n/c
n/c
n/c
4, 5
Gnd
0V
0V
Gnd
4, 5
Gnd
0V
0V
Gnd
6, 7
*Va
0V
*68V
Open
6, 7
*Va
0V
*68V
Open
Gnd
0V
0V
Gnd
Gnd
0V
0V
Gnd
0V
5V
0.093V
9, 10
0V
5V
0.093V
9, 10
M5V
M5V
Note: The Diode Mode test on the M5V line reads almost a short. This is normal.
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
41
Pin
Label
Run
Diode Mode
M5V
5V
0.093V
M5V
5V
0.093V
M5V
5V
0.093V
M5V
5V
0.093V
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
P813
1
Diode Mode Readings taken with all connectors Disconnected, (Unless Specified). Black lead on Gnd. DVM in Diode Mode.
42
(Overview)
Y-SUS Board develops the V-Scan drive signal to the Y-Drive boards.
This Section of the Presentation will cover alignment and troubleshooting the Y-SUS Board
for the Single Scan Plasma. Upon completion of the Section the technician will have a better
understanding of the operation of the circuit and will be able to locate voltage and
Diode mode test points needed for troubleshooting and alignments.
Adjustments
DC Voltage and Waveform Checks
Diode Mode Measurements
Operating Voltages
SMPS Supplied
VA
VS
M5V
Y-SUS Developed
-VY VR902
VSC VR901
V SET UP VR602
V SET DN VR601
17V
Floating Ground
FG 5V
FG 15V
43
Distributes M5V
Distributes
VA
Left X Board
Distributes VA
Circuits generate
Y-Sustain Waveform
Z-SUS Board
Distributes 17V
Control Board
Y-Drive Boards
Receive Scan Waveform
Display Panel
44
P30
1
P3
06
FS302 (Vs)
6.3A 250V
c
P304
Pins 1
and 2
SET UP
VR 602
P303
c
P305
-VY TP
FS901
(M5V)
5A/125V
-VY ADJ
VR902
P101
P3
08
V SET DN
VR 601
Floating Gnd 5V
Pins 5 and 6
Pins 1 ~4, 7~8 Logic
(Drive) Signals to the
Y-Drive Lower board
Ribbon
VSC TP
R306
VSC ADJ
VR901
45
P307
Va to Left
X Board
Pins 5~7
Y-SUS Board
Component
Layout Drawing
46
CAUTION: Use the actual panel label and not the book for exact voltage settings.
Set should run for 15 minutes, this is the Heat Run mode.
Set screen to White Wash.
1) Adjust Vy to Panel Label voltage (+/- 1V)
2) Adjust VSC to Panel Label voltage (+/- 1V)
-Vy
VSC
P308
Voltage Reads
Positive
+
VR902
-Vy Adj
-Vy TP Marked
VR901
VSC Adj
VSC TP
R306
47
P202
P215
60~106 VRms
514V p/p
100uS
48
49
Fig 1:
As an example of how to lock in to the Y-Drive Waveform.
Fig 1 shows the signal locked in at 4ms per/div.
Note the 2 blanking sections.
The signal for SET-UP is outlined within the Waveform
Fig 2:
At 2mSec per/division, the waveform to use for
SET-UP Is now becoming clear.
Now, the two blanking signal are still present.
Outlined
Area
Blanking
Area to
be adjusted
FIG1
4mS
FIG2
2mS
Blanking
Fig 3:
At 100us per/div. the signal for SET-UP is now easier to
recognize. It is outlined within the Waveform.
Remember, this is the first large signal to the right of blanking.
Fig 4:
At 400uSec per/division, the adjustment for SET-UP
can be made.
It will make this adjustment easier if you use
the Expanded mode of your scope.
50
Area to
be adjusted
Area to
be adjusted
FIG3
100uS
Blanking
FIG4
40uS
Fig 1:
As an example of how to lock in to the Y-Drive Waveform.
Fig 1 shows the signal locked in at 4ms per/div.
Note the 2 blanking sections.
The signal for SET-DN is outlined within the Waveform
Fig 2:
At 2mSec per/division, the waveform to use for
SET-DN is now becoming clear.
Now the two blanking signals are still present.
Blanking
Area to
be adjusted
FIG2
2mS
Blanking
Fig 3:
At 100us per/div. the signal for SET-DN is now easier to
recognize. It is outlined within the Waveform.
Remember, this is the first large signal to the right of blanking.
Fig 4:
At 20uSec per/division, the adjustment for
SET-DN can be made.
It will make this adjustment easier if you use the
Expanded mode of your scope.
Outlined
Area
FIG1
4mS
Area to
be adjusted
51
Area to
be adjusted
FIG3
100uS
Blanking
FIG4
20uS
Observe the Picture while making these adjustments. Normally, they do not have to be done.
P202
P215
VR602
A
Y-Drive Test Point
Lower Y-Drive
VR601
SET-UP ADJUST:
1) Adjust VR602 and set the (A) portion of the signal to
match the waveform above. (20uSec 10uSec)
SET-DN ADJUST:
2) Adjust VR601 and set the (B) time of the signal to match
the waveform above. (160uSec 5uSec)
ADJUSTMENT LOCATIONS:
Just right of the bottom left heat sink.
52
100uSec
The center begins to wash out and arc due to SET UP
100uSec
53
100uSec
Normal
169uSec
NOTE: If abnormal settings cause
shutdown, remove the LVDS from
Control board and make necessary
adjustments.
Then reconnect LVDS cable, select
White Wash and adjust correctly.
110V off
the Floor
Floor
(SET DN) Too High 166uSec
Full Clock Wise
100uSec
Normal
169uSec
The center begins to wash out and arc due to decreased SET DN time.
54
P/N EBR55492901
C326
55
P306
P115
(4mSec per/div)
The signal for all 4 pins looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
c
Y-Drive Upper
Board
Y-SUS Board
5~12) FGnd
4) Data Odd Out
3) Data Even Out
2) OC2 T Even
1) STB T
P306 Pins 1~4 are Logic (Drive) Signals to the Y-Drive Upper.
P304 carries the Y-Drive signals to the upper via pins 1 and 2.
56
P306
P115
0V
1.58V
1.58V
1.58V
1.58V
BLACK LEAD
Red Lead FG
0V
0.679V
0.679V
0.679V
0.679V
c
Meter in the Diode Mode
57
VScan
140V
(from FG)
P116
P304
Y-Drive Upper
Board
Y-SUS Board
58
Y-SUS Board
P304
12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
Floating Gnd 4) FGnd
3) n/c
2) VScan
1) VScan
1.59V
1.59V
1.60V
1.59V
1.69V
1.69V
Open
Open
0V
Open
Open
Open
BLACK LEAD
Red Lead FG
0.68V
0.68V
0.66V
0.68V
0.534V
0.534V
Open
Open
0V
Open
Open
Open
59
P305
P215
(4mSec per/div)
The signal for both pins looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
c
Y-Drive Upper
Board
Y-SUS Board
P305 Pins 11~12 are Logic (Drive) Signals to the Y-Drive Upper.
P303 Pins 11 and 12 carries the Y-Drive signals to the lower.
60
Y-SUS Board
P215
P305
1.6V
1.6V
0V
BLACK LEAD
Red Lead FG
0.68V
0.68V
0V
c
Meter in the Diode Mode
Y-Drive Board should be
disconnected for this test.
61
P303
P214
VScan
140V
(from FG)
Y-Drive Lower
Y-SUS Board
12) VScan
11) VScan
10) n/c
9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd
62
All signals for pins 1~4 and 7~8 looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
They will read about 400V p/p.
Y-SUS Board
P214
P303
12) VScan
11) VScan
10) n/c
Floating Gnd 9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd
Open
Open
Open
0V
Open
Open
1.69V
1.69V
1.6V
1.59V
1.6V
1.6V
BLACK LEAD
Red Lead FG
Open
Open
Open
0V
Open
Open
0.53V
0.53V
0.68V
0.68V
0.68V
0.68V
63
Floating Ground
checks must be
made from
Floating Ground.
Use any pin on
P301 or P216.
Run: 5V
T901
T902
FG 5V
Test Point
FG 15V
Test Point
Floating
Gnd
Q909
Q908
FG15V Test Point Floating Ground 15V
Checked at Q908 or Anode D913.
Standby: 0V
Floating
Gnd
64
Run: 17V
17V
Test Point
Cathode Side
D909 and D910
T902
65
P302
Label
Run
Diode Mode
Vs
*196V
Open
Vs
*196V
Open
n/c
n/c
n/c
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Va
*68V
Open
Va
*68V
Open
Gnd
Gnd
Gnd
M5V
5V
1.29V
10
M5V
5V
1.29V
66
Pin
Label
Run
Diode Mode
VA
*68V
Open
VA
*68V
Open
VA
*68V
Open
VA
*68V
Open
n/c
n/c
n/c
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
67
Location
FS201
15V Pins 45 through 50
FS901
(M5V)
5A/125V
68
Run
Diode
Label
Run
Diode
15V
17.8V
1.18V
26
DELTA_VY_ON_OFF
0.7V
Open
15V
17.8V
1.18V
27
GND
Gnd
Gnd
15V
17.8V
1.18V
28
DELTA_VY1
0.68V
Open
15V
17.8V
1.18V
29
GND
Gnd
Gnd
15V
17.8V
1.18V
30
SET_UP2
0V
Open
15V
17.8V
1.18V
31
GND
Gnd
Gnd
NC
NC
NC
32
SET_UP1
0.1V
Open
OC2_ODD
2.84V
Open
33
GND
Gnd
Gnd
GND
Gnd
Gnd
34
SET_DN2
4.9V
Open
10
OC1_ODD
1.87V
Open
35
GND
Gnd
Gnd
11
GND
Gnd
Gnd
36
SET_DN1
3.48V
Open
12
CLK
0.3V
Open
37
CTRL_OE
0V
Open
13
GND
Gnd
Gnd
38
GND
Gnd
Gnd
14
DATA_ODD
0V
Open
39
PASS_TOP
1.4V
Open
15
GND
Gnd
Gnd
40
GND
Gnd
Gnd
16
DATA_EVEN
0V
Open
41
DELTA_VY2
0.7V
Open
17
GND
Gnd
Gnd
42
GND
Gnd
Gnd
18
GND
Gnd
Gnd
43
ER_UP
0.2V
Open
19
STB
4.3V
Open
44
GND
Gnd
Gnd
20
GND
Gnd
Gnd
45
ER_DN
0.1V
Open
21
OC2_EVEN
2.8V
Open
46
GND
Gnd
Gnd
22
GND
Gnd
Gnd
47
SUS_UP
0.1~0.4V
Open
23
GND
Gnd
Gnd
48
GND
Gnd
Gnd
24
OC1_EVEN
1.85V
Open
49
SUS_DN
4V
Open
25
GND
Gnd
Gnd
50
GND
Gnd
Gnd
Pin
Pin
69
Reverse: 0.64V
Reverse: Open
Reverse: Open
Blk Red
Red
Red Blk
Shown: 0.69V
Shown: 0.5V
Shown: 0.46V
Reverse: 0.69V
Reverse: Open
Reverse: Open
Blk Red
Red Blk
Shown: 0.58V
Shown: 0.49V
Shown: 1.99V
Reverse: 1.77V
Reverse: Open
Reverse: Open
Red
RF2001
D41~D42
D71~D74
D81~D82
D708
Blk
Shown: 0.94V
Red
K3453
*Q48
Q49
Blk
Shown: 0.35V
Red
51N25
Q41~Q47
Blk
Shown: 0.6V
Blk Red
Red Blk
Shown: Shorted
Shown: 0.37V~0.38V
Shown: 0.37~0.38V
Reverse: Shorted
Reverse: Open
Reverse: Open
0.3 Ohms
Blk Red
70
Red Blk
P103
P114
P215
P202
Y-Drive (V Scan) WAVEFORM
71
PANEL
SIDE
Y-SUS
SIDE
72
P306
P115
(4mSec per/div)
The signal for all 4 pins looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
c
Y-Drive Upper
Board
Y-SUS Board
5~12) FGnd
4) Data Odd Out
3) Data Even Out
2) OC2 T Even
1) STB T
P115 Pins 1~4 are Logic (Drive) Signals to the Y-Drive Upper.
P116 carries the Y-Drive signals to the upper via pins 1 and 2.
73
P306
P115
0V
Open
Open
Open
Open
BLACK LEAD
Red Lead FG
0V
0.849V
0.849V
0.87V
0.854V
c
Meter in the Diode Mode
74
VScan
140V
(from FG)
P116
P304
Y-Drive Upper
Board
Y-SUS Board
12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
4) FGnd
3) n/c
2) VScan
1) VScan
75
Y-SUS Board
P304
12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
Floating Gnd 4) FGnd
3) n/c
2) VScan
1) VScan
Open
Open
Open
Open
Open
Open
1.81V
1.86V
0V
Open
Open
Open
BLACK LEAD
Red Lead FG
0.85V
0.87V
0.87V
0.87V
0.60V
0.60V
0.39V
0.40V
0V
Open
0.747V
0.747V
76
PANEL
SIDE
Y-SUS
SIDE
77
P305
P215
(4mSec per/div)
The signal for both pins looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
c
Y-Drive Upper
Board
Y-SUS Board
P215 Pins 11~12 are Logic (Drive) Signals to the Y-Drive Upper.
P214 Pins 11 and 12 carries the Y-Drive signals to the lower.
78
Y-SUS Board
P215
P305
Open
Open
0V
BLACK LEAD
Red Lead FG
0. 875V
0.857V
0V
c
Meter in the Diode Mode
Y-SUS Board should be
disconnected for this test.
79
P303
P214
VScan
140V
(from FG)
Y-Drive Lower
Y-SUS Board
12) VScan
11) VScan
10) n/c
9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd
80
All signals for pins 1~4 and 7~8 looks very similar
due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.
They will read about 400V p/p.
Y-SUS Board
P214
P303
12) VScan
11) VScan
10) n/c
Floating Gnd 9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd
Open
Open
Open
0V
Open
Open
Open
Open
Open
Open
Open
Open
BLACK LEAD
Red Lead FG
0.749V
0.749V
Open
0V
0.859V
0.859V
0.60V
0.60V
0.874V
0.874V
0.857V
0.874V
81
P111 on the Upper Y-Drive and P211 on the Lower Y-Drive is not used, No connection.
Y-Drive Upper
Y-Drive Lower
82
Fig 1
Fig 2
Fig 3
To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated
securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).
83
84
FRONT SIDE
RED LEAD On
Floating Ground
85
Z-SUS SECTION
This Section of the Presentation will cover troubleshooting the Z-SUS Board Assembly.
Upon completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting and all alignments.
Locations
VS
M5V
17V
Developed on Z-SUS
Z Bias
86
Y-SUS Board
17V
Control Board
Receives
Logic
Signals
M5V and VS
17V
NO IPMs
Display
87
PDP
Z-SUB
Panel
Z-SUS SECTION
P/N EBR55492601
FS102
VS
6.3A/250V
P104
FPC
P101
VS and M5V
Input from
the Y-SUS
No IPMs
P101
FS100
M5V
10A/125V
Logic Signals from
the Control board
Also +15V generated
on the Y-SUS and routed
through the Control
board.
Z-SUS
Waveform
Test Point
FL103
Z-SUS
Output
FETs
Z-SUS
Waveform
Development
FETs
Z-Bias TP
Top of R457
To Chassis Gnd
Z-SUS
Waveform
Development
FETs
P105
FPC
Z-Bias
VR200
To Z-SUB
FS101
17V
2.5A/125V
P100
P103
88
Z-SUS Waveform
The Z-SUS (in combination with the Y-SUS)
generates a SUSTAIN Signal and an ERASE
PULSE for generating SUSTAIN and
DISCHARGE in the Panel.
Y-Drive
Z Drive
Waveform
Sustain
Reset
Reset
Blanking
50V/div
Vzb voltage
100V 1V
400uS/div
223V p/p
This Waveform is just for reference to observe the effects of Zbz adjustment
89
Z Bias
VZB (Z-Bias) TP
Top Side R457
VZB (Z Bias)
VR201
Set should run for 15 minutes, this is the Heat Run mode.
Set screen to White Wash mode or 100 IRE White input.
Measured from Chassis Ground
90
Pin 1
Pin
Label
Run
Diode Mode
1, 2
VS
*196V
Open
n/c
n/c
n/c
4,5
Gnd
Gnd
Gnd
6,7
VA
*68V
Open
Gnd
Gnd
Gnd
9, 10
M5V
5V
Open
91
Pin
Label
Run
Diode Mode
15V (17V)
17V
1.9V
15V (17V)
0.05V
1.9V
15V (17V)
1.8V
1.9V
15V (17V)
1.7V
1.9V
CTRL OE
0.06V
Gnd
ER UP
0.19V
Open
ER DN
0.22V
Open
Gnd
Gnd
Gnd
Z Bias
3.16V
Open
10
Gnd
Gnd
Gnd
11
Z SUS Up
0.4V
Open
12
Z SUS Dn
0.6V
Open
Pin 1
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
92
Shown:
45F122
A 1.08V
B
AQ10~Q13
BQ14~17
Shown:
0.65V
Reverse:
Reverse: 0.59V
AQ20~Q23
Blk
Red
A 1.06V
AQ30~Q31
Blk
Red
RF2001
Reverse: A 1.03V
B Open
AD407~D409
Short
Reverse: A 1.53V
B Open
Blk Red
Shown:
Reverse: Short
AD414~D415
Blk
Red
Reverse:
Open
Reverse: 0.354V
Blk Red
Reverse: A Open
B Short
Shown: A 0.367V
B 0.356V
Open
Reverse: Open
0.1 Ohms
BD416~D417
0.355V
Shown: A 0.515V
B Short
Open
Blk Red
Shown:
AD20~D23
0.94V
Shown:
Blk Red
Shown:
B 0.748V
BQ32
Open
Blk Red
Shown:
51N25
Blk Red
93
Signals Main Board Supplied Panel Control and LVDS (Video) Signals
Control Board Generated Y-SUS and Z-SUS Drive Signals (Sustain)
X Board Drive Signals (RGB Address)
Operating Voltages
SMPS Supplied
Y-SUS Supplied
Developed on the Control Board
Part
Number
Label
95
X2
CONTROL
BOARD
CRYSTAL
LOCATION
96
MCM
CONTROL BOARD
DRAM DRAM
Resistor Array
MCM
DRAM
X-DRIVE BOARD
16 bit words
IC201
EEPROM
PANEL
2 Buffer
Outputs
per TCP
To Center X-Board
97
Control Board Connector P1 to Y-SUS P101 Voltages and Diode Mode Checks
P111 These pins are very close together. When taking Voltage measurements use Caution.
Pin c
Pins 1 through 6
Receive 17V from the Y-SUS.
The +17V is not used by the
Control board, it is routed to the
Z-SUS leaving on P2 Pins 9~12.
98
Label
Run
Diode Mode
Pin
Label
Run
Diode Mode
15V
17.8V
Open
26
DELTA_VY_ON_OFF
0.7V
1.44V
15V
17.8V
Open
27
GND
Gnd
Gnd
15V
17.8V
Open
28
DELTA_VY1
0.68V
1.44V
15V
17.8V
Open
29
GND
Gnd
Gnd
15V
17.8V
Open
30
SET_UP2
0V
1.44V
15V
17.8V
Open
31
GND
Gnd
Gnd
NC
NC
NC
32
SET_UP1
0.1V
1.44V
OC2_ODD
2.84V
1.44V
33
GND
Gnd
Gnd
GND
Gnd
Gnd
34
SET_DN2
4.9V
1.44V
10
OC1_ODD
1.87V
1.44V
35
GND
Gnd
Gnd
11
GND
Gnd
Gnd
36
SET_DN1
3.48V
1.44V
12
CLK
0.3V
1.44V
37
CTRL_OE
0V
1.44V
13
GND
Gnd
Gnd
38
GND
Gnd
Gnd
14
DATA_ODD
0V
1.44V
39
PASS_TOP
1.4V
1.44V
15
GND
Gnd
Gnd
40
GND
Gnd
Gnd
16
DATA_EVEN
0V
1.44V
41
DELTA_VY2
0.7V
1.44V
17
GND
Gnd
Gnd
42
GND
Gnd
Gnd
18
GND
Gnd
Gnd
43
ER_UP
0.2V
1.44V
19
STB
4.3V
1.44V
44
GND
Gnd
Gnd
20
GND
Gnd
Gnd
45
ER_DN
0.1V
1.44V
21
OC2_EVEN
2.8V
1.44V
46
GND
Gnd
Gnd
22
GND
Gnd
Gnd
47
SUS_UP
0.1~0.4V
1.44V
23
GND
Gnd
Gnd
48
GND
Gnd
Gnd
24
OC1_EVEN
1.85V
1.44V
49
SUS_DN
4V
1.44V
25
GND
Gnd
Gnd
50
GND
Gnd
Gnd
99
LVDS
Video Signals from the Main Board to the Control Board are referred
to as Low Voltage Differential Signals or LVDS. The video is
delivered in 20 bib LVDS format. Their presence can be confirmed
with the Oscilloscope by monitoring the LVDS signals with SMPTE
Color Bar input. Loss of these Signals would confirm the failure is on
the Main Board or the LVDS Cable itself.
Example of LVDS Video Signal
100
LABEL
RUN
DIODE
PIN
LABEL
RUN
DIODE
0.89V
22
RB2+
1.26V
0.7V
RC2-
1.27V
0.8V
41
RA1-
40
RA1+
1.19V
0.94V
20
39
RB1-
1.29V
0.84V
19
RC2+
1.20V
0.9V
38
RB1+
0V
0.94V
17
RCLK2-
1.22V
0.9V
36
RC1-
1.27V
0.94V
16
RCLK2+
1.26V
0.9V
35
RC1+
1.20V
0.84V
15
RD2-
1.16V
0.9V
33
RCLK1-
0V
0.88V
14
RD2+
1.29V
0.9V
32
RCLK1+
1.23V
0.9V
13
RE2-
1.18V
0.9V
31
RD1-
1.26V
0.9V
12
RE2+
1.3V
0.9V
30
RD1+
1.18V
0.9V
Module SDA
3.28V
Open
29
RE1-
1.26V
0.9V
2.8V
0.5V
28
RE1+
1.24V
0.7V
Module SCL
3.28V
Open
25
RA2-
1.0V
0.9V
ROM TX
3.28V
Open
24
RA2+
1.45V
0.9V
ROM RX
0.5V
Open
23
RB2-
1.2V
0.8V
1.46V
51
P5
Gnd
40
35
30
25
20
15
Gnd
5
2
101
P2
Pin
Label
Run
Diode Mode
SUS-DN
0.7V
1.49V
SUS-UP
0.4V
1.49V
Gnd
Gnd
1.49V
Z Bias
3V
1.48V
Gnd
Gnd
Gnd
ER-DN
0V
1.48V
ER-UP
0V
1.48V
CTRL-OE
0V
1.4V
15V
17.8V
1.32V
10
15V
17.8V
1.32V
11
15V
17.8V
1.32V
12
15V
17.8V
1.32V
17.8V
1
P2 Label
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
102
The two EMI Filters just below P200 are surface mount mini
devices which shunt high frequencies to ground. These high
frequencies are generated on the SMPS.
Each EMI filter has 4 pins.
The top and bottom are the B+ route, the two side solder
points are Chassis Gnd.
P200
FL4 or FL5
(5V EMI filters)
5V
Gnd
FL4 (5V)
Gnd
FL5 (5V)
5V
103
P200
Pin
Label
Run
Diode Mode
Disconnected
M5V
5V
0.9V
M5V
5V
0.9V
M5V
5V
0.9V
M5V
5V
0.9V
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Diode Mode Readings taken with all connectors Disconnected, (Unless Specified). Black lead on Gnd. DVM in Diode Mode.
104
Control P1 to Y-SUS
P101 Plug Information
Pin 1 on Control is
Pin 50 on Y-SUS
105
1~4
Run
Diode Mode
Pin
Run
Diode Mode
1~4
3.3V
0.67V
33
1.0V
0.97V
1.0V
0.97V
34
1.27V
0.97V
1.27V
0.97V
36
1.0V
0.97V
1.0V
0.97V
37
1.27V
0.97V
1.27V
0.97V
39
1.0V
0.97V
11
1.0V
0.97V
40
1.27V
0.97V
12
1.27V
0.97V
41
1.0V
0.97V
13
1.0V
0.97V
42
1.27V
0.97V
14
1.27V
0.97V
44
1.0V
0.97V
15
1.0V
0.97V
45
1.27V
0.97V
16
1.27V
0.97V
46
1.0V
0.97V
18
1.0V
0.97V
47
1.27V
0.97V
19
1.27V
0.97V
49
1.0V
0.97V
20
1.0V
0.97V
50
1.27V
0.97V
21
1.27V
0.97V
51
1.0V
0.97V
23
1.0V
0.97V
52
1.27V
0.97V
24
1.27V
0.97V
53
1.0V
0.97V
26
1.0V
0.97V
54
1.27V
0.97V
27
1.27V
0.97V
56
1.87V
1.2V
28
1.0V
0.97V
57
1.87V
1.2V
29
1.27V
0.97V
58
3.22V
1.2V
31
1.0V
0.97V
59
0.49V
1.1V
32
1.27V
0.97V
60
0.49V
1.1V
106
Pin 1
White hash
marks count
as 5
10
20
30
40
50
60
59
58
57
56
1~4
10
20
30
56
40
3.3V TP
1ST 4 pins
60
50
Run
Diode
Mode
Pin
Run
Diode
Mode
Pin
Run
Diode
Mode
Pin
Run
Diode
Mode
1~4
3.3V
0.67V
21
1.27V
0.97V
37
1.27V
0.97V
53
1.0V
0.97V
1.0V
0.97V
22
1.0V
0.97V
39
1.0V
0.97V
54
1.27V
0.97V
1.27V
0.97V
24
1.0V
0.97V
40
1.27V
0.97V
56
1.0V
1.2V
1.0V
0.97V
25
1.27V
0.97V
42
1.0V
0.97V
57
1.27V
1.2V
10
1.27V
0.97V
27
1.0V
0.97V
43
1.27V
0.97V
58
1.0V
1.2V
12
1.0V
0.97V
28
1.27V
0.97V
45
1.0V
0.97V
59
1.27V
1.1V
13
1.27V
0.97V
30
1.0V
0.97V
46
1.27V
0.97V
60
1.0V
1.1V
15
1.0V
0.97V
31
1.27V
0.97V
48
1.0V
0.97V
16
1.27V
0.97V
33
1.0V
0.97V
49
1.27V
0.97V
18
1.0V
0.97V
34
1.27V
0.97V
51
1.0V
0.97V
Note:
There are no voltages in
Stand-By mode.
19
1.27V
0.97V
36
1.0V
0.97V
52
1.27V
0.97V
107
Run
Diode Mode
Pin
Run
Diode Mode
1~4
3.3V
0.67V
33
1.0V
0.98V
1.0V
0.98V
34
1.27V
0.98V
1.27V
0.98V
36
1.0V
0.98V
1.0V
0.98V
37
1.27V
0.98V
1.27V
0.98V
39
1.0V
0.98V
11
1.0V
0.98V
40
1.27V
0.98V
12
1.27V
0.98V
41
1.0V
0.98V
13
1.0V
0.98V
42
1.27V
0.98V
14
1.27V
0.98V
44
1.0V
0.98V
15
1.0V
0.98V
45
1.27V
0.98V
16
1.27V
0.98V
46
1.0V
0.98V
18
1.0V
0.98V
47
1.27V
0.98V
19
1.27V
0.98V
49
1.0V
0.98V
20
1.0V
0.98V
50
1.27V
0.98V
21
1.27V
0.98V
51
1.0V
0.98V
23
1.0V
0.98V
52
1.27V
0.98V
24
1.27V
0.98V
53
1.0V
0.98V
26
1.0V
0.98V
54
1.27V
0.98V
27
1.27V
0.98V
56
1.87V
0.49V
28
1.0V
0.98V
57
1.87V
0.49V
29
1.27V
0.98V
58
3.22V
3.22V
31
1.0V
0.98V
59
0.49V
1.87V
32
1.27V
0.98V
60
0.49V
1.87V
108
White hash
marks count
as 5
50
40
56
30
20
10
Pin 1
5
1~4
3.3V TP
Note:
There are no voltages in Stand-By mode.
Pins with no TP are Gnd.
110
The Vertical
Address buffers
(TCPs) have one
heat sink
indicated by the
arrow.
It protects all 23
TCPs as.
111
VPP
VPP
Gnd
Gnd
Gnd
VP
VP
On the below:
VA source
disconnected from
Left X board
On any Gnd
On any Gnd
3.3V
VA
3.3V
VA
VPP
On the below:
112
X Drive Board
Y-SUS Board
Logic
X_B/D
Frame
Rear panel Vertical Address
Front panel Horizontal Address
256 Vertical
Electrodes
Va
Control Board
Chocolate
ctor
Conne
TCP
Taped Carrier
Package
128 lines
128 lines
Con
nect
or
Flex
ibl
Cabl e
e
TCP
Attached directly
to Flexible cable
Heat Sink
113
TCP Testing
On any Gnd
On any Va (0.58V)
On 3.3V (0.72V)
On any VuP (0.729V)
On any VDn (1.54V)
Gnd
Va
On the below:
VPP Gnd
Gnd
3.3V VPP
Va
n/c
n/c
1
10 15 20
114
25 30
35
40 45
50
3.3V
5V
115
TCP
Tapped
Carrier
Package
Look for burns, pin
holes, damage, etc.
116
Label
Run
Diode Mode
VA
*68V
Open
VA
*68V
Open
VA
*68V
Open
VA
*68V
Open
NC
NC
NC
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
117
Run
Diode Mode
Pin
Run
Diode Mode
0.49V
1.1V
29
1.27V
0.97V
0.49V
1.1V
30
1.0V
0.97V
3.22V
1.2V
32
1.27V
0.97V
1.87V
1.2
33
1.0V
0.97V
1.87V
1.2V
34
1.27V
0.97V
1.27V
0.97V
35
1.0V
0.97V
1.0V
0.97V
37
1.27V
0.97V
1.27V
0.97V
38
1.0V
0.97V
10
1.0V
0.97V
40
1.27V
0.97V
11
1.27V
0.97V
41
1.0V
0.97V
12
1.0V
0.97V
42
1.27V
0.97V
14
1.27V
0.97V
43
1.0V
0.97V
15
1.0V
0.97V
45
1.27V
0.97V
16
1.27V
0.97V
46
1.0V
0.97V
17
1.0V
0.97V
47
1.27V
0.97V
19
1.27V
0.97V
48
1.0V
20
1.0V
0.97V
49
21
1.27V
0.97V
22
1.0V
24
57~60
57~60 pins
3.3V TP
Gnd
51
Gnd
44
Gnd
39
Gnd
36
Gnd
0.97V
31
Gnd
1.27V
0.97V
26
Gnd
50
1.0V
0.97V
23
Gnd
0.97V
52
1.27V
0.97V
18
Gnd
1.27V
0.97V
53
1.0V
0.97V
13
Gnd
25
1.0V
0.97V
54
1.27V
0.97V
Gnd
27
1.27V
0.97V
55
1.0V
0.97V
28
1.0V
0.97V
57~60
3.3V
0.67V
118
Run
Diode Mode
Pin
Run
Diode Mode
0.49V
1.1V
29
1.27V
0.97V
0.49V
1.1V
30
1.0V
0.97V
3.22V
1.2V
32
1.27V
0.97V
1.87V
1.2
33
1.0V
0.97V
1.87V
1.2V
34
1.27V
0.97V
1.27V
0.97V
35
1.0V
0.97V
1.0V
0.97V
37
1.27V
0.97V
1.27V
0.97V
38
1.0V
0.97V
10
1.0V
0.97V
40
1.27V
0.97V
11
1.27V
0.97V
41
1.0V
0.97V
12
1.0V
0.97V
42
1.27V
0.97V
14
1.27V
0.97V
43
1.0V
15
1.0V
0.97V
45
16
1.27V
0.97V
17
1.0V
19
57~60 pins
3.3V TP
57~60
Pins with no TP are Gnd.
56
Gnd
0.97V
51
Gnd
1.27V
0.97V
44
Gnd
46
1.0V
0.97V
39
Gnd
0.97V
47
1.27V
0.97V
36
Gnd
1.27V
0.97V
48
1.0V
0.97V
31
Gnd
20
1.0V
0.97V
49
1.27V
0.97V
26
Gnd
21
1.27V
0.97V
50
1.0V
0.97V
23
Gnd
22
1.0V
0.97V
52
1.27V
0.97V
18
Gnd
24
1.27V
0.97V
53
1.0V
0.97V
13
Gnd
25
1.0V
0.97V
54
1.27V
0.97V
Gnd
27
1.27V
0.97V
55
1.0V
0.97V
28
1.0V
0.97V
57~60
3.3V
0.67V
119
Run
Diode Mode
Pin
Run
Diode Mode
0.49V
1.1V
29
1.27V
0.97V
0.49V
1.1V
30
1.0V
0.97V
3.22V
1.2V
32
1.27V
0.97V
1.87V
1.2
33
1.0V
0.97V
1.87V
1.2V
34
1.27V
0.97V
1.27V
0.97V
35
1.0V
0.97V
1.0V
0.97V
37
1.27V
0.97V
1.27V
0.97V
38
1.0V
0.97V
10
1.0V
0.97V
40
1.27V
0.97V
11
1.27V
0.97V
41
1.0V
0.97V
12
1.0V
0.97V
42
1.27V
0.97V
14
1.27V
0.97V
43
1.0V
0.97V
15
1.0V
0.97V
45
1.27V
0.97V
16
1.27V
0.97V
46
1.0V
0.97V
17
1.0V
0.97V
47
1.27V
0.97V
19
1.27V
0.97V
48
1.0V
20
1.0V
0.97V
49
21
1.27V
0.97V
22
1.0V
24
57~60
57~60 pins
3.3V TP
Pins with no TP are Gnd.
56
Gnd
51
Gnd
44
Gnd
39
Gnd
36
Gnd
31
Gnd
0.97V
26
Gnd
1.27V
0.97V
23
Gnd
50
1.0V
0.97V
18
Gnd
0.97V
52
1.27V
0.97V
13
Gnd
1.27V
0.97V
53
1.0V
0.97V
Gnd
25
1.0V
0.97V
54
1.27V
0.97V
27
1.27V
0.97V
55
1.0V
0.97V
28
1.0V
0.97V
57~60
3.3V
0.67V
120
P120, P220, P221 and P320 X Board Connector Information (Va distribution)
White hash marks count as 5
P120
Left X
16~30
Gnd
P220
P221
Center X
Center X
16~30
Gnd
1~15
Gnd
P320
Right X
1~15
Gnd
13~15
nc
13,14,17,19,
22,24 nc
1~12
Va
19~30
Va
7,9,12,14,1
7,18 nc
13,14,17,19,
22,24 nc
On any Gnd
On any Va (0.54V) TCPs connected.
On any Va (0.84V) TCPs disconnected.
1~12
Va
19~30
Va
7,9,12,14,1
7,18 nc
On any Gnd
On any Va (Open)
TCPs connected
or disconnected
Note: Va voltage will vary by panel, check your specific panels voltage label.
121
Distributes Key 1 and Key 2 to the Front IR Board then to the Front key board.
Receives Intelligent Sensor data from the Front IR Board.
Drives front Power LEDs
122
P1006 to
SMPS
IC302
+1.2V_VDDC
regulator
IC203
DDR
USB
In
P1003
LVDS
X501
IC504 Crystal
X1 Micro
Crystal
IC503
9V Reg
IC204
Memory IC
PC
Audio
P1005
Audio
IC1001
Audio
Amp
TU501
Tuner
Optical
Audio
HDMI
RS232
IC504
Tuner
Controller
PC
Remote
S-In
123
Rear
Inputs
HDMI
IC805
HDMI
EDID
RF
In
124
IC201
NVRAM
D951
D801
IC202
HDCP
EEPROM
Q951
L502
IC301
3.3V-VST
Regulator
Q302
IC802/3
HDMI EDID
&
SimpLink
IC601
RS232
RX/TX
Q503
IC502 +1.2V
PVSB
regulator
IC505
Tuner
5V Reg
D1001
Q1001
Q504
Q891
IC305
3.3V_MST
Regulator
Q303
Q501
Q502
IC303
5V-MST
Switch
D802
IC803
D628
Q892
Q601
IC602
RS232
EEPROM
Tuner
Pin 1
125
D627
IC802
D890
D633
126
TU501
127
MAIN Board
Pin 19 Analog
Video Signal
Tuner Location
Pin 16 SIF
Signal
500mV / 10uSec
450mVp/p
700mVp/p
200mV / 2uSec
Note: Pin 12 and Pin 13
Dig IF Signal
8VSB or QAM
Only when receiving a
Digital Channel.
100mV / 1uSec
128
X501
MAIN Board
Crystal Location
129
38
37c
Pin
36
40
39
35
33
30
32
29
28
P1003
Location
s
cation
o
L
P
T
24
27
22
23
21
MAIN Board
17
14
16
12
131
19
20
13
11
Pin 11 (R1023)
Pin 17 (R1020)
Pin 16 (R1019)
132
Pin 21 (R1015)
Pin 28 (R1012)
Pin 27 (R1011)
133
Pin c
LABEL
RUN
DIODE
PIN
LABEL
RUN
DIODE
11
RA1-
1.46V
0.89V
30
RB2+
1.26V
0.7V
12
RA1+
1.19V
0.94V
32
RC2-
1.27V
0.8V
13
RB1-
1.29V
0.84V
33
RC2+
1.20V
0.9V
14
RB1+
0V
0.94V
35
RCLK2-
1.22V
0.9V
16
RC1-
1.27V
0.94V
36
RCLK2+
1.26V
0.9V
17
RC1+
1.20V
0.84V
37
RD2-
1.16V
0.9V
19
RCLK1-
0V
0.88V
38
RD2+
1.29V
0.9V
20
RCLK1+
1.23V
0.9V
39
RE2-
1.18V
0.9V
21
RD1-
1.26V
0.9V
40
RE2+
1.3V
0.9V
22
RD1+
1.18V
0.9V
46
Module SDA
3.28V
Open
23
RE1-
1.26V
0.9V
47
2.8V
0.5V
24
RE1+
1.24V
0.7V
48
Module SCL
3.28V
Open
27
RA2-
1.0V
0.9V
49
ROM TX
3.28V
Open
28
RA2+
1.45V
0.9V
50
ROM RX
0.5V
Open
29
RB2-
1.2V
0.8V
134
Pin c
7&8
Intelligent
Sensor
Stand
By 5V
Pin
Label
STBY
Run
Diode Check
IR
4.86V
3.93V
2V
Gnd
Gnd
Gnd
Gnd
Key1
3.27V
3.27V
1.9V
Key2
3.27V
3.27V
1.9V
P Key
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
EYEQ-SCL
0V
3.28V
2V
EYEQ-SDA
0V
3.28V
2V
Gnd
Gnd
Gnd
Gnd
10
STBY 5V
5V
4.9V
1.25V
11
3.3VST
0.34V
5.1V
0.6V
12
Gnd
Gnd
Gnd
Gnd
13
LED R
2.94V
0V
1.87V
14
LED W
0V
2.91V
1.7V
15
PWM
Gnd
Gnd
0.94V
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.
135
Main Board Plug P1006 to Power Supply Voltages and Diode Check
Pin c front
Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
P1006
Label
STBY
Run
Diode Mode
Pin
Label
STBY
Run
Diode Mode
17V
0V
17V
Open
17V
0V
17V
Open
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
12V
0V
12V
Open
12V
0V
12V
Open
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
+5V
0V
5.14V
1.0 V
10
+5V
0V
5.14V
1.0 V
11
Stby 5V
4.94V
5.15V
1.0 V
12
+5V
0V
5.14V
1.0 V
13
Gnd
Gnd
Gnd
Gnd
14
Gnd
Gnd
Gnd
Gnd
15
Gnd
Gnd
Gnd
Gnd
16
n/c
n/c
n/c
Gnd
17*
5V Det
0V
4.7V
Open
18*
AC Det
4.9V
4.9V
Open
19
RL On
0V
3.2V
Open
20
VS On
0V
3.2V
Open
21
M5 ON
0V
3.2V
Open
22
Auto Gnd
Gnd
Gnd
Gnd
23
Stby 5V
4.94V
5V
1.3V
24*
Key On
Gnd
Gnd
Open
136
Pin
Label
SBY
Run
Diode Mode
R-
0V
8.5V
Open
R+
0V
8.5V
Open
L-
0V
8.5V
Open
L+
0V
8.5V
Open
Right (-)
P1005
Right (+)
Speaker
Connector Left (-)
Left (+)
Board
Location
MAIN Board
Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
137
Front Control (IR and Intelligent Sensor) Board and Power LED Board Location
Ground Strap
Front IR Board
Key Board
Ground Strap
139
Power
LEDs
IR
Sensor
P101
Intelligent
Sensor
On Front
P102
P101
Front IR
Board
140
IC3
IC2
P102
P101
Infrared Sensor
Co
d
ve
o
m
Re
r
ve
Power Button
Infrared Sensor
Power
LED
Power
LED
141
IC2
IC1 IR Receiver
G: Ground
V: 4.8V
O: 4.7V
Intelligent
Sensor
G: Ground
V: B+
O: Output
IR
Receiver
IC3
1: Gnd
2: 3.27V
3: 5.14V
B: 0.799V
C: 0V
E: Gnd
Red on
Left
Red On in Stand-By
Green On in Run
Green on
Right
D102
Red on
Green on
Left
Right
Power LEDs
142
143
Label
STBY
Run
Diode Check
IR
4.86V
3.93V
Open
Gnd
Gnd
Gnd
Gnd
Key1
3.27V
3.27V
Open
Key2
3.27V
3.27V
Open
PKey
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
7&8
Intelligent
Sensor
EYEQ-SCL
0V
3.28V
Open
EYEQ-SDA
0V
3.28V
Open
Gnd
Gnd
Gnd
Gnd
Stand
By 5V
10
STBY 5V
5V
4.9V
Open
11
3.3VST
0.34V
5.1V
2V
12
Gnd
Gnd
Gnd
Gnd
13
LED R
2.94V
0V
1.19V
14
LED W
0V
2.91V
1.16V
15
PWM
Gnd
Gnd
Open
Not Used
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
144
Front IR Board Plug P102 to Side Key (Voltages and Pin Identification)
Voltage and Diode Mode Measurements for the Main Board
For Voltages when each Key is pressed, see the Key Board section.
Label
STBY
Run
Diode Mode
Key 1
3.27V
3.27V
Open
Key 2
3.27V
3.27V
Open
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.
145
SW107
SW108
SW105
SW106
SW104
SW102
P101
To Ft IR Board
146
Diode Mode
Readings taken with
all connectors
Disconnected. Black
lead on Gnd. DVM
in Diode Mode.
Pin 1 measured
from Gnd
KEY
Pin 2 measured
from Gnd
CH (Up)
0.61K Ohms
Volume (+)
3.6K Ohms
CH (Dn)
9K Ohms
Volume (-)
0.62K Ohms
Input
3.66K Ohms
Enter
22K Ohms
Menu
9K Ohms
Pin 1 measured
from Gnd
KEY
Pin 2 measured
from Gnd
CH (Up)
0.19V
Volume (+)
0.86V
CH (Dn)
1.57V
Volume (-)
0.19V
Input
0.88V
Enter
2.2V
Menu
1.56V
P101 Connector Side Key" to IR/LED Control Board J2 (No Key Pressed)
Pin
Label
STBY
Run
Diode Mode
KEY 1
3.3V
3.3V
Open
KEY 2
3.3V
3.3V
Open
Gnd
Gnd
Gnd
Open
Gnd
Gnd
Gnd
Open
147
148
Leave P811 to
P101 Connected
This supplies
VS and 5V to
the Z-SUS
17V pins
1 or 2
Jump 17V to
FS101
This supplies
5V to the
Control board
Leave P813 to
P200 Connected
All this
assumes the
Power supply
and Control
board are
working
correctly.
D6 and D7
should be on.
Leave
P2 to P100
Connected
149
60PS11 TIP: Panel has a Brief Flash during start up, then No Picture.
Floating Ground checks must be made from Floating Ground. Use any pin on P204, P203, P205 or P208.
TIP:
SYMPTOM:
The panel indicates a brief flash during start up, then No Picture symptom.
CHECKS:
1. Z-SUS does not produce a correct signal. (All voltages check normal except 17V).
2. Y-SUS does not produce a correct signal. (No negative portion).
3. On Y-SUS: 17V starts off at 17V then very quickly drops to 5V.
4. Floating Ground 5V and 15V are not produced. (See pages 60~61 for more details).
5. Removing all connectors on the Z-SUS board (Except the panel connectors) does
not change test results.
6. Removing Y-Drive boards cause all voltages to return to normal.
Including the Y-Drive signal checked on the right side of C213.
7. Reconnecting all connectors on the Z-SUS board shows it is not creating a
correct waveform. Just spikes. (17V now stays up).
8. Using the Diode Checks for the Y-Drive boards do not indicate a problem.
(See pages 67, 70, 71 and 74 for more details).
FIX:
Replacing the Z-SUS board fixed the problems.
150
151
Improperly Seated
Connector
Properly Seated
Connector
152
Clip
Connector
After
153
11 X 17 Foldout Section
This section shows the Interconnect Diagram Drawing.
Use the Adobe Acrobat version to zoom in for easier reading.
The Interconnect Diagram has a great deal of quick reference
servicing aids. Use this in conjunction with the Training Manual.
For Printing purposes, print to 11X17 paper size.
154
4mS
0V
100uS
P101
FPC
VR601
Set-Dn
FPC
P115~P306
5~12) FGnd
4) Data Odd Out
3) Data Even Out
2) OC2 T Even
1) STB T
VSC
1,2
FS302 (VS)
6.3A/250V
FPC
Y-SUS
VSC
11,12
+
Waveform
P202
VSC
P
2
1
5
FPC
17V
0V
17V
17V
17
5V Det
0V
4.7V
5V
Gnd
Gnd
Gnd
Gnd
18
AC Det
4.9V
4.9V
5V
5, 6
12V
0V
12V
12V
19
RL On
0V
3.2V
0V
7, 8
Gnd
Gnd
Gnd
Gnd
20
Vs On
0V
3.2V
0V
9, 10
5V
0V
5.14V
5V
21
0V
3.2V
0V
4.94V 4.94V
0V
0V
11
Stby 5V
5V
22
M5 On
Auto Gnd
12
5V
0V
5.14V
5V
23
Stby5V
13, 14
Gnd
Gnd
Gnd
Gnd
24
Key On
Gnd
Gnd
Gnd/nc
0V
0V
Run
5V
Gnd
R640
P214~P303
12) VScan
11) VScan
10) n/c
9) FGnd
8) Data Out Even
7) Data Out Odd
6) +5VFG
5) +5VFG
4) OC1 T B Odd
3) OC1 T B Even
2) CLK B
1) OC2 B Odd
FG15V
R639
C326
VR901
VScan
P501
N/C
FG5V
IC908
IC909
P307
Floating Gnd
P215~P305
12) OS2 B Even
11) STB B
9~1) All FGnd
Va
P204
Diode Check
Open
P102
P200
D6
IC306
P202
nc
Gnd
P103
Pin
1,2,3,4
5
6,7
P104
Run
VA Voltage
nc
Gnd
P105
nc
Gnd
P110
3.3V in
on Pins
57~60
P120
Va out
on Pins
1~12
P106
P107
P108
Diode Check
Open
P2
IC5
L
*FL5
P5 V
M5V
IC303
IC302
D
D7
IC7 1 (0V)
S
IC12
2 (3.3V)
Control
1 (0V)
929Hz
3 (5.0V)
X2 IC11
2 (2.5V)
VS-DA
P101
3 (5.0V)
Pin 1-4 is
Pin 1-4 is
IC1
IC6 3.3V to TCP
3.3V to TCP 1 (0V)
from
IC304
from IC304 2 (3.3V)
1 (0V) 2 (3.3V) 3 (5V)
3 (5.0V)
P6
Pin 1-4 is 3.3V to
P104
IC16
IC304
TCP from IC304
P3
AUTO
N/C
GEN
*FL4
M5V
* If the complaint is no
video and shorting the
points (AutoGen) causes
video to appear suspect
the Main board or LVDS
cable.
IC201 NV RAM
1,2) Gnd
3,4) Gnd
5,6) 3.29V
7) Gnd
8) 3.29V
LVDS
P202
P203
P204
3
4,5
6,7
8
1.9V
1.9V
Open
Open
Open
Gnd
Open
Label
*VS
n/c
Gnd
Diode
Open
n/c
Gnd
*VA
Gnd
Open
Gnd
M5V
2V
9,10
P205
IC202 HDCP
1,2) Gnd
3) 3.29V
4) Gnd
5,6) 3.29V
7) Gnd
8) 3.3V
Pin
1
2
3
4
5
6
7
8
Label
IR
Gnd
Key 1
Key 2
PKEY
Gnd
EyeSCL
EyeSDA
STBY
4.86V
Gnd
3.27V
3.27V
0V
Gnd
0V
0V
Run
4.95V
Gnd
3.27V
3.27V
0V
Gnd
3.28V
3.28V
Z-SUS
VZB TP
R457 Top
To Gnd
Cushion
VR201
VZB Adj
P100
17V
FS101 (17V)
2.5A/125V
IC302
1.3V VDDC REG
1) 5.4V 5) 0.9V
2) 4.95V 6) 0.9V
3) 1.3V 7) 4.9V
4) Gnd 8) 3.6V
P1006
1 2
3 B
D1001
A
IC1001
C
R+
Audio
Amp
IC803
STBY Run
9
10
11
12
13
14
Gnd
5VST
3.3VST
Gnd
LED R
LED W
Gnd
5V
0.34V
Gnd
2.94V
0V
Gnd
5V
5.1V
Gnd
0V
2.91V
15
PWM
0V
0V
A
A
IC301
Q892
C
D804
D627
Q890
Q1002
IC1
A A
12Mhz
MAIN BOARD
A A
IC304
IC305
Gnd
0.6V
Gnd
3.3V
1.85V
5V
3.3V
Q501
C
IC502
IC202
USB
IC502
In Out Gnd
IC503 IC505
Tuner Tuner
9V Reg 5V Reg
12V
3.8V
3.0V
In 0V/3.3V
Gnd
5.0V
4.9V
Out 0V/1.2V
8V
8V
TUNER TU501
TDVW-H103F
ZD601
IC602
IC204
X501
D502
25Mhz
Out
Gnd
C Q601
C
D633
LVDS
S (0V)
S (3.3V)
G (3.3V) G (0V)
D (3.3V) D (3.3V)
A A
C
BE
P1003
Q504
B EGS
IC601
IC802
BE
Pin Label
E B
Q1001
D628
C
5) 0V
6) 5.1V
IC804
IC201
Micro/Video
Processor
Reset IC1
D303 B E
C
Q302
A-C
A C
X1
B
C
E
4 3
BE
3) 3.2V
4) 0V
Q504
Analog Digital
Q801
1 2
D805
A
C
A
1) 5.1V
2) Gnd
2
C
IC804 USB
IC304
1 23
IC203
IC305
P1005 L1013
IC804 USB
POWER
4) 0V
1) 5V
2) Gnd 5) 0V
3) 3.3V 6) 5V
LVDS
Processor
Q303 3
GS
IC301
21
D
IC302
C
Q301
L318
D802 A A
P103
P106
P107
N/C
P1001
To
Speakers
(All Pins
8.5V)
Z-Drive
Waveform
FL103
FS100 (M5V)
10A/125V
L1012
P1001
IC503
9V Reg
234Vp/p
FS102 (VS)
6.3A/250V
IC602, IC802
1) 5V
2) 4.6V
3) 4.6V
4) 3.3V
5,6,7,8) Gnd
Ft IR P102 P101
Intelligent
Sensor
400us
Gnd
Open
Open
P101 Ft Keys
X-Board Center
P201
Pin
1,2
And Power SW
Va
P220
Va in on
Pins 19~30
Diode
2V
Gnd
Diode
1.9V
1.9V
P102
3.3V and
X-Drive
Left RGB
Signals
P307 Y-SUS
P101
Gnd
M5V
P216~P308
All Pins FGnd
P121
Run
VA Voltage
nc
Gnd
Ribbon Cable
5V
M5V
Gnd
Run
17V
17V
17V
17V
0.06V
0.19V
0.22V
Gnd
3.16V
5V
Diode
2V
Gnd
Run
5V
Gnd
Label
15V (17V)
15V (17V)
15V (17V)
15V (17V)
CTRL OE
ER UP
ER DN
GND
Z Bias
GND
Gnd
11 Z SUS UP 0.4V
12 Z SUS DN 0.6V
5V
4.94V 4.94V
P1
T902
T901
P
3
0
8
C326
P203
FPC
FS901
(M5V)
5A/125V
VR902
-VY
17V
VSC TP
Across R306
Pin
1,2,3,4
5
6,7
3, 4
VR601
SET DN
-Vy TP
Top R306
Floating Gnd
Bottom R640
VSC
(*140V)
From FG
Y-Drive
Lower
Label
VR602
SET UP
P
3
0
5
P
2
1
6
Pin
FS303
(M5V)
10A/125V
P101
FG5V
7/8
No Load
7
8
9
10
CN701
n/c
SC101
STBY Run
Pin
1
2
3
4
5
6
P814
1, 2
P
3
0
3
P
2
1
4
F101 (AC)
15A/250V
P211
P201
FPC
P
3
0
4
FS301 (VA)
10A/125V
P111
C270 -
FPC
P
1
1
6
Label
P811 SMPS
to P101 Z-SUS
P100 Z-SUS
to P101 Control
VR901
VA Adj
160V STBY
391V RUN
4.57V STBY
P104
FG5V
7,8
P
3
0
6
Open
P
3
0
1
P
1
1
5
*Vs
Pin
VSC
C170
1~2
P811
P813
AC In
P302
P
1
1
4
P103
FPC
Waveform
Gnd
nc
VS Adj
VR951
0V
P101
P102
VSC
(*140V)
From FG
Gnd
nc
F801
8A/250V
P114~P301
All Pins FGnd
P116~P304
12) CLK T
11) OC2 T Odd
10) OC1 T B Odd
9) OC1 T B Even
8) +5VFG
7) +5VFG
6) Data Out Odd
5) Data Out Even
4) FGnd
3) n/c
2) VScan
1) VScan
Diode
2V
Gnd
Open
4-5
3
514V P/P
Y-Drive
Upper
P111
P211
Not
Connected
Pin Label
9,10 M5V
Gnd
8
6-7 *Va
150uSec
5uSec
SMPS
POWER SUPPLY
P812
Connect Scope
between Waveform TP
on Z board and Gnd
Use RMS information
just to check for board
activity.
P104
50VAC rms
White
59~106VAC rms
Picture
VR602
Set-up
20uSec
5uSec
Step 1: RL On command turns on 5V and 12V. Also 5V Det from SMPS (pins 9, 10, 12) when 5V turns on.
Step 2: M5 On command Turns on M5V
17V turns on with
5V Det from SMPS when
Step 3: Vs On command Turns on Va first then VS
Vs On command
5V (9~11) turns on
P102
Y-DRIVE WAVEFORM
Z-SUS Signal
P105
Waveform TP
On Either Y-Drive Board
Q502
IC504
HDMI
EB C
Q503
E B
SIF 16
(5V) 15
DIF - 13
DIF + 12
19 Video
C=4.7V
A=0V
IC805
A=5V
D806
TUNER
(5V) 4
1
Q891
C
IC505
2
Tuner
5V Reg
3 2 1
P221
Va out on
Pins 1~12
P207
Va
P320
Va in on
Pins 19~30
P301
P310
3.3V in on
Pins 57~60
P302
X-Board Right
P303
P304
P305
P306
P307
P308
60PS11 LVDS
P1003
WAVEFORMS
Connector P1003
Configuration
indicates
signal pins.
2
10
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
End of Presentation
156