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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 11, NOVEMBER 2011

Letters
A Simple Inverter for Arc-Welding Machines With
Current Doubler Rectifier
Jian-Min Wang, Member, IEEE, Sen-Tung Wu, Shang-Chin Yen,
and Huang-Jen Chiu, Senior Member, IEEE
AbstractThis letter proposes a novel inverter scheme for arc-welding
machines. The output rectifier replaced by a current double rectifier can
reduce output ripple current effectively. Therefore, the lower inductance of
the inductors can be used to prevent larger voltage spikes that occur during
commutation. In comparison with that in the conventional scheme, each
inductors current in the proposed scheme is half of the output current.
Hence, the proposed scheme has lower conduction losses. The turn number
of the transformer winding in the proposed scheme is also lower than
that in the conventional one. Finally, the 100-A ac arc-welding machine
is implemented using the proposed method.
Index TermsCurrent doubler rectifier, current-source inverter, voltage
spike.

I. I NTRODUCTION
In the earlier times, arc-welding machines were used to deliver
energy through linear transformers. They had the disadvantages of
low efficiency and large volume. However, in recent years, switching power supplies have been developed successfully, improving the
volume and efficiency of switching power supplies [1][8]. As arcwelding machines need to supply high output power, full-bridge
(FB) pushpull converters are commonly used for high power rating. Fig. 1(a) shows a conventional inverter scheme formed with a
high-frequency FB dc/ac inverter and a low-frequency half-bridge
inverter. In general, the output current of arc-welding machines can
reach several hundred amperes [7][9]. Depending on the current and
voltage ratings of the inverter, insulated gate bipolar transistors are
commonly used in this application. The prestage is a high-frequency
voltage-source FB inverter operated in bipolar pulsewidth modulation.
io increases in a positive or negative switching period if these switches
(Q1 /Q4 or Q2 /Q3 ) are turned on diagonally. In dead-time duration,
all four switches are turned off at the same time; therefore, io drops
to zero. Moreover, the amplitude of io can be adjusted by controlling
the duty cycle of the FB inverter. The polarity of io is determined
by the low-frequency half-bridge inverter. Hence, a positive current
is generated if Q5 is turned on, whereas a negative current is generated
if Q6 is turned on. Based on the preceding explanations, full-wave
rectifiers are suitable for the output part of arc-welding machines.
Full-wave rectifiers can also help generate a steady output current
[9]. Even though they are suitable for the output part of arc-welding
machines, full-wave rectifiers are unsuitable for applications in arcManuscript received October 1, 2010; revised January 4, 2011; accepted
February 23, 2011. Date of publication March 10, 2011; date of current version
September 7, 2011. This work was supported by the National Science Council
of Taiwan under Grant 99-2628-E-150-047.
J.-M. Wang is with the Department of Vehicle Engineering, National Formosa University, Huwei 63208, Taiwan (e-mail: jmw@sunws.nfu.edu.tw).
S.-T. Wu and H.-J. Chiu are with the Department of Electronic Engineering,
National Taiwan University of Science and Technology, Taipei 10607, Taiwan
(e-mail: hjchiu@mail.ntust.edu.tw).
S.-C. Yen is with the LTBU, Delta Electronic, Inc., Taoyuan 32063, Taiwan
(e-mail: D9102201@mail.ntust.edu.tw).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2011.2126538

Fig. 1.

(a) Conventional ac arc-welding driver inverter. (b) Proposed topology.

welding machines, because these machines usually output higher


current and lower voltage. Hence, a higher output current increases
conduction losses. A current doubler rectifier is an appropriate solution for this situation. Current doubler rectifiers have the following
advantages: low current rating, low output current ripple at the output
load, and low filter inductors at the output [10][13]. The current
doubler scheme is used to share the load current in the proposed
paper, as shown in Fig. 1(b). It helps lower conduction losses from
the inductors and the main transformer and to increase the efficiency
of the inverter [13]. There is no need to have a center-tapped winding
in the main transformer. Moreover, the current direction of iL1 and
iL2 is interleaved, contributing to the elimination of the output ripple
current. In comparison with the conventional scheme of arc-welding
machines, the proposed one can use smaller inductor inductances that
prevent higher voltage spikes during the commutation period. In the
next section, the explanation and experimental results of the proposed
inverter for 100 A are presented.
II. O PERATIONS OF THE P ROPOSED I NVERTER
Fig. 2 shows the key waveform of the proposed scheme. Fig. 2(a)
simulates the controlling signal and output current waveforms in the
proposed paper. The signals for driving Q1 Q4 are generated by
pushpull mode, and they can help to control the FB converter. The
signals for driving Q5 Q6 are generated by the microprocessor.
Evidently, when Q5 is turned on, the output current becomes positive.
On the opposite side, when Q6 is turned on, the output current
becomes negative. In tc , Q5 , and Q6 should be turned on to make

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 11, NOVEMBER 2011

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Fig. 2. (Continued.) (d) State 3. (e) State 5.

Fig. 2. (a) Presented HB inverters and operation modes of the proposed ac


arc-welding inverter in a positive half-cycle. (b) State 1. (c) State 2 and State 4.
(d) State 3. (e) State 5.

the output current release the stored energy during commutation. At


the same time, Q1 Q4 should be turned off to avoid the short-circuit
phenomenon of the input voltage. The operation principle will be
discussed further later.

State 1 (t0 t1 ): In the steady-state region, Q1 , Q4 , and Q5 are


turned on. The voltage across the primary side of transformer is Vi . At
this moment, energy is transferred through Q1 and Q4 to the secondary
side of the main transformer. At the same time, L2 begins to be charged
with a positive voltage to increase iL2 . However, L1 begins to be
discharged with a negative voltage, and iL1 decreases. Finally, the
ripple current of iO is canceled, because iL1 and iL2 help eliminate
the ripple current. The path with the arrow is shown in Fig. 2(b).
State 2 (t1 t2 ): Input dead-time state I (Positive output current).
The Q1 Q4 are all turned off, but Q5 is still turned on. Vi stops transferring energy to RO through the main transformer. Consequently, L1
and L2 supply the energy to load at the same time. The path with the
arrow is shown in Fig. 2(c).
State 3 (t2 t3 ): As shown in Fig. 2(d), Q2 , Q3 , and Q5 are turned
on; the input voltage delivers energy through the main transformer to
the load. At the same time, L1 starts to be charged, and L2 discharges.
State 4 (t3 t4 ): In this state, Q1 Q4 are all turned off, but Q5
is turned on. Hence, the input energy cannot be delivered to the
load. At this moment, L1 and L2 discharge to the load with the
stored energy from L1 and L2 . The path with an arrow is shown in
Fig. 2(e).
State 5 (t5 t6 ): This is the output current commutation state.
Q1 Q4 of the FB inverter are all turned off. As the output current
source should not be opened, Q5 and Q6 must be turned on to release
the stored energy from L1 and L2 . Moreover, the output current drops
to zero until Q5 is turned off. When Q5 is turned off, the output current
changes from a positive current to a negative one. At this moment, the
output current is operated repeatedly in State 1State 4. After t, the
output current reaches the stable current of IO . The conclusion could
be made by the aforementioned description. An FB converter is used
for the primary side of the main transformer, which can generate the
required ac voltage, to deliver energy to the secondary side through the
main transformer. Afterward, a half-bridge converter on the secondary
side helps to generate an adjustable positive and negative current with

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 11, NOVEMBER 2011

TABLE I
M EASURED C ONVERSION E FFICIENCIES OF THE
C ONVENTIONAL AND P ROPOSED I NVERTERS

the energy from the main transformer. Therefore, the output ripple
current can be canceled as a result of io = iL1 + iL2 .
III. E XPERIMENTAL R ESULTS
The experiments are performed with the following parameters:
Ro = 0.06, L1 = L2 = 36 H, L = 72 H (L is the inductance
of the conventional scheme.), Np : Ns = 10 : 1, and Vin = 155 V.
Prototypes of the proposed current-regulated HB inverters are built to
demonstrate the feasibility of the presented scheme. The switching frequency of the front-stage FB inverter is 20 kHz. The output current is
a square wave with a frequency of 100 Hz, a duty cycle of 50%, and an
amplitude of 100 A. The commutation time tc is 4 s. Fig. 3(a) depicts
the output current waveforms for the conventional and proposed HB
inverters. Ch1_io is the output current of the proposed scheme. Ch2_io
is the output current of the conventional scheme. Fig. 3(b) shows the
commutation periods. The voltage spikes (Ch4_vL ) of nearly 500 V
occur in the inductor for the conventional current-regulated HB inverter; the main transformer used in this paper generates 40 V for the
voltage spike.
According to the aforementioned results and compared to the
conventional HB inverter, the voltage spike of the proposed scheme
is lower than that of the conventional one. Moreover, under the
same specific conditions of transient response and the output current
requirement, although the inductance is lower in the proposed scheme,
the interleaved operation of iL1 and iL2 can still help reach a high
current similar to a conventional inverter. The conversion efficiencies
of the conventional and the proposed HB inverters at different load
levels are listed in Table I. In sum, the conversion efficiency is higher
when the output current increases.
IV. C ONCLUSION
This paper has proposed that the output rectifier can be replaced
by the current doubler. Due to the lower output ripple current and the
lower conduction losses from the current doubler scheme, the lower
inductance of the inductor can help prevent voltage spikes during the
commutation period. In addition, arc-welding machines have higher
output currents. The reduction of conduction losses contributes to the
increased efficiency of arc-welding machines. Experimental results of
the prototype system have shown good confirmation with theoretical
analysis. Accordingly, the proposed ac arc-welding inverter is particularly suitable for high-output-current ac arc-welding applications.
Fig. 3. Key waveforms of (a) the conventional and proposed current-regulated
inverters (Ch3_Q5 /Ch4_Q6 : 20 V/div, Ch1_io /Ch2_io : 100 A/div, Time:
4 ms/div). (b) Resulted voltage spikes for the conventional and proposed inverters (Ch1_io : 100 A/div, Ch2_vL1 : 20 V/div, Ch3_io : 100 A/div, Ch4_vL :
500 V/div, Ch5_Q5 : 20 V/div, Time: 4 ms/div). (c) Waveforms of iL1 , iL2 ,
and iO for the proposed inverters in the vicinity of the current commutation.
(Ch1_iL1 : 50 A/div, Ch2_iL2 : 50 A/div, Ch3_io : 100 A/div, Time: 4 ms/div).

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 58, NO. 11, NOVEMBER 2011

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