Philips Semiconductors

Product Specification

PowerMOS transistor
Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode
logic level field-effect power
transistor in a plastic envelope.
The device is intended for use in
Switched Mode Power Supplies
(SMPS), motor control, welding,
DC/DC and AC/DC converters, and
in automotive and general purpose
switching applications.

PINNING - TO220AB
PIN

QUICK REFERENCE DATA

SYMBOL

PARAMETER

MAX.

MAX.

UNIT

VDS
ID
Ptot
Tj
RDS(ON)

BUK553
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
VGS = 5 V

-100A
100
13
75
175
0.18

-100B
100
12
75
175
0.22

V
A
W
C

PIN CONFIGURATION

DESCRIPTION

gate

drain

source

tab

BUK553-100A/B

SYMBOL
d

tab

drain
s

1 23

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VDS
VDGR
VGS
VGSM

Drain-source voltage
Drain-gate voltage
Gate-source voltage
Non-repetitive gate-source voltage

RGS = 20 k
tp 50 s

100
100
15
20

V
V
V
V

ID
ID
IDM

Drain current (DC)

Drain current (DC)
Drain current (pulse peak value)

Tmb = 25 C
Tmb = 100 C
Tmb = 25 C

Ptot
Tstg
Tj

Total power dissipation

Storage temperature
Junction Temperature

Tmb = 25 C
-

- 55
-

-100A
13
9
52

-100B
12
8.5
48

A
A
A

75
175
175

W
C
C

THERMAL RESISTANCES
SYMBOL

PARAMETER

Rth j-mb

Thermal resistance junction to

mounting base
Thermal resistance junction to
ambient

Rth j-a

April 1993

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2.0

K/W

60

K/W

Rev 1.100

Philips Semiconductors

Product Specification

PowerMOS transistor
Logic level FET

BUK553-100A/B

STATIC CHARACTERISTICS
Tmb = 25 C unless otherwise specified
SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

V(BR)DSS

Drain-source breakdown
voltage
Gate threshold voltage
Zero gate voltage drain current
Zero gate voltage drain current
Gate source leakage current
Drain-source on-state
resistance

VGS = 0 V; ID = 0.25 mA

100

VDS = VGS; ID = 1 mA
VDS = 100 V; VGS = 0 V; Tj = 25 C
VDS = 100 V; VGS = 0 V; Tj =125 C
VGS = 15 V; VDS = 0 V
VGS = 5 V;
BUK553-100A
BUK553-100B
ID = 6.5 A

1.0
-

1.5
1
0.1
10
0.17
0.20

2.0
10
1.0
100
0.18
0.22

V
A
mA
nA

MIN.

TYP.

MAX.

UNIT

VGS(TO)
IDSS
IDSS
IGSS
RDS(ON)

DYNAMIC CHARACTERISTICS
Tmb = 25 C unless otherwise specified
SYMBOL

PARAMETER

CONDITIONS

gfs

Forward transconductance

VDS = 25 V; ID = 6.5 A

6.0

8.0

Ciss
Coss
Crss

Input capacitance
Output capacitance
Feedback capacitance

VGS = 0 V; VDS = 25 V; f = 1 MHz

620
180
90

825
250
120

pF
pF
pF

td on
tr
td off
tf

Turn-on delay time

Turn-on rise time
Turn-off delay time
Turn-off fall time

VDD = 30 V; ID = 3 A;
VGS = 5 V; RGS = 50 ;
Rgen = 50

10
45
90
40

20
60
115
55

ns
ns
ns
ns

Ld

Internal drain inductance

3.5

nH

Ld

Internal drain inductance

4.5

nH

Ls

Internal source inductance

Measured from contact screw on

tab to centre of die
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad

7.5

nH

MIN.

TYP.

MAX.

UNIT

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS

Tmb = 25 C unless otherwise specified
SYMBOL

PARAMETER

CONDITIONS

IDR

13

IDRM
VSD

Continuous reverse drain

current
Pulsed reverse drain current
Diode forward voltage

IF = 13 A ; VGS = 0 V

1.2

52
1.5

A
V

trr
Qrr

Reverse recovery time

Reverse recovery charge

IF = 13 A; -dIF/dt = 100 A/s;

VGS = 0 V; VR = 30 V

90
0.6

ns
C

MIN.

TYP.

MAX.

UNIT

70

mJ

AVALANCHE LIMITING VALUE

Tmb = 25 C unless otherwise specified
SYMBOL

PARAMETER

CONDITIONS

WDSS

Drain-source non-repetitive
unclamped inductive turn-off
energy

ID = 13 A ; VDD 50 V ;
VGS = 5 V ; RGS = 50

April 1993

Rev 1.100

Philips Semiconductors

Product Specification

PowerMOS transistor
Logic level FET

120

BUK553-100A/B

Normalised Power Derating

PD%

ZTHX53

Zth j-mb / (K/W)

1E+01

110
100
90
80

1E+00

0.5

70

0.2

60
50

0.1

40

0.05

1E-01

30

tp

PD

0.02

tp
T

D=

20
10

0
0

20

40

60

80 100
Tmb / C

120

140

160

180

Fig.1. Normalised power dissipation.

PD% = 100PD/PD 25 C = f(Tmb)

120

1E-05

1E-03
t/s

1E-01

1E+01

Fig.4. Transient thermal impedance.

Zth j-mb = f(t); parameter D = tp/T

Normalised Current Derating

ID%

1E-02
1E-07

ID / A

110

BUK553-100A
5

10

24

100

VGS / V =

20

90

80

16

70
60

12

50
40

30
20

10
0
0

20

40

60

80 100
Tmb / C

120

140

160

180

ID / A
ID

S/

tp = 10 us

2.5

0.4

VGS / V =
3

3.5

4
4.5

RD

10

10

BUK553-100A

RDS(ON) / Ohm

S(

0.5

VD

Fig.5. Typical output characteristics, Tj = 25 C.

ID = f(VDS); parameter VGS

BUK553-100

=
N)

VDS / V

Fig.2. Normalised continuous drain current.

ID% = 100ID/ID 25 C = f(Tmb); conditions: VGS 5 V

100

2
0

5
100 us
DC

0.3

1 ms

10
0.2

10 ms
100 ms

0.1

0.1
1

100

10
VDS / V

Fig.3. Safe operating area. Tmb = 25 C

ID & IDM = f(VDS); IDM single pulse; parameter tp

April 1993

12

16
ID / A

20

24

28

Fig.6. Typical on-state resistance, Tj = 25 C.

RDS(ON) = f(ID); parameter VGS

Rev 1.100

Philips Semiconductors

Product Specification

PowerMOS transistor
Logic level FET

BUK553-100A/B

VGS(TO) / V

BUK543-100A

ID / A
15

Tj / C =

25

150

max.

typ.

10

min.

0
0

4
VGS / V

-60

gfs / S

20

60
Tj / C

100

140

180

Fig.10. Gate threshold voltage.

VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS

Fig.7. Typical transfer characteristics.

ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj

10

-20

BUK543-100A

SUB-THRESHOLD CONDUCTION

ID / A

1E-01

9
1E-02

8
7

2%

1E-03

98 %

typ

5
1E-04

4
3

1E-05

2
1
0

1E-06

10 12
ID / A

14

16

18

20

Fig.8. Typical transconductance, Tj = 25 C.

gfs = f(ID); conditions: VDS = 25 V

2.4

0.8

1.2
VGS / V

1.6

2.4

Fig.11. Sub-threshold drain current.

ID = f(VGS); conditions: Tj = 25 C; VDS = VGS

Normalised RDS(ON) = f(Tj)

0.4

10000

C / pF

BUK5y3-100

2.2
2.0
1.8
1.6

1000

1.4

Ciss

1.2
1.0
0.8

Coss

100

Crss

0.6
0.4
0.2
0
-60

-20

20

60
Tj / C

100

140

10

180

40
VDS / V

Fig.9. Normalised drain-source on-state resistance.

a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 6.5 A; VGS = 5 V

April 1993

20

Fig.12. Typical capacitances, Ciss, Coss, Crss.

C = f(VDS); conditions: VGS = 0 V; f = 1 MHz

Rev 1.100

Philips Semiconductors

Product Specification

PowerMOS transistor
Logic level FET

12

BUK553-100A/B

BUK553-100

VGS / V

120

WDSS%

110

10

100

VDS / V =20

90

80

80
70
60

50
40

30
20

10
0

0
0

10 12
QG / nC

14

16

18

20

20

Fig.13. Typical turn-on gate-charge characteristics.

VGS = f(QG); conditions: ID = 13 A; parameter VDS

30

IF / A

40

60

80

100
120
Tmb / C

140

160

180

Fig.15. Normalised avalanche energy rating.

WDSS% = f(Tmb); conditions: ID = 13 A

BUK553-100A

VDD

+
L
VDS

20
Tj / C = 150

VGS

25

-ID/100
T.U.T.

10

RGS

R 01
shunt

0
0

1
VSDS / V

Fig.16. Avalanche energy test circuit.

WDSS = 0.5 LID2 BVDSS /(BVDSS VDD )

Fig.14. Typical reverse diode current.

IF = f(VSDS); conditions: VGS = 0 V; parameter Tj

April 1993

Rev 1.100

Philips Semiconductors

Product Specification

PowerMOS transistor
Logic level FET

BUK553-100A/B

MECHANICAL DATA
Dimensions in mm

4,5
max

Net Mass: 2 g

10,3
max
1,3

3,7
2,8

5,9
min

15,8
max

3,0 max
not tinned

3,0

13,5
min
1,3
max 1 2 3
(2x)

0,9 max (3x)

2,54 2,54

0,6
2,4

Fig.17. TO220AB; pin 2 connected to mounting base.

Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for TO220 envelopes.
3. Epoxy meets UL94 V0 at 1/8".

April 1993

Rev 1.100

Philips Semiconductors

Product Specification

PowerMOS transistor
Logic level FET

BUK553-100A/B

DEFINITIONS
Data sheet status
Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification

This data sheet contains final product specifications.

Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.

April 1993

Rev 1.100