Q. No. 01 What are program-visible registers?

Ans.: Program-visible registers are the registers which are used during application programming and
are directly used in the instructions.
Q. No. 02 Which register holds a count for some instructions?
Ans.: ECX is a general-purpose register that holds the count for various instructions. The ECX
register also can hold the offset address of memory data.
Q. No. 03 The carry flag bit is set by which arithmetic operations?
Ans.: The carry flag bit is set by addition and subtraction operations.
Q. No. 04 Will an overflow occur if a signed FFH is added to a signed 01H?
Ans.: No, the overflow will not occur.
Q. No. 05 A number that contains 3 one bits is said to have parity?
Ans.: A number that contains 3 one bits is said to have odd parity.
Q. No. 06 Which flag bit controls the INTR pin on the microprocessor?
Ans.: The I (interrupt) flag bit controls the operation of the INTR (interrupt request) input pin.
Q. No. 07 Which microprocessors contain an FS segment register?
Ans.: The FS and GS segment registers are supplemental segment registers available in 80386 and
above microprocessors to allow two additional memory segments for access by programs.
Q. No. 08 In the real mode, show the starting and ending addresses of each segment located by
the following segment register values.
Ans.: (a) E000H. Starting Address: E0000H, Ending Address: E0000H + FFFFH = EFFFFH
(b) AB00H. Starting Address: AB000H, Ending Address: AB000H + FFFFH = BAFFFH
Q. No. 09 Find the memory address of the next instruction executed by the microprocessor,
when operated in the real mode, for the following CS:IP combinations CS = l000H and IP =
2000H.
Ans.: 10000H + 2000H = 12000H
Q. No. 10 Which register or registers are used as an offset address for string instruction
destinations in the 80486 microprocessor?
Ans.: Extended Destination Index Register.
Q. No. 11 Determine the memory location addressed by the following real mode 80386 register
combination DS = 2000H and EAX = 00003000H.
Ans.: Since EAX value is not greater than FFFFH so we can calculate memory location addressed.
The address is 20000H + 3000H = 23000H.

Q. No. 12 Protected mode memory addressing allows access to which area of the memory in the
Pentium microprocessor?
Ans.: 64 TeraBytes
Q. No. 13 What is the purpose of the segment register in protected mode memory addressing?
Ans.: In protected mode memory addressing the segment register contains a selector that selects a
descriptor from a descriptor table.
Q. No. 14 For an 80286 descriptor that contains a base address of A00000H and a limit of
1000H, what starting and ending locations are addressed by this descriptor?
Ans.: Starting Address: A00000H, Ending Address: A010000H.
Q. No. 15 For a Pentium descriptor that contains a base address of 00280000H, a limit of
00010H, and G = 1, what starting and ending locations are addressed by this descriptor?
Ans.: Since G = 1 we will append the limit with FFFH. Thus the starting address will be 00280000H
and the ending address will be 00290FFFH.
Q. No. 16 If DS = 0105H in a protected mode system, which entry, table, and requested privilege
level are selected?
Ans.: 0105H = 0000 0001 0000 0101b. From this we see that requested privilege level is 01 (ring 1),
table is local table, entry is 0 0000 0010 0000b = 20H.
Q. No. 17 Which register locates the global descriptor table?
Ans.: The GDTR (global descriptor table register) contain the base address of the global descriptor
table and its limit. When the protected mode operation is desired, the address of the global descriptor
table and its limit are loaded into the GDTR.
Q. No. 18 How is the local descriptor table addressed in the memory system?
Ans.: The location of the local descriptor table is selected from the global descriptor table. One of the
global descriptors is set up to address the local descriptor table. To access the local descriptor table,
the LDTR (local descriptor table register) is loaded with a selector, just as a segment register is
loaded with a selector. This selector accesses the global descriptor table and loads the address, limit,
and access rights of the local descriptor table into the cache portion of the LDTR.
Q. No. 19 If the microprocessor sends linear address 00200000H to the paging mechanism,
which paging directory entry is accessed, and which page table entry is accessed?
Ans.: The microprocessor will have access to entry zero or the first entry.
Q. No. 20 List the 16-bit registers that are used for register addressing.
Ans.: AX, BX, CX, DX, SP, BP, SI, DI, CS, DS, ES, SS, FS, and GS
Q. No. 21 What is wrong with the MOV BL,CX instruction?
Ans.: The CX register is a 16-bit register whereas BL register is an 8-bit register. Thus the instruction
is wrong because of size mismatch.

Q. No. 22 Select an instruction for each of the following tasks.

Ans.: (a) move 12H into AL. Instruction: MOV AL,12H
(b) move 1200A2H into EBX. Instruction: MOV EBX,1200A2H
Q. No. 23 What assembly language directive indicates the start of the CODE segment?
Ans.: The directive .CODE indicates the start of the CODE segment.
Q. No. 24 Suppose that DS = 0200H, BX = 0300H, and DI = 400H. Determine the memory
address accessed by each of the following instructions, assuming real mode operation.
Ans.: (a) MOV AL,[1234H] Memory Address Accessed: 3234H
(b) MOV EAX,[BX] Memory Address Accessed: 2300H
Q. No. 25 What is wrong with a MOV [BX],[DI] instruction?
Ans.: Because the memory to memory data transfers are not allowed.
Q. No. 26 Suppose that DS = 1000H, SS = 2000H, BP = 1000H, and DI = 0100H. Determine the
memory address accessed by each of the following, assuming real mode operation.
Ans.: (a) MOV AL,[BP+DI] Memory Address Accessed: 21110H
(b) MOV CX,[DI] Memory Address Accessed: 10100H
Q. No. 27 Suppose that DS = 1200H, BX = 0100H, and SI = 0250H. Determine the address
accessed by each of the following instructions, assuming real mode operation.
Ans.: (a) MOV [100H],DL Memory Address Accessed: 12100H
(b) MOV [SI+100H],EAX Memory Address Accessed: 12350H
Q. No. 28 Suppose that DS = 1300H, SS = 1400H, BP = 1500H, and SI = 0100H. Determine the
address accessed by each of the following instructions, assuming real mode operation.
Ans.: (a) MOV EAX,[BP+200H] Memory Address Accessed: 11750H
(b) MOV AL,[BP+SI-200H] Memory Address Accessed: 11950H
Q. No. 29 How many bytes of memory store a far direct jump instruction? What is stored in
each of the bytes?
Ans.: The required number of bytes will be 5, the first byte will be the opcode, followed by a two byte
segment address, followed by a two byte offset address.
Q. No. 30 What is the difference between an intersegment jump and an intrasegment jump?
Ans.: The intersegment jump allows jumps between segments or to anywhere in the memory system
while the intrasegment jump allows a jump to any location within the current code segment.