CHAPTER - 1

INTRODUCTION
1.1 INTRODUCTION
When planning a system deployment, regardless of size, it is important to look at not
just the initial costs of the hardware and software, but also at the ongoing operational
expenses which really constitutes the largest bulk of the total cost throughout the life of the
deployment. Many factors contribute to these costs and the right embedded system usually
offers superior value in the long term.

1.2 MOTIVATION
1

System Reliability: Because embedded applications have long life spans and systems
are often required to operate in harsh environments (including elevated temperature
ranges), embedded systems typically employ components rated for higher
temperatures and/or higher voltages. Conversely, commercial PC system designs
often employ components with lower temperature/voltage ratings because those
components are inexpensive, readily available, and support the operating conditions
where PCs are typically used. The lifespan of any electronic device is related to its
operating temperature, and that lifespan can be increased significantly either by
operating it at a lower temperature or at a lower voltage than it is rated for (i.e. derating).

Power Consumption: Lower power consumption is always better than higher power
consumption but not just for the obvious reasons of saving energy costs and
increasing battery life. First of all, lower power consumption of key components
results in the entire system operating at a lower temperature, putting less stress on the
rest of the system components, and increasing the life of the system as mentioned
above. Low power consumption can often obviate the need for a fan which allows the
system to run quieter, enables smaller enclosures, and lowers implementation and
support costs. Low power consumption combined with power management
technology built into the silicon itself, also eases the burden on software engineers
who are increasingly tasked with developing sophisticated applications and
techniques for managing system power.

1.3 OVERVIEW OF PROJECT

Detection of illegal consumers is an extremely challenging problem in todays power
engineering and utilitys everyday operations. This dissertation presents a generalized
algorithm that uses customer energy consumption patterns to detect illegal consumers in a
smart grid environment. To realize this solution, initially, this dissertation conducts an
extensive survey on the methods implemented in pilfering electricity and technologies
involved in smart energy meters. Then, an extensive survey on the smart meter and
communication technologies are carried out explaining the features of smart grid. In general,
utilities collect real-time energy consumption information from its customers several times
every day. However, owing to the unavailability of that data, a dataset with near real-time
energy consumption patterns has been developed in this work. Then, an encoding algorithm is
proposed and implemented, which maps instantaneous customer energy consumption patterns
into irregularities in consumption, while preserving the uniqueness in patterns of different
customers. Then, intelligent classification algorithms are developed and implemented to
identify illegal consumers. The proposed algorithms are then modified to be implemented on
High Performance Computers (HPCs) for faster analysis and identification. Finally, an
analysis on the impact of Real Time Pricing (RTP) and Distributed Generation (DG) sources
on illegal consumption of electricity is presented.

CHAPTER - 2
PREPAID METERING SYSTEM
2.1 EXISTING SYSTEM
Electricity theft includes tampering meters to show a low meter reading, stealing
electricity bypassing a meter, billing irregularities and unpaid bills [1]. Billing irregularities
comprise inaccurate meter reading taken by bribed service man and intentional fixing of the
bill by office staffs in exchange of illicit payments from the consumer. Different nontechnical and technical methods were proposed in the past to detect electricity pilfering.
Nontechnical methods may include inspection of the customers with suspicious load profile.
Although periodic inspection can substantially reduce theft, such measure requires large
manpower and huge labor. Such effort also fails in most cases due to the dishonesty of the
staffs.
Some of the technical ways to detect pilferage are use of central observer meter at
secondary terminals of distribution transformer, harmonic generator, genetic support vector
machines, extreme learning machine, and power line impedance technique. However, these
technical approaches can be effectively implemented only if proper communication is
ensured between the central control station and the appropriate test points.

2.2 PROPOSED SYSTEM

Prepaid energy meters based on GSM network has been proposed. These meters
incorporate the facility of prepaid metering system and remote load control. This prepaid
metering system can be further matured to address the problem of electricity theft. In this
system, we have proposed a GSM based prepaid energy metering system[3] which deals with
different aspects of electricity theft. The proposed system prevents irregularities of billing,
reluctance of consumers to pay bills in time, meter tampering and bypassing.

2.3 Advantages of proposed methodology over existing methodology

The present power usage reading is made manually by moving to the consumer
locations. This requires large number of labor operators and long working hours to
accomplish the task. Manual billing is sometimes restricted and delayed by bad weather
conditions. The printed billing also has the tendency of getting lost. Over the last few years,

Smart (Prepaid) Energy Meter has been proposed as an innovative solution aimed at
facilitating affordability and reducing the cost of utilities. This mechanism, essentially,
requires the users to pay for the electricity before its consumption. In this way, consumers
hold credit and then use the electricity until the credit is exhausted. If the available credit is
exhausted then the electricity supply is cutoff by a relay. Readings made by human operators
are prone to errors. This project addresses the above mentioned problems. The development
of GSM infrastructure in past two decades made meter reading system wireless. The GSM
infrastructure, which has national wide coverage, can be used to request and retrieve power
consumption notification over individual houses and flats. Apart from making readings using
GSM communication, billing system is needed to be made prepaid to avoid unnecessary
usage of power. The use of Prepaid Energy meter is still controversial. On the one hand, those
that support the diffusion of prepaid meters claim that they benefit both consumers and
utilities because they help users to consume more efficiently and to improve the management
of their budget, while allowing firms to reduce financial costs. On the other hand, those that
are against prepaid meters argue that their adoption is expensive for firms and risky for low
income consumers, as the insecurity and volatility of their income may force them to make
little use of the service, or ultimately, bring about involuntary self-disconnection.

2.4 BLOCK DIAGRAM

LCD

Mains SupplyPower Supply

(230V)

Relay

Load

Microcontroller
ARM V7
(CORTEX M3)

Buzzer

GSM

Figure 2.3: Block Diagram Representation

2.5 DESCRIPTION:
In the proposed system the power utility maintains a server and each consumer are
provided an energy meter. The server and prepaid meters use GSM modem and GSM module
respectively to communicate with each other using the GSM network. e energy metering chip
produces pulses proportional to the energy consumed using the outputs of current and
potential transformers. The microcontroller calculates the energy consumption by counting
the output pulses of the energy metering chip on an interrupt basis. The microcontroller uses
AT command set to communicate with the GSM module (mobile phone). A battery backup is
also available in the energy meter. The embedded C programming language and the kiel
vision software have been used to program the microcontroller and to implement the server,
respectively.
The recharging process in the proposed metering system is similar to that of
recharging balance in a mobile phone. The user has to buy a scratch card and scratch it to
uncover the secret pin number of the corresponding energy unit he has bought. For example,
if a user wants to buy 100 units (KWh), he has to pay for the 100 units and obtain a scratch
card which holds the secret pin number of the corresponding 100 units. The user has to send
the pin number to the server through SMS. The server then checks whether the pin number is
valid or not. If the pin number is valid, the server then extracts the information of energy-unit
from the pin number (in this case 100 units) and sends it to the meter of the user through
GSM network. The household meter then receives the corresponding unit and is activated. As
the user consumes energy, the corresponding units are deducted from the total balance and the
remaining units are displayed using LCD. After the consumption of the allocated energy, the
meter automatically disconnects the load from the main power line using the relay until the
user recharges again. Thus the system avoids the irregularities associated with traditional
billing system and ensures revenue collection.

CHAPTER - 3
HARDWARE REQUIREMENTS
3.1 MICROCONTROLLER
The microcontroller used in this project is ARM cortex M3. The LPC17xx is an ARM
Cortex-M3 based microcontroller for embedded applications requiring a high level of
integration and low power dissipation. The ARM Cortex-M3 is a next generation core that
offers system enhancements such as modernized debug features and a higher level of support
block integration. The processor is a low-power processor that features low gate count, low
interrupt latency, and low-cost debug. It is intended for deeply embedded applications that
require fast interrupt response features. The processor implements the ARM architecture v7M. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses Harvard architecture
with separate local instruction and data buses as well as a third bus for peripherals. The ARM
Cortex-M3 CPU also includes an internal pre-fetch unit that supports speculative branches.
The peripheral complement of the LPC17xx includes up to 512 kB of flash memory,
up to 64 kB of data memory, Ethernet MAC, a USB interface that can be configured as either
Host, Device, or OTG, 8 channel general purpose DMA controller, 4 UARTs, 2 CAN
channels, 2 SSP controllers, SPI interface, 3 I2C interfaces, 2-input plus 2-output I2S
interface, 8 channel 12-bit ADC, 10-bit DAC, motor control PWM, Quadrature Encoder
interface, 4 general purpose timers, 6-output general purpose PWM, ultra-low power RTC
with separate battery supply, and up to 70 general purpose I/O pins.
The Processor core is a low gate count core, with low latency interrupt
processing that features:
ARMv7-M. A Thumb-2 Instruction Set Architecture (ISA) subset, consisting of all base
Thumb-2 instructions, 16-bit and 32-bit, and excluding blocks for media, Single Instruction
Multiple Data (SIMD), enhanced Digital Signal Processor (DSP) instructions (E variants),
and ARM system access.
Banked Stack Pointer (SP) only.
Hardware divide instructions, SDIV and UDIV (Thumb-2 instructions).
Handler and Thread modes.

Thumb and Debug states.

Interruptible-continued LDM/STM, PUSH/POP for low interrupt latency.
Automatic processor state saving and restoration for low latency Interrupt Service
Routine (ISR) entry and exit.
ARM architecture v6 style BE8/LE support.

3.1.1 Block Diagram Of ARM Microcontroller:

Figure 3.1.1: Block Diagram of LPC1768

3.1.2 Architectural Overview:

The ARM Cortex-M3 includes three AHB-Late buses, one system bus and the I-code
and D-code buses which are faster and are used similarly to TCM interfaces: one bus
dedicated for instruction fetch (I-code) and one bus for data access (D-code). The use of two
core buses allows for simultaneous operations if concurrent operations target different

devices. The LPC17xx uses a multi-layer AHB matrix to connect the Cortex-M3 buses and
other bus masters to peripherals in a flexible manner that optimizes performance by allowing
peripherals on different slaves ports of the matrix to be accessed simultaneously by different
bus masters. Details of the multilayer matrix connections are APB peripherals are connected
to the CPU via two APB busses using separate slave ports from the multilayer AHB matrix.
This allows for better performance by reducing collisions between the CPU and the DMA
controller. The APB bus bridges are configured to buffer writes so that the CPU or DMA
controller can write to APB devices without always waiting for APB write completion.

3.1.3 The Cortex-M3 Core:

The central Cortex-M3 core is based on the Harvard architecture characterized by
separate buses for instructions and data (Figure 3). The processor differs from the von
Neumann architecture based ARM7 family of processors which use the same signal buses
and memory for both instructions and data. By being able to read both an instruction and data
from memory at the same time, the Cortex-M3 processor can perform many operations in
parallel, speeding application execution.
The core pipeline has 3 stages: Instruction Fetch, Instruction Decode and Instruction
Execute. When a branch instruction is encountered, the decode stage also includes a
speculative instruction fetch that could lead to faster execution. The processor fetches the
branch destination instruction during the decode stage itself. Later, during the execute stage,
the branch is resolved and it is known which instruction is to be executed next. If the branch
is not to be taken, the next sequential instruction is already available. If the branch is to be
taken, the branch instruction is made available at the same time as the decision is made,
restricting idle time to just one cycle.
The Cortex-M3 core contains a decoder for traditional Thumb and new Thumb-2
instructions, an advanced ALU with support for hardware multiply and divide, control logic,
and interfaces to the other components of the processor. The Cortex-M3 processor is a 32-bit
processor, with a 32-bit wide data path, register bank and memory interface. There are 13
general-purpose registers, two stack pointers, a link register, a program counter and a number
of special registers including a program status register.
The Cortex-M3 processor supports two operating modes, Thread and Handler and two
levels of access for the code, privileged and unprivileged, enabling the implementation of

complex and open systems without sacrificing the security of the application. Unprivileged
code execution limits or excludes access to some resources like certain instructions and
specific memory locations. The Thread mode is the typical operating mode and supports both
privileged and unprivileged code. The Handler mode is entered when an exception occurs and
all code is privileged during this mode. In addition, all operation is categorized under two
operating states, Thumb for normal execution and Debug for debug activities.
The Cortex-M3 processor is a memory mapped system with a simple, fixed memory
map for up to 4 gigabytes of addressable memory space with predefined, dedicated addresses
for

code

(code

space),

SRAM(memory

space),

external

memories/devices

and

internal/external peripherals. There is also a special region to provide for vendor specific
addressability.

3.1.4 Thumb-2 Instruction Set Architecture :

The ARMv7-M is the microcontroller profile of the ARMV7 architecture and is
different from earlier ARM architectures in that it supports Thumb-2 instructions alone.
Thumb-2 technology is a blend of 16 and a 32-bit instruction that delivers the performance of
32-bit ARM instructions, matches the code density of and is backwards compatible with, the
original 16-bit Thumb instruction set. Figure shows indicative Dhrystone benchmark results
that illustrate that Thumb-2 technology indeed achieves this objective.
In an ARM7 processor-based system, switching the processor core between the
Thumb state for code density and ARM state for high performance would be necessary for
certain applications. However, the Cortex-M3 processor does not need to interwork
instructions since both 16-bit and 32-bit instructions co-exist in the same mode, enabling
higher code density and performance with far less complexity. As theThumb-2 instructions
are a superset of 16-bit Thumb instructions, the Cortex-M3 processor can execute any
previously written Thumb code. By implementing Thumb-2 instructions, the Cortex-M3
processor also delivers compatibility with other members of the ARM Cortex processor
family.
The Thumb-2 instruction set includes instructions that make it easier to write compact
code for many different applications. The BFI and BFC instructions are bit-field instructions
that are useful in applications like network packet processing. The SBFX and UBFX
instructions improve the ability to insert or extract a number of bits to or from a register, a

capability particularly useful in automotive applications. The RBIT instruction reverses the
bits in a word and is useful in DSP algorithms such as DFT. The table branch instructions
TBB and TBH enable a balance of code compaction and high performance. Thumb-2
instructions also introduce a new If-Then construct that predicates the conditional execution
of up to four subsequent instructions.
3.1.5 The Nested Vectored Interrupt Controller (NVIC):
The highly configurable NVIC is an integral part of the Cortex-M3 processor and
provides the processors outstanding interrupt handling abilities. The Cortex-M3 processor
uses a re-locatable vector table that contains the address of the function to be executed for a
particular interrupt handler. On accepting an interrupt, the processor fetches the address from
the vector table through the instruction bus interface. The vector table is located at address
zero at reset, but can be relocated by programming a control register.
To reduce gate count and enhance system flexibility the Cortex-M3 has migrated from
the banked shadow register exception model of the ARM7 processor to a stack based
exception model. When an exception takes place, the Program Counter, Program Status
Register, Link Register and the R0-R3,R12 general purpose registers are pushed on to the
stack. The data bus stacks the registers whilst the instruction bus identifies the exception
vector from the vector table and fetches the first instruction of the exception code. Once the
stacking and instruction fetch are completed, the interrupt service routine or fault handler is
executed, followed by the automatic restoration of the registers to enable the interrupted
program to resume normal execution. By handling the stack operations in hardware, the
Cortex-M3 processor removes the need to write assembler wrappers that are required to
perform stack manipulation for traditional C-based interrupt service routines, making
application development significantly easier.
The NVIC supports nesting (stacking) of interrupts, allowing an interrupt to be
serviced earlier by exerting higher priority. It also supports dynamic reprioritization of
interrupts. Priority levels can be changed by software during run time. Interrupts that are
being serviced are blocked from further activation until the interrupt service routine is
completed, so their priority can be changed without risk of accidental re-entry. Tail chaining
in the NVIC is shown in the below figure 3.1.5.

Figure 3.1.5: Tail chaining in the NVIC

The NVIC also implements the power-management scheme of the Cortex-M3
processor that supports integrated sleep modes. The Sleep Now mode is invoked by either the
Wait For Interrupt (WFI) or the Wait For Event (WFE) instructions that immediately puts the
core into low-power state pending an exception. The Sleep On Exit mode puts the system into
low-power mode as soon as it exits the lowest priority interrupt-service routine. The core
stays in sleep state until another exception is encountered. Since only an interrupt can exit
this mode, the system state is not restored. The SLEEPDEEP bit of the system control
register, if set; can be used to clock gate the core and other system components for optimal
power savings.
The NVIC also integrates a System Tick (SysTick) timer, which is a 24-bit countdown timer that can be used to generate interrupts at regular time intervals, proving an ideal
heartbeat to drive a Real Time OS or other scheduled tasks.

3.1.6 The Memory Protection Unit (MPU) :

The MPU is an optional component of the Cortex-M3 processor that can improve the
reliability of an embedded system by protecting critical data used by the operating system
from user applications, separating processing tasks by disallowing access to each other's data,
disabling access to memory regions, allowing memory regions to be defined as read-only and
detecting unexpected memory accesses that could potentially break the system.
The MPU enables the application to be broken down into a set of processes. Each
process owns specific memory (code, data, stack, and heap) and devices, as well as having
access to shared memory and devices. The MPU also enforces user and privilege access rules.
This includes executing code from the right privilege level as well as enforcing ownership of
memory and devices by privileged and user code.

Accesses to memory locations that are not defined in the MPU regions, or not
permitted by the region setting, will cause the Memory Management Fault exception to take
place. The protection for the regions is implemented with rules that are based on the type of
transaction (read, write or execute) and privilege of code performing the access. Each region
includes a set of bits which affect what kinds of accesses are permitted, as well as bits that
affect what kind of bus action is allowed. The MPU also supports overlapping regions, which
are regions that cover the same address. Since sizes are in multiples of 2, overlap means that
one may be fully enclosed within another. It is therefore possible to have multiple regions
enclosed by a single region and it is also possible to have nested overlapping. In the case of
address lookups to locations within overlapping regions, the region with the highest region
number is returned.

3.1.7 Debug And Trace :

The debug access into a Cortex-M3 processor based system is through the Debug
Access Port (DAP) that can be implemented as either a Serial Wire Debug Port (SW-DP) for
a two-pin (clock and data) Interface or a Serial Wire JTAG Debug Port (SWJ-DP) that
enables either JTAG or SW protocol to be used. The SWJ-DP defaults to JTAG mode on
power reset and can be made to switch protocols with a specific control sequence provided by
the external debug hardware.
Debug actions can be triggered by various events like breakpoints, watchpoints, fault
conditions, or external debug requests. When a debug event takes place, the Cortex-M3
processor can either enter the halt mode or the debug monitor mode. During the halt mode,
the processor stops program execution completely. The halt mode supports single step
operations. Interrupts can be pended, and can get invoked during single stepping, or be
masked so external interrupts get ignored during stepping. During the debug monitor mode,
the processor executes an exception handler to carry out the debug tasks, while still allowing
higher priority exceptions to take place. This mode also supports single stepping.
either remap code to an area in system space, or implement a hardware breakpoint, by
returning a breakpoint instruction to the processor. It also contains two literal comparators,
for matching against literal loads from code space and remapping to an area in system space.

The Data Watch point and Trace (DWT) unit contains four comparators, each of
which can be configured as hardware watch points are shown in fig3.1.7. When used in this
configuration, the comparators can be programmed to compare either the data address or
program counter. The DWT comparators can also be configured to trigger PC sampler events,
data address sampler events and to cause the Embedded Trace Macrocell (ETM) to emit
trigger packets in the instruction trace stream.

Figure 3.1.7: The Cortex-M3 Trace System

The Cortex-M3 processor implements data trace with the DWT and the
Instrumentation Trace Macrocell (ITM). The DWT provides instruction execution statistics
and can generate watchpoint events to invoke debug or trigger the ETM on specific system
events. The ITM is an application driven trace source that supports printf style debugging to
trace OS and application events. It accepts hardware trace packets from the DWT and
software trace stimuli from the processor core and emits diagnostic system information with
timestamps. The Trace Port Interface Unit (TPIU) accepts tracing information from the ETM
and ITM; and then merges formats and emits it via the Serial Wire Viewer (SWV) to external
trace analyzer units. The SWV allows simple and cost effective profiling of system events by
exporting streams of data through a single pin. Manchester encoded and UART are supported
formats for the SWV.

3.1.8 The Bus Matrix And Interfaces :

The Cortex-M3 processor bus matrix connects the processor and debug interface to
the external buses; the 32-bit AMBA AHB-Lite based I Code, D Code and System interfaces

and the 32-bit AMBA APB based Private Peripheral Bus (PPB). The bus matrix also
implements unaligned data accesses and bit banding. All fetches are one word wide, with the
number of instructions fetched per word depending upon the type of code implemented and
its alignment in memory. The 32-bit D Code interface accesses data from the code memory
space and can be accessed by the CM3Core and the DAP. The 32-bit System interface fetches
instructions and accesses data within the system memory space and like the D Code bus, can
be accessed by the CM3Core and the DAP. The PPB enables access to components outside of
the Cortex-M3 processor system.

3.2 LCD
3.2.1 LCD Description:
LCD (Liquid Crystal Display) screen is an electronic display module and find a wide
range of applications. A 16x2 LCD display is very basic module and is very commonly used
in various devices and circuits. These modules are preferred over seven segments and other
multi segment LEDs. The reasons being: LCDs are economical; easily programmable; have
no limitation of displaying special & even custom characters (unlike in seven segments),
animations and so on.

3.2.2 Pin Description

Figure 3.2.2 LCD

A 16x2 LCD means it can display 16 characters per line and there are 2 such lines. In
this LCD each character is displayed in 5x7 pixel matrix. This LCD has two registers,
namely, Command and Data. The command register stores the command instructions given to

the LCD. A command is an instruction given to LCD to do a predefined task like initializing
it, clearing its screen, setting the cursor position, controlling display etc. The data register
stores the data to be displayed on the LCD. The data is the ASCII value of the character to be
displayed on the LCD.
Pin
No
1
2

Function

Name

Ground (0V)
Supply voltage; 5V (4.7V 5.3V)

Ground
Vcc

Contrast adjustment; through a variable resistor

VEE

Selects command register when low; and data register Register

when high
Select
Low to write to the register; High to read from the Read/write

register
Sends data to data pins when a high to low pulse is Enable
given

7
8

DB0
DB1

DB2

10

DB3

11

8-bit data pins

DB4

12

DB5

13

DB6

14

DB7

15

Backlight VCC (5V)

Led+

16

Backlight Ground (0V)

Led-

Table 3.2.2: 16 pin 16X2 LCD pin description

The above diagram represents 16 pin 16X2 LCD. The function and pin numbers are shown in
the below the table 3.2.2.

3.3 GSM

The GSM system is the most widely used cellular technology in use in the world
today. The letters GSM originally stood for the words Grouped Special Mobile, but as it
became clear this cellular technology was being used worldwide the meaning of GSM was
changed to Global System for Mobile Communications. Since this cellular technology was
first deployed in 1991, the use of GSM has grown steadily, and it is now the most widely cell
phone system in the world.
3.3.1 GSM Architecture:
A GSM network is composed of several functional entities, whose functions and
interfaces are specified. The GSM network can be divided into three broad parts. The Mobile
Station is carried by the subscriber. The Base Station Subsystem controls the radio link with
the Mobile Station. The Network Subsystem, the main part of which is the Mobile services
Switching Centre (MSC), performs the switching of calls between the mobile users, and
between mobile and fixed network users. The MSC also handles the mobility management
operations.
The Mobile Station and the Base Station Subsystem communicate across the Um
interface, also known as the air interface or radio link. The Base Station Subsystem
communicates with the Mobile services Switching Centre across the A interface.

3.3.2 Mobile Station:

The mobile station (MS) consists of the mobile equipment (the terminal) and a smart
card called the Subscriber Identity Module (SIM). The SIM provides personal mobility, so
that the user can have access to subscribed services irrespective of a specific terminal. By
inserting the SIM card into another GSM terminal, the user is able to receive calls at that
terminal, make calls from that terminal, and receive other subscribed services. The mobile
equipment is uniquely identified by the International Mobile Equipment Identity (IMEI). The
SIM card contains the International Mobile Subscriber Identity (IMSI) used to identify the
subscriber to the system, a secret key for authentication, and other information. The IMEI and
the IMSI independent thereby allowing personal mobility. The SIM card may be protected
against unauthorized use by a password or personal identity number.
3.3.3 Base Station Subsystem:

The Base Station Subsystem is composed two parts, the Base Transceiver Station
(BTS) and the Base Station Controller (BSC). These communicate across the standardized
Abis interface, allowing (as in the rest of the system) operation between components made by
different suppliers. The Base Transceiver Station houses the radio transceivers that define a
cell and handles the radio-link protocols with the Mobile Station. In a large urban area, there
will potentially be a large number of BTSs deployed, thus the requirements for a BTS are
ruggedness, reliability, portability, and minimum cost. The Base Station Controller manages
the radio resources for one or more BTSs. It handles radio-channel setup, frequency hopping,
and handovers, as described below. The BSC is the connection between the mobile station
and the Mobile service Switching Centre (MSC).
3.3.4 Network Subsystem:
The central component of the Network Subsystem is the Mobile services Switching
Centre (MSC). It acts like a normal switching node of the PSTN or ISDN, and additionally
provides all the functionality needed to handle a mobile subscriber, such as registration,
authentication, location updating, handovers, and call routing to a roaming subscriber. These
services are provided in conjunction with several functional entities, which together form the
Network Subsystem. The MSC provides the connection to the fixed networks (such as the
PSTN or ISDN). Signaling between functional entities in the Network Subsystem uses
Signaling System Number 7 (SS7), used for trunk signaling in ISDN and widely used in
current public networks.
The Visitor Location Register (VLR) contains selected administrative information
from the HLR, necessary for call control and provision of the subscribed services, for each
mobile currently located in the geographical area controlled by the VLR. Although each
functional entity can be implemented as an independent unit, all manufacturers of switching
equipment to date implement the geographical area controlled by the MSC corresponds to
that controlled by the VLR, thus simplifying the signaling required. VLR together with the
MSC, so that the Note that the MSC contains no information about particular mobile stations
this information is stored in the location registers. The other two registers are used for
authentication and security purposes.
The Equipment Identity Register (EIR) is a database that contains a list of all valid
mobile equipment on the network, where each mobile station is identified by its International

Mobile Equipment Identity (IMEI). An IMEI is marked as invalid if it has been reported
stolen or is not type approved. Card which is used for authentication and encryption over the
radio channel. The Authentication Centre (AUC) is a protected database that stores a copy of
the secret key stored in each subscriber's SIM card, which is used for authentication and
encryption over the radio channel.

Figure 3.3.4: GSM Architecture

3.3.5 GSM Modem:
A GSM modem is a wireless modem that works with a GSM wireless network. A
GSM modem can be an external device or a PC Card / PCMCIA Card. Typically, an external
GSM modem is connected to a computer through a serial cable or a USB cable. A GSM
modem in the form of a PC Card / PCMCIA Card is designed for use with a laptop computer.
It should be inserted into one of the PC Card / PCMCIA Card slots of a laptop/ computer.
Like a GSM mobile phone, a GSM modem requires a SIM card from a wireless carrier in
order to operate. Computers use AT commands to control modems. Both GSM modems and
dial-up modems support a common set of standard AT commands. You can use a GSM
modem just like a dial-up modem.

Figure 3.3.5: GSM module

In addition to the standard AT commands, GSM modems support an extended set of
AT commands. These extended AT commands are defined in the GSM standards. With the
extended AT commands, you can do things like:
Reading, writing and deleting SMS messages.
Sending SMS messages.
Monitoring the signal strength.
Monitoring the charging status and charge level of the battery.
The number of SMS messages that can be processed by a GSM modem per minute is
very low only about six to ten SMS messages per minute.
In this project I am using a microcontroller to control a GSM modem. The interface
between modem and host (microcontroller) is a textual protocol called Hayes AT-Commands.
These commands enable modem setup, dialing, text messaging etc. The protocol used by

GSM modems for setup and control is based on the Hayes AT Command set. The GSM
modem specific commands are adapted to the services offered by a GSM modem such as:
text messaging, calling a given Phone number, deleting memory locations etc. Since the main
objective for this application note is to show how to send and receive text messages, only a
subset of the AT-Command set needs to be implemented. The European Telecommunication
Standard Institute (ETSI) GSM 07.05 defines the AT-Command interface for GSM
compatible modems. From this document some selected commands are chosen, and presented
briefly in this section. This command subset will enable the modem to send and receive SMS
messages.
3.3.6 GSM Commands:
Sending The Message
To send the SMS message, we can type the following command:
AT+CMGS=+31638740161 <ENTER>
Replace the above phone number with our own cell phone number. The modem will respond
with:
You can now type the message text and send the message using the <CTRL>-<Z> key
combination:
Hello World ! <CTRL-Z>
After some seconds the modem will respond with the message ID of the message,
indicating that the message was sent correctly:
+CMGS: 62
The message will arrive on the mobile phone shortly.
Listing The Messages

Once we have successfully set the messages storage, we can list the messages
available using the list command:
AT+CMGL=ALL <ENTER>
ALL has to be send in uppercase on some modems. The modem will respond with
a list of decoded SMS messages.
Reading A Message
To list a single message, we have to use the read command. We must use the list
command first, so we know the indexes of the messages in the storage. For instance, to read
the message on memory location 2 we can use:
AT+CMGR=2 <ENTER>
The modem will list the single message:
+CMGR: REC READ,+31625012254,,07/07/05,09:56:03+08
Test message 2
OK
The status of the message is now REC_READ instead of REC_UNREAD because we
read the message.
Deleting A Message
Once we have read a message, we can free the memory by deleting the message from the
storage. For instance, to delete the message on memory location 2 we can use:
AT+CMGD=2 <ENTER>
The modem will delete the single message.

3.4 POWER SUPPLY

3.4.1 Block Diagram Of Power Supply:

step down
transformer

bridge rectifier

filter circuit

regulator

Figure 3.4.1: Block Diagram Of Power Supply

3.4.2 Transformer:
A transformer is a device that transfers electrical energy from one circuit to another
through inductively coupled conductors the transformer's coils. A varying current in the first
or primary winding creates a varying magnetic flux in the transformer's core, and thus a
varying magnetic field through the secondary winding. This varying magnetic field induces a
varying electromotive force (EMF) or "voltage" in the secondary winding. This effect is
called mutual induction.

Figure 3.4.2: Transformer Symbol

3.4.3 Diodes:
Diodes allow electricity to flow in only one direction. The arrow of the circuit
symbol shows the direction in which the current can flow. Diodes are the electrical version
of a valve and early diodes were actually called valves.

Figure 3.4.3: Diode Symbol

A diode is a device which only allows current to flow through it in one direction. In
this direction, the diode is said to be 'forward-biased' and the only effect on the signal is that
there will be a voltage loss of around 0.7V. In the opposite direction, the diode is said to be
'reverse-biased' and no current will flow through it.

3.4.4 Rectifier:
The purpose of a rectifier is to convert an AC waveform into a DC waveform (OR)
Rectifier converts AC current or voltages into DC current or voltage. There are two different
rectification circuits, known as 'half wave' and 'full wave' rectifiers. Both use components
called diodes to convert AC into DC.
The Half Wave Rectifier
The half-wave rectifier is the simplest type of rectifier since it only uses one diode, as
shown in figure 3.4.4.

Figure 3.4.4: Half Wave Rectifier

Figure3.4.4 shows the AC input waveform to this circuit and the resulting output. As
you can see, when the AC input is positive, the diode is forward-biased and lets the current
through. When the AC input is negative, the diode is reverse-biased and the diode does not
let any current through, meaning the output is 0V. Because there is a 0.7V voltage loss across
the diode, the peak output voltage will be 0.7V less than Vs.

Figure 3.4.4 (a): Half Wave Rectification

While the output of the half-wave rectifier is DC (it is all positive), it would not be suitable as
a power supply for a circuit. Firstly, the output voltage continually varies between 0V and
Vs-0.7V, and secondly, for half the time there is no output at all.
The Full Wave Rectifier
The circuit in figure 3 addresses the second of these problems since at no time is the output
voltage 0V. This time four diodes are arranged so that both the positive and negative parts of
the AC waveform are converted to DC. The resulting waveform is shown in figure 4.

Figure 3.4.4 (b): Full Wave Rectifier

Figure 3.4.4 (c): Full Wave Rectification

When the AC input is positive, diodes A and B are forward-biased, while diodes C and D
are reverse-biased. When the AC input is negative, the opposite is true diodes C and D are
forward-biased, while diodes A and B are reverse-biased.
While the full wave rectifier is an improvement on the half wave rectifier, its output
still isn't suitable as a power supply for most circuits since the output voltage still varies
between 0V and Vs-1.4V. So, if you put 12V AC in, you will 10.6V DC out.

3.4.5 Capacitor Filter:

The capacitor-input filter, also called "Pi" filter due to its shape that looks like the Greek
letter pi, is a type of electronic filter. Filter circuits are used to remove unwanted or undesired
frequencies from a signal.

Figure 3.4.5: Capacitor Filter

A typical capacitor input filter consists of a filter capacitor C1, connected across the
rectifier output, an inductor L, in series and another filter capacitor connected across the load.
The capacitor C1 offers low reactance to the AC component of the rectifier output
while it offers infinite reactance to the DC component. As a result the capacitor shunts an
appreciable amount of the AC component while the DC component continues its journey to
the inductor L
The inductor L offers high reactance to the AC component but it offers almost zero
reactance to the DC component. As a result the DC component flows through the inductor
while the AC component is blocked.
The capacitor C2 bypasses the AC component which the inductor had failed to block.
As a result only the DC component appears across the load RL.

3.4.6 Voltage Regulator:

A voltage regulator is an electrical regulator designed to automatically maintain a
constant voltage level. It may use an electromechanical mechanism, or passive or active
electronic components. Depending on the design, it may be used to regulate one or more AC
or DC voltages. There are two types of regulator are they.
1. Positive Voltage Series (78xx) and
2. Negative Voltage Series (79xx)
78xx:78 indicate the positive series and xx indicates the voltage rating. Suppose 7805
produces the maximum 5V.05indicates the regulator output is 5V.
79xx:78 indicate the negative series and xx indicates the voltage rating. Suppose 7905
produces the maximum -5V.05indicates the regulator output is -5V.
These regulators consists the three pins there are
Pin1: It is used for input pin.
Pin2: This is ground pin for regulator
Pin3: It is used for output pin. Through this pin we get the output.

Figure 3.4.6: Regulator

3.5 Operation:

The input voltage to the

diodes 1 and 2 is supplied

from a transformer and is

equal to the peak AC voltage

of the secondary winding of the transformer as shown in graph 1.

The circuit consisting of the combination of the two diodes is called full wave rectifier.

These diodes combined with a capacitor are known as full wave rectifier with a capacitor.
This capacitor is known as filtering capacitor improves the output of the rectifier and the
efficiency of this rectifier is 81.2%.

The resistor is used to limit the voltage and current those are supplied to the regulator in order
to avoid the regulator from getting damaged.

The diode 3 is used to protect the diodes 1 and 2 from the back current discharged by the
capacitor.

The output at this point is not completely regulated since there is still some amount of ripple
present in the rectified voltage.

Therefore a regulator is used to ensure low voltage ripple and excellent load and line voltage
regulation.

The resistor after the regulator is used to limit the current supplied to the LED.

When the voltage supplied is greater than 3.8V, the LED will glow. The regulated DC voltage
output is taken across the capacitor and is further supplied to other applications.

3.6 RELAY
A relay is an electrically operated switch. These are remote control electrical switches
that are controlled by another switch, such as a horn switch or a computer as in a power train
control module, devices in industries, home based applications. Relays allow a small current
pin, 4-pin, 5-pin, and 6-pin, single switch or dual switches. Relays are used throughout the

automobile. Relays which come in assorted sizes, ratings, and applications, are used as
remote control switches. A typical vehicle can have 20 relays or more.

3.6.1 Basics On Relay Handling:

To maintain initial performance, care should be taken to avoid dropping or hitting the relay.

Under normal use, the relay is designed so that the case will not detach. To maintain initial
performance, the case should not be removed. Relay characteristics cannot be guaranteed if
the case is removed.

Use of the relay in an atmosphere at standard temperature and humidity with minimal
amounts of dust, SO 2, H 2 S, or organic gases is recommended.

Please avoid the use of silicon-based resins near the relay, because doing so may result in
contact failure. (This applies to plastic sealed type relays, too.)

Care should be taken to observe correct coil polarity (+, ) for polarized relays.

Proper usage requires that the rated voltage be impressed on the coil. Use rectangular waves
for DC coils and sine waves for AC coils.

Be sure the coil impressed voltage does not continuously exceed the maximum allowable
voltage.

Absolutely avoid using switching voltages and currents that exceed the designated values.

The rated switching power and life are given only as guides. The physical phenomena at the
contacts and contact life greatly vary depending on the type of load and the operating
conditions. Therefore, be sure to carefully check the

Type of load and operating conditions before use.

Do not exceed the usable ambient temperature values listed in the catalog.

Use the flux-resistant type or sealed type if automatic soldering is to be used.

Use alcohol based cleaning solvents when cleaning are to be performed using a sealed type
relay.

Avoid ultrasonic cleaning of all types of relays.

Avoid bending terminals, because it may cause malfunction.

As a guide, use a Fasten mounting pressure of 40 to 70N {4 to 7kgf}for relays with tab
terminals.
A relay is used to isolate one electrical circuit from another. It allows a low current
control circuit to make or break an electrically isolated high current circuit path. The basic
relay consists of a coil and a set of contacts. The most common relay coil is a length of
magnet wire wrapped around a metal core. When voltage is applied to the coil, current passes
through the wire and creates a magnetic field. This magnetic field pulls the contacts together
and holds them there until the current flow in the coil has stopped. The diagram below shows
the parts of a simple relay.

Figure 3.6.1.2: Relay

3.6.2 Operation:
When a current flows through the coil, the resulting magnetic field attracts an
armature that is mechanically linked to a moving contact. The movement either makes or
breaks a connection with a fixed contact. When the current is switched off, the armature is
usually returned by a spring to its resting position. Latching relays exist that require operation
of a second coil to reset the contact position.
By analogy with the functions of the original electromagnetic device, a solid-state
relay operates a thyristor or other solid-state switching device with a transformer or lightemitting diode to trigger it.

3.6.3 Pole And Throw:

Since relays are switches the terminology applied to switches is also applied to relays.
A relay will switch one or more poles, each of whose contacts can be thrown by energizing
the coil in one of three ways:

 Normally-open (NO) contacts connect the circuit when the relay is activated; the circuit is
disconnected when the relay is inactive. It is also called a Form A contact or "make" contact.
Normally-closed (NC) contacts disconnect the circuit when the relay is activated; the circuit
is connected when the relay is inactive. It is also called a Form B contact or "break" contact.
Change-over (CO), or double-throw (DT), contacts control two circuits: one normally-open
contact and one normally-closed contact with a common terminal. It is also called a Form C
contact or transfer contact ("break before make"). If this type of contact utilizes make
before break functionality, then it is called a Form D contact.
SPST
SPST relay stands for Single Pole Single Throw relay. Current will only flow through
the contacts when the relay coil is energized.

Figure 3.6.3: SPST Relay

SPDT Relay
SPDT Relay stands for Single Pole Double Throw relay. Current will flow between
the movable contact and one fixed contact when the coil is De-energized and between the
movable contact and the alternate fixed contact when the relay coil is energized. The most
commonly used relay in car audio, the Bosch relay, is a SPDT relay.

Figure 3.6.4: SPDT Relay

DPST Relay

DPST relay stands for Double Pole Single Throw relay. When the relay coil is
energized, two separate and electrically isolated sets of contacts are pulled down to make
contact with their stationary counterparts. There is no complete circuit path when the relay is
De-energized.

Figure 3.6.5: DPST Relay

DPDT Relay
DPDT relay stands for Double Pole Double Throw relay. It operates like the SPDT
relay but has twice as many contacts. There are two completely isolated sets of contacts.

Figure 3.6.6: DPDT Relay

This is a 4 Pole Double Throw relay. It operates like the SPDT relay but it has 4 sets of
isolated contacts.

Figure 3.6.7: 4 Pole Double Throw relay

3.7 APPLICATIONS
Relays are used:
To control a high-voltage circuit with a low-voltage signal, as in some types of modems,
To control a high-current circuit with a low-current signal, as in the starter solenoid of an
automobile,
To detect and isolate faults on transmission and distribution lines by opening and closing
circuit breakers (protection relays),
To isolate the controlling circuit from the controlled circuit when the two are at different
potentials, for example when controlling a mains-powered device from a low-voltage switch.
The latter is often applied to control office lighting as the low voltage wires are easily
installed in partitions, which may be often moved as needs change. They may also be
controlled by room occupancy detectors in an effort to conserve energy,
To perform logic functions. For example, the Boolean AND function is realized by
connecting relay contacts in series, the OR function by connecting contacts in parallel. Due to
the failure modes of a relay compared with a semiconductor, they are widely used in safety
critical logic, such as the control panels of radioactive waste handling machinery.
As oscillators, also called vibrators. The coil is wired in series with the normally closed
contacts. When a current is passed through the relay coil, the relay operates and opens the
contacts that carry the supply current. This stops the current and causes the contacts to close

again. The cycle repeats continuously, causing the relay to open and close rapidly. Vibrators
are used to generate pulsed current.
To generate sound. A vibrator, described above, creates a buzzing sound because of the rapid
oscillation of the armature. This is the basis of the electric bell, which consists of a vibrator
with a hammer attached to the armature so it can repeatedly strike a bell.
To perform time delay functions. Relays can be used to act as an mechanical time delay
device by controlling the release time by using the effect of residual magnetism by means of
a inserting copper disk between the armature and moving blade assembly.

CHAPTER - 4
SOFTWARE REQUIREMENTS
4.1 KEIL VISION4
4.1.1 Vision4 Overview
The Vision4 IDE is a windows based software development platform that combines
a robust editor, project manager, and integrated make facility. Vision4 integrates all tools
including the C compiler, macro assembler, linker/locator, and HEX file generator. Vision4
helps expedite the development process of our embedded applications by providing the
following:

Full-featured source code editor

Device database for configuring the development tool setting

Project manager for creating and maintaining our projects

Integrated make facility for assembling, compiling, and linking our embedded
applications

Dialogs for all development tool settings

True integrated source level Debugger with high-speed CPU and peripheral simulator

Advanced GDI interface for software debugging in the target hardware and for
connection to Keil ULINK

Flash programming utility for downloading the application program into Flash ROM

Links to development tools manuals, device datasheets and users guides

The Vision4 IDE offers numerous features and advantages that help us quickly and
successfully develop embedded applications. They are easy to use and are guaranteed to help
us achieve our design goals. The Vision4 IDE and Debugger is the central part of the Keil
development tool chain. Vision4 offers a Build Mode and a Debug Mode.
In the Build Mode, we maintain the project files and generate the application. In the
Debug Mode, we verify our program either with a powerful CPU and peripheral simulator or
with the Keil ULINK USB-JTAG Adapter (or other AGDI drivers) that connect the debugger
to the target system. The ULINK allows us also to download our application into Flash ROM
of our target system.

4.1.2 Vision4 IDE

The Vision3 IDE combines project management, a rich-featured editor with
interactive error correction, option setup, make facility, and on-line help. Use Vision3 to
create our source files and organize them into a project that defines our target application.
Vision3 automatically compiles, assembles, and links our embedded application and
provides a single focal point for our development efforts.

4.1.3 Keil Software Tool (Steps)

1

Click on the Keil uVision Icon on Desktop

The following fig will appear

Click on the Project menu from the title bar

Then Click on New Project

Save the project with a file name.

Select the controller series from the database list available from IDE.

Select the controller.

Select yes to copy startup code for the controller selected.

Click on the project name.

10

Click on the file then new to create new c file.

11

Save the file with extension as .c

12

Then add that file to your project

13

Add the C file to your project

14

Write your code in empty c file.

15

Write your code in c file

16

Click on build to verify any errors in the program.

Upon completion, we would like our meter to be able to do the following things:
1 Measure electricity consumption accurately.
2 Display real time account balance.
3 Communicate with the utility company to:

Let the user recharge his electricity account from the meter

Using a previously used card

Using a new card

Update rates for electricity as and when required

Perform a daily/hourly verification of electricity consumption

4 Warn the user of low account balance by flashing an LED
5 Cut power off when there is zero credit on the account.

4.2 COO COX DEBUGGER

4.3 HYPER TERMINAL

APPENDEX
PROGRAM CODE
#include "lpc17xx.h"
#include "lcd.h"
#include "uart.h"
#include "math.h"

#define EINT0

0x00000001

#define EINT0_EDGE

0x00000001

#define EINT0_RISING

0x00000001

#define BLINK_INTERVAL

250

#define TRUE

#define FALSE

#define TIMER_MATCH

/* TIME_INTERVALmS is a value to load the timer match register with

to get a 1 mS delay */
#define TIME_INTERVALmS
#define TIME_INTERVAL

1000
(9000000/100 - 1)

volatile uint32_t timer0_m0_counter = 0, sec = 0;

#define PowerRelay_en1() LPC_GPIO1->FIOSET |=(1<<0)
#define PowerRelay_clr1() LPC_GPIO1->FIOCLR |=(1<<0)
char mobno[]="xxxxxxxxx", s1[40],rf11;
int comp,d,c2=0,c3=0,c4=0,d2=0,amt=0,bal=0,count=0,c=0,msgno,v=0,i=0,j=0,k=0,ad1;
void _delay_ms(unsigned int i)
{
unsigned long int z;
for(i=i;i>0;i--)
for(z=7777;z>0;z--);
}

void UART3_IRQHandler (void)

{
uint8_t IIRValue;
IIRValue = LPC_UART3->IIR;

IIRValue >>= 1;

/* skip pending bit in IIR */

IIRValue &= 0x07;

/* check bit 1~3, interrupt identification */

if ( IIRValue == IIR_RDA ) /* Receive Data Available */

{
/* Receive Data Available */
rf11=LPC_UART3->RBR;
if(rf11=='+')
{
if(UART3_Rx()=='C')
{
if(UART3_Rx()=='M')
{
if(UART3_Rx()=='T')
{
if(UART3_Rx()=='I')
{
if(UART3_Rx()==':')
{
while(UART3_Rx()!=',');
msgno=UART3_Rx();
LPC_UART3->FCR = 0x05; // Clear ISR
UART3_String("AT+CMGF=1");
UART3_Tx('\r');
_delay_ms(500);
UART3_String("AT+CMGR=");
UART3_Tx(msgno);
LPC_UART3->FCR = 0x07;
UART3_Tx('\r');
while(UART3_Rx()!='?');
for(i=0;(s1[i]=UART3_Rx())!='$';i++)
{

j++;
}
_delay_ms(20000);
s1[i]='\0';
//UART3_String(s1);
UART3_Tx('\r');
_delay_ms(500);
UART3_String("AT+CMGD=");
UART3_Tx(msgno);
UART3_Tx('\r');
v=1;
}
}
}
}
}
}
}
else if ( IIRValue == IIR_CTI )

/* Character timeout indicator */

{
/* Character Time-out indicator */
UART1Status |= 0x100;
}
}

void EINT0_IRQHandler (void)

{

/* Bit 9 as the CTI error */

if(bal>0)
{
c++;
bal=bal-1;
InitLCD();
_delay_ms(100);
LCDCmd(0x80);
_delay_ms(100);
LCDWriteStringXY(0,0,"Power:");
_delay_ms(100);
LCDWriteIntXY(9,0,c,4);
_delay_ms(100);
LCDWriteStringXY(14,0,"KW");
_delay_ms(100);
LCDWriteStringXY(0,1,"Balence:");
_delay_ms(100);
LCDWriteIntXY(9,1,bal,4);
_delay_ms(100);
LCDWriteStringXY(14,1,"RS");
_delay_ms(100);
}
LPC_SC->EXTINT |= EINT0;
}

void Send_SMS(char *M_NO)

{
int i;
UART3_String("AT");
UART3_Tx('\r');

/* clear interrupt */

_delay_ms(100);
UART3_String("AT");
UART3_Tx('\r');
_delay_ms(100);
UART3_String("AT+CMGF=1");
UART3_Tx('\r');
_delay_ms(100);
UART3_String("AT+CMGF=1");
UART3_Tx('\r');
_delay_ms(100);
UART3_String("AT+CMGS=");
UART3_Tx('"');
UART3_String(M_NO);
UART3_Tx('"');
UART3_Tx('\r');
_delay_ms(100);
UART3_String("Your Power balance is Low. Please Recharge your Account ");
UART3_Tx('\r');
UART3_Tx(0X1A);
for(i=0;i<6;i++)
{
_delay_ms(1000);
}
}

void TIMER0_IRQHandler (void)

{
if ( LPC_TIM0->IR & (0x1<<0) )
{

LPC_TIM0->IR = 0x1<<0;

/* clear interrupt flag */

timer0_m0_counter++;
}
return;
}

void init_timer ( uint8_t timer_num )

{
if ( timer_num == 0 )
{
timer0_m0_counter = 0;
LPC_SC->PCONP

|= (1<<1);

// Enable power to Timer/ Counter 0

LPC_SC->PCLKSEL0 |= (1<<2);

// Select peripheral clock for Timer/ Counter 0

LPC_TIM0->TCR

// reset timer

LPC_TIM0->PR
LPC_TIM0->MR0

= 0x01;
= 72;

// set prescaler to zero

= 1000000;

// 1/(8000Hz) = 125 uS = 3125-1 counts @

= 1000000;

// 1/(8000Hz) = 125 uS = 3125-1 counts @

40nS/tick
LPC_TIM0->MR1
40nS/tick
LPC_TIM0->MCR

= 3;

// Interupt and Reset on MR0: (1<<0) | (1<<1)

NVIC_EnableIRQ(TIMER0_IRQn);
}
}

int main (void)

{
SystemInit();
LPC_GPIO1->FIODIR = 0xff;
LPC_GPIO0->FIODIR = 0xff;

init_timer( 0 );
InitLCD();
_delay_ms(30);
LCDCmd(0x80);
_delay_ms(30);
LCDWriteString("Welcome");
_delay_ms(30);
UARTInit1(9600);
UARTInit3(9600);
//ADCInit(ADC_CLK);
_delay_ms(1000);
UART3_String("AT+CMGD=1\r");
_delay_ms(1000);
UART3_String("AT+CMGD=2\r");
_delay_ms(1000);
UART3_String("AT+CMGD=3\r");
_delay_ms(1000);
UART3_String("AT+CMGD=4\r");
_delay_ms(1000);
UART3_String("AT+CMGD=5\r");
_delay_ms(1000);
bal=0;

while( 1 )
{
if(bal>0)
{

// Initilize the LCD

if

(timer0_m0_counter

>

0)

BLINK_INTERVAL) )
{
LCDCmd(0xc0);
_delay_ms(10);
LCDWriteInt(sec,4);
_delay_ms(10);
sec++;
timer0_m0_counter=0;
if(sec>=60)
{
sec=0;
bal--;
c++;
LCDWriteStringXY(0,0,"Power:");
_delay_ms(100);
LCDWriteIntXY(9,0,c,4);
_delay_ms(100);
LCDWriteStringXY(14,0,"KW");
_delay_ms(100);
LCDWriteStringXY(4,1,"Bal:");
_delay_ms(100);
LCDWriteIntXY(9,1,bal,4);
_delay_ms(100);
LCDWriteStringXY(14,1,"RS");
_delay_ms(100);
}
}
PowerRelay_en1();

&&

(timer0_m0_counter

<=

if(bal==2)
{
if(count==0)
{
count=1;
Send_SMS(mobno);
}
}
else
{
count=0;
}
if(bal==0)
{
bal=0;
PowerRelay_clr1();
}
}
else
{
PowerRelay_clr1();
}
if(v==1)
{
v=0;
amt=0;
LCDClear();
j=j-1;
k=j;

// Remove the $ char

s1[i]='\0';
for(i=0;i<=j;i++)
{
amt=amt+((s1[i]-48)*(pow(10,k)));
LCDWriteInt(s1[i],2);
k--;
}
InitLCD();
_delay_ms(10);
bal=bal+amt;
LCDClear();
_delay_ms(10);
LCDWriteString("Add ");
_delay_ms(10);
LCDWriteInt(amt,4);
_delay_ms(10);
LCDWriteString(" Rupees Success");
_delay_ms(2000);
LCDClear();
_delay_ms(10);
LCDCmd(0x80);
_delay_ms(100);
LCDWriteStringXY(0,0,"Power:");
_delay_ms(100);
LCDWriteIntXY(9,0,c,4);
_delay_ms(100);
LCDWriteStringXY(14,0,"KW");
_delay_ms(100);

LCDWriteStringXY(0,1,"Balence:");
_delay_ms(100);
LCDWriteIntXY(9,1,bal,4);
_delay_ms(100);
LCDWriteStringXY(14,1,"RS");
_delay_ms(100);
i=0;j=0;k=0;
}
}

CHAPTER 5
RESULT ANLYSIS

CONCLUSION
In Chapter 1, given brief introduction about embedded system and motivation of the
project is discussed.
In Chapter 2, the problem statement is discussed. Dissertation objectives and
organization of the dissertation are illustrated in this chapter. The importance and need for a
new generalized technique for detection of illegal consumers is also discussed.
In Chapter 3 and 4, a detailed analysis on features of smart meters and available
communication technologies are presented. Issues and challenges in the design, development,
deployment, and maintenance of smart meter technologies are explained.

FUTURE SCOPE
Encoding algorithm can be enhanced by introducing more real-world parameters and
variables (both technical and non-technical), such that the process of mapping energy patterns
into irregularities is further strengthened. Integration of these new technical and non-technical
parameters into classification algorithms may come into light after complete implementation
of smart grid. This inclusion will ensure the impact of such parameters on algorithms for
identification of illegal consumers.

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