LIC Lab Manual Anna University

RAJALAKSHMI INSTITUTE OF TECHNOLOGY
CHENNAI 602 124

DEPARTMENT
OF
ELECTRONICS AND COMMUNICATION ENGINEERING
LABORATORY MANUAL
LAB CODE: EC6412
LAB NAME: LINEAR INTEGRATED CIRCUITS LAB
IV SEMESTER - ECE
AFFLIATED TO ANNA UNIVERSITY CHENNAI 600 025
[Regulation 2008]
Prepared by
Mrs.S.Manimegalai,Asst.Professor /ECE
Mrs.A.AdlinArul, Asst.Professor/ECE
Mr.V.S.Vignesh,Asst.Professor/ECE
Lab Assistant
Ms.Jeevitha
EC2258 LINEAR INTEGRATED CIRCUITS
Page
INDEX
S.
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Contents
Anna University Syllabus
Introduction Of Operational Amplifier IC 741

Design and Testing of Inverting, Non inverting and Differential amplifiers
Design and Testing of Integrator and Differentiator
Design and Testing of Instrumentation amplifier
Design and Testing of Active lowpass, Highpass and bandpass filters
Design and Testing of Astable & Monostable multivibrators using op-amp.
Design and Testing of Schmitt Trigger using op-amp.
Design and Testing of Phase shift and Wien bridge oscillators using op-amp.
Design and Testing of Astable and monostable multivibrators using NE555
Timer.
Construction and testing of frequency multiplier using
Construction and Testing of DC power supply using LM317 and LM723
Study of SMPS
Simulation Experiments
15
16
17
D/A and A/D converters (Successive approximation)

Analog multiplier
CMOS Inverter, NAND and NOR
18
19
20
21
Mini Projects
Dark Sensor and Heat Sensor
Earth quake Detector
Viva Questions
Model Question Paper
Page
ANNA UNIVERSITY SYLLABUS

EC6412 LINEAR INTEGRATED CIRCUITS LAB
0032
1. Inverting, Non inverting and Differential amplifiers.

2. Integrator and Differentiator.
3. Instrumentation amplifier
4. Active lowpass, Highpass and bandpass filters.
5. Astable & Monostable multivibrators and Schmitt Trigger using op-amp.
6. Phase shift and Wien bridge oscillators using op-amp.
7. Astable and monostable multivibrators using NE555 Timer.
8. PLL characteristics and its use as Frequency Multiplier.
9. DC power supply using LM317 and LM723.
10. Study of SMPS.
11. SPICE Simulation of Experiments 3, 4, 5, 6 and 7.
12. SPICE Simulation D/A and A/D converters (Successive approximation)
13. SPICE Simulation Analog multiplier
14. SPICE Simulation of CMOS Inverter, NAND and NOR
LIST OF EQUIPMENTS AND COMPONENTS FOR A BATCH OF 30 STUDENTS (3 per
Batch)
S.No
Name of the equipments / Components
1
Variable DC Power Supply
2
Fixed Power Supply
3
CRO
4
Multimeter
5
Multimeter
6
Function Generator
7
Digital LCR Meter
8
PC with SPICE Simulation Software
Consumables (Minimum of 25 Nos. each)
9
BC107, BF195, 2N2222, BC147
10
Resistors 1/4 Watt Assorted
11
Capacitors
12
Inductors
13
Diodes, Zener Diodes
14
Bread Boards
Quantity Required
Remarks
8
4
6
6
2
6
1
6
(0-30V)
+ / - 12V
30MHz
Digital
Analog
1 MHz
-
Page
INTRODUCTION OF OPERATIONAL AMPLIFIER IC 741

INTRODUCTION:
Linear Integrated circuits being used in number of electronics applications such as in fields like
audio and radio communication, medical electronics, Instrumentation control etc..One of the good
examples for Linear Integrated circuits is Operation Amplifier. An operational amplifier (or Op-Amp
in short) is directly coupled high gain amplifier consisting of one or more differential amplifier that can
amplify signals from DC to 1 MHz. A typical Op-Amp is a DC amplifier with a very high voltage gain,
very high input impedance and zero output impedance. It is the basic circuit which is used in wide
range of electronics system. The operational amplifier can be used to amplify ac as well as dc input
signals and was mainly used to perform mathematical operations such as addition, subtraction,
multiplication and division. Hence it is known as operational amplifier or computing amplifier. An OpAmp can be configured in either the inverting or in the non-inverting mode. An ideal Operational
Amplifier is basically a three-terminal device which consists of two high impedance inputs, one called
the Inverting Input, marked with a negative sign, ("-") and the other one called the Non-inverting
Input, marked with a positive plus sign ("+").The third terminal represents the op-amps output port
which can both sink and source either a voltage or a current
OPERATION AMPLIFIER SYMBOL
The symbol for an Operational Amplifier along with its terminal is shown in figure. The OpAmp is indicated basically by a triangle with points in the direction of the signal flow.
INTERNAL BLOCK DIAGRAM
The first stage of an Op-Amp is almost a differential amplifier and the last stage is usually a
class B push pull emitter follower.
Input Stage:
The input stage is a dual input and balanced output diff amp. Thus stage provides most of the
voltage gain of the amp and also establishes the input resistance of the Op-Amp.
Page
The input
stage should have the following characteristics:

High i/p resistance
Low i/p bias ct
Small i/p offset vol.
Small i/p offset ct.
High CMRR
High open-loop voltage .gain
Intermediate Stage:
In most of the amp.an intermediate stage is provided which increases the overall gain of the
Op-amp. The DC level at the output of the intermediate stage is well above the ground potential.
This requires a level translator as the succeeding stage in order to bring the d.c level back to the
ground potential.
Level Shifter Stage:
The level shifter stage is used to shift the dc level at the output of intermediate stage
downward to zero volts with respect to ground.
Output Stage:
The last stage is a complementary symmetry push amplifier. The output stage should have
the following desirable properties:
Large o/p vol. swing capability
Large o/p ct. swing capability
Low o/p resistance Short Circuit protection
An emitter follower at output stage provides a low resistance and class B and AB can provides
large output power.
OPERATIONAL AMPLIFIER( IC-741) PIN DIAGRAM
Pin-Diagram of IC-741 is a 8-pin IC. The pin diagram is shown in Fig. Every IC should be
supplied with positive and negative dc voltages of +12 and 12 volts respectively. So the op-amp
works on dual power supply with the same magnitude.+12V should be supplied to pin-7 and 12V
to pin-4. Pin-2 is the inverting input pin and Pin-3 is the non inverting input . Output can be
measured at the t pin-6. Pins 1 and 5 are used for output offset voltage compensation. These two
pins are not required for normal application.
IC-741 pin details

Equivalent Circuit for Ideal Operational Amplifiers

The circuit below shows an equivalent circuit of op-Amp. Here the AVid is an equivalent.
Thevenin voltage source and R0 are the equivalent of Thevenin equivalent resistance looking back
into the output terminal of an op-amp.
The equivalent circuit is useful in analyzing the basic operating principles of op-amp. The output
voltage is given by
V0 = A vid = A (V1 V2)
Where
A=Large Signal Voltage Gain
Vid=Difference Input Voltage
V1=Voltage at the noninverting Input Terminal
V2= Voltage at the inverting Input Terminal
The equation shows the output voltage V0 is directly proportional to the algebraic
difference between the input voltages. For this reason the polarity of the output voltage
depends on the polarity of the difference in input voltage.
Op-Amp Idealized Characteristics
Sl.No
Parameter
Idealized characteristic
Infinite - The main function of an operational amplifier is to amplify the

input signal and the more open loop gain
Open Loop Gain,
Open- loop gain is the gain of the op-amp without positive or negative
(Avo)
feedback and for an ideal amplifier the gain will
be infinite but typical real values range from about
20,000 to 200,000.
Input impedance,
(Zin)
Infinite - Input impedance is the ratio of input voltage to input current

and is assumed to be infinite to prevent any current flowing from the
source supply into the amplifiers input circuitry (Iin =0). Real op-amps
have input leakage currents from a few pico-amps to a few milli-amps.
Zero - The output impedance of the ideal operational amplifier is

assumed to be zero acting as a perfect internal voltage source with
Output impedance, no internal resistance so that it can supply as much current as
(Zout)
necessary to the load. This internal resistance is effectively in series
with the load thereby reducing the output voltage available to the
load. Real op-amps have output-impedance in the 100-20 range.
Infinite - An ideal operational amplifier has an infinite frequency
response and can amplify any frequency signal from DC to the
highest AC frequencies so it is therefore assumed to have an infinite
bandwidth. With real op-amps, the bandwidth is limited by the GainBandwidth product (GB), which is equal to the frequency where the
Bandwidth, (BW)
amplifiers gain becomes unity.
Zero - The amplifiers output will be zero when the voltage difference
between the inverting and the non-inverting inputs is zero, the same
Offset Voltage, (Vio) or when both inputs are grounded. Real op-amps have some amount
of output offset voltage.
CHARACTERISTICS OF OP-AMP.
Characteristics Symbol
Unit
Input Offset Voltage VIO 2.0 mV
Input Offset Current IIO 100 nA
Input Bias Current
IIB 500 nA
Input Resistance
ri
2 Meg
ro
Output Resistance
75 Ohms
Open Loop Gain
Aol 106 dB
fT
Gain Bandwidth
4 MHz
Slew Rate
SR 0.5 V/us
IC IDENTIFICATION:
There are several types of Op-Amp s produced in the form of integrated circuit (IC) by different
manufactures. These Op-Amps are identified using seven character identification code(ID). The
code has three parts namely prefix, designator, and suffix. This code is shown in bellow
Prefix
Designato Suffi
r
x
MC
741 C
Manufacturer Prefixes
Prefix
AD
CA
LM
MC
NE / SE
OP
RC / RM
SG
TI
UA
Manufacturer
Analog Devices
RCA
National Semiconductor
Motorola
Signetics
Precision Monolithics
Ratheon
Silicon General
Texas Instruments
Fairchild
Suffix codes
Code
D
J
N,P
Code
C
I
M
Pakage type
Plastic Dual-in-line (DIP)
Ceramic DIP
Plastic DIP with longer
lead
Temperature code
Temp. range (C)
0 to 70
Commercial
-25 to 85
Industrial
-55 to 125
Military
Operational Amplifiers Summary

The following is a summary of the Operational Amplifiers and their configurations.
The Operational Amplifier, or Op-amp as it is most commonly called, is an ideal amplifier with
infinite Gain and Bandwidth when used in the Open-loop mode with typical d.c. gains of 100,000,
or 100dB.
The basic Op-amp construction is of a 3-terminal device, 2-inputs and 1-output.
An Operational Amplifier operates from either a dual positive (+V) and an corresponding negative
(-V) supply, or they can operate from a single DC supply voltage.
The two main laws associated with the operational amplifier are that it has an infinite input
impedance, (Z) resulting in "No current flowing into either of its two inputs" and zero input
offset voltage "V1 = V2".
An operational amplifier also has zero output impedance, (Z = 0).
An operational amplifier also has zero output impedance, (Z = 0).
Op-amps sense the difference between the voltage signals applied to their two input terminals and
then multiply it by some pre-determined Gain, (A).
This Gain, (A) is often referred to as the amplifiers "Open-loop Gain".
Op-amps can be connected into two basic configurations, Inverting and Non-inverting.
The Two Basic Operational Amplifier Circuits
The Open-loop gain called the Gain Bandwidth Product, or (GBP) can be very high and is a
measure of how good an amplifier is.
Very high GBP makes an operational amplifier circuit unstable as a micro volt input signal
causes the output voltage to swing into saturation.
By the use of a suitable feedback resistor, (Rf) the overall gain of the amplifier can be accurately
controlled.
For negative feedback, were the fed-back voltage is in "anti-phase" to the input the overall gain
of the amplifier is reduced.
For positive feedback, were the fed-back voltage is in "Phase" with the input the overall gain of
the amplifier is increased.
By connecting the output directly back to the negative input terminal, 100% feedback is achieved
resulting in a Voltage Follower (buffer) circuit with a constant gain of 1 (Unity).
Changing the fixed feedback resistor (Rf) for a Potentiometer, the circuit will have Adjustable
Gain.
The Differential Amplifier produces an output that is proportional to the difference between the
2 input voltages
EX.NO:1. DESIGN AND TESTING OF INVERTING, NON-INVERTING AND

DIFFERENTIAL AMPLIFIERS
AIM:
To design and construct a non-inverting, inverting amplifier, comparator and adder circuit using opamp and obtain their output.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
Equipment and
Components
Resistor
Op-amp
Dual RPS
AFO/Signal Generator
CRO
Bread board
Connecting wires
Range
Quantity
10,100,1k
IC741
(0-30)v
-
2,2,2
1
1
2
1
1
THEORY:
INVERTING AMPLIFIER:
The inverting amplifier is shown in Fig. The input signal drives the inverting input of the op-amp
through resistor R1 . The op-amp has an open-loop gain of A, so that the output signal is much larger than the
error voltage. Because of the phase inversion, the output signal is 180 out-of-phase with the input signal.
This means that the feedback signal opposes the input signal and the feedback is negative or degenerative.
NON-INVERTING AMPLIFIER:
A typical non-inverting amplifier with input resistor R1 and a feedback resistor Rf is shown in the
figure. The input voltage is given to the positive terminal. Non-inverting amplifier using op-amp The output
voltage is given by
V0=(1+Rf/R1)Vid
it can be observed that the closed-loop gain is always greater than one and depends on the ratio of the
feedback resistors.
DIFFERENTIAL AMPLIFIER:
The differential amplifier, also called difference amplifier, can be constructed using a single op-amp or
two op-amps with constant or variable gain in closed-loop configuration. Basic differential amplifier is shown
in Figure. The output voltage is given by
Vo = (R2 / R1) (V1 V2)
EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY
Page 11
INVERTING AMPLIFIER:
DESIGN:
A = -Rf/R1
Take A = 1
Rf = R1
Choose Rf = 10k, R1=10k
CIRCUIT DIAGRAM:
TABULATION:
Vo=-Rf(Vi/R1) (volts)
S.NO
Rf(ohms)
R1(ohms) Vi peak (volts)

Theoretical
Practical
1
2
MODEL GRAPH:
Page 12
NON INVERTING AMPLIFIER:

DESIGN:
A = 1+ Rf/R1
Take A = 2
Rf = R1
Choose Rf = 10k, R1=10k
CIRCUIT DIAGRAM :
TABULATION:
S.NO
Rf(ohms)
R1(ohms) Vi peak (volts)
V0=(1+Rf/R1)Vi (volts)
Theoretical
Practical
1
2
MODEL GRAPH:
Page 13
DIFFERENTIAL AMPLIFIER:
DESIGN:
Gain=100,& Let R1=1K
AD=R2/R1
So R2= AD* R1
R2=100*1K=100 K
CIRCUIT DIAGRAM:
TABULATION:
Vo = (R2 / R1) (V1 V2)
S.NO
Rfohms
R1ohms
V1(v)
V2(v)
Theoretical
Practical
1
2
PROCEDURE:
Inverting and Non-inverting amplifier:
1. Connections are made as per the circuit diagram.
2. Apply the input voltage using AFO or RPS.
3. The output is noted and plots the graph.
4. Then calculate the gain value.
Page 14
Differential Amplifier:
1. Give the connection as per the circuit diagram.
2. For various input voltage measure and record the output voltage.
3. Repeat the same for differential amplifier.
INFERENCE:
Thus the non-inverting, inverting and differential amplifier circuits are designed and constructed using
op-amp and their outputs are obtained.
OBSERVATION:
Inverting Amplifier
Practical Output Voltage Gain=
Theoretical Output Voltage Gain=
Non Inverting Amplifier

Differential Amplifier
Page 15
EX.NO:2. DESIGN AND TESTING OF INTEGRATOR AND DIFFERENTIATOR

AIM:
To construct and test integrator and differentiator circuit .
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO/Signal Generator
CRO
Bread board
Connecting wires
Range
100k,10k
0.001F
IC741
(0-30)v
-
Qua
ntity
1,3
1
1,1
1
1
2
1
1
THEORY:
INTEGRATOR:
A circuit in which the output voltage is the integration of the input voltage is called
an integrator.
In the practical integrator to reduce the error voltage at the output, a resistor RF is
connected across the feedback capacitor CF. Thus, RF limits the low-frequency gain and
hence minimizes the variations in the output voltage.
The frequency response of the integrator is shown in the Figure below
fb is the frequency at which the gain is 0 dB and is given by fb = 1/2R1Cf

Page 16
In the above figure there is some relative operating frequency, and for frequencies from f to fa the gain RF/R1
is constant. However, after fa the gain decreases at a rate of 20 dB/decadeIn other words, between fa and fb
the circuit of above figure acts as an integrator. The gain limiting frequency fa is given by
fa = 1/2RfC
Normally fa<fb. From the above equation, we can calculate Rf by assuming fa & Cf
.
This is very important frequency. It tells where the useful integration range starts.
If fin < fa - circuit acts like a simple inverting amplifier and no integration results,
If fin = fa - integration takes place with only 50% accuracy results,
If fin = 10fa - integration takes place with 99% accuracy results.
The output voltage of the integrator is given by
V0 (t) =1/R1Cfvc (t)dt
Integrator has wide applications in
1. Analog computers used for solving differential equations in simulation arrangements.
2. A/D Converters
3. Signal wave shaping
4. Function Generators.
DIFFERENTIATOR:
As the name suggests, the circuit performs the mathematical operation of differentiation, i.e. the output
voltage is the derivative of the input voltage.
V0=-RfC1dVi/dt
Both the stability and the high-frequency noise problems can be corrected by the addition of two
components: R1 and Cf, as shown in the circuit diagram. This circuit is a practical differentiator.
The input signal will be differentiated properly if the time period T of the input signal is larger than or
equal to RfC1. That is, T>= RfC1
Differentiator can be designed by implementing the following steps.
1. Select fa equal to the highest frequency of the input signal
Then, assuming a value of C1<1 F, calculate the value of Rf
2. Calculate the values of R1and Cf , so that R1C1=RfCf
.
Differentiator has wide applications in
1. Monostable Multivibrator
2. Signal wave shaping
3. Function Generator
INTEGRATOR
DESIGN:
The gain for the practical integrator is, the low frequency gain or the d.c. gain
| A | = Rf /R1
For achieving near ideal integration, let Rf /R1 = 10
And, assume, the input frequency = 10 KHz
For proper integration, we must have f > 10 fa , where fa is the low level or the break frequency of the practical
integrator.
Page 17
fa=1/2RfCf
Then f/fa=10; fa=f/10
Let R1 = 10K
Rf = 10 x R1 = 100K
Then, Cf = 1/2Rf fa = F or nF
Rcomp = R1 || Rf
Rcomp = .K
Consider a square wave signal of frequency f = 1KHz, The change in output voltage is
Vo = VinT/2R1Cf
CIRCUIT DIAGRAM:
TABULATION:
Page 18
Amplitude(V)
Time period(ms)
Input
Output
MODEL GRAPH:
DIFFERENTIATOR:
DESIGN:
fa = fmax = 100Hz; let C = 0.1F
fa = fmax = 1/2 RfC1
Rf = K
Now fb = 10fa ;
fb = 1KHz and fb = 1/2 R1 C1
R1 = K ; Since RfCf = R1 C1
Cf = R1 C1/Rf = F
(a) Vmax = 1V and f = 100Hz
Vo = -RfC1dVi/dt
= -RfC12dsin2ft/dt
= ..V cos[2ft] Volts
CIRCUIT DIAGRAM:
Page 19
TABULATION:
Amplitude(V)
Time period(ms)
Input
Output
MODEL GRAPH:
Page 20
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Apply the input voltage using AFO or RPS.
3. The output is noted and the graph is plotted.
INFERENCE:
Thus the integrator and differentiator circuits are designed and constructed using op-amp and their
outputs are obtained.
OBSERVATION:
Theoretical Frequency=
Practical Frequency=
EX.NO:3: DESIGN AND TESTING OF INSTRUMENTATION AMPLIFIER

AIM:
To design and test the operation of Instrumentation Amplifier for various gain values.
Page 21
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
Equipment and
Components
Resistor
Op-amp
Dual RPS
Millimeter
Bread board
Connecting wires
Range
Quantity
10K
IC741
(0-30)v
-
8
3
1
1
1
few
THEORY:
Instrumentation amplifier is an amplifier that realizes high input impedance

and very low offset and drift voltage values. This configuration is better than inverting
or Non-inverting amplifier because it has minimum non-linearity, stable voltage gain
and high CMRR ( > 100 dB.). This type of amplifier is used in thermocouples, strain
gauges And biomedical probes.
DESIGN:
The Output Voltage is given as
Let R1= R2 = R3 = R gain = 10 K then

Vout = (1+2) (V2-V1)
Vout = 3 (V2-V1)
CIRCUIT DIAGRAM:
Page 22
TABULATION:
INPUTS
SL.NO.
V1 (V)
OUTPUT
V2 (V)
Theoretically(V)
1.
2.
Practically (V)
3.
4.
PROCEDURE:
(i) Connect the instrumentation amplifier circuit.
Page 23
(ii) For various input voltage V1 and V2 measure and record the output voltage
and
tabulate.
INFERENCE:
Thus the instrumentation amplifier is designed and constructed using op-amp and their outputs are
obtained.
OBSERVATION:
Page 24
EX.NO:4. DESIGN AND TESTING OF ACTIVE LOWPASS, HIGHPASS AND

BANDPASS FILTERS
4)a. DESIGN AND TESTING OF SECOND ORDER ACTIVE LOWPASS FILTER
AIM:
To obtain the frequency response of an active low pass filter for the desired cut off frequency.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
1.5k,10k,5.86K
0.1F
IC741
(0-30)v
-
2,2,1
2
1
2
1
1
1
few
THEORY:
A low-pass filter is an electronic filter that passes low frequency signals but attenuates (reduces
the amplitude of) signals with frequencies higher than the cutoff frequency. The actual amount of attenuation
for each frequency varies from filter to filter. A low-pass filter is the opposite of a high-pass filter. A bandpass filter is a combination of a low-pass and a high-pass. Low-pass filters exist in many different forms,
including electronic circuits (such as a hiss filter used in audio), anti-aliasing filters for conditioning signals
prior to analog-to-digital conversion, digital filters for smoothing sets of data, acoustic barriers, blurring of
images, and so on. Low-pass filters provide a smoother form of a signal, removing the short-term fluctuations,
and leaving the longer-term trend.
DESIGN:
For a 2nd order Filter,
F H = 1 / 2 RC Hz
Let FH =1 KHz and R = 1.5 K

1 * 103 = 1 / 2*1.5* 103*C
C = 0.1F
The pass band gain of the filter, AF = (1+R f / R1)
For a second order filter, AF = 1.586, Let R1 = 10K
1.586= (1+R f / R1)
Let R1 = 10K
1.586= (1+R f /10K )
Page 25
RF = 5.86k
CIRCUIT DIAGRAM:
TABULATION:
Input Voltage Vi=
S.No
(Volts)
Frequency Hz
Output Voltage Vo(volts)
Gain=20log(Vo/Vi)
MODEL GRAPH:
Page 26
PROCEDURE:
1. Connect the Low pass filter circuit as shown in the diagram.
2. Give an input signal Vi of 1-V (p-p) and measure the output voltage for
different frequency.
3. Plot the frequency response 20 log(Vo/Vi ) versus input frequency and find
3db frequency.
4. Determine the cut-off frequency.
INFERENCE:
Thus, the frequency response of a second order low pass filter are plotted.
OBSERVATION:
Cutoff frequency of LPF
i. Theoretical =
ii. Practical =
4)b. DESIGN AND TESTING OF SECOND ORDER ACTIVE HIGH PASS FILTER
Page 27
AIM:
To obtain the frequency response of an active high pass filter for the desired cut off frequency.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
10,1.5,5.86
k
2200pF
IC741
(0-30)v
-
1,2,1
2
1
2
1
1
1
few
THEORY:
HPF is the complement of the Low pass filter and can be obtained simply by
interchanging R and C in the low pass configuration. The frequency response of a
second-order high-pass filter is opposite to that of a second-order low-pass filter. A
high-pass filter attenuates the output voltage for all frequencies below the cutoff
frequency. Above the cutoff frequency, the magnitude of the output voltage is constant.
DESIGN:
For a 2nd order Filter,
F H = 1/2RC Hz
Let FH = 1 KHz and R = 1.5K

1 * 103 = 1 / 2*1.5* 103*C
C = 0.1F
For a second order filter, AF = 1.586,
1.586= (1+R f / R1)
Let R1 = 10K
1.586= (1+R f /10K )
RF = 5.86k
CIRCUIT DIAGRAM:
Page 28
TABULATION:
Input Voltage Vi=
S.No
(Volts)
Frequency Hz
Gain=20log(Vo/Vi)
MODEL GRAPH:
Page 29
PROCEDURE:
1. Connect the high pass filter circuit as shown in the diagram.
2. Give an input signal Vi of 1-V (p-p) and measure the output voltage for
3. Plot the frequency response 20 log(Vo/Vi ) versus input frequency and find
3db frequency.
4. Determine the cut-off frequency.
INFERENCE:
Thus, the frequency response of a second order high pass filter is plotted.
OBSERVATION:
Cutoff frequency of HPF
i. Theoretical =
ii. Practical =
4)c. DESIGN AND TESTING OF SECOND ORDER ACTIVE BAND PASS FILTER
Page 30
AIM:
To obtain the frequency response of an active band pass filter for the desired cut off frequency.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
10,33,5.8k
2200pF,470pF
IC741
(0-30)v
-
2,4,2
2,2
2
2
1
1
1
few
THEORY:
A wide band pass filter can be formed by cascading a HPF and LPF section. If the
HPF and LPF are of the first order, then the band pass filter(BPF) will have a roll off rate
of -20 dB/decade. A wide band pass filter formed by cascading I order HPF and I order
LPF is shown in the circuit diagram.
DESIGN:
For a 1st order Filter, F= 1/2RC Hz
(i) For High pass section
Let FL = 400Hz and R = 7.95 K
400 = 1 / 2*7.95* 103*C
C = 0.05F
(ii) For low pass section
Let FH = 2 KHz And R = 7.95 k
2 * 103 = 1 / 2*7.95* 103*C
C = 0.01F
For a first order filter, AF =2, Let R1 = 10K
RF = 10 k
The Center frequency FC = FH*FL
CIRCUIT DIAGRAM:
Page 31
TABULATION:
Input Voltage Vi=
S.No
1
(Volts)
Frequency Hz
Gain=20log(Vo/Vi)
2
3
4
MODEL GRAPH:
Page 32
PROCEDURE:
1. Connect the Band pass filter circuit as shown in the diagram.
2. Give an input signal Vi of 1 V (p-p) and measure the output voltage for
3. Plot the frequency response 20 logVo/Vi versus input frequency and find 3db
frequency.
4. Determine the cut-off frequency fh and fl .
INFERENCE:
Thus the frequency response of a first order band pass filter is plotted.
OBSERVATION:
Lower cutoff frequency
i. Theoretical =
ii. Practical =
Upper cutoff frequency
i. Theoretical =
ii. Practical =
EX.NO:5. DESIGN AND TESTING OF ASTABLE & MONOSTABLE

MULTIVIBRATORS
5)a. . DESIGN AND TESTING OF ASTABLE MULTIVIBRATOR USING
AMP 741
AIM:
OP-
To design a square wave generator using IC 741 for a frequency of fo = 1kHz and
Page 33
to study the performance.

REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
10,11.6k
0.05F
IC741
(0-30)v
-
2,1
1
2
1
1
1
1
few
THEORY:
An astable multivibrator is a square-wave generator. The resistors R1 and R2 form a voltage divider
network, and a fraction =R2/(R1+R2) of the output is fed back to the input. The output can take values of +
Vsat or Vsat . The voltage Vsat acts as Vref at the (+) input terminal. The output is connected also to
the (-) input terminal through an integrating low-pass RC network. When the voltage vc across capacitor C
just exceeds Vref , switching takes place resulting in a square-wave output.
The time period T of the out wave form is
T = 2 RC ln ( (1+)/(1-))
=R2/(R1+R2)
Assume R1 = 1.16 R2. Then, T = 2RC
and Frequency = 1/(2RC)
DESIGN:
Assume f0 = 1 KHz
R1 = 1.16 R2
Let R2 = 10 k and R1 = 11.6k
Assuming C= .05 F, R = 1/( 10 X10-8X1000) = 10 k
CIRCUIT DIAGRAM:
Page 34
TABULATION:
Vsat
-Vsat
Vsat
-Vsat
T(sec)
Frequency(Hz)
Theoretical
Practical
MODEL GRAPH:
PROCEDURE:
i. Connect the circuit shown in figure using component values as obtained in
Page 35
design.
ii. Observe and sketch the capacitor voltage wave form and output wave form.
iii. Determine the frequency.
INFERENCE:
Thus, the square wave generator is designed, constructed and tested.
OBSERVATION:
The pulse width values
i. Theoretical =
ii. Practical =
Page 36
5)b. DESIGN AND TESTING OF MONOSTABLE MULTIVIBRATOR USING
OP-
AMP 741
AIM:
To design, construct and test a monostable multivibrator.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
10,1k
0.1F
IC741
(0-30)v
-
1,2
1
2
1
1
1
1
few
THEORY:
Monostable multivibrator has a stable state and a quasi-stable state. Single
output pulse of adjustable time duration in response to a triggering signal can be
generated using the monostable multivibrator. The time duration for the output pulse is
achieved by connecting required external components to the op-amp. The circuit can
be used as a time-delay circuit. The rectangular waveform output can be used as a
gating signal in counters and analog-to-digital converters.
DESIGN:
The pulse duration T is defined by the relation
T = RC ln ((1+VD / Vsat)/ (1-))
T=RCln((1+VD/Vsat)/(1-))
Where, = R2/(R1+R2)
When Vsat >> V (0.7V) D and R1 = R2 with =0.5 , T = 0.693RC.
Design specifications :
Generate the pulse for T= 600s
Assume C= 0.1 F;
R=.
Page 37
CIRCUIT DIAGRAM:
TABULATION:
Vsat
-Vsat
-Vsat
VD
Pulse
width
Frequency
Theoretical
Practical
MODEL GRAPH:
Page 38
PROCEDURE:
1. The connection is made as per the circuit diagram.
2. Apply a negative going pulse as the input signal.
3. Observe the output voltage across the capacitor Vc and the output waveform
Vo
and trace the same.
Trigger signal input:
p-p amplitude = frequency=
INFERENCE:
The monostable multivibrator was designed, constructed and verified against the
theoretical value of pulse width.
OBSERVATION:
i. Theoretical =
ii. Practical =
Page 39
EX.NO: 6. DESIGN AND TESTING OF SCHMITT TRIGGER

AIM:
To design a Schmitt trigger circuit and prove its application for generating a
square wave output.
REQUIREMENTS:
S.No
Equipment and
Components
1.
Resistor
2.
Op-amp
3.
Dual RPS
4.
AFO
5.
CRO
6.
Bread board
7.
Connecting wires
Range
Quantity
27,1k
IC741
(0-30)v
-
1,2
2
1
1
1
1
few
THEORY:
Schmitt trigger circuit is an inverting comparator with positive feedback. The input voltage is applied
to the (-) terminal and feedback voltage to the (+) terminal. The input voltage Vi the output every time it
exceeds certain voltage levels called upper threshold and lower threshold voltage. This circuit converts an
irregular shaped waveform to a square wave or pulse.
DESIGN:
VUT = + 0.5V; VLT = - 0.5V
VUT = Vsat [R2/(R1+R2)]
VLT = - Vsat [R2/(R1+R2)]
Design specifications:
For 741, with supply voltages 15V, the saturation voltage V sat = 14V
0.5 = 14 [R2/(R1+R2)]
R1=27 R2
Let R2 = 1 k
R1 = 27k
Page 40
CIRCUIT DIAGRAM:
TABULATION:
Amplitude(V)
Input
Output
Time(ms)
VUT
VLT
Vsat
-Vsat
MODEL GRAPH:
Page 41
PROCEDURE:
1. Connect the circuit as shown in figure.
2. Adjust the signal generator so that Vi =2V p-p sine wave at 1kHz
3. Observe and plot the input and output waveforms.
INFERENCE:
Thus Schmitt trigger circuit is designed, constructed and tested.
OBSERVATION:
Page 42
EX.NO:7. DESIGN AND TESTING OF PHASE SHIFT AND WIEN BRIDGE

OSCILLATORS USING OP-AMP
7)a. DESIGN AND TESTING OF PHASE SHIFT OSCILLATOR USING OP-AMP
AIM:
To design, construct and test a RC Phase Shift Oscillator Using Op-Amp.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
10,1k
0.1F
IC741
(0-30)v
-
1,2
1
2
1
1
1
1
few
THEORY:
Oscillator is a feedback circuit where a fraction of output voltage of an amplifier is a fed back to the input in
the same phase. RC phase shift oscillators are sine wave oscillator which is used in audio frequency range.
The amplification is done by the op-amp and as it is used in the inverting mode is gives a phase shift of 180
degree. The feedback RC network produces an additional phase shift of 180 degree. Each RC network gives
60degree phase shift.
The frequency of oscillation is given by
fo=1/ 6(2RC)
DESIGN:
The frequency of oscillation is given by
fo=1/ 6(2RC)
Assume fo=100Hz
Assume C=0.1F
R=1.57k
Theoretical Gain of RC phase shift Oscillator is given as Rf/R1=29
To prevent overloading of the amplifier by the RC network R110R
Let R1=10R
Rf=29R1=..k
Page 43
CIRCUIT DIAGRAM:
TABULATION:
Time/Divisi
on
(s)
No. of
Division
s
Time
Frequenc
Period y
T (s)
f=1/T
Amplitud
e/
Division
(V)
No. of
Amplitud
Divisions e
(V)
Input
Output
Page 44
MODEL GRAPH:
PROCEDURE:
1.The connection is made as per the circuit diagram.
2.Observe the output waveform Vo and trace it.
INFERENCE:
The RC phase shift oscillator is designed and tested
OBSERVATION:
Page 45
Frequency of oscillation fo
i. Theoretical =
ii. Practical =
7)b. DESIGN AND TESTING OF WIEN BRIDGE OSCILLATOR USING OP-AMP 741
AIM:
To design the Wien Bridge oscillator using OP-AMP IC for producing a frequency of
fo = 1000Hz.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
3.1,30,60k
0.05F
IC741
(0-30)v
-
2,1,1
1
2
1
1
1
1
few
THEORY:
The Wien bridge oscillator is the most commonly used audio frequency oscillator because of its
simplicity and stability. Figure shows the Wien bridge oscillator in which Wien bridge circuit is connected
between the amplifier input terminals and the output terminal. The bridge has a series RC network in one arm
and a parallel RC network in the adjoining arm. In the remaining two arms of the bridge, resistors R1 and Rf
are connected. The phase angle criterion for oscillation is that the total phase shift around the circuit must be
0o. This condition occurs only when the bridge is balanced. The frequency of oscillation fo is exactly the
resonant frequency of the balanced Wien bridge and is given by, fo = 1/(2 R C ).
DESIGN:
fo=1kHz
fo = 1/(2 R C ) and Rf = 2R1
Choose C=0.05 F
So R= 1/ (2 10000.05 F) =3.1K
Take R1=10R=30 K and
Rf=2R1= 60 K
Page 46
CIRCUIT DIAGRAM:
TABULATION:
Sweep X-Axis
Time/Div.
(s)
No. of
Divisions
Time
Period
T (s)
Magnitude Y-Axis
Frequency
f=1/T
Amplitude/Division
(V)
No. of
Divisions
Amplitude
(V)
MODEL GRAPH:
Page 47
PROCEDURE:
1. Construct the circuit with the values obtained in the design.
2. Observe the output wave form on an Oscilloscope. Adjust Rf to obtain a sine
wave output.
3. Measure the frequency of oscillator and voltage amplitude.
INFERENCE:
Page 48
Thus the Wein bridge oscillator is designed to produce the required frequency and tested.
OBSERVATION:
Frequency of oscillation fo
i. Theoretical =
ii. Practical =
EX.NO:8. DESIGN AND TESTING OF ASTABLE AND MONOSTABLE

MULTIVIBRATORS USING NE555 TIMER
8)a. DESIGN AND TESTING OF ASTABLE MULTIVIBRATOR USING 555IC
AIM:
To design and test an astable multivibrator for generating symmetrical and unsymmetrical square wave
form for the given frequency and duty cycle.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
1,3.6k
0.01,0.1F
IC555
(0-30)v
-
2,1
1,1
1
1
1
1
1
few
THEORY:
The 555 integrated circuit timer was first introduced by Signetics Corporation as Type SE555/NE555.
It is available in 8-pin circular style TO-99 Can, 8-pin mini-DIP and 14-pin DIP. The 555 timer can be
operated with a dc supply voltage ranging from +5V to +18V. This feature makes the IC compatible to
TTL/CMOS logic circuits and op-amp based circuits.
Resistors RA and RB form the timing resistors. The discharge (pin 7) terminal is connected to the
junction of RA and RB. Threshold (pin 6) and trigger (pin 2) terminals are connected to the terminal, and
control (pin 5) terminal is by-passed to ground through a 0.01 F capacitor. In astable mode of operation, the
timing capacitor charges up towards Vcc (assuming Vo is high initially) through (Ra + Rb) until the voltage
across the capacitor reaches the threshold level (2/3) Vcc . At this point the internal upper comparator
switches state causing the internal flipflop output to go high. This turns on the discharge transistor and the
timing capacitor C then discharges through RB and the discharging transistor . The discharging continues until
the capacitor voltage drops to (1/3) Vcc, at which point the internal lower comparator switches states causing
Page 49
the internal flipflop output to go low, turning off the discharge transistor. At this point the capacitor starts to
charge again, thus completing the cycle.
DESIGN:
The Charging Time period is
Tc= 0.69(Ra+Rb)*C
The Discharging Time period is
Td= 0.69Rb* C
Total Time period,T = Tc+Td
T = 0.69(Ra+2Rb)*C
Frequency,f = 1/T = 1.45/(Ra+2Rb)*C
% Duty cycle D = Td/T*100
D = Ra/(Ra+2Rb)*C
Let Tc = Td = 0.05 msec
Choose C = 10nf
0.05*10-3 = 0.69(Ra+Rb)*10n
Therefore Ra+Rb = 7.215k
Choose
Ra=470
470 +Rb = 7.215k
then Rb=6.8K
CIRCUIT DIAGRAM:
TABULATION:
Sl.No. Description
R in ohms
C in F
Theoretical
Practical
Page 50
Frequency (HZ) Frequency(HZ)

1
Astable
OUTPUT WAVEFORM:
PROCEDURE:
1. Connect the circuit as given using component values as obtained in design
part (a)
2. Observe and sketch the capacitor voltage waveform and output waveform.
3. Measure the frequency and duty cycle of the output waveform.
4. Connect the circuit using component values as obtained from design
part (b).
5. Repeat step 2 and 3.
INFERENCE:
Page 51
Thus astable multivibrator is designed, constructed and tested.

OBSERVATION:
i. Theoretical =
ii. Practical =
8)b. DESIGN AND TESTING OF MONOSTABLE MULTIVIBRATOR USING
555IC
AIM:
To design and test an monostable multivibrator for generating symmetrical and unsymmetrical square
wave form for the given frequency and duty cycle.
REQUIREMENTS::
S.No
1.
2.
3.
4.
5.
6.
7.
8.
Equipment and
Components
Resistor
Capacitor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
1,3.6k
0.01F
IC555
(0-30)v
-
2,1
2
1
1
1
1
1
few
THEORY:
Mono-stable multivibrator has only one stable state and one quasi-stable state.Transition is obtained
from the stable to quasi-stable by triggering. The transition timedue to external triggering is very short,
whereas the time for the circuit to remain quasistablestate is very large. The circuit returns to stable state from
its quasi-stable state byitself, without requiring any external triggering signal. Because, after triggering, the
circuit returns from quasi-stable state by itself after a certain time delay, therefore the circuit is also called a
one shot multivibrator or univibrator.
The mono-stable multivibrator also called a one shot multivibrator, is a regenerative device, which is
used to generate rectangular output, pulse of predeterminedwidth. The device can make a fast transition in
time T after the application of inputtrigger and as such can be used as a delay circuit.
Pulse width Tp = 1.1 R
DESIGN:
Pulse width , Tp = 1.1 RC
Page 52
For Tp = 0.1ms
Choose C= 0.01F
To Find R
R =Tp/1.1C=10K
CIRCUIT DIAGRAM:
TABULATION:
R()
C (F)
Pulse width(T)
Theoretical
Pulse width(T)
Practical
PROCEDURE:
1. Connect the circuit as shown in diagram.
2. Apply negative trigger pin 2 .
3. Observe and sketch the out put waveform at pin 3.
4. Observe the out put pulse width for different values of C and tabulate.
Page 53
INFERENCE:
Thus monostable multi vibrator is designed, constructed and tested.
OBSERVATION:
i. Theoretical =
ii. Practical =
EX.NO:9. CONSTRUCTION AND TESTING OF FREQUENCY MULTIPLIER

USING PLL IC
AIM:
To study the operation of NE 565 PLL as a frequency multiplier.
EQUIPMENTS REQUIRED:
S.No
1.
2.
3.
4.
5.
6.
7.
8.
9.
Equipment and
Components
Resistor
Capacitor
PLL
Dual RPS
AFO
CRO
Bread board
Connecting wire
Transistor
Range
Quantity
20,2,10.4.7k
0.01,0.001F
IC NE565, IC7490
(0-30)v
2N3391
1,1,1
1,1
1
1
1
1
1
Few
1
THEORY:
The block diagram of a frequency multiplier using the 565 PLL is shown below. The
frequency counter is inserted between the VCO and the phase comparator. Since the output of the divider is
locked to the input frequency fIN, the VCO is actually running at a multiple of the input frequency.
The desired amount of multiplication can be obtained by selecting a proper divide by N network,
where N is an integer. For example, to obtain the output frequency fOUT =5 fIN, a divide by N = 5 network is
needed. The 4 bit binary counter (7490) is configured as a divide by 5 circuit. The transistor Q is used as a
driver stage to increase the driving capability of the NE 565. C3 is used to eliminate possible oscillation. C2
should be large enough to stabilize the VCO
Frequency.
Page 54
CIRCUIT DIAGRAM:
TABULATION:
tlow(ms)
Theoretical
Practical
thigh(ms)
Theoretical
Practical
Frequency(Hz)
Theoretical
Practical
PROCEDURE:
1. Connect the circuit as shown in figure.
2. Adjust the signal generator so that Vi =1V p-p square wave at 500Hz
3. The free running frequency fOUT of VCO is varied by adjusting R1 and C1
Page 55
and the output frequency is determined and it should be 5 times the input
frequency.
4. Determine the output frequency for different input frequency of 1KHz and
1.5 KHz.
INFERENCE:
The frequency multiplier using PLL principle is studied and the output waveform
is observed.
EX.NO:10. CONSTRUCTION AND TESTING OF DC POWER SUPPLY USING

LM317 AND LM723
10)a. CONSTRUCTION AND TESTING OF DC POWER SUPPLY USING LM723
AIM:
To design, construct and test the low voltage and high voltage regulators using IC 723.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
Components and
equioments
Resistor
Capacitor
Voltage regulator
AFO
CRO
Bread board
Connecting wire
Range
Quantity
10,3,4.3,3.3k
0.1F,100pF
IC 723
(0-30)v
-
1,1,1,1
1,1
1
1
1
1
Few
THEORY:
The three terminal voltage regulators such as 7805, 7915 are capable of producing only fixed positive
or negative output voltages. They also dont have short circuit protection. The IC 723 general purpose voltage
regulatorsovercome the limitation of the above fixed voltage regulators.The IC 723 is inherently a low current
device but it can be boosted to more than 5A using current boost circuits connected externally.
The major limitation is that it does not have in-built thermal protection.By using different
arrangements of the external resistors we can get the low voltage or high voltage regulation. The low voltage
regulator is used for regulating voltages ranging from 2V to 7V. The diagram of low voltage regulator is
given. Due to the potential divider R1,R2 the input at NI terminal is VNI = Vref(R2/R1+R2). The difference
between VNI and VO is fed to INV terminal and amplified by the error amplifier whose output drives the pass
transistor in emitter follower mode. Hence, VO = Vref(R2/R1+R2), where Vref is typically 7.15V. So the
output voltage will always be lesser than 7.15V and hence the name low voltage regulator.In case of high
Page 56
voltage regulators the output voltage ranges between 7V to 37V. The circuit is given in the figure. The NI
terminal is directly connected to the Vref through R3 where R3 =R1||R2. The INV is connected to thejunction
of the potential divider which is connected with output VO.
Therefore VO = Vref(1+ R1/R2) =7.15(1+ R1/R2). Hence the output voltagegot will always be
greater than 7.15V.
LOW VOLTAGE REGULATOR:DESIGN:

Vref =7.15V, Cref= 0.1uF,C1=100pF
Let VO=5V, and R2=10K
Then R1=4.3K
Now R3=10K||4.3K
=3K
And let Rsc=3.33 ohms
CIRCUIT DIAGRAM:
HIGH VOLTAGE REGULATOR:\

DESIGN:
Let C1=100pF and Vref=7.15V
Page 57
If the output VO=12V and R2=10K

Then R1=6.78K
Now R3=10K||6.78K
=4.04K ohms
Rcl=3 ohms
CIRCUIT DIAGRAM:
PROCEDURE:
i. Connect the circuits as given in the circuit diagrams.
ii. Connect the supply pin to the RPS.
iii. Note the values of VO for different input values beyond 9.5V
iv. Repeat the same for both low voltage and high voltage
regulators.
v. Draw the regulation curve.
Page 58
INFERENCE:
Thus the low and high voltage regulator using IC 723 is designed,constructed and tested.
10)b. CONSTRUCTION AND TESTING OF DC POWER SUPPLY USING LM317

AIM:
To design, construct and test voltage regulator using IC 317.
REQUIREMENTS:
S.No
1.
2.
3.
4.
5.
6.
7.
Equipment and
Components
Resistor
Capacitor
Voltage regulator
AFO
CRO
Bread board
Connecting wire
Range
Quantity
10,3,4.3,3.3k
0.1F,100pF
IC 723
(0-30)v
-
1,1,1,1
1,1
1
1
1
1
Few
THEORY:
One of the most popular variable voltage regulators is the IC 317 regulator. The LM 317 is an
adjustable three terminal positive voltage regulator.They are capable of supplying output current of 0.1A to
1.5A, over a range of 1.2V to 37V. The LM 317 needs two resistors R1, R2 for setting the output voltage.
Usually the input capacitor is of disc type and the output is of electrolytic type to improve the transient
response. The unregulated input is applied at Vi , which is normally 2V more than the required output voltage.
When the circuit is connected as shown the value of Vref =1.25V, between the output and the adjustable
terminals. This voltage is dropped across R1, driving a current I1= Vref/R1. So the net current flowing
through R2 is I1+IADJ. But as IADJ is very small, VO=Vref(1+R2/R1) where the reference voltage is 1.25V
DESIGN:
Let capacitors C1=0.1uF and C2=1uF.
If resistor R1=240 ohms and if R2 =1000 ohms;
Then regulated output=1.25*(1+R2/R1)
=6.46 volts
If a variable resistor is used in the place of R2, we can get can adjustable output
voltage.
Page 59
CIRCUIT DIAGRAM:
PROCEDURE:
i. Give the circuit connections as per the circuit diagram.
ii. By varying the input voltage observe the output voltage.
iii. Now change the resistor values to get a different VO.
iv. Once again by varying the supply observe the output.
v. Draw the regulation curve.
Inference:
Page 60
Thus the voltage regulator using LM 317 is designed, constructed and tested
EX.NO:11.STUDY OF SMPS
AIM:
To study about the operation, advantages and disadvantages of SMPS
THEORY:
A switched-mode power supply (switching-mode power supply, SMPS, or simply switcher) is an
electronic power supply that incorporates a switching regulator in order to be highly efficient in the
conversion of electrical power. Like other types of power supplies, an SMPS transfers power from a source
like
the
electrical power
grid to
a
load
(e.g.,
a
personal
computer)
while
converting voltage and current characteristics. An SMPS is usually employed to efficiently provide a
regulated output voltage, typically at a level different from the input voltage. Unlike a linear power supply, the
pass transistor of a switching mode supply switches very quickly (typically between 50 kHz and 1 MHz)
between full-on and full-off states, which minimizes wasted energy. Voltage regulation is provided by varying
the ratio of on to off time. In contrast, a linear power supply must dissipate the excess voltage to regulate the
output. This higher efficiency is the chief advantage of a switched-mode power supply.
Switching regulators are used as replacements for the linear regulators when higher efficiency, smaller
size or lighter weight are required. They are, however, more complicated, their switching currents can cause
electrical noise problems if not carefully suppressed, and simple designs may have a poor power factor.
ADVANTAGES AND DISADVANTAGES:
The main advantage of this method is greater efficiency because the switching transistor dissipates
little power when it is outside of its active region (i.e., when the transistor acts like a switch and either has a
negligible voltage drop across it or a negligible current through it). Other advantages include smaller size and
lighter weight (from the elimination of low frequency transformers which have a high weight) and lower heat
generation due to higher efficiency. Disadvantages include greater complexity, the generation of highamplitude, high-frequency energy that the low-pass filter must block to avoid electromagnetic
interference (EMI), a ripple voltage at the switching frequency and the harmonic frequencies thereof.
Page 61
Very low cost SMPSs may couple electrical switching noise back onto the mains power line, causing
interference with A/V equipment connected to the same phase. Non-power-factor-correctedSMPSs also cause
harmonic distortion.
OPERATION:
FIGURE: Block diagram of a mains operated AC/DC SMPS with output voltage regulation
Input rectifier stage:
If the SMPS has an AC input, then the first stage is to convert the input to DC. This is
called rectification. The rectifier circuit can be configured as a voltage doubler by the addition of a switch
operated either manually or automatically. This is a feature of larger supplies to permit operation from
nominally 120 V or 240 V supplies. The rectifier produces an unregulated DC voltage which is then sent to a
large filter capacitor. The current drawn from the mains supply by this rectifier circuit occurs in short pulses
around the AC voltage peaks. These pulses have significant high frequency energy which reduces the power
factor. Special control techniques can be employed by the following SMPS to force the average input current
to follow the sinusoidal shape of the AC input voltage thus the designer should try correcting the power factor.
An SMPS with a DC input does not require this stage. An SMPS designed for AC input can often be run from
a DC supply (for 230 V AC this would be 330 V DC), as the DC passes through the rectifier stage unchanged.
It's however advisable to consult the manual before trying this, though most supplies are quite capable of such
operation even though nothing is mentioned in the documentation. However, this type of use may be harmful
Page 62
to the rectifier stage as it will only use half of diodes in the rectifier for the full load. This may result in
overheating of these components, and cause them to fail prematurely.[15]
If an input range switch is used, the rectifier stage is usually configured to operate as a voltage doubler when
operating on the low voltage (~120 V AC) range and as a straight rectifier when operating on the high voltage
(~240 V AC) range. If an input range switch is not used, then a full-wave rectifier is usually used and the
downstream inverter stage is simply designed to be flexible enough to accept the wide range of DC voltages
that will be produced by the rectifier stage. In higher-power SMPSs, some form of automatic range switching
may be used.
Inverter stage:
This section refers to the block marked chopper in the block diagram.
The inverter stage converts DC, whether directly from the input or from the rectifier stage described
above, to AC by running it through a power oscillator, whose output transformer is very small with few
windings at a frequency of tens or hundreds of kilohertz. The frequency is usually chosen to be above
20 kHz, to make it inaudible to humans. The output voltage is optically coupled to the input and thus very
tightly controlled. The switching is implemented as a multistage (to achieve high
gain) MOSFET amplifier. MOSFETs are a type of transistor with a low on-resistance and a high currenthandling capacity.
Voltage converter and output rectifier
If the output is required to be isolated from the input, as is usually the case in mains power
supplies, the inverted AC is used to drive the primary winding of a high-frequency transformer. This
converts the voltage up or down to the required output level on its secondary winding. The output
transformer in the block diagram serves this purpose.
If a DC output is required, the AC output from the transformer is rectified. For output voltages
above ten volts or so, ordinary silicon diodes are commonly used. For lower voltages, Schottky diodes are
commonly used as the rectifier elements; they have the advantages of faster recovery times than silicon
diodes (allowing low-loss operation at higher frequencies) and a lower voltage drop when conducting. For
even lower output voltages, MOSFETs may be used as synchronous rectifiers; compared to Schottky
diodes, these have even lower conducting state voltage drops.
T
he rectified output is then smoothed by a filter consisting of inductors and capacitors. For higher
switching frequencies, components with lower capacitance and inductance are needed.
Simpler, non-isolated power supplies contain an inductor instead of a transformer. This type
includes boost converters, buck converters, and the buck-boost converters. These belong to the simplest
class of single input, single output converters which use one inductor and one active switch. The buck
converter reduces the input voltage in direct proportion to the ratio of conductive time to the total
Page 63
switching period, called the duty cycle. For example an ideal buck converter with a 10 V input operating
at a 50% duty cycle will produce an average output voltage of 5 V. A feedback control loop is employed to
regulate the output voltage by varying the duty cycle to compensate for variations in input voltage. The
output voltage of a boost converter is always greater than the input voltage and the buck-boost output
voltage is inverted but can be greater than, equal to, or less than the magnitude of its input voltage. There
are many variations and extensions to this class of converters but these three form the basis of almost all
isolated and non-isolated DC to DC converters. By adding a second inductor
the uk and SEPIC converters can be implemented, or, by adding additional active switches, various
bridge converters can be realised.
Other types of SMPSs use a capacitor-diode voltage multiplier instead of inductors and transformers.
These are mostly used for generating high voltages at low currents (Cockcroft-Walton generator). The low
voltage variant is called charge pump.
Regulation
\
A feedback circuit monitors the output voltage and compares it with a reference voltage, which
shown in the block diagram serves this purpose. Depending on design/safety requirements, the controller
may contain an isolation mechanism (such as opto-couplers) to isolate it from the DC output. Switching
supplies in computers, TVs and VCRs have these opto-couplers to tightly control the output voltage.
Open loop regulators do not have a feedback circuit. Instead, they rely on feeding a constant
voltage to the input of the transformer or inductor, and assume that the output will be correct. Regulated
designs compensate for the impedance of the transformer or coil. Monopolar designs also compensate for
themagnetic hysteresis of the core.
The feedback circuit needs power to run before it can generate power, so an additional nonswitching power-supply for stand-by is added.
APPLICATIONS:
Switched-mode power supply units (PSUs) in domestic products such as personal computers often
have universal inputs, meaning that they can accept power from mains supplies throughout the world,
although a manual voltage range switch may be required. Switch-mode power supplies can tolerate a wide
range ofpower frequencies.
In 2006, at an Intel Developers Forum, Google engineers proposed the use of a single 12 V supply inside PCs,
due to the high efficiency of switch mode supplies directly on the PCB.]
Due to their high volumes mobile phone chargers have always been particularly cost sensitive. The first
chargers were linear power supplies but they quickly moved to the cost effective ringing choke converter
(RCC) SMPS topology, when new levels of efficiency were required. Recently, the demand for even lower no
load power requirements in the application has meant that flyback topology is being used more widely;
Page 64
primary side sensing flyback controllers are also helping to cut the bill of materials (BOM) by removing
secondary-side sensing components such as optocouplers.
RESULT:
Thus SMPS is studied.
DIGITAL TO ANALOG CONVERTER

(R 2R LADDER TYPE)
AIM:
To construct a 8 bit digital to analog converter using R 2R ladder type.
THEORY:
A DAC accepts an n bit input word b1, b2, , bn in binary and produces an analog signal that is
proportional to the input. In this type of DAC, reference voltage is applied to one switch and the other
switches are grounded. It is easier to build and number of bits can be expanded by adding more R 2R
sections. The circuit slow down due to stray capacitance.
OBSERVATION:
TAB 8.1
CALCULATION:
Output Voltage, VO = VR (d12-1 + d22-2 + d32-3 )
For 100, VO = 5V
51
Output:
VO = 5V
Page 65
8.5 CIRCUIT DIAGRAM
FIG 8.1
8.6 MODEL GRAPH:
8.7 RESULT:
Page 66
Thus R 2R ladder type digital to analog converter is implemented.
ANALOG MULTIPLIER
AIM:
To simulate an Analog multiPLIER using PSPICE
5.2 APPARATUS REQUIRED:
1. PC
2. PSPICE software
THEORY:
Anolog multiplier is used to multiply two input singal. if a input is given to a log amplifier an
dthe output can be taken in the antilog amplifier.it is the simple way to test the multiplied signal.in this circuit
it is designed using Ic.input is given to the terminals of two Ics and output is taken across . It is similar to log
and antilog operation.
PROCEDURE:
1. Click on the start menu and select the p spice simulation software
2. Select the parts required for the circuit from the parts menu and
place them in the work space
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding output
waveforms
MODEL GRAPH
Page 67
FIG 5.1
CIRCUIT DIAGRAM
FIG 5.2
Thus the analog multiplier is simulated using PSpice.

VIVA QUESTIONS:
1. Draw the analog multiplier circuit using log and antilog.
Page 68
2. Give the effect of output using log and antilog amplifiers.

3.
Give the applications of analog multiplier.
4.
Give the advantage of analog multiplier.
5. What are the circuits used to multiply two inputs.
CMOS Inverter, NAND and NOR using PSPICE

Aim:
To plot the transient characteristics of output voltage for the given CMOS inverter,
NAND and NOR from 0 to 80m s in steps of 1m s. To calculate the voltage gain,input impedance and output
impedance for the input voltage of 5V.
PARAMETER TABLE:
PARAMETRS
L
W
VTO
KP
CBD
CBS
RD
RB
RS
RG
RDS
CGSO
CGDO
CGBO
PMOS
1
20
-2
4.5e-4
5p
2p
5
0
2
0
1Meg
1p
1p
1p
NMOS
1
5
2
2
5p
2p
5
0
2
0
1 Meg
1p
1p
1p
TAB 4.1
THEORY:
(i) Inverter
Page 69
CMOS is widely used in digital ICs because of their high speed, low power dissipation and it can be
operated at high voltages resulting in improved noise immunity. The inverter consists of two MOSFETs. The
source of p-channel device is connected to +VDD and that of n-channel device is connected to ground. The
gates of two devices are connected as common input.
(ii) NAND
It consists of two p-channel MOSFETs connected in parallel and two n-channel MOSFETs connected
in series. P-channel MOSFET is ON when gate is negative and N channel MOSFET is ON when gate is
positive. Thus when both input is low and when either of input is low, the output is high.
(iii) NOR
It consists of two p-channel MOSFETs connected in series and two n-channel MOSFETs connected in
parallel. P-channel MOSFET is ON when gate is negative and N-channel MOSFET is ON when gate is
positive. Thus when both inputs are high and when either of input is high, the output is low. When both the
inputs are low, the output is high.
TRUTH TABLE
INVERTER
TAB 4.2
NAND
TAB 4.3
NOR
Page 70
TAB 4.4
4.5 CIRCUIT DIAGRAM

4.5.1 INVERTER
FIG 4.1
NAND
Page 71
NOR
Page 72
MODEL GRAPH
INVERTER
NAND
NOR
Page 73
Output:
(i) Inverter
Gain = V(2)/Vin =
Input Resistance at Vin =
Output Resistance at V(2) =
(ii) NAND
Gain = V(4)/Vin1 = V(4)/Vin2 =
Input Resistance at Vin1 =
(iii) NOR
Gain = V(4)/Vin1 = V(4)/Vin2 =
Inferrence
Thus the transient characteristics of output voltage for the given CMOS inverter, NAND and
NOR is plotted and the voltage gain, input impedance and output impedance are calculated.
VIVA QUESTIONS:
Page 74
1. What is the advantage of CMOS over NMOS and PMOS?
2. What are different types of CMOS inverter?
3. What is the current CMOS technology?
4. List the CMOS parameters.
. DESIGN AND TESTING OF SUMMING AMPLIFIER

AIM:
To design and test the operation of Summing amplifier.
S.No
1.
2.
3.
4.
5.
6.
7.
Equipment and
Components
Resistor
Op-amp
Dual RPS
AFO
CRO
Bread board
Connecting wires
Range
Quantity
1,10,2k
IC741
(0-30)v
-
1,1,1
3
1
1
1
1
few
THEORY:
Page 75
The Summing Amplifier is a very flexible circuit based upon the standard Inverting operational
amplifier configuration that can be used for combining multiple inputs. We saw previously in the inverting
amplifier tutorial that the inverting amplifier has a single input voltage,Vin applied to the inverting input
terminal. If we add more input resistors to the input, each equal in value to the original input resistor, Rin we
end up with another operational amplifier circuit called a Summing Amplifier, summing inverter" or even a
"Voltage adder" circuit .The Summing Amplifier is a very flexible circuit indeed, enabling us to effectively
"Add" or "Sum" together several individual input signals. If the inputs resistors, R1, R2, R3 etc, are all equal a
unity gain inverting adder can be made. However, if the input resistors are of different values a "scaling
summing amplifier" is produced which gives a weighted sum of the input signals. The
The gain of the circuit is
Gain(AV)=Vout/Vin=-Rf/Rin
A1=10k/1k=-10
A2=10k/2k=-5
Vout=(A1xV1)+(A2xV2)
we can now
Vout=(-10(2mV))+(-5(5mV))=-45mv the values of the resistors in the circuit as follows,
we know that the output voltage is the sum of the two amplified input signals and is calculated as:
CIRCUIT DIAGRAM:
TABULATION
Page 76
S.No
V1
V2
Vout
Theoretical
Practical
PROCEDURE:
i.Connections are given as per the circuit diagram
ii.Two input voltages V1 and V2 are provided
iii.Two gains A1 and A2 are determined
iv.calculate the output voltage Vout
RESULT:
Thus the summing Amplifier is constructed sand tested
EX.No:14. DESIGN AND TESTING OF PRECISION RECTIFIER

AIM:
To study the Half Wave and Full Wave Rectifier and to obtain the required graph.
Sl.No.
1
2
3
4
5
6
7
Equipment and Components

Integrated Regulated Power Supply
(ICPS)
Cathode Ray Oscilloscope (CRO)
Audio Oscillator (A / O)
Operational Amplifier (OP-AMP)
Resistor
Diode
Bread board & Connecting wires
Range / Number/ Value

15 V
20 / 40MHz, Dual Trace
1-100 KHz
IC 741
10k
1N 4007
Qt
y
1
1
1
1
5
2
THEORY:
An inverting Op-Amp can be converted into a half wave rectifier by adding two diodes. When Vi is positive,
Page 77
diode D1 conducts causing Vo to go to positive by one diode drop. Hence diode D2 is reverse biased. The
output voltage Vo is zero because for all practical purposes no current flows through D1 for ve input, D2
conducts and D1 is OFF. The ve input Vi forces the Op-Amp output Vo ve and causes D2 to conduct. The
circuit then acts like inverter for Rf = R1 and the output Vo becomes positive. The Op-Amp in the circuit must
be high Op-Amp since it alternates between open loop and closed loop operations. The principal limitation of
this circuit is the slew rate of the Op-Amp. As the input passes through zero the Op-Amp output Vo must
change from 0.6 to -0.6v or vice versa as quickly as possible in order to switch over the conduction from one
diode to another
CIRCUIT DIAGRAM:
MODEL GRAPH
MODEL GRAPH :
Page 78
FULL WAVE PRECISION RECTIFIER
TABULATION:
Input
Output
Sl.No.
Description
Half Wave
Amplitude
Time
Amplitude Time
1
Full Wave
2
Page 79
PROCEDURE:
1.Connections are made as per the circuit diagram
2.A sinusoidal signal from audio oscillator is applied to the inverting terminal of op-*amp
3.The rectified output is then obtained on the CRO.
RESULT:
The Half Wave and Full Wave Precision rectifier is constructed and output is
obtained.
VIVA QUESTIONS
Sl.no
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Questions
What are the advantages of ICs over discrete components?
How are ICs classified
Explain the basic block diagram of an op-amp?
What is a current mirror?
Design a current source to provide an output current of 100A.Assume Vcc=5V, VBE
(ON) =0.6V, =150.
Define sensitivity?
Show that the sensitivity of a simple current mirror is unity?
What is the use and advantage of an active load?
Why is the current mirror circuit used in differential amplifier stage
What are the other names of clipper circuits?
What are voltage references?
Define band gap reference?
Define temperature co-efficient
. What is the main advantage of an active load?
What is a differential amplifier?
Define CMRR?
What is PSRR?
Define slew rate and what causes it?
Sketch the open loop response of an op-amp
The output voltage of a certain op-amp changes by 20V in 4 s.What is slew rate
Define gain bandwidth product?
What is the advantage and disadvantage of dominant pole compensation technique
What is the advantage of pole zero compensation
List the characteristics of an ideal op-amp?
What is the type of internal compensation used in op-amp
List the features of IC741?
Explain the significance of virtual ground in an op-amp?
Define offset voltage?
What are the limitations of open loop configuration?
. Name all the basic terminals of op-amp?\
What is thermal drift?
Define input bias current?
Draw the circuit of an inverting amplifier using op-amp and give its important
characteristics?
Define Trans conductance amplifier?
What is a Trans resistance amplifier?
What is the basic function of a differentiator?
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
What is the basic function of capacitor in differentiator and integrator

What is the basic function of an integrator? Also draw its circuit diagram?
What is a voltage to current converter?
Define VCCS, VCVS, CCVS, CCCS?
Give the application of integrator and differentiator?
What is the basic principle of a basic logarithmic amplifier?
What is the basic principle of a basic anti logarithmic amplifier circuit?
What is a current to voltage converter?
Draw an op-amp summing amplifier and obtain the expression for output voltage?
What is an instrumentation amplifier
What is a comparator .List some applications of it?
What is a zero crossing detector?
What is hysteresis?
What is a Schmitt trigger?
What is a precision diode?
What are the advantages of active filters over passive filters?
What is the roll off rate of a first order filter?
Define pass band and stop band of a filter?
Define quality factor or figure of merit?
Draw the frequency response of a notch filter?
Give the condition for oscillation?
What are multivibrators?
Design a RC phase shift oscillator for fo=300Hz.
State the requirements of an instrumentation amplifier?
Mention 2 linear and nonlinear operations performed by an op-amp?
Compare the ideal and practical characteristics of op-amp?
Op-amp has a gain of 12 million. Express in dB?
Draw the block diagram of NE566 voltage controlled oscillator?
What is an operational transconductance amplifier? Draw the schematic?
What is a PLL?
What is a frequency synthesizer?
What is a four quadrant multiplier?
What is a compander IC? Enlist its features?
Define capture range and lock range?
An AC signal has got a magnitude of 0.1V peak to peak .suggest a suitable HWR for this
signal?
Name 2 applications of PLL?
What is a VCO?
What is amplitude modulation?
What is a 2 quadrant multiplier?
What is the most important application of Schmitt trigger circuit?
Draw the sample and hold circuit
Define voltageto-frequency conversion factor of VCO
Why is capture range always smaller than the lock range?
Which is the fastest A/D converter? Give reason?
Why is the R-2R ladder better than weighted resistor DAC?
82
Calculate the number of comparators required for realizing a 4 bit flash A/D converter
MODEL ANNA UNIVERSITY QUESTION PAPER

LIST OF EXPERIMENTS:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
26.
27.
28.
Draw an amplifier circuit which provides a phase shift of 180 o between input and output.
Draw an amplifier circuit an amplifier which amplifies the input without producing any phase
shift between input and output.
Draw an amplifier circuit whose output voltage is proportional to the difference between two
input voltages.
Draw a circuit whose input is square wave and the output is triangular wave.
Draw a circuit whose total output for the square wave input is in the form of train of impulses.
Draw a data amplifier with high CMRR & high input impedance.
Draw a frequency selective 2-pole roll off circuit, which allows passing the frequencies, less than
0 and rejecting the frequency greater than 0.
Draw a frequency selective 2-pole roll off circuit, which reject the frequency less than 0
and allows to pass the frequencies greater than 0.
Draw a frequency selective 2-pole roll off circuit, which reject the frequency less than 1 &
frequency higher than 2, while it passes the band of frequencies between 1 & 2.
Draw a regenerative comparator, which is used to avoid unwanted triggering.
Draw a delay circuit which is used to generate rectangular waveform using op-amp.
Draw a free running multivibrator circuit which is used to generate square waveform using
Op-amp.
Draw a delay circuit which is used to generate rectangular waveform using timer.
Draw a free running multivibrator circuit which is used to generate square waveform using
Timer.
Draw a ripple free circuit which keeps the output voltage constant under variable load and
Variable source.
Draw a sine wave generator, which uses ladder network in the feedback path.
Draw an oscillator circuit in which no phase shift is necessary through the feedback path.
Draw a closed loop system which is used to lock the output frequency and phase of an input
signal.
Write a Pspice program for band pass filter.
Write a Pspice program for Wien bridge oscillator.
Write a Pspice program for Low pass filter.
Write a Pspice program for RC Phase Shift Oscillator.
Write a Pspice program for High pass filter.
Write a Pspice program for Lossy Integrator.
Write a Pspice program for Differentiator.
Write a Pspice program for Astable Multivibrator using Op-amp.
Write a Pspice program for Schmitt trigger.
Write a Pspice program for Monostable multivibrator using Timer.

LIC Lab Manual Anna University

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

LIC Lab Manual Anna University

Uploaded by

Copyright:

Available Formats

RAJALAKSHMI INSTITUTE OF TECHNOLOGY

CHENNAI 602 124

Introduction Of Operational Amplifier IC 741

D/A and A/D converters (Successive approximation)

EC2258 LINEAR INTEGRATED CIRCUITS

ANNA UNIVERSITY SYLLABUS

1. Inverting, Non inverting and Differential amplifiers.

Name of the equipments / Components

EC2258 LINEAR INTEGRATED CIRCUITS

INTRODUCTION OF OPERATIONAL AMPLIFIER IC 741

INTERNAL BLOCK DIAGRAM

EC2258 LINEAR INTEGRATED CIRCUITS

stage should have the following characteristics:

IC-741 pin details

Equivalent Circuit for Ideal Operational Amplifiers

EC2258 LINEAR INTEGRATED CIRCUITS

Op-Amp Idealized Characteristics

Infinite - The main function of an operational amplifier is to amplify the

Infinite - Input impedance is the ratio of input voltage to input current

Zero - The output impedance of the ideal operational amplifier is

EC2258 LINEAR INTEGRATED CIRCUITS

EC2258 LINEAR INTEGRATED CIRCUITS

Operational Amplifiers Summary

The basic Op-amp construction is of a 3-terminal device, 2-inputs and 1-output.

An operational amplifier also has zero output impedance, (Z = 0).

An operational amplifier also has zero output impedance, (Z = 0).

This Gain, (A) is often referred to as the amplifiers "Open-loop Gain".

the amplifier is increased.

EX.NO:1. DESIGN AND TESTING OF INVERTING, NON-INVERTING AND

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

R1(ohms) Vi peak (volts)

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

NON INVERTING AMPLIFIER:

R1(ohms) Vi peak (volts)

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

Theoretical Output Voltage Gain=

Non Inverting Amplifier

Theoretical Output Voltage Gain=

Theoretical Output Voltage Gain=

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

EX.NO:2. DESIGN AND TESTING OF INTEGRATOR AND DIFFERENTIATOR

fb is the frequency at which the gain is 0 dB and is given by fb = 1/2R1Cf

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

EX.NO:3: DESIGN AND TESTING OF INSTRUMENTATION AMPLIFIER

Instrumentation amplifier is an amplifier that realizes high input impedance

Let R1= R2 = R3 = R gain = 10 K then

Theoretical Output Voltage Gain=

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

EX.NO:4. DESIGN AND TESTING OF ACTIVE LOWPASS, HIGHPASS AND

Let FH =1 KHz and R = 1.5 K

Output Voltage Vo(volts)

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

Let FH = 1 KHz and R = 1.5K

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

Output Voltage Vo(volts)

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

Output Voltage Vo(volts)

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY

EX.NO:5. DESIGN AND TESTING OF ASTABLE & MONOSTABLE

EC2258 LINEAR INTEGRATED CIRCUITS LABORATORY