2011 International Coriference on Electronics and Optoelectronics (ICEOE 2011)

Design of Automatic Washing Machine Based on Verilog HDL Language

Chen Xizhenl, Chen Guangjian2, Jia Jinling2,yu han\ Zhou Tianpeng1

Faculty of Automation and Information, Sichuan University of Science and Engineering, Zigong , China;
2. Faculty of Computer Science, Sichuan University of Science and Engineering, Zigong , China;
c_xizhen 724@126.com, chen224@suse.edu.cn, jiajinling@suse.edu.cn,0553yuhan@sina.comztp0426@yeah.net
I.

Abstract-As described by digital system the language Verilog

HDL is widely used in the circuit design, its own advantages to

be able to use software language describe hardware features

that makes it has good readability, portability, etc. Its
advantages not only reduce the hardware development cycle
but also greatly reduce development costs. This article
describes the characteristics and application of Verilog HDL
and take the automatic washing machine as examples to
illustrate the practicality of HDL. The result of simulation
shows this method is feasibility and effectiveness.

Keywords-Verilog;
Hardware
Automatic washing machine

description

languages;

In recent years, with the development of science and

technology, the design of electronic systems also produce a
revolutionary change, a new class of development tools
relate to electronic systems are spreading quickly. Hardware
Description language ( HDL) is a method to Description of
digital circuit. HDL describes a certain function of digital
circuit usually has one or more files composition. According
to certain rules (or grammar) HDL describes documents after
the compilation, and uses the electronic system design
automation (EDA) tools to comprehensive, just can be
transformed into practical circuit. In recent years, with the
rapid development of EDA and large scale programmable of
logic device, HDL can hierarchical description and
simulation of any electronic components characteristics, so
that the circuit designers and developers could describe the
feature of the circuit freely, which can build the bridge of
communication and exchange data between chip designers
and producers.
1.

THE INTRODUCE OF

VERILOG HDL

Verilog language is a kind of abstract level of hardware

description language. This language supports the early
abstract design concept, and could realize the later abstract
design. It includes the hierarchical structure, which allows
designers to describe the complexity of the control.
Verilog HDL is a powerful tool, not only its easy to use
but also the strong function, especially the Verilog HDL
industrial standardization, conform with the trend of
microelectronics technology development. Verilog HDL is
used in digital design modeling from the switch level to
abstract algorithm design level. This language provides
abundant structural. These constructions can not only be
used to design pattern on hardware inter current behavior,
but also on hardware design of scheduling pattern.

978-1-61284-276-9/11/$26.00 2011 IEEE

II.

THE DESIGN OF AUTOMATIC WASHING MACHINE

Because the VerilogHDL has the advantage of powerful

language structure and concise code for complex control
logic. So, this article based on VerilogHDL to design the
control system of the washing machine.
A.

The principle of automatic washing machine

The inside bucket of fully-automatic washing machine

has many small holes, through them the bucket of water
between the inside and outside is interlinked,
electromagnetic valve execute the water in and out. When
the water in the control system will fill the electromagnetic
valve opens, so feed the water into outer barrel. When
drainage, the control system will let the drain
electromagnetic valve opens, so the water by outer barrel
row to drain. When dehydration, the control system will
close clutch and by turning on washing motor driving
internal vats to dry. High, middle and low water level control
switch is used to detect the high, middle and low water level.
Start button is used to activate washing machine to work,
stop button is used to achieve manually stop water, drainage,
dehydration and alarm. Drainage button is to achieve
manually drainage.
B.

Working function and operational states process of the

washing machine

This paper introduces the extensive use of automatic

washing machine without any button in each big campus
(mainly university), the entire laundry process control all by
coin to complete, if need continuous coin, this action and the
next action should be in 15 seconds, if exceed 15 seconds,
the mashing will carry out the corresponding operation and
default last coin to end the action. The machines have four
functions: there are dehydrate, express laundry, criterion
laundry and delicate whites.
For the sake of simplicity, we will do some simplifY, its
principle is as follows:
1) This machine adopts toss a coin manner, and should be
the one coin. The action should be interval in 15 seconds
and only one by one.
2) The machine start executes the operation process in 15
seconds, and the washing machine screen will show the
process in digital tube state and program state. Process
condition as follows: there are bb for washing process, cc
for rinsing process; dd for dehydration process. Program
states as follows: 01 for standard procedures, 02 for big
things program, 03 for quick procedure, 04 for single off

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2011 International Coriference on Electronics and Optoelectronics (ICEOE 2011)

program.
3) There are four working ways of automatic washing
machine. If you pay one yuan, the mashing will execute
dehydration operation after 15 seconds, if you continue to
pay one yuan in 15 seconds the machine will recognize
and it is executed express laundry operation. If you pay
another one yuan in 15 seconds but in 15 seconds later
without the forth coin it is executed the third
operating :standards laundry, if have four coins then
execute the fourth operation: big things laundry. figure 1
shows the states of the automatic washing machine .

motor. The full laundry process is completed and the speaker

sends out the continuous 15 seconds of hasty "di, di" sound,
which tells user laundry end and controller returns to the
initial state again.
Designing and realizing
washing machine

C.

the programs of automatic

Verilog HDL language designs and realizes the input or

output programm of automatic washing machine. The
flowchart of design the program is shown in figure 3:

Figure I. The state of automatic washing machine

When the washing machine executes express laundry

operation it has six working status. There are: free, adding
water, washing, draining, drying, and beeping. The figure of
state transition is shown in figure2:
rst

idle
m 0

start

f------t

=0 cl=0

Water

7s

I-----

Wl mO

Wash

;k:
LdrY ---.J---I.- < det ect>
r--------
- yes
...

9s

t--

=0 cl=0

beep

Figure3. The flowchart of design the program

drain
mO
dl w=0

6s

f----.

5s

dry

I-----

m=1

dl w=0

beep

15s
r--

mO, dO

Figure2.the work chafe of automatic washing machine

Laundry process:
A) Open power then start program, the circuit is reset to
initial condition, the control signal is m = 0, w = 0, d = 0.
When press start button the program wiIJ enter the state of
water!, w = 1, then open water valve continuing 7s to adding
water. According the rotation current of motor estimates
the weight of clothing to decide water level and washing
time. (That based on cleaning index of manufacturing
standards).
B) Start fill solenoid valves when the water reached
requirement shutdown water pushing solenoid valves.
C) Start motor to catharsis and this moment is w = 0, m = 1,
which makes motor start operation, the process last for 9s,
and close motor when washing finish.
D) Start drainage electromagnetic valves, the water-level
sensor controls the drainage electromagnetic to be closed,
and check whether the switch is closed after drainage
electromagnetic valve close
E) Start clutch and drying motor, when drying close jilt dry
,

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signal definition:
clk: Clock input;
reset The reset signal of the system;
oneyuan: Representative into one yuan coin;
execute_d: Representative start washing machine and
execute single dehydration operation;
execute f: Representative start washing machine
execute express laundry operation;
execute s: Representative start washing machine
execute standard laundry operation;
execute b: Representative start washing machine
laundry
objects
larger
execute
operationo
* /
Main design program is as follows:
input oneyuan,reset,clk;
output execute_d,e_f, e_s, e_b
reg execute_d,e_f, e_s, e_b
reg[2:0] state;
parameter idle=O,one=1,two=2,three=3,four=4;
always @ (posedge clk)
begin
itrreset)
else
begin

2011 International Conference on Electronics and Optoelectronics (ICEOE 2011)

method which can adapt to the social development needs.

We use hardware description language form digital system
design is not only flexible and convenient but also reduce the
cost of development and the development cycle. This design
method will plays an increasingly important role in the future
digital system design.

case(nextstate)
state=idle
water:
wash:
drain:
dry:
beep:
endcase
end

ACKNOWLEDGMENT

This work was supported in part by The project of

Artificial Intelligence of the Key Laboratory of Sichuan
Province(2009RZ003) ;

end
assign speaker=clk_1Hz&clk_1 KHz&alarm;
D.

The working process of simulation of the automatic

washing machine

REFERENCES

When rest signal comes, all of the signals set zeros; then
if you put on start button the machine will enter water state.
As long as you no longer press start button, washing
machine will automatically execute the process according to
the predetermined. The simulation results as shown in figure
4.
III.

[ I]

Wangguan etc. Verilog HDL and digital circuit design [M].beijing

mechanical industry press, 2005.9

[2]

XiaYu wen. Verilog digital system design guide [M].beijing:

aerospace university press, 2003. 2-10

[3]

Thomas & Moorby, The Hardware Verilog DescriptionLanguage [M].

Beijing tsinghua university press, 2001. 23-36.

[4]

WangJiGang,
GuGuoChang.
Structures
and
patterns
in
communication system software application research (J].journal of
computer application pract, ( I I) : 43-45.

[5]

YangJimin YangJiBing, digital system design and VerilogHDL

[M].beijing: electronic industry press, 2003,23(11 ):43-45.

[6]

YuanJunQuan, SunMinQi, CaoRui. VerilogHDL digital system

design and its application [M].concrete: xian university of electronic
science and technology press, 2002.

CONCLUSION

In this paper we adopt Verilog HDL language to design

automatic washing machine control system. We use its
powerful language structure and concise code to describe the
complex control logic. Through comprehend the
corresponding hardware circuit and tools of Verilog HDL
language to generate more than traditional logical design

Name

elk_1IG{Z
elk_1Hz
rst
start.J)ause
mode
level
open_door

Ii!

times

W
M
D

IW

nextstate

Figure 4. The simulation process of automatic washing machine

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