Professional Documents
Culture Documents
Authors: Dr. Mary Y. Lanzerotti (AFIT/ENG), Mr. David Doak (AFIT/SC), Ms.
Kathleen Mantell (Univ. PA)
System Administrator:
This work contains common CAD tool information used for the courses
EENG653, EENG695, and EENG795. It has been adapted from similar material
used at Tufts, Columbia, University of Virginia, and University of Utah. The Linux
material is provided by the University of Surrey (UK) and OReilly.
Questions or comments for improvements on this document should be sent to
mary.lanzerotti@afit.edu. Cadence is a trademark of Cadence Design Systems,
Inc., 2655 Seely Avenue, San Jose, CA 95134
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Permissions
Permissions to use materials have been generously given by the following individuals.
Thank you to all of them.
Table of Contents
1. General Information and Linux Account Information ............................................................3
2. Guidelines for Working in the VLSI CAD Lab ............................................................................4
3. A Beginners Guide to the Unix and Linux Operating System ............................................5
4. Linux Quick Reference: OReilly (www.oreilly.com) ...............................................................9
5. Setting up Firefox ..............................................................................................................................11
6. Setting up Secure Shell (SSH) .....................................................................................................14
7. Screen Capture of Images with The GIMP ...............................................................................17
8. Printing and Plotting .........................................................................................................................19
9. Setting up the Linux Environment and Getting Started with Cadence 6.1.5. ............23
10. Sending Email from Linux...........................................................................................................37
11. Inverter: Creating a Library.......................................................................................................38
12. Inverter: Creating a Schematic ................................................................................................40
13. Inverter: Creating a Symbol......................................................................................................54
14. Inverter: Performing a Spectre Simulation on a Schematic .........................................59
15. Inverter: Creating a Layout .......................................................................................................89
16. Inverter: Running Design Rule Check (DRC) ....................................................................120
17. Inverter: Running Extraction...................................................................................................124
18. Inverter: Running Layout Versus Schematic (LVS)........................................................131
19. Inverter: Running Extracted-Layout Simulation ..............................................................136
20. Inverter: Simulation with NC-Verilog...................................................................................142
21. nFET: Generating I-V Curves for an nFET ..........................................................................155
22. nFET: Parametric Simulation of I-V Curves (nFET) ........................................................185
23. Inverter: Generating a Voltage Transfer Curve (VTC) of an Inverter .....................203
24. Inverter Chain: Creating an Inverter Chain ......................................................................228
25. Ring Oscillator ...............................................................................................................................244
26. Ring Oscillator: Learning to Use the Calculator ...............................................................258
27. Parameterized Inverter Chain: Delay of Inverter Chain ...............................................280
28. Parameterized Inverter Chain: More Use of the Calculator ........................................318
29. Parameterized Inverter Chain: Parametric Analysis of the Delay of an Inverter
Chain. ...........................................................................................................................................................322
30. The End. ..........................................................................................................................................336
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Meaning
list files and directories
list all files and directories
make a directory
change to named directory
change to home-directory
change to home-directory
change to parent directory
display the path of the current directory
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Meaning
copy file1 and call it file2
move or rename file1 to file2
remove a file
remove a directory
display a file
display a file a page at a time
display the first few lines of a file
display the last few lines of a file
search a file for keywords
count
number
lines/words/characters in file
of
Meaning
redirect standard output to a file
append standard output to a file
redirect standard input from a file
pipe the output of command1 to the
input of command2
concatenate file1 and file2 to file0
sort data
list users currently logged in
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Meaning
match any number of characters
match one character
read the online manual page for a
command
brief description of a command
match commands with keyword in their
man pages
Meaning
list access rights for all files
change access rights for named file
run command in background
kill the job running in the foreground
suspend the job running in the
foreground
background the suspended job
list current jobs
foreground job number 1
kill job number 1
list current processes
kill process number 26152
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Meaning
disk space on the file system
space left
number
of
kilobytes
in
each
subdirectory
reduces file size
reads gzipped file
classifies the named files
compares two files and displays the
differences
searches through directories for files
and directories for attribute
C shell keeps an ordered list of all
entered commands
Meaning
Manage large programs or groups of
programs
Set of compile rules in a text file
Meaning
A way to pass information from the shell
to programs
Set by the setenv command
$history,
$cwd,
$HOME,
$prompt; % set | less
$PATH,
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5. Setting up Firefox
a. In this step you will set up the Proxies for Firefox. Open a Firefox
window as shown below.
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use_ncsucdk
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10.
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11.
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c. Now you will see EENG653 appear in the Library Manager Window
in the list of libraries on the left-hand side.
d. Now you have completed the task of creating a new empty Library.
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12.
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Command
i
p
q
w
f
l
m
DEL
ESC
Up
Down
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13.
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14.
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ff. The value of the width of the inverter pfet can be changed so that it
is double the width of the inverter nfet (a new value of the beta
ratio). New values for the following quantities can be obtained and
compared with the values in (ee).
gg.The value of the width of the inverter pfet can be changed so that it
is triple the width of the inverter nfet (another new value of the beta
ratio). New values for the following quantities can be obtained and
compared with the values in (ee) and (ff).
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15.
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and
choosing
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16.
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17.
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18.
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f. Fix any errors that may exist in the layout. Re-run LVS until no
errors are reported. If LVS passes with no errors, you have now
completed LVS.
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19.
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h. Now you have simulated your schematic view and your extracted
view of your inverter. For a layout with a lot of extra wire (extra
metal layer), the simulation of the extracted view will not closely
match the simulation of the schematic view.
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20.
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21.
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z. Now you can press on the ESC key to finish choosing the signals.
You should finally get the desired simulation results, five IV-curves.
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bb.
You have now saved the state of your simulation of five IVcurves.
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22.
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23.
Inverter: Generating a Voltage Transfer Curve (VTC) of an
Inverter
a. In this tutorial, you will generate a voltage transfer curve (VTC) of an
inverter. Open the Library Manager and select the EENG653 library
that you created previously. Select the inverter schematic and open
it with the schematic editor. The select the inv_test schematic and
open it with the schematic editor.
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cc. You have now completed the voltage transfer curve (VTC) tutorial.
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24.
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25.
Ring Oscillator
a. In this section, you will create and simulate a ring oscillator that is
composed of 11 inverters. In the EENG653 library, copy the
invchain_test cell to a new cell called ringoscillator_test as shown
in the image below. Make sure that the inv instantiated in the
ringoscillator_test library still points to the inv cell in the
EENG653 library.
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26.
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f. Now click on the Wave radio button in the calculator window. Then
click on the output waveform (the waveform with the low to high
transition, in this case, N1) in the Visualization & Analysis XL
window. (Be sure not to click on the wave name on the left-hand
side; click instead on the waveform itself).
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27.
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Before setting up the simulation of the inverter chain, you will learn
one additional skill that is useful in your work with schematic entry.
This skill is the ability to traverse the schematic hierarchy.
In order to traverse the schematic hierarchy in Read mode, click on
the EENG653 InvDelay schematic, and then select Edit Hierarchy
Descend Read. Then click on the instance such as the first
inverter - in which you wish to descend (without the ability to edit).
In order to traverse the schematic hierarchy in Edit mode, click on
the EENG653 InvDelay schematic, and then select Edit Hierarchy
Descend Edit. Then click on the instance in which you wish to
descend (with the ability to edit).
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28.
Parameterized Inverter Chain: More Use of the
Calculator
a. You can now measure the tpLH and tpHL for the second and third
inverters with signals IN2 and IN3 (recall that the role of the first
inverter is to generate the realistic waveform, and the fourth
inverter is the load). To do this accurately, you are going to use the
waveform calculator (you can also save the waveforms in a table, as
explained earlier).
To open the waveform calculator, click on the ADE window. Then
select Tools Calculator which will open the calculator as shown
in the image below.
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d. The value of tpHL is slightly less than the value of tpLH, as expected
because of the difference between the mobility of the electron and
the mobility of the hole (the carriers in the nmos and the pmos).
What is the ratio of the mobility of the electron and the hole? What
is the value of the parameter a? Which is larger? Although the
simulation results may suggest that the value of the width of the
pmos device may need to be increased even larger (to what value?),
you only need to do this (that is, increase the value) if you are
mainly interested in producing an inverter with a symmetric voltage
transfer curve (VTC) and with equal values of tpHL and tpLH (that is,
tpHL = tpLH). If you are interested in propagation delay (the
average of tpHL and tpLH), you may actually want to make them less
symmetric to gain speed.
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29.
Parameterized Inverter Chain: Parametric Analysis of the Delay
of an Inverter Chain
a. You will now determine the optimal ratio of the pmos width to the
nmos width through simulation. In order to obtain the optimal
value of the ratio, you will perform multiple simulations with
different values for a, and you will determine the fastest solution. It
is possible to perform these simulations manually. In this section
you will learn how to perform the simulations automatically in the
Cadence software.
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30.
The End.
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