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Introduction
+HVDC
I CG = C CG
dV CE
dt
(1)
DRIVER
I CG =C CG *dV CE /dt
Miller Capacitor CCG
RDRIVER
RG
S2
+HVDC
+HVDC
RGATE
RGATE
To Driver
+_
To Driver
Gate Capacitor CG
How it works: During turn-off, the gate voltage is monitored and the clamp is activated when the gate voltage
goes below 2 V (relative to VEE). The clamp voltage is
typically VOL + 2.5 V for a Miller current up to 1100 mA.
VCC2
UVLO
ANODE
CATHODE
6, 7
D
R
I
V
E
R
5, 8
LED1
11
14
DESAT
9, 12
SHIELD
VOUT
DESAT
VEE
VCLAMP
VCC1
FAULT
VS
2
3
10
LED2
16
1, 4
15
SHIELD
Figure 4. ACPL-332J Block Diagram; Active Miller Clamp Feature Circled in Red
VCLAMP
VE
VLED
Figures 5 to 7 show possible application circuits using Avagos Active Miller Clamp.
Application Note: If Active Clamp is not used, connect VCLAMP to VEE
Figure 5 is the recommended circuit for gate driver design with Miller Clamp (VCLAMP pin).
+
_
VS
VCC1
FAULT
VS
CATHODE
VE 16
VLED 15
RF
0.1F
0.1F 0.1F
CBLANK
DESAT 14
CF
100
DDESAT
RG
+
_
VCC2 13
VEE 12
ANODE
VOUT 11
ANODE
VCLAMP 10
CATHODE
Q1
+
_
VEE
+
VCE
-
RPULL--DOWN
+
VCE
-
Q2
+ HVDC
3-PHASE
AC
- HVDC
Figure 5. IGBT Driver with Single Power Supply, Desaturation Detection and Active Miller Clamp
Figure 6 shows the driver circuit using a negative gate driver for a high-power application. In such circumstances, the
Miller clamp feature would not be required and hence Pin 10 is connected to pin 9, VEE.
1
VS
VCC1
FAULT
VS
CATHODE
VE
16
VLED
15
DESAT
14
VCC2
13
VEE
12
0.1F 0.1F
0.1F
ANODE
VOUT
11
ANODE
VCLAMP
10
CATHODE
VEE
Optional R2
Optional R1
+_
Q1
RPULL-DOWN
Figure 6. IGBT Driver with Negative Gate Drive for High-power Application
RG
_+
Q2
+
VCE
+
VCE
-
+ HVDC
3-PHASE
AC
- HVDC
VS
VCC1
FAULT
VS
CATHODE
VE
16
VLED
15
DESAT
14
VCC2
13
VEE
12
0.1F 0.1F
0.1F
ANODE
VOUT
11
ANODE
VCLAMP
10
CATHODE
VEE
Optional R2
RG
Optional R1
+_
Q1
RPULL-DOWN
-
_+
Q2
+
VCE
+
VCE
-
+ HVDC
3-PHASE
AC
- HVDC
Figure 7a. Large IGBT Driver with Negative Gate Drive, External Buffer for High Current and Active Clamp as Secondary Gate Discharge
VS
VCC1
FAULT
VS
CATHODE
VE
16
VLED
15
DESAT
14
VCC2
13
VEE
12
0.1F 0.1F
0.1F
ANODE
VOUT
11
ANODE
VCLAMP
10
CATHODE
VEE
Optional R2
RG
Optional R1
+_
Q1
RPULL-DOWN
+_
Q2
R3
+
VCE
+
VCE
-
+ HVDC
3-PHASE
AC
- HVDC
Figure 7b. Large IGBT Gate Drive with Negative Gate Drive, External Buffer for High Current and Active Clamp to Control Secondary Discharge Path For High
Power Application
Conclusion
Avago Technologies gate optocouplers have a Miller
Clamp function that controls the Miller current during
a high dV/dt situation and keeps the IGBT totally off. It
provides cost savings by eliminating the use of a negative
supply voltage and additional capacitors that reduces
driver efficiency.
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright 2005-2010 Avago Technologies. All rights reserved.
AV02-0072EN - July 21, 2010