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Scheme Testing Tools

DLogicPro
User Manual

OMICRON DLogicPro

Article Number Vxxx0103 - Manual Version: AT.ENU.13 - Year 2002


OMICRON electronics. All rights reserved.
This manual is a publication of OMICRON electronics GmbH.
All rights including translation reserved. Reproduction of any kind, e.g., photocopying, microfilming, optical
character recognition and/or storage in electronic data processing systems, requires the explicit consent of
OMICRON electronics.
Reprinting, wholly or in part, is not permitted. The product information, specifications, and technical data
embodied in this manual represent the technical status at the time of writing and are subject to change without
prior notice.
We have done our best to ensure that the information given in this manual is useful, accurate, up-to-date and
reliable. However, OMICRON electronics does not assume responsibility for any inaccuracies which may be
present.
The user is responsible for every application that makes use of an OMICRON product.
OMICRON electronics translates this manual from the source language English into a number of other
languages. Any translation of this manual is done for local requirements, and in the event of a dispute between
the English and a non-English version, the English version of this manual shall govern.

About This Guide

ABOUT THIS GUIDE


This guide provides a general overview of the OMICRON DLogicPro software.
You will have reference information in the pop-up help in the various windows.
The sections under the heading Before you Start, Prerequisites, How to install
the OMICRON DLogicPro, and Software License Agreement deal with subjects
you need to know before installing the OMICRON DLogicPro Software.
The section About OMICRON DLogicPro gives an overview and background
information on different logic schemes and distance protection relays.
The section Getting Results describes in detail available modes of operation and
provides step-by-step instructions for their use.
The section Testing Relay Schemes gives the principles of operation of individual
schemes, test objectives, hardware requirements, test description and expected
performance.

OMICRON DLogicPro

BEFORE YOU START


Prerequisites
Minimum:
Pentium 90MHz
32 MB RAM
Windows 95, Windows NT4.0
(32-bit Windows)

Recommended:
Pentium 166MHz
64 MB RAM
Windows 95, Windows NT4.0 or higher
(32-bit Windows)

How To Install OMICRON DLogicPro

HOW TO INSTALL OMICRON DLOGICPRO


The OMICRON DLogicPro software is delivered on a CD-ROM unless you have
requested diskette installation.
When you are ready to install the OMICRON DLogicPro.
1.

Insert the CD in your CD-ROM drive to start the OMICRON DLogicPro


CD-Browser.

2. Close all other open applications.


3. Open Control Panel in Windows.
4. Open Add/Remove Programs.
5. Click on Install and follow the instructions.
6. Select the directory where you want OMICRON DLogicPro installed.
7. Reboot your computer, before starting the OMICRON DLogicPro.

If you need to make an installation with diskettes


Insert Disk 1 in the floppy disk drive.
Follow the same procedure as for the CD-ROM installation...

OMICRON DLogicPro

SOFTWARE LICENSE AGREEMENT


License Agreement
The following is the license agreement that appears in the OMICRON Test
Universe CD printed out for your convenience. Read the terms and conditions
of this License Agreement carefully before installing the software programs
[for OMICRON Test Universe] on any computer. The program is copyrighted
and licensed (not sold). By continuing the installation of this software program,
you are accepting and agreeing to the terms of this License Agreement. If you
are not willing to be bound by the terms of this License Agreement, you should
promptly quit the installation. This License Agreement for the program
represents the entire agreement between you and OMICRON electronics
GmbH Austria and its subsideries (referred to as "licensor"), and it supersedes
any prior proposal, representation, or understanding between the parties.

License Grant
Licensor hereby grants to you, and you accept, a nonexclusive license to use
the Program Diskettes or CD-ROM and the computer programs contained
therein in machine-readable, object code form only (collectively referred to as
the "Software"), and the accompanying User Documentation, only as
authorized in this License Agreement. You agree that you will not assign,
sublicense, transfer, pledge, lease, rent, or share your rights under this
License Agreement. You agree that you may not reverse assemble, reverse
compile, or otherwise translate the Software.

Copyright
Upon loading the Software into your computer, you may retain the Program
Diskettes or CD-ROM for backup purposes. In addition, you may make one
copy of the Software for the purpose of backup in the event the Program
Diskettes or CD-ROM are damaged or destroyed. Any such copies of the
Software shall include Licensor's copyright and other proprietary notices.
Except as authorized under this paragraph, no copies of the Program or any
portions thereof may be made by you or any person under your authority or
control.

Software License Agreement

Licensor's Rights
You acknowledge and agree that the Software and the User's Manual are
proprietary products of Licensor protected under Austrian and international
copyright laws.
You further acknowledge and agree that all right, title, and interest in and to
the Program, including associated intellectual property rights, are and shall
remain with Licensor. This License Agreement does not convey to you an
interest in or to the Program, but only a limited right of use revocable in
accordance with the terms of this License Agreement.

License Fees
The license fees paid by you are paid in consideration of the licenses granted
under this License Agreement.

Term
This License Agreement is effective upon your installation of this package and
shall continue until terminated. You may terminate this License Agreement at
any time by returning the Program and all copies thereof and extracts
therefrom to Licensor. Licensor may terminate this License Agreement upon
the breach by you of any term hereof. Upon such termination by Licensor, you
agree to return to Licensor the Program and all copies and portions thereof.

Limited Warranty
Licensor warrants, for your benefit alone, for a period of 90 days from the date
of commencement of this License Agreement (referred to as the "Warranty
Period") that the Program Diskettes or CD-ROM in which the Software is
contained are free from defects in material and workmanship. Licensor further
warrants, for your benefit alone, that during the Warranty Period the Program
shall operate substantially in accordance with the functional specifications in
the User's Manual. If during the Warranty Period, a defect in the Program
appears, you may return the Program to Licensor for either replacement or, if
so elected by Licensor, refund of amounts paid by you under this License
Agreement. You agree that the foregoing constitutes your sole and exclusive
remedy for breach by Licensor of any warranties made under this Agreement.
EXCEPT FOR THE WARRANTIES SET FORTH ABOVE, THE PROGRAM,
AND THE SOFTWARE CONTAINED THEREIN, ARE LICENSED "AS IS,"
AND LICENSOR DISCLAIMS ANY AND ALL OTHER WARRANTIES,

OMICRON DLogicPro

WHETHER EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION,


ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
PARTICULAR PURPOSE.

Limitation of Liability
Licensor's cumulative liability to you or any other party for any loss or damages
resulting from any claims, demands, or actions arising out of or relating to this
Agreement shall not exceed the license fee paid to Licensor for the use of the
Program. In no event shall Licensor be liable for any indirect, incidental,
consequential, special, or exemplary damages or lost profits, even if Licensor
has been advised of the possibility of such damages. SOME STATES DO
NOT ALLOW THE LIMITATION OR EXCLUSION OF LIABILITY FOR
INCIDENTAL OR CONSEQUENTIAL DAMAGES, SO THE ABOVE
LIMITATION OR EXCLUSION MAY NOT APPLY TO YOU.

Governing Law
This License Agreement shall be construed and governed in accordance with
the laws of the USA and Austria.

Costs of Litigation
If any action is brought by either party to this License Agreement against the
other party regarding the subject matter hereof, the prevailing party shall be
entitled to recover, in addition to any other relief granted, reasonable attorney
fees and expenses of litigation.

Severability
Should any term of this License Agreement be declared void or unenforceable
by any court of competent jurisdiction, such declaration shall have no effect on
the remaining terms hereof.

No Waiver
The failure of either party to enforce any rights granted hereunder or to take
action against the other party in the event of any breach hereunder shall not
be deemed a waiver by that party as to subsequent enforcement of rights or
subsequent actions in the event of future breaches.

About OMICRON DLogicPro

ABOUT OMICRON DLOGICPRO


Modern distribution feeder relays are multifunctional devices with current, or
current and voltage based protection elements. Their main protection functions are
multiple phase and ground overcurrent elements.
Since the protection functions of a distribution feeder protection relay are based on
both the current and voltage measurements, the operation of the different
protection elements is affected by many system conditions that may result in a
relay maloperation.or non-operation.

Substation 1

TOC

Substation 2

IOC

Distribution
Relay

Figure 0-1:

Distribution feeder overcurrent protection zones

The distribution feeder protection relay with two phase and ground overcurrent
zones, is shown on ( Figure 0-1, page -9 )

There are several different types of conditions that have to be considered:

Different fault conditions and the operations of the breakers after a fault occurs
have also to be considered in the design of the protective relays.
Abnormal distribution power system conditions include current inrush or
overloading of the distribution feeder during a power system disturbance or line
energization.
Failure of voltage or current transformers or the circuits connecting them to the
analog inputs of the relay leads to a difference between the primary currents and
voltages in the power system and the currents and voltages measured by the
relay.

To address all the requirements for speed and selectivity of operation during fault
conditions, as well as to avoid maloperation under abnormal, but non-fault

OMICRON DLogicPro

conditions, modern distribution feeder protection relays have multiple built-in logic
schemes.

DLogicPro is designed for the testing of logic schemes that still play a very
important part and define the overall performance of distribution feeder protection
relays.
The following modules are available for testing of logic schemes in modern
distribution feeder protrction relays:

Cold Load Pickup scheme


Feeder Blocking scheme
Sympathetic Trip Logic scheme
Broken Conductor Detection scheme
Selective Overcurrent Logic scheme
Distribution Bus Protection (Incomer) scheme
Backup Selective Tripping scheme
Breaker Failure Protection scheme
Block Reclosing scheme
Switch-Onto-Fault scheme
Voltage Transformer Supervision scheme
Current Transformer Supervision scheme
Fuse Saving Logic scheme
Block Reclosing scheme

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Getting results

GETTING RESULTS
Test task

OMICRON DLogicPro Software is a family of test modules for automatic testing of


the logic schemes in distribution feeder protection relays. They include the most
typical schemes, such as Cold-Load Pickup, Fuse Saving protection and also
cover some advanced features, like Current Transformer Supervision, etc.
The objective of this group of tests is to perform a number of dynamic tests to
evaluate the most common schemes.
The test object is a multi-functional distribution feeder relay with different logic
schemes available. The power system environment, i.e. breaker status, pre-fault,
fault and post fault current and voltages, are simulated by the CMC device.
During the testing of the different protection schemes in one of the modes of
operation, all basic phase and ground settings remain the same. The only changes
made are in the logic scheme selected for each individual subgroup of tests and
the relay settings specific to the scheme under test.

It is recommended that other protection elements such as overcurrent or


undervoltage should be disabled during these tests.

Modes of operation

The software can be used for different purposes and in different modes as described in detail
later in the document.

The first mode is for benchmarking or complete evaluation purposes. In this case
multiple logic schemes are selected in a point-and-click manner and the
software automatically executes a series of predefined tests, measures the relay
under test response, analyses the results and prepares the test report.
The second mode is for testing of a specific logic scheme, for example a
Sympathetic Trip Scheme. In this case the software automatically executes a
series of predefined tests required for the selected scheme, measures the relay
under test response, analyses the results and prepares the test report for the
operation of the scheme.
The third mode of operation of the software is for training purposes. It includes
multiple animated demonstrations of the sequence of events and the operation of
different relay elements at each step of a test sequence. This tool is designed to
help a protection or test engineer or technician with limited experience to
understand the dynamics of the logic schemes operation and the functioning of the

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OMICRON DLogicPro

relay logic for different fault conditions and different substation or power system
equipment performance.

Test modules available


The following most common logic Schemes are considered in DLogicPro:

Cold Load Pickup scheme


Feeder Blocking scheme
Sympathetic Trip Logic scheme
Broken Conductor Detection scheme
Selective Overcurrent Logic scheme
Distribution Bus Protection (Incomer) scheme
Backup Selective Tripping scheme
Breaker Failure Protection scheme
Switch-Onto-Fault scheme
Voltage Transformer Supervision scheme
Current Transformer Supervision scheme
Fuse Saving Logic scheme
Block Reclosing scheme

The logic for each of the above listed schemes is based on existing documents
and may be implemented with modifications in specific products.

What should be tested

The testing of logic schemes is intended to evaluate the performance of the Test Object
under different fault, system and substation conditions.

Different tests are designed to monitor the relay operation for the following fault
conditions:

Close-in phase or ground faults


Feeder phase or ground faults
Adjacent feeder faults
Downstream feeder faults
Broken conductor faults
The faults or evolving faults are applied depending on the requirements of the
tested logic scheme.

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Getting results

Some of the logic schemes apply to the relay under test abnormal system
conditions such as:

inrush load current


overvoltage

How should be tested

TEST METHODS
The testing of distribution feeder relays with built-in logic schemes can be
performed in several different ways
USING FIXED INPUT STATUS
In this mode the testing of relays is performed with their inputs energized
constantly and not synchronized with the test equipment. This approach can be
used for testing of very simple relay functions. It does not adequately represent the
dynamics of real life events and has very limited application for testing of modern
microprocessor based transmission line protection relays.
Using this method the test engineer or technician can test just a simple scheme,
For example:
if a Feeder Blocking scheme is tested,
the breaker status monitoring input of the test object will be continuously
energized. The Blocking input is energized as well. When the fault currents and
voltages are applied by the test device, this should result in non-operation of the
tested scheme, since the overcurrent element is blocked.
It is obvious that this method can not be used for testing of more advanced logic
schemes, such as Evolving Fault or Current Transformer Supervision.

USING SYNCHRONIZED INPUT STATUS


In this mode the testing of relays is performed with their inputs energized as
required by the dynamics of the simulated power system conditions and substation
environment. It is considered as dynamic simulation, with multiple steps, each of
which represents a different state-pre-fault, multiple fault and post-fault conditions.
This mode requires advanced test equipment that can be programmed to change
the status of its analog and binary outputs, thus simulating not only changes of
voltages and currents, but also breaker and other equipment status. The capability
to change states as a result of test object operation is also necessary for the
development and execution of test procedures for the testing of advanced logic
schemes.
This approach can be used for testing of very complicated relay functions. It allows
for an adequate representation of the dynamics of real life events and can be used
for advanced testing of modern microprocessor based transmission line protection
relays.

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OMICRON DLogicPro

For example:
using this method the test engineer or technician can test not only a simple Feeder Blocking
scheme, but also more advanced logic schemes, such as Fuse Saving scheme. In this case
the simulation will include multiple steps including successful or unsuccessful autoreclosing.

How the tests are performed

The fundamental requirement in the DLogicPro software is ease of use. The goal is to
achieve maximum results with a minimum effort. That is why, the test configuration and
execution efforts in most cases are limited to a point-and-click action.

The testing of logic schemes should be performed in a way that as closely as


possible matches real life power system conditions. The sequence of steps in a
test is different as a function of the requirements for the specific scheme and
system condition.

For example, if the test is for a Feeder Blocking scheme and the test conditions
are downstream feeder fault, the sequence will include only three steps:

pre-fault with breaker in a closed position, nominal voltage and normal load
current conditions

downstream feeder fault currents and voltages


blocking signal received post fault condition with breaker closed, nominal
voltage and load current.

If a more complex scheme is tested, the number of steps will increase


accordingly. For example if Fuse Saving scheme is tested, the test will have to
include the following steps:

pre-fault with breaker in a closed position, nominal voltage and normal load
current conditions

initial fault condition with a single-phase-to-ground fault in the forward


direction

breaker trip based on relay operation


autoreclose dead time with breaker open and no load current
breaker closed onto a (unsuccessful reclosing)
fault clear by fuse operation
post-fault with breaker-failure closed, nominal voltage and load current
The CMC Test Device is used to simulate both the analog and the digital signals
received by the relay in the field.
The CMC inputs are used to monitor the operation of different relay elements as
required by the scheme under test.

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To simplify the testing, the current and voltage levels are limited within the output range of
the basic CMC module (no amplifiers are required). This way there is no need for the user to
define the requirements for the CMC.

Getting results

Test results analysis


The results from each test performed are automatically analyzed by the DLogicPro
software. The analysis is based on an expert system comparing the operating time
of a combination of monitored protection elements that have picked-up during the
test.
The operating time of the monitored protection elements is defined based on the
protective relay manufacturer's technical specifications.
The results are displayed in a graphical format in the user interface and in detail in
the automatically generated test report.

Preparation for testing

OVERVIEW
As mentioned earlier, the goal of the DLogicPro software is to allow the testing of logic
schemes and comparing the performance of different relays under identical test conditions.

During the testing of the previously listed schemes all basic and ground
overcurrent settings remain the same. The only changes made are in the logic
scheme selected for each individual subgroup of tests and the relay settings
specific to the scheme under test.
The fault currents and voltages are calculated based on a simple network model,
and user defined current pickup settings.
The following sections in this chapter describe the network model used for the
calculation of the fault currents and voltages and the settings of the test object
corresponding to this model.
Since the software has test and training modes of operation, the global test data is
entered by the user only if one of the two test mode options has been selected.
NETWORK MODEL
Since we are testing a distribution feeder relay, the network model used for
calculation of short circuit currents and voltages for a different fault is a steady
state single source fault analysis model ( Figure 0-1, page -15 ).

Substation A
7.5 miles
Type Delta
0.833 omhs/mile

12 kV

Figure 0-1:

Test System Model

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OMICRON DLogicPro

A 12 kV, 7.5 miles long line with delta configuration is used in the default model.
The system is homogenous (i.e. source and line impedances have the same
angle) and the Source to Line Impedance Ratio is SIR = 1.
The line impedance is 0.833 primary ohms per mile. The default line impedance
angle is 75 deg.
The zero sequence impedance is 3.33 primary ohms per mile. The line zero
sequence impedance angle is 75 deg.
The zero sequence to positive sequence impedance ratio is 4 and the zero
sequence compensation factor KL

KL = (Z0 - Z1) / 3Z1 = (3.33 - 0.833) / 2.49 = 1.0

LINE AND SOURCE IMPEDANCES

ZL primary = ZLp = 0.833 x 7.5 = 6.25 ohm


Z0L primary = Z0Lp = 3.33 x 7.5 = 25 ohms

If the rated current of the distribution feeder relay under test is 5 amperes, it is
assumed that the CT ratio setting is

CT ratio = CTR = 1000/5 = 200


If the rated current of the feeder relay under test is 1 ampere, it is assumed that the
CT ratio setting is

CT ratio = CTR = 200/1 = 200


It is assumed that the rated voltage of the distance relay is 120 V phase-to-phase
and the VT ratio setting is

VT ratio = VTR = 100/1 = 100


Based on these CT and VT settings the secondary impedance is calculated using

CTR / VTR = 200/100 = 2.0

ZL secondary = ZLs = 2 x 6.25 = 12.5 ohms


Z0L secondary = Z0Ls = 2 x 25.00 = 50.0 ohms

16

Getting results

Because the source to line impedance ratio is 1, the source impedance in the
network model will have the same values, i.e.

ZS = 12.5 ohms

The source angle is 75 deg (default homogeneous system) and the K-factor

KS = 1.0

FAULT TYPE AND FAULT LOCATIONS


Three-phase-to-ground faults or single-phase-to-ground faults are simulated at
different locations along the model distribution system depending on the logic
scheme under test.
TEST MODE
Constant Source Impedance test mode is selected for all tests.
The fault incidence angle is 75 deg.
HARDWARE REQUIREMETS
The hardware requirements are different for the different logic schemes. However,
the system network model and fault locations selected result in fault currents and
voltages that are within the range of 12.5 A, i.e. there is no need for amplifiers.
This simplifies the hardware configuration requirements for the testing.

Three phase voltages and currents are required from the CMC to the relay under
test. Some distribution relays and schemes require currents only.
A different number of binary outputs of the CMC are programmed to simulate the
relay environment as a function of the scheme under testing.
A different number of binary inputs of the CMC are programmed to monitor the
relay operation as a function of the scheme under testing.
TEST OBJECT SETTINGS
The expected basic settings of the multifunctional relay under test associated with
the distribution feeder schemes are given below.

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OMICRON DLogicPro

Low Set Overcurrent:

Phase

I pickup = 5.5 (secondary amps)


Time delay = 0.3 sec

Ground

I pickup = 1.5 (secondary amps)


Time delay = 0.3 sec

The characteristic should be selected as Definite Time delay

Note: It is assumed that the inverse time characteristics have been tested as part of testing
of basic protection functions

High Set Overcurrent:

Phase

I pickup = 6.5 (secondary amps)


Time delay = 0.1 sec

Ground

I pickup = 2.5 (secondary amps)


Time delay = 0.1 sec

The zero sequence compensation factor K0 = 1 at angle 0 deg


The time delay for Zone 2 is 200 milliseconds.

18

Getting results

Instantaneous Overcurrent:

Phase

I pickup = 7.5 (secondary amps)


Time delay = 0.0 sec

Ground

I pickup = 3.5 (secondary amps)


Time delay = 0.0 sec

Logic Scheme Selected:


This is the only setting that changes between the different logic schemes groups of
tests.
Depending on the technical specifications of the test object (a multifunctional
distribution feeder line protection relay), this setting can be one of the following
typical Feeder Protection schemes:

Cold Load Pickup scheme


Feeder Blocking scheme
Sympathetic Trip Logic scheme
Broken Conductor Detection scheme
Selective Overcurrent Logic scheme
Distribution Bus Protection (Incomer) scheme
Backup Selective Tripping scheme
Breaker Failure Protection scheme
Switch-Onto-Fault scheme
Voltage Transformer Supervision scheme
Current Transformer Supervision scheme
Fuse Saving Logic scheme
Block Reclosing scheme

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OMICRON DLogicPro

STEPS IN TESTING
Modern multifunctional distribution feeder protection relays are very complex
devices that require during testing adequate simulation of their operating
environment, to ensure that they will perform correctly when installed in the field.
There is a sequence of steps related to the testing of electromechanical, solid
state or microprocessor based relays using different logic schemes for improved
fault clearing. They depend on the goals of the test and the level of knowledge of
the relay under test and it's operating principles

Some of the steps are performed before the actual testing:

Learn About the Main Principles of the Test Object


The user has to become familiar with the principles of operation of the test object
(in this case a distribution feeder relay with preprogrammed logic schemes) and
the sequence of events that result in an operation or non-operation. This
information is usually available in the users manual of the tested relay. It will help
to understand the results from the tests and their variation (if any) from the typical
schemes used.

Learn About the Principles in the Test Sequences


The DLogicPro software is based on the common industry understanding of logic
schemes and some assumptions on the interface between the relay and the power
system environment. The user has to become familiar with the basic principles
implemented in the development of the test sequences.

This information is available in the DLogicPro users manual and in an


animated form in the DLogicPro software.

If the user is familiar with the principles of the distribution feeder relay under
test and the DLogicPro software, he/she can proceed with the actual testing
process.

For testing of the logic schemes of a new to the utility feeder relay, the user
should follow the step-by-step procedure described in Multiple Scheme Test
Mode.

To test a specific logic scheme, the steps required are described in Single
Logic Scheme Mode.

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Steps in testing

Determine the Correct Timer Settings


Logic schemes have different timer settings that significantly affect the test object
performance.

The user has to select the appropriate settings for each logic scheme.
Analyze the Test Results
If the automatic analyses of the Test results indicates that some tests have failed,
the user should check the required wiring, relay operating times, relay settings,
relay logic diagrams, etc., to determine the reasons for the specific test failure.

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OMICRON DLogicPro

GETTING RESULTS IN ANIMATION MODE


When the test technician or engineer wants to become familiar with the principles
of logic schemes included in the DLogicPro software, he can use the software in
the Animation Mode. The Sympathetic Trip Scheme is used as an example later in
the text.
The Hardware Requirements for this test and the objectives of each test executed
by the software are also necessary to be checked.
To achieve this task, the following steps should be performed:

Start Animation Mode

1. Start the DLogicPro software by double clicking on the icon.


2. The splash screen will appear while the software is loading ( Figure 1-1,
page -22 ).

Figure 1-1:

DLogicPro software splash screen

3. The Main Selection window ( Figure 1-2, page -23 ) opens.

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Getting Results in Animation Mode

The Main Selection window is the primary tool of the graphical user interface for
navigation through the software and for selection of the mode of operation.It
changes dynamically depending on the user's actions.
In this case it will be used to select the Sympathetic Trip scheme and review the
Principles of Operation, Hardware Requirements and Test Objectives.

Figure 1-2:

Main Selection window

At this stage it is not required to have a CMC test device connected to the
computer for the software to run.

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OMICRON DLogicPro

II

Select Logic Scheme

1. Click on the label Sympathetic Trip Scheme.


2. This will automatically open the Sympathetic Trip scheme control window. (
See also Figure 2-1, page - 24 )

Figure 2-1:

Sympathetic Trip scheme control window.

The individual scheme control window has multiple control buttons that can be
enabled or disabled depending on the actions of the user. Some of the control
buttons used for the graphical user interface can also be visible or invisible at
different times. This reduces the chances for an inappropriate action by the
DLogicPro software user.

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To explore the principles of the STL - Sympathetic trip:


3. Click on the Sympathetic Trip Scheme to enable the Animation Mode of the
scheme control window.

Getting Results in Animation Mode

This action dynamically changes the scheme control window: ( See also Figure
2-2, page - 25 )

Figure 2-2:

Sympathetic trip scheme simplified logic diagram

4. The simplified logic diagram of a Sympathetic Trip scheme is displayed.


5. Three new control buttons appear in the window:

[Fault on own Feeder]


[Fault on adjacent Feeder]
[STL Block and Feeder Fault]
6. On the bottom of the window a LEGEND with the symbols used in the graphics
and animation is displayed ( See also Figure 2-3, page - 26 ).

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OMICRON DLogicPro

Figure 2-3:

Animation control and legend

7. The abbreviations used in the simplified logic diagram are:

IOC - Instantaneous Overcurrent


TOC - Time Overcurrent
STL - Sympathetic Trip Logic

III Set Animation Speed

Note: It is recommended
for users that do not have
experience in power system
or distribution line
protection, to start by
selecting the Slow speed
option.

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The animation speed is controlled by an additional control object in the scheme


control window. The default setting is Medium, which will be reset every time the
form window has been unloaded. Once the Speed is changed it will remain the
same for the next animation presentation.

Figure 3-1:

Animation speed control frame

The frame with the animation speed options will be enabled and it's label will turn
red when the animation mode is selected.
It includes three option buttons. Select a slow, medium or fast speed depending
on your knowledge of the specific scheme displayed ( Figure 3-1, page -26 ).

Getting Results in Animation Mode

IV

Start Animation

1. Click on one of the available animation control buttons bellow the label saying
Click bellow to start Animations .
For example, to watch the test sequence and relay operation for a Sympathetic
Trip Block followed by fault on own feeder, click on the [STL Block and Feeder
Fault].

During the animation each of the relay elements that are involved in the scheme
logic is displayed with a different color depending on it's status.
When an element picks-up, it's color will change from black to red, and when it
drops-out, the color will change back from red to black.
2. At the start of animation, a few additional changes occur:

A new [Pause] control button appears in the animation control frame (See
bottom of ( Figure 2-3, page -26 ). It allows the user at any moment to stop
the animation at the current state, so the current status of the simulation
and relay performance can be reviewed in detail. It changes to [Continue]
when clicked. If you want to proceed with the animation, click on
[Continue].

The status bar will display the name of the chosen fault scenario (See
bottom of ( Figure 4-1, page -27 ) and ( Figure 2-3, page -26 )

A progress bar ( Figure 2-3, page -26 ) will appear, showing the progress
of the animation

The Animated logic scheme Status Legend - 1.1 ( Figure 4-2, page -28 ),
will appear

The Animated logic scheme Status Legend - 1.2 ( Figure 4-3, page -28 ),
explains different stages of the process

Figure 4-1:

Animated logic scheme operation Legend - (detail)

The Animated logic scheme Status Legend ( See also Figure 4-2, page - 28 )
and ( Figure 4-3, page -28 ), which changes according to the animation, shows
the details at any moment of the process.
The Name of the state ( Figure 4-2, page -28 ) - the Pre-Fault condition is shown
in red, while the State number (State 1) and the State Time is displayed in white
when it is a non-fault state or in red, when it is a fault state ( Figure 4-3, page -28 )

27

OMICRON DLogicPro

The Legend has three parts, each one showing:

The number of the State (sub processes) of the main process


A descriptive name of each State of the main process
Time of start of each State since the fault inception in ms. Pre-fault time in
this case is a negative number

Figure 4-2:

Animated logic scheme Status Legend - 1.1

Figure 4-3:

Animated Status Legend - 1.2 (in different moment of the process)

3. A second timer to the right of the progress bar displays the current simulation
time since the fault inception ( See also Figure 4-4, page - 28 )

Figure 4-4:

Animated simulation timer

4. To stop the animation at any time, click on [Clear].


5. To return to the Main Selection window, click on [Main].

V View Test Objective

1. To view the objective of the test included in the DLogicPro software, click on
[Test Objective].

28

2. The logic scheme control window will change as shown on ( Figure 5-1,
page -29 ).

Getting Results in Animation Mode

Figure 5-1:

Test objectives for a Sympathetic Trip scheme

3. In this case, there are two definition blocks:

The first one displays the general objective of the tests


The second one displays what tests are performed and the expected relay
behavior

VI View Hardware Requirements

1. To view the Hardware Requirement click on [Hardware Requirements].


2. The logic scheme control window will change as shown on ( Figure 6-1,
page -30 )

the required analog signals


the required binary signals
the wiring between the test device and the test object
the need for an external DC source

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OMICRON DLogicPro

Figure 6-1:

Hardware Requirements for Sympathetic Trip scheme tests

Note: In the cases when the voltage signals are optional, the wiring between the test object
and the test device is shown in grey.

VII Print Options

There are several options to print the information related to the distribution logic
scheme under consideration.

To Print:
1. Click on the Print option in the menu bar on top of the Scheme Control window
2. Select the information to be printed
3. The Print dialog box will appear, allowing the user to specify a printer, if
necessary.

The following options for printing ( See also Figure 7-1, page - 31 ) are available:
1. the Scheme Logic as displayed during the animation
2. the Test Objective
3. the Hardware Requirements for the selected scheme
4. the complete Scheme Documentation (all options offered above) for the
selected scheme

30

Getting Results in Animation Mode

Figure 7-1:

Sympathetic Trip - Print Options menu

VIII Return to the Main Selection window

To return to the Main Selection window, click on [Main].

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OMICRON DLogicPro

GETTING RESULTS

IN

MULTIPLE TEST MODE

The goal of the test is usually a benchmark test of the logic schemes of a new to the utility
distribution feeder relay.

To perform such a test, the user should follow the step-by-step procedure
described below.

Set the Distribution Feeder Relay

Enter the required settings described in section Preparing the Test.

Note: It is recommended to set all available setting groups with different logic schemes,
especially the Fuse Saving scheme and the Autoreclosing Block scheme, and then during
the test to switch between the setting groups as required by the test selected.
Check the required time settings for each scheme in the protection users manual.

II Prepare the Hardware

1. Wire the Test Object (distribution feeder relay), DC power supply (if necessary)
and the Test Device (CMC x56) according to the diagrams shown in Hardware
Requirements for each of the individual schemes.
2. Connect the parallel cable between the Test Device and the Test Computer
with D-LogicPro installed.

Note: Check if the relay uses 52a or 52b breaker status contacts. LogicPro simulates
52a breaker status.

III Start DLogicPro

1. Start the DLogicPro software by double clicking on the icon.


2. The splash screen will appear while the software is loading ( See Figure 1-1,
page - 22 )
3. The Main Selection window ( Figure 1-2, page -23 ) opens.

32

Getting Results in Multiple Test Mode

The Main Selection window is the primary tool of the graphical user interface for
navigation through the software and for selection of the mode of operation.It
changes dynamically depending on the user's actions.

IV Change Test Settings (optional)

The analysis of the distribution feeder relay performance during the test is based
on the expected operating times of tested relay elements under different fault
conditions.
The software is loaded using some default settings. However, if the user needs to
change them based on the technical specifications of the distribution feeder relay
under test, the default setting can be changed using the following steps:

To change the Default Time Settings:


1. Click on the Settings menu in the menu bar on top of the Main Selection
window.
2. Click on Time Test Settings... ( See also Figure 4-1, page - 33 )
3. Review and change if necessary the operating times in the Change Settings
window displayed in ( Figure 4-2, page -34 )
4. To apply the New Settings - press [Apply]
5. To return the Default Settings - press [Default]
6. To Cancel and Exit the window with the restored Default settings - Press
[Cancel]
7. To Exit the window with the entered Settings - Press [OK]

Note: The default times for Instantaneous overcurrent (IOC) (50 ms) and Time overcurrent
(TOC) (250 ms) faults, include a margin of 50 ms, i.e. IOC is set as instantaneous, while
TOC is set with definite time delay of 200 ms.
The time overcurrent element should be set with definite time delay characteristic. It is
assured that the inverse time characteristics have been already tested using different
testing tools.

Figure 4-1:

Settings - Menu options

33

OMICRON DLogicPro

Figure 4-2:

Change Time Test Settings.... window

The testing of Fuse saving scheme and the Block reclosing scheme, simulates a
single reclosing shot for some of the tests. The default dead time for the reclosing
shot is 300 ms.

The simulation of inrush condition after closing of the distribution feeder breaker is
based on the Cold Load Pickup time setting (CLP Time), with default value of 100
ms.

To change the Default Nominal Values (Voltage or Frequency) Settings:


1. Click on the Settings menu in the menu bar on top of the Main Selection
window.
2. Click on the Nominal Values... tab ( See also Figure 4-1, page - 33 )
3. Review and change if necessary the settings in the settings window
accordingly.

to change the frequency, click on one of the two option buttons.


to change the voltage, chose between phase voltage (Ph-N) or
phase-to-phase voltage (Ph-Ph).

to review or edit the Secondary Settings - Leave the SECONDARY option


checked ( See also Figure 4-3, page - 35 )

34

Getting Results in Multiple Test Mode

Figure 4-3:

Nominal Values (Voltage/Frequency) Secondary Settings window

to review or edit the Primary Settings - Select the PRIMARY option ( See
also Figure 4-4, page - 36 )

to review or edit CT Ratio and PT Ratio Settings - Select the PRIMARY

option. The window will display CT Ratio and PT Ratio options.


Note: All tests are performed based on the secondary values of the currents and voltages.

4. To apply the New Setting - press [Apply]


5. To return the Default Setting - press [Default]
6. To Cancel and Exit the window with restored Default Settings - Press [Cancel]
7. To Exit the window with the new entered Settings - Press [OK]

Note: The user has an option to select to enter the voltage values as Phase-to-Neutral
(default) or Phase-to-Phase.
Note: The default frequency setting is 60 Hz. When the user decides to change it for the
first time, the software will ask, whether to leave it as a new default.

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OMICRON DLogicPro

Figure 4-4:

Nominal Values (Voltage/Frequency) Primary Settings window

If PRIMARY Settings are displayed - the Secondary Settings will be disabled and
grayed out.
Changes in the Primary Currents and Voltages are automatically reflected in the
Secondary. When the [Apply] button is pressed - the program will apply the
settings and automatically will recalculate the SECONDARY Settings and display
the changes based on modification in the CT or PT ratio.
The Nominal Values Settings window ( See also Figure 4-3, page - 35 ) displays
the Secondary Settings for the currents and voltages as default.

To change the Default Overcurrent Settings:


1. Click on the Settings menu in the menu bar on top of the Main Selection
window.
2. Click on Overcurrent... ( See also Figure 4-1, page - 33 )
3. Review and change if necessary the settings in the settings window
accordingly. ( See also Figure 4-5, page - 37 )

36

Getting Results in Multiple Test Mode

Figure 4-5:

Overcurrent Settings

Note: The phase and ground overcurrent settings are used to calculate the fault currents for
the different fault conditions required by the specific test being executed.

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OMICRON DLogicPro

To check the Faults Calculations:


1. Click on View in the menu in the Main Selection window.

Figure 4-6:

View Menu in Main Selection window

2. Then click on View Faults Calculations ( Figure 4-6, page -38 ).


The Faults Currents and Voltages window opens. The calculations are grayed out,
which shows that they can not be modified from here. The calculated Fault
Currents and Voltages for Feeder Fault -(Single Phase-to-Ground and 3 Phase
Faults), appear at the top of the window.( See also Figure 4-7, page - 38 )

Figure 4-7:

Fault Currents and Voltages window - top

The calculated Fault Currents and Voltages for Feeder End Fault -(Single Phase
and 3 Phase Faults), appear at the bottom of the window ( See also Figure 4-8,
page - 39 ). The Vnom, Line Impedance and Source Impedance used for the
calculations, are also displayed.

38

The Settings are directly accessible from here, and when clicked, the Settings
options window will appear on the top of the current window.

Getting Results in Multiple Test Mode

The changes made in the settings will be automatically reflected in the calculations
of the Fault Currents and Voltages.

Figure 4-8:

Fault Currents and Voltages window - bottom

Note: The voltages are calculate based on the single source model described earlier.
The fault currents are calculated as 1.1 x I set of the instantaneous, high or low set
overcurrent element.
Note: For single-phase-to-ground faults the current in the healthy phases is calculated as
0.1 x I nom.

V Scheme Selection

To select individual schemes to be automatically tested


1. in the Multiple Test Mode, in the Main Selection window ( Figure 5-1,
page -40 ) click on the Check Box controls next to the name of the available
schemes.
Before a selection is made, the [Start Test] command button is disabled.

39

OMICRON DLogicPro

Figure 5-1:

Main Selection window

As soon as the user clicks on any of the Check Boxes, the Main Selection window
changes as shown in ( Figure 5-2, page -41 ).

40

Getting Results in Multiple Test Mode

Figure 5-2:

Main selection window in Multiple Scheme Test Mode

Several changes occur as a result of the selection of at least one


logic scheme:

Based on the selected logic schemes the software displays Test Boxes with
the test cases associated with each selected scheme on the left side of the
schemess Check Boxes. Each individual test case can be un-selected by
clicking its check box. ( See also Figure 5-2, page - 41 ).

The [Start Test] command button is enabled


A Test Details window to display the status of the currently executed test
with a legend underneath, appears on the right side of the Test Selection
frame.

When all tests have been completed, the Test Details window will display
the test summary.
If a mistake is made in the selection process:
1.

Click again on the same Check Box to select or un-select it.

2. Another option is to click on [Clear] at the bottom of the window, that will result
in displaying the default value.

To exit the software at any time, just click on [Exit]

41

OMICRON DLogicPro

VI Start Multiple Test

To start the test, click on [Start Test]

VII

Turn on the CMC

1. As soon as the [Start Test] is clicked, a Message Box ( See also Figure 7-1,
page - 42 ) will appear before the beginning of the test asking the test engineer
or technician to check if the CMC is on.

If the CMC is on, just click [Yes]. Otherwise turn on the CMC and then click
[Yes], so that the tests may be performed.

The second option is to select [No], which will disable the [Start Test]
button and reset the selected test cases.

Figure 7-1:

CMC On - Off

2. After the CMC is turned On, it is initialized and starts the preprogrammed and
selected tests execution.

42

Getting Results in Multiple Test Mode

VIII Change Logic Scheme Setting

1. Before the execution of each group of tests associated with a specific logic
scheme, the user is reminded by the software ( Figure 8-1, page -43 ) to
enable the logic scheme setting of the distribution feeder protection relay to
match the expected by the test scheme.

Figure 8-1:

Enable logic scheme

2. If the scheme has already been enabled or after the change, proceed by
clicking on the [OK] command button.

IX Tests Execution

1. The running test will display a flashing yellow background. At the same time to
the right of the selected test cases a small screen TEST Status will show a
brief description of each test.
Note: Before the execution of an individual test the background of the Test Box is white.

2. Immediately after each individual test is completed, the result is analyzed and
the background of the Test Box changes color.

If the relay operated as expected, the test is [OK] and the background turns
green.

If there is any out of range operation the test fails and the Test Box
background turns red.
After the completion of all tests the results are visible as the background color of
the Test Boxes.

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OMICRON DLogicPro

If the Multiple Schemes test is successful, the background of all Test Boxes should
be green.

Figure 9-1:

Test Results window

The Test Details window at the same time displays a message All tests are OK
( See Figure 9-1, page - 44 )
If even one test has failed, the Test Details window displays a different message. It
advises the user to check the relay logic, settings, etc., and the test objectives, and
results in the Test report.
3. If necessary, the test engineer can preview the Test report, print it and save it
as a file.
4. After all tests have been executed, the [Print Report] button in the Main
Selection window is enabled so that the test report can be previewed and/or
printed.
5. When the Print Report button is checked the Data Entry form is displayed as
well.

44

Getting Results in Multiple Test Mode

Enter General Test Data

1. Before the test results are previewed or printed, the user is asked to fill in the
generic data for the test report.

Some of the entries are required and are supposed to be entered in the
white fields.

The rest of the fields are optional and have gray background, as shown on
( Figure 10-1, page -45 ).

The software will keep the entered information for a specific field, if the
Check Box in front of the field is checked.

As a default all Check Boxes are checked.

Figure 10-1: Global Data Entry form

45

OMICRON DLogicPro

Figure 10-2: Global Data Entry form - detail

The software allows the user to save as a file for further use the most
frequently used information, (as shown in the detail ( Figure 10-2,
page -46 )
2. When [Close] is pushed a message will appear, warning that the data related
to the completed tests will be lost.

XI Review Detailed Test Results

The measured operating times, the monitored protection functions for each
individual test are stored in the memory of the computer and are available in the
test report.
1. To preview these detailed test results, click the [Preview Report] command
button in the Data Entry form.
2. As a result, the Test Report window shown in ( Figure 11-1, page -47 ) and (
Figure 11-2, page -47 ) is displayed. You can scroll through the report as
necessary.

46

Getting Results in Multiple Test Mode

Figure 11-1:

Preview General Data in the Test Report window

Figure 11-2: Preview report results in the Test Report window

47

OMICRON DLogicPro

XII Save Tests Results

1. Click on [Save As File] in the Data Entry window ( See also Figure 10-1,
page - 45 )
2. The Save As window will open allowing the user to choose a directory and file
format.
3. Unless changed, the File will be saved as Rich Text Format.

XIII Print Test Results

To print the results from the Multiple Test, click the [Print Report] in the Data
Entry form ( Figure 10-1, page -45 ). The Print dialog box is displayed, allowing
the user to specify a printer, if necessary.

XIV End Test

To end the Multiple Test procedure:


1. Click on [Close]. This will take you back to the Main Selection window.
2. Click on[Exit] in the Main Selection window

XV Help

OMICRON DLogicPro software offers brief on-line explanations for the major tasks
to be performed. The Help Topics are accessible only through the Menu in the
Main Selection window. To see the different topics, click on DLogicPro Help
Topics... ( See also Figure 15-1, page - 49 )

48

Getting Results in Multiple Test Mode

Figure 15-1:

Help Options under the Menu in the Main Selection window

The help window opens with brief overview of the software, displayed in the front
page. ( See also Figure 15-2, page - 49 ).

Figure 15-2:

DLogicPro Help window displayed

49

OMICRON DLogicPro

To view the available Help Topics, click on HelpTopics in the menu of the Help
window. ( See also Figure 15-3, page - 50 )

Figure 15-3: DLogicPro Help Topics

The full topic, or a selection of the content of the topic, can be printed from that
window as well. Some of the topics include additional sub topics with detailed
instructions as follows.
The Animation Mode offers:

Overview
Animation Scheme
Animation Controls
Animation Speed
The Test Mode offers:

Overview
Fault Currents/Voltages
Select Test Cases
Start Selected Tests
The Settings offer:

Overcurrent Settings
Time Test Settings
Nominal Values Settings

50

Getting Results in Multiple Test Mode

The Printing Options offer:

Overview
Data Entry
Print Preview
Print Test Results
When a specific topic is selected and displayed, its name is shown on the top of
the Help window and appears disabled in the HelpTopics menu. ( See also
Figure 15-4, page - 51 ).

Figure 15-4: Help Topics -detail

51

OMICRON DLogicPro

GETTING RESULTS IN SCHEME TEST MODE

The goal is to test a single logic scheme of a distribution feeder relay.

To perform such a test, the user should follow the step-by-step procedure
described below.
To achieve this task, the following steps should be performed:
.

Set the Distribution Feeder Relay

Enter the required settings described in section Preparing the Test

II Prepare the Hardware

1. Wire the Test Object (distribution feeder relay), DC power supply (if necessary)
and the Test Device (CMC x56) according to the diagrams shown in Hardware
Requirements for the communication aided scheme to be tested.
2. Connect the parallel cable between the Test Device and the Test Computer
with DLogicPro installed.

52

Note: Check if the relay uses 52a or 52b breaker status contacts. DLogicPro simulates
52a breaker status only.
Note: In the cases when the voltage signals are optional, the wiring between the test object
device is shown in grey.

Since a single scheme is tested, use the Hardware Requirements for the selected
scheme.

Getting Results in Scheme Test Mode

III Start DLogicPro

1. Start the DLogicPro software by double clicking on the icon.


2. The splash screen will appear while the software is loading ( See also Figure
1-1, page - 22 )
3. The Main Selection window ( Figure 5-1, page -40 ) opens.
The Main Selection window is the primary tool of the graphical user interface for
navigation through the software and for selection of the mode of operation.It
changes dynamically depending on the user's actions.

IV Change Test Settings (optional)

The analysis of the distribution feeder relay performance during the Single
Scheme test is based on the expected operating times under different fault
conditions.
The software is loaded using some default settings. However, if the user needs to
change them based on the technical specifications of the distribution feeder relay
under test, the default setting can be changed using the steps described in the
Multiple schemes test chapter ( See also Figure 4-1, page - 33 )
( See also Figure 4-2, page - 34 )
( See also Nominal Values (Voltage/Frequency) Secondary Settings window ,
page -35 )
( See also Nominal Values (Voltage/Frequency) Primary Settings window ,
page -36 )
( See also Overcurrent Settings , page -37 )

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OMICRON DLogicPro

V Scheme Selection

1. To select individual schemes to be automatically tested in the Scheme Test


Mode, in the Main Selection window ( Figure 5-1, page -54 ) click on the
scheme name to select one of the available schemes.

Figure 5-1:

Main Selection window

2. The [Start Test] button remains disabled, when the check boxes are
unchecked.
3. As soon as you click on one of the Scheme Name Box, the Individual Scheme
Control Window will open as shown in ( Figure 5-2, page -55 ).

54

Getting Results in Scheme Test Mode

Figure 5-2:

Sympathetic Trip scheme individual control window.

4. If you want to return to the Main Selection window at any time, just click on
[Main]
.

VI Start Scheme Test

DLogicPro allows the user to select from the available tests before starting the
tests execution.Click on [Select Test Case] in the Test Options frame to Start Test
Procedures.
Several changes occur in the Scheme Control Window as a result
of the Select Test Case action:
1. Based on the selected distribution feeder protection logic scheme the software
displays several Test Boxes with the test cases associated with the selected
scheme, on the left side of the graphical display window in a Test Options
frame. Each individual test case can be unselected by clicking its own check

55

OMICRON DLogicPro

box. ( See also Figure 6-2, page - 56 ).


2. The hardware requirements are displayed in the graphical window. Voltages
are shown in grey when optional.
3. A Test Status window with a legend underneath, appears on the right side of
the graphical window.
4. The [Select Test Case] is disabled
5. A [Start Test] button appears
6. The Fault Currents and Voltages for the first selected test case are displayed
on the top of the window ( Figure 6-1, page -56 )

Figure 6-1:

Faults Currents and Voltages for the first selected test case

Figure 6-2:

Scheme Mode Control Window before test execution

To continue with the tests execution, in the Test Options frame:

If necessary, unselect a test case to prevent its execution (all Test Cases are
selected as default).

Click on [Start Test] to Start Selected Tests.

56

Getting Results in Scheme Test Mode

VII

Turn on the CMC

1. As soon as [Start Test] is clicked, a Message Box ( Figure 7-1, page -57 ) will
appear before the beginning of the test asking the test engineer or technician
to turn the CMC On.

If the CMC is on, just click [Yes]. Otherwise turn on the CMC and then click
[Yes], so that the tests may be performed.

The second option is to select [No], which will disable the [Start Test]
button and reset the selected test cases.

Figure 7-1:

CMC On - Off

2. The CMC is initialized and starts the preprogrammed tests execution.

VIII Change Communication Scheme Setting

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OMICRON DLogicPro

1. Before the execution of the selected test cases associated with the selected
logic scheme, the user is reminded by the software ( Figure 8-1, page -58 ) to
enable the logic scheme of the distribution feeder protection relay to match
the expected by the test scheme.

Figure 8-1:

Change logic scheme settings

2. After the change of the scheme setting, proceed by clicking on OK

IX Tests Execution

1. The running test will display a flashing yellow background.

Note: Before the execution of an individual test the background of the Test
Box is white.

2. Immediately after each individual test is completed, the result is analyzed and
the background of the Test Box changes color.

If the relay operated as expected, the test is OK and the background turns
green.

If there is any out of range operation the test fails and the Test Box
background turns red.
After the completion of all tests the results are visible as the background color of
the Test Boxes. If the scheme test is successful, the background of all Test Boxes
should be green.

58

Getting Results in Scheme Test Mode

Figure 9-1:

Test Results window

The Test Details window at the same time displays a message All tests are OK
( See Figure 9-1, page - 59 ).
If even one test has failed, the Test Details window displays a different message.
It advises the user to check the relay logic, settings, etc., the test objectives, and
results in the Test report.
3. If necessary, the test engineer can preview the Test report, print it and save it
as a file.
4. After all tests have been executed, the [Print Report] in the Main Selection
window is enabled so that the test report can be previewed and/or printed,
5. When the [Print Report] button is pushed the General Data Entry form is
displayed as well.

Enter General Test Data

59

OMICRON DLogicPro

1. Before the test results are previewed or printed, the user is asked to fill in the
generic data for the test report.

Some of the entries are required and are supposed to be entered in the
white fields.

The rest of the fields are optional and have gray background as shown on (
Figure 10-1, page -60 ).

The software will keep the entered information for a specific field, if the
Check Box in front of the field is checked.

As a default all Check Boxes are checked.

Figure 10-1:

Global Data Entry form

2. If [Close] is pushed a message will appear, warning that the data related to the
completed tests will be lost.

The most frequently used data can be saved for future use, by clicking the [Save
General Report Data] in the Data Entry form. ( Figure 10-2, page -46 )

XI Review Detailed Test Results

60

Getting Results in Scheme Test Mode

The measured operating times of each individual test are stored in the memory of
the computer and are available in the test report.
1. To preview these detailed test results, click on [Preview Report] in the Data
Entry form.

2. As a result, the Data Entry window shown in ( Figure 11-1, page -61 ) and (
Figure 11-2, page -62 ) is displayed. You can scroll through the report as
necessary.

Figure 11-1:

Preview General Data in Test Report window

61

OMICRON DLogicPro

Figure 11-2:

Preview test results in the Test Report window

XII Save Tests Results

1. Click on [Save As File] button in the Data Entry window ( See Figure 10-1,
page - 60 )
2. The Save As window will open allowing the user to chose directory and file
format.
3. Unless changed, the File will be saved as Rich Text Format.

XIII Print Test Results

62

To print the results from the test, click [Print Report] in the Data Entry form on (
Figure 10-1, page -60 ). The print dialog box is displayed, allowing the user to
specify a printer, if necessary.

Getting Results in Scheme Test Mode

XIV End Test

To end the Scheme Test procedure:


1. Click on [Close]. This will take you back to the Scheme Mode Control window
2. Click on [Main] in the Scheme Mode Control window. This will take you back to
the Main Selection window
3. Click on [Exit] in the Main Selection window

XV Help

OMICRON DLogicPro software offers brief on-line explanations for the major
tasks to be performed. The Help Topics are accessible only through the Menu in
the Main Selection window.

Figure 15-1: Help Options under the Menu in the Main Selection window

To open the Help window with the available help topics, click on [DLogicPro Help
Topics.... ( See also Figure 15-1, page - 63 ).
To check the different Help Topics, click on HelpTopics in the menu of the help
window.( See also Figure 15-2, page - 64 ).

63

OMICRON DLogicPro

Figure 15-2: DLogicPro Help Topics

The full topic, or a selection of the content of the topic, can be printed from that
window as well.

64

Cold Load Pickup

COLD LOAD PICKUP


Objective

The objective is to perform dynamic tests to evaluate the Cold Load Pickup logic
scheme of a distribution feeder relay, as a function of the conditions during line
energization, fault condition or combination of the two.
The Test Object is a multifunctional distribution feeder relay with CLP scheme.
The distribution system conditions and the breaker status signal are simulated by
the CMC.

CLP Logic Description


(CLP - Cold Load Pickup Logic)
Distribution feeders are typically protected by phase and ground overcurrent
elements with instantaneous, definite time delayed or inverse time characteristics.
The low set time delayed elements are used to provide overload protection or
protection for line end faults, while the instantaneous elements should provide
high-speed fault clearing for close-in faults.
The pickup settings of the low set elements are defined by the loading of the
distribution feeder and the levels of the minimum fault currents for faults at the end
of the protected feeder.
When a feeder circuit breaker is closed in order to energize the line, depending on
the type of loads being fed, an inrush load condition results for a certain time in
current levels that may be quite higher than the normal load levels. This may lead
to an undesired operation of the low set overcurrent elements. The level of the
inrush load current and the duration of the inrush condition is a function of the type
of load being energized. It is very different between, for example, mostly motor
loads and heating loads. It should be know in order to appropriately set the relay. It
may also be affected by the duration of the load interruption before the closing of
the breaker.
That is why modern multifunctional distribution feeder relays are equipped with a
Cold Load Pick-up (CLP) logic.
This operating principle of the Cold Load Pick-up (CLP) logic is based on
monitoring of the status of the circuit breaker. When the breaker has been open for
a certain time, the logic will detect the line energization by the closing of the
auxiliary contact of the breaker (52a) and typically will block one or more
overcurrent protection elements for a user defined period of time.
After the time expires, the overcurrent elements are unblocked and can protect the
line in the cases of overload or low current fault conditions. The advantage of this
scheme is that the low set overcurrent elements are based not on the maximum

65

OMICRON DLogicPro

inrush load current, but on the magnitude of the maximum load current after the
inrush condition is over.
Another alternative for avoiding the operation of the low set overcurrent elements
during line energization is instead of blocking the overcurrent element to increase
the setting for a certain time. This provides improved sensitivity, because the
higher setting of the low set elements is typically still lower than the setting of the
high set instantaneous element.
The logic requires breaker status information. The typical breaker status
monitoring function in relays is based on a normally open (52a) auxiliary contact of
the breaker. Some relays may monitor a normally closed (52b) or both auxiliary
contacts (this provides more reliable breaker status indication).

Simplified diagram of the Cold Load Pickup logic is shown in ( Figure 0-1,
page -66 ).

Substation A

Load

IA
IB

IC

52A
Breaker
Closed

Timer
CLP

Trip

TOC
IOC

Figure 0-1:

Simplified Cold Load Pickup logic diagram

Fault Locations
Remote faults are simulated along the model distribution feeder with magnitudes
of the fault current that should result in the operation of the low set overcurrent
elements.

66

The fault locations are shown on ( Figure 0-2, page -67 )

Cold Load Pickup

Substation A

Load

IA

IB

IC

Relay
Figure 0-2:

Fault location for the testing of the CLP logic

Test Cases
The Cold Load Pickup Logic scheme is tested for the following fault conditions:
1. For Line energization: - the relay should not trip.
2. For Line energization with fault: - the relay should not trip after closing of the
breaker, but after the fault is applied.
3. For Line fault: the relay should trip.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

Note: If the relay uses a


52b breaker status contact,
it should not be wired.

A typical wiring diagram for the Cold Load Pickup logic test is shown on ( Figure
0-3, page -68 )
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A), and the currents and voltages during the pre-fault, fault and
post-fault stages of the simulation.
Since many distribution feeder protection relays are current relays only, the
voltage inputs might not be available. That is why even that voltage outputs are
controlled by the testing software, the wiring of the voltage outputs of the CMC to
the distribution feeder relay is optional.
The potential free binary output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.

67

OMICRON DLogicPro

IA
CM C

Analog
O utputs

IA

IB

IB

IC

IC

IN

Digital
Inputs

Figure 0-3:

O ut 1

Analog
Inputs

IN
VA
VB
VC
VN

VA
VB
VC
VN
Digital
O utputs

RELAY

+ DC

- DC

In 1

52a

Digital
Inputs

Trip

Relay
O utputs

Hardware wiring diagram for testing of the CLP logic.

The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time in
order to evaluate the correct operation of the Cold Load Pickup logic during the
test.

Automatic Test Sequence

The automatic test sequences for each test will have several different steps as
shown with animation in the DLogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Cold Load Pickup logic are given in the common section at the beginning of
this document.

68

The only setting that has to be added for this group of test cases is the enabling of
the Cold Load Pickup logic and the associated with it relay settings based on the
recommendations in the relay service manual.

Cold Load Pickup

One relay input has to be programmed as normally open (52a) breaker status
monitoring input.
One relay output should be programmed to provide Trip

Since there are specific details in the implementation of CLP logic in


different distribution feeder relays, they have to be considered during the
preparation for the testing based on the recommended settings in the users
manual for the test object

69

OMICRON DLogicPro

FEEDER BLOCKING SCHEME


Objective

The objective is to perform dynamic tests to evaluate the Feeder Blocking Scheme
of a distribution feeder relay, as a function of the fault location and receiving or not
receiving of a blocking signal from the downstream feeder relay.
The Test Object is a multifunctional distribution feeder relay with Feeder Blocking
Scheme available and enabled.

BF Logic Description
(BF - Feeder Blocking Scheme Logic)
In distribution systems multiple sections of a loop are connected and fed from a
single source. Depending on where the loop is opened, the coordination required
between the different relays protecting the different sections of the loop may result
in significant increase of the fault clearing time for certain faults closer to the
source. These long times represent a power quality problem and may affect the
customers fed by the circuit.
In an effort to speed-up the fault clearing time, utilities are implementing a Blocked
Overcurrent protection scheme. It requires exchange of control signals between
the relays protecting the distribution circuit, i.e. some form of communications
between the devices on the loop.
Blocked overcurrent protection involves the use of start indication from
downstream relays provided as a blocking input of upstream relays. The idea is to
allow identical current and time settings to be employed on each of the relays
involved in the scheme. The relay nearest to the fault does not receive a blocking
signal and will trip the appropriate switching device in order to clear the fault. Any
other relay further away from the fault and closer to the source will receive a
blocking signal and will not trip for a certain time, thus allowing the downstream
device to clear the fault.
The advantage of this type of scheme therefore is that it reduces the amount of
required grading stages and consequently the fault clearance times.
Each overcurrent element of the devices that implement a Blocked Overcurrent
Scheme has to be set with a certain time delay that allows the receiving of a
blocking signal from a downstream device. At the same time each device should
be able to communicate the starting of an overcurrent element that is used to block
an upstream device.
The above requirements are taken into consideration in the design of the module
for testing of the Feeder Blocking Scheme logic in modern distribution feeder
protection relays.

70

Feeder Blocking Scheme

Simplified diagram of the Feeder Blocking Scheme logic is shown in ( Figure 0-4,
page -71 ).

Substation A

Load

100

130

Trip

Trip
TOC
TOC
Start

AND

TOC
Trip

TOC Block

Figure 0-4:

Simplified Feeder Blocking logic diagram

Fault Locations
Faults are simulated at two locations along the model distribution line:

The fault locations are shown on ( Figure 0-5, page -71 )

Substation A

Iflt

Iflt

Relay

Relay

Figure 0-5:

Load

Fault location for the testing of the BF logic

1. Feeder fault at the end of the own protected section


2. Feeder fault at the beginning of the next section

Test Cases
The Feeder Blocking Scheme is tested for the following fault conditions:
1. For fault on own feeder: - the relay should trip.
2. For fault on next feeder: - the relay should not trip.

71

OMICRON DLogicPro

Hardware requirements
IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Out 1
Out 3

Digital
Inputs

Figure 0-6:

In 1

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN
Digital
Inputs

+ DC

- DC

52a

+ DC

- DC

TOCBlock

Trip

Relay
Outputs

Hardware wiring diagram for testing of the Feeder Blocking logic.

Note: If the relay uses a


52b breaker status contact,
it should not be wired.

The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Feeder Blocking Scheme logic test is shown on (
Figure 0-6, page -72 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A) and the Blocking signal received from the starting overcurrent
elements of the downstream protective relay.
The currents and voltages during the pre-fault, fault and post-fault stages of the
simulation are also provided by the CMC. However, the voltages are not required
for the testing of the scheme, since it is based on the operation of overcurrent
elements only. That is why they are shown in gray on the wiring diagram.
The potential free relay outputs of the CMC have one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.

72

Feeder Blocking Scheme

The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the correct operation of the Feeder Blocking Scheme logic during the
test.

Automatic Test Sequence

The automatic test sequences will have several different steps shown with
animation in the DLogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Feeder Blocking Scheme logic are given in the common section at the
beginning of this document.

The only setting that has to be changed for this group of test cases is the enabling
of the Feeder Blocking Scheme logic and the associated with it relay settings
based on the recommendations in the relay service manual. The time delay setting
should be sufficient to allow the starting element of the downstream relay to
operate and the opto input monitoring logic to detect it.
One relay input has to be programmed as a normally open (52a) breaker status
monitoring input. A second relay input should be programmed to monitor the
Blocking signal from the downstream protective device.
One relay output should be programmed to provide Trip signal monitored by the
CMC for the evaluation of the relay operation.

73

OMICRON DLogicPro

SYMPATHETIC TRIP
Objective

The objective is to perform dynamic test to evaluate the Sympathetic Trip scheme
of a distribution feeder relay, as a function of the fault location and receiving or not
receiving of a Sympathetic Trip blocking signal from the adjacent feeder relay.
The Test Object is a multifunctional distribution feeder relay with Sympathetic Trip
Scheme available and enabled.

SP Logic Description
(SP - Sympathetic Trip)
Distribution feeders are typically protected by phase and ground overcurrent
elements with instantaneous, definite time delayed or inverse time characteristics.
The low set time delayed elements are used to provide overload protection or
protection for line end faults, while the instantaneous elements should provide
high-speed fault clearing for close-in faults.
The pickup settings of the low set elements are defined by the loading of the
distribution feeder and the levels of the minimum fault currents for faults at the end
of the protected feeder.
The Cold-Load Pickup logic of the relays is designed to prevent the undesired
operation of the low set overcurrent elements during the inrush condition following
the closing of the feeder breaker. After the time expires, the overcurrent elements
are unblocked and can protect the line in the cases of overload or low current fault
conditions. The advantage of this scheme is that the low set overcurrent elements
are based not on the maximum inrush load current, but on the magnitude of the
maximum load current after the inrush condition is over.
However, there are certain cases when inrush current can flow through the relay
after the feeder has been in service for a while. For example, if a fault occurs on
any feeder connected to a distribution bus, it will take some time for the relay
protecting the feeder to detect the fault and the breaker to clear it. During that time
the distribution system is exposed to low voltage. When the breaker of the faulted
feeder trips, the voltage returns to its nominal level and many of the feeders may
experience an inrush, especially feeders with predominantly motor loads. This
condition may result in the operation of the overcurrent relays on healthy feeders.
To avoid such misoperation, advanced distribution feeder relays are equipped with
a Sympathetic Trip logic.
The principle of operation of this logic is based on the receiving of a blocking signal
from a distribution feeder relay that had detected and issued a trip signal for a fault
on the feeder it is protecting.

74

Sympathetic Trip

When the opto input of the relay on a healthy feeder is energized, it will block one
or more overcurrent protection elements for a user defined period of time. This
time should be longer than the expected inrush condition time. After the time
expires, the overcurrent elements are unblocked and can protect the line in the
cases of overload or low current fault conditions.
The logic requires a Sympathetic Trip blocking signal from a relay on an adjacent
faulted feeder.
The above requirements are taken into consideration in the design of the module
for testing of the Sympathetic Trip logic in modern transmission line protection
relays.

Simplified logic for the Sympathetic Trip scheme is shown in ( Figure 0-7,
page -75 ).

Substation A

IFdr1

Load

IFdr2
IFdr3
Trip

Fdr Prot.
STL Block

Timer
STL

TOC
IOC

Figure 0-7:

Simplified diagram for the Sympathetic Trip logic

Fault Locations
Faults are simulated at two location on the substation bus:
1. Fault on an adjacent line
2. Fault on the protected line

75

OMICRON DLogicPro

Substation A

IFdr1

Load

IFdr2
IFdr3
Relay
Relay

Figure 0-8:

Fault locations for testing of the Sympathetic Trip logic

The three fault locations are shown on ( Figure 0-8, page -76 ).

Test Cases
The Sympathetic Trip Logic scheme is tested for the following fault conditions:
1. For Fault on Own Feeder: - the relay should trip.
2. For Fault on Adjacent Feeder: - the relay should not trip for the inrush current.
3. For Sympathetic Trip Logic Block with Feeder Fault: - the relay should trip after
the fault on own feeder.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Sympathetic Trip logic test is shown on ( Figure
0-9, page -77 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A), the Sympathetic Trip blocking signal from the adjacent relay and
the currents and voltages during the pre-fault, fault and post-fault stages of the
simulation.
Since the logic is based on overcurrent elements only, the voltage signals from the
CMC are optional.
The potential free relay outputs of the CMC have one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay inputs. The
second terminal of the relay inputs are connected to (-) DC.

76

Sympathetic Trip

The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the operation of the Sympathetic Trip logic during the test.

IA
CM C

A nalog
O utp uts

IA

IB

IB

IC

IC

IN

D igital
Inp uts

Figure 0-9:

A nalog
Inp uts

IN

VA
VB
VC
VN
D igital
O utp uts

RELAY

VA
VB
VC
VN

O ut 1

+ DC

- DC

52a

O ut 2

+ DC

- DC

ST L

In 1

T rip

D igital
Inp uts

R elay
O utp uts

Hardware wiring for testing of the Sympathetic Trip logic

Automatic Test Sequence

The automatic test sequence will have several steps shown with animation in the
D-LogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Sympathetic Trip logic are given in the common section at the beginning of this
document.

The only setting that has to be changed for this group of test cases is the enabling
of the Sympathetic Trip logic and the associated with it relay settings based on the
recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input. A second input should be programmed to receive a Sympathetic
Trip blocking signal.

77

OMICRON DLogicPro

One relay output should be programmed to provide Trip.

78

Broken Conductor Detection

BROKEN CONDUCTOR DETECTION


Objective

The objective is to perform dynamic test to evaluate the Broken Conductor


Detection logic of a distribution feeder relay, as a function of the type of fault
condition - broken conductor, short circuit fault condition, or combination of the
two.
The Test Object is a multifunctional distribution feeder relay with Broken Conductor
Detection scheme.

BCD Logic Description


(BCD - Broken Conductor Detection)
Most protective elements in modern distribution feeder relays are designed to
detect fault conditions with high levels of fault currents, as well as high or low
voltages, i.e. conditions that may result in equipment damage.
The high current conditions are the result of the so called "shunt faults" - typically a
fault between one or more phases and ground. Because of the high currents they
are relatively easy to detect and require high-speed operation in order to reduce
the effect on the equipment.
There is another type of fault that has to be detected and cleared as well - a
"series fault" is an open conductor condition that might be the result of conductor
break or the operation of a single-phase switch or blown fuse.
This condition is not as dangerous, because there are no high currents and low
voltages, however it results in an unbalanced condition that might not be tolerable
by the system and loads.
The detection of such condition is based on the availability of sequence currents
that are indication of the unbalance. The negative sequence current is usually
used for unbalance detection. This current is proportional to the level of the load
current and in the cases of lightly loaded lines its magnitude can be in the range of
the unbalanced currents caused by load unbalance, CT errors, untransposed
feeders, etc.
To solve this problem, state-of-the-art feeder relays use a broken conductor
detection element based on the ratio of the negative sequence current to the
positive sequence current.
The above requirements are taken into consideration in the design of the module
for testing of the Broken Conductor Detection logic in modern transmission line
protection relays.

A simplified diagram of the Broken Conductor Detection logic is shown on (


Figure 0-10, page -80 ).

79

OMICRON DLogicPro

Substation A

IA

Load
r

IC

Ia, Ib, Ic

Trip

Ground OC

BCD

Negative Seq. OC

Figure 0-10: Simplified Broken Conductor Detection logic diagram

Fault Locations
Shunt and series faults are simulated along the model distribution feeder as shown
below:
1. Broken conductor fault
2. Short circuit fault

The fault locations are shown on ( Figure 0-10, page -80 ) and ( Figure 0-11,
page -80 )

Substation A

Load

IA

IB

IC

Relay
Figure 0-11: Fault location for the testing of the Broken Conductor detection logic

80

Broken Conductor Detection

Test Cases
The Broken Conductor Detection scheme is tested for the following fault condition
1. For ground fault: - the relay should trip.
2. For broken conductor: - the relay should not trip and should indicate Broken
Conductor.
3. For broken conductor with ground fault: - the relay should indicate Broken
Conductor and then trip after the fault.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Broken Conductor Detection logic test is shown on
( Figure 0-12, page -82 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A), and the currents and voltages during the pre-fault, fault and
post-fault stages of the simulation.
Since the logic is based on overcurrent elements only, the voltage signals from the
CMC are optional.
The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip and the Broken Conductor Detection outputs of the relay are wired to
sense inputs of the CMC and are used to change from fault to post-fault state, as
well as to measure the operating time and evaluate the operation of the Broken
Conductor Detection logic during the test.

81

OMICRON DLogicPro

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Inputs

Out 1

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN

+ DC

- DC

52a

In 1

Trip

In 3

BCD

Digital
Inputs

Relay
Outputs

Figure 0-12: Hardware wiring diagram for testing of Broken Conductor Detection logic

Automatic Test Sequence

The automatic test sequences will have several steps shown with animation in the
D-LogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Broken Conductor Detection logic are given in the common section at the
beginning of this document.
The only setting that has to be changed for this group of test cases is the enabling
of the Broken Conductor Detection logic and the associated with it relay settings
based on the recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input.
One relay output should be programmed to provide Trip, while a second output
should give the indication for Broken Conductor Detection.

82

Selective Overcurrent

SELECTIVE OVERCURRENT
Objective

The objective is to perform dynamic test to evaluate the Selective Overcurrent


scheme of a distribution feeder relay, as a function of the fault location and
receiving or not receiving of a signal from a downstream feeder relay.
The Test Object is a multifunctional distribution feeder relay with Selective
Overcurrent Scheme available and enabled.

SO Logic Description
(SO - Selective Overcurrent)
In distribution systems multiple sections of a loop are connected and fed from a
single source. Depending on where the loop is opened, the coordination required
between the different relays protecting the different sections of the loop may result
in significant increase of the fault clearing time for certain faults closer to the
source. These long times represent a power quality problem and may affect the
customers fed by the circuit.
In an effort to speed-up the fault clearing time, utilities are implementing a Blocked
Overcurrent protection scheme. It requires exchange of control signals between
the relays protecting the distribution circuit, i.e. some form of communications
between the devices on the loop.
An alternative to the Blocked Overcurrent scheme is the Selective Overcurrent
Logic. In this case the start contacts from a downstream relay are used to increase
the time delays of upstream relays, instead of blocking them.
The Selective Overcurrent Logic function temporarily increases the time delay
settings of one or more phase and ground overcurrent elements. This logic is
initiated by energizing the appropriate logic input of the upstream relay.
The relay nearest to the fault does not receive a Selective Overcurrent initiate
signal and will trip the appropriate switching device in order to clear the fault. Any
other relay further away from the fault and closer to the source will receive the
signal and because of the increased time delay will not trip for a certain time, thus
allowing the downstream device to clear the fault.
Each overcurrent element of the devices that implement a Selective Overcurrent
Scheme has to be set with a certain time delay that allows the receiving of a signal
from a downstream device. At the same time each device should be able to
communicate the starting of an overcurrent element that is used to block an
upstream device.

83

OMICRON DLogicPro

The above requirements are taken into consideration in the design of the module
for testing of the Selective Overcurrent logic in modern transmission line protection
relays.

A simplified diagram of the Selective Overcurrent logic is shown on ( Figure 0-13,


page -84 ).
.
Substation A

Load

TOC
Start
Logic
Select

I
Trip

Trip

TOC
Start

Timer
Select
Timer

TOC
Trip

Trip
Logic Select

Figure 0-13: Selective Overcurrent simplified logic diagram

Fault Locations
Faults are simulated at two location along the model distribution feeder:
1. Feeder fault at the end of the own protected section
2. Feeder fault at the beginning of the next section

Substation
Iflt

Relay

Iflt

Relay

Figure 0-14: Fault locations for Selective Overcurrent logic

84

Load

Selective Overcurrent

The fault locations are shown on ( Figure 0-14, page -84 )

Test Cases
The Selective Overcurrent scheme is tested for the following fault conditions
1. For fault on own feeder: - the relay should trip.
2. For fault on next feeder: - the relay should not trip (next feeder trip).
3. For fault on next feeder with next feeder breaker failure: - the relay should trip
with the Selective Overcurrent time delay.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Selective Overcurrent logic test is shown on (
Figure 0-15, page -86 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A) and the Selective Overcurrent initiate signal received from the
starting overcurrent elements of the downstream protective relay.
The currents and voltages during the pre-fault, fault and post-fault stages of the
simulation are also provided by the CMC. However, the voltages are not required
for the testing of the scheme, since it is based on the operation of overcurrent
elements only. That is why they are shown in gray on the wiring diagram.
The potential free relay outputs of the CMC have one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the operation of the Selective Overcurrent Scheme logic during the test.

85

OMICRON DLogicPro

IA
CM C

Analog
O utputs

IA

IB

IB

IC

IC

IN

O ut 1
O ut 3

Digital
Inputs

Analog
Inputs

IN

VA
VB
VC
VN
Digital
O utputs

RELAY

VA
VB
VC
VN
Digital
Inputs

+ DC

- DC

52a

+ DC

- DC

TO CBlock

In 1

Trip

Relay
O utputs

Figure 0-15: Hardware wiring for Selective Overcurrent testing

Automatic Test Sequence

The automatic test sequences will have several different steps shown with
animation in the DLogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Selective Overcurrent Scheme logic are given in the common section at the
beginning of this document.

The only setting that has to be changed for this group of test cases is the enabling
of the Selective Overcurrent Scheme logic and the associated with it relay settings
based on the recommendations in the relay service manual. The time delay setting
should be sufficient to allow the starting element of the downstream relay to
operate and the opto input monitoring logic to detect it.
One relay input has to be programmed as a normally open (52a) breaker status
monitoring input. A second relay input should be programmed to monitor the
Selective Overcurrent initiate signal from the downstream protective device.
One relay output should be programmed to provide Trip signal monitored by the
CMC for the evaluation of the relay operation.

86

Distribution Bus Protection

DISTRIBUTION BUS PROTECTION


Objective

The objective is to perform dynamic tests to evaluate the Distribution Bus


Protection scheme of a distribution feeder relay, as a function of the fault location
and receiving or not receiving of a blocking signal from a feeder relay.
The Test Object is a multifunctional distribution feeder relay with Distribution Bus
Protection scheme available and enabled.

DBus Logic Description


(DBus - Distribution Bus Protection)
Protection of buses in the case of short circuit faults at the transmission level is
usually provided by high or low impedance differential protection relays. Since they
require the installation and maintenance of additional equipment, in most cases
the distribution bus protection has been done by the backup time delayed
overcurrent protection of the transformers.
The increased awareness of the effects of longer fault clearing times on sensitive
industrial equipment results in the implementation of distribution bus protection
based on the exchange of signals between the feeder relays and the transformer
protection relays in order to provide faster clearing of bus faults.
The implementation of this form of distribution bus protection is possible only when
there is a single source, i.e. there is no source at the remote end of any of the
distribution feeders.
All overcurrent starting signals from the multiple feeder relays are paralleled and
used to energize an opto input of the transformer overcurrent protection relay.
For a fault on any of the distribution feeders the relay protecting the faulted feeder
will start and with or without time delay (depending on the fault location) will issue
a Trip signal to clear the fault.
If the fault is on the bus, no feeder relay will operate, thus indicating to the
transformer protection relay that it is a bus fault. The overcurrent elements that are
used to implement a Distribution Bus Protection Scheme have to be set with a
certain time delay that allows the receiving of a signal from any of the feeder
relays. At the same time each feeder relay should be able to communicate the
starting of an overcurrent element that is used to block the bus protection element.
The advantage of this type of scheme therefore is that it allows fast fault clearing of
distribution bus faults without the need for installation of a distribution bus
differential protection.
The above requirements are taken into consideration in the design of the module
for testing of the Distribution Bus Protection logic in modern distribution feeder
protection relays.

87

OMICRON DLogicPro

A simplified logic diagram of the (DBus) Distribution Bus Protection is shown on (


Figure 0-16, page -88 ).

Substation A

IFdr1
Ix-er

IFdr2
IFdr3

Trip

TOC
Start

TOC
Start

Timer

Blocking
Logic

Figure 0-16: Simplified Distribution Bus Protection logic diagram

Fault Locations
Faults are simulated at two locations in the distribution system:
1. On the distribution bus
2. On a distribution feeder

88

The three fault locations are shown on ( Figure 0-17, page -89 )

Load

Distribution Bus Protection

Substation

ILoad

Load

ILoad

IFlt

IFlt

Relay
Relay

Figure 0-17: Fault location for the testing of the Distribution Bus Protection logic

Test Cases
The Distribution Bus Protection scheme is tested for the following fault conditions:
1. For fault on the bus: - the relay should trip.
2. For fault on feeder: - the relay should not trip (feeder trip).

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Distribution Bus Protection logic test is shown on (
Figure 0-18, page -90 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A) and the Blocking signal received from the starting overcurrent
elements of the distribution feeder protection relays.
The currents and voltages during the pre-fault, fault and post-fault stages of the
simulation are also provided by the CMC. However, the voltages are not required
for the testing of the scheme, since it is based on the operation of overcurrent
elements only. That is why they are shown in gray on the wiring diagram.
The potential free relay outputs of the CMC have one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the operation of the Distribution Bus Protection Scheme during the test.

89

OMICRON DLogicPro

IA
CM C

A nalog
O utp uts

IA

IB

IB

IC

IC

IN

O ut 1
O ut 3

D igital
Inp uts

A nalog
Inp uts

IN

VA
VB
VC
VN
D igital
O utp uts

RELAY

VA
VB
VC
VN
+ DC

- DC

+ DC

- DC

In 1

52a

D igital
Inp uts

T O CB lock

T rip

R elay
O utp uts

Figure 0-18: Hardware wiring diagram for testing of the Distribution Bus Protection

Automatic Test Sequence

The automatic test sequences will have several steps shown with animation in the
D-LogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Distribution Bus Protection logic are given in the common section at the
beginning of this document.

The only setting that has to be changed for this group of test cases is the enabling
of the Distribution Bus Protection logic and the associated with it relay settings
based on the recommendations in the relay service manual. The time delay setting
should be sufficient to allow the starting element of the distribution feeder relay to
operate and the opto input monitoring logic to detect it.
One relay input has to be programmed as a normally open (52a) breaker status
monitoring input. A second relay input should be programmed to monitor the
Blocking signal from the distribution feeder protection relay.
One relay output should be programmed to provide Trip signal monitored by the
CMC for the evaluation of the relay operation.

90

Backup Selective Tripping

BACKUP SELECTIVE TRIPPING


Objective

The objective is to perform dynamic test to evaluate the Backup Selective Tripping
scheme of a distribution feeder relay, as a function of the fault condition, relay
failure or combination of the two.
The Test Object is a multifunctional distribution feeder relay with Backup Selective
Tripping scheme available and enabled.

BST Logic Description


(BST - Backup Selective Tripping)
The protection of distribution feeders is based on different principles, compared to
the protection of transmission lines. One of the main differences is the
requirements for local and remote backup protection.
In transmission systems the line is usually equipped with primary and backup
protection. However, since the introduction of microprocessor based
multifunctional distribution feeder protection relays, many utilities are using a
single relay to protect the feeder and relying on the transformer protection to act as
a backup protection in the case of fault with the feeder relay failed.
The main problem with this approach is the tripping of the transformer breakers
and as a result the de-energization of the distribution system for a fault on a single
feeder.
A solution to this problem is possible with the implementation of a Backup
Selective Tripping logic.
Any modern microprocessor based relay has different self-monitoring features. If
there is a failure of any kind, the relay will issue an alarm signal and will typically
close an Alarm output contact.
If the transformer protection relay receives an indication that a relay has failed, it
can perform selective tripping of the breaker of the feeder with the faulted relay
when a short circuit condition is detected.
When the relay located at the transformer detects a fault condition and an input
indicating a failure of the protection relay of a specific distribution feeder, it will first
operate an output that will attempt to trip the breaker of the feeder with the failed
relay. If the fault is on that feeder, it will be cleared.
If the breaker fails to clear the fault, then the transformer relay will trip after a time
delay the transformer breaker in order to clear the fault. The time delay should be
sufficient to allow the feeder breaker to operate.
If the distribution feeder relay is OK, there will be no Relay Fail alarm and it will
clear the fault in its zone of protection.

91

OMICRON DLogicPro

The above requirements are taken into consideration in the design of the module
for testing of the Backup Selective Tripping logic in modern transmission line
protection relays.

Simplified logic for the Block reclosing scheme is shown in ( Figure 0-19,
page -92 ).

Substation A

Load

IFdr1
IFdr2

IFdr3

Trip
TOC
Start

Timer2

Timer1

Trip

Feeder
Prot.

Relay
Failed

Figure 0-19: Simplified Backup Selective Tripping logic diagram

Fault Locations
Faults are simulated at:
1. Fault on a distribution feeder

Substation

ILoad

Load

ILoad

IFlt

IFlt

Relay
Relay
Figure 0-20: Fault locations for the testing of Backup Selective Tripping logic

92

The fault location is shown on ( Figure 0-20, page -92 )

Backup Selective Tripping

Test Cases
The Backup Selective Tripping scheme is tested for the following fault conditions:
1. For feeder fault with relay OK: - the relay should not trip.
2. For feeder fault with relay failed: - the relay should trip with selected feeder trip
output.
3. For feeder fault with relay failed and breaker failure: - the relay should trip with
selected feeder trip output, and then with own trip output.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Backup Selective Tripping logic test is shown on (
Figure 0-21, page -94 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A) and the Relay Failure alarm signal received from the distribution
feeder relay.
The currents and voltages during the pre-fault, fault and post-fault stages of the
simulation are also provided by the CMC. However, the voltages are not required
for the testing of the scheme, since it is based on the operation of overcurrent
elements only. That is why they are shown in gray on the wiring diagram.
The potential free relay outputs of the CMC have one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay inputs. The
second terminal of the relay inputs are connected to (-) DC.
The Trip and Selective Feeder Trip outputs of the relay are wired to sense inputs of
the CMC and are used to change from fault to post-fault state, as well as to
measure the operating time and evaluate the operation of the Feeder Blocking
Scheme logic during the test.

93

OMICRON DLogicPro

IA
CM C

A nalog
O utp uts

IA

IB

IB

IC

IC

IN

D igital
Inp uts

A nalog
Inp uts

IN

VA
VB
VC
VN
D igital
O utp uts

R ELA Y

VA
VB
VC
VN

O ut 1

+ DC

- DC

52a

O ut 3

+ DC

- DC

R elayFail

In 1
In 2

T rip

Digital
Inp uts

Relay
O utp uts

Fdr T rip

Figure 0-21: Hardware wiring for testing of the Backup Selective Tripping logic

Automatic Test Sequence

The automatic test sequences will have several steps shown with animation in the
D-LogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Backup Selective Tripping logic are given in the common section at the
beginning of this document.

The only setting that has to be changed for this group of test cases is the enabling
of the Backup Selective Tripping logic and the associated with it relay settings
based on the recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input. A second relay input is used to monitor the status of the feeder
relay - healthy or alarm.

94

Backup Selective Tripping

One relay output should be programmed to provide Trip, while a second output
should issue a Trip signal for the selected breaker of a distribution feeder with a
failed relay.

95

OMICRON DLogicPro

BREAKER FAILURE PROTECTION


Objective

The objective is to perform dynamic tests to evaluate the


Breaker-Failure-Protection (BFP) function of a distribution feeder relay, as a
function of the type of fault and the operation of the breaker.
The Test Object is a multifunctional feeder relay with built-in
Breaker-Failure-Protection.
The distribution system conditions and the breaker status signal are simulated by
the CMC.

BFP Logic Description


(BFP - Breaker Failure Protection)
The requirements for improvements in the quality of power supplied to electric
utility customers result in changes of the way distribution feeder protection is
designed and applied. Many protection schemes that in the past have only been
used at the transmission level today are common at the distribution level. One of
the reasons is that they are available as some of the numerous functions in a
multifunctional distribution feeder relay. One of these schemes is the Breaker
Failure Protection.
One of the most severe fault conditions in the electric distribution system is the
failure of the breaker to trip in case of a fault detected by the protective relays. This
results in prolonged exposure of the industrial customers to low voltages and of
electrical equipment to large short circuit currents and may lead to damage of
equipment and complete shut down of the manufacturing process. This is the
reason that Breaker Failure Protection has gained popularity at the distribution
level of the system.
Modern microprocessor based distribution feeder protection relays have built-in
Breaker Failure Protection functions that vary with their level of complexity
between the different relay manufacturers.
The most common Breaker Failure Protection is based on monitoring of the
current in the protected circuit. After a fault is detected and the relay issues a trip
signal, it will also initiate the timer of the Breaker Failure Protection function. If the
breaker trips as expected, the current in all three phases will go to zero, which will
reset the undercurrent element used to detect the correct breaker operation.
The above described breaker failure logic works for most cases, especially when
the fault condition is a short circuit. However, there are system conditions when the
current detector can not be used to detect the breaker trip.
For example, if the distribution feeder relay detects an overvoltage condition, it will
issue a trip signal. If the feeder breaker of a lightly loaded line fails to trip, this

96

Breaker Failure Protection

failure is not going to be detected by the undercurrent element. A different criteria


is required to detect the breaker misoperation. An auxiliary contact form the
breaker can be used for this purpose.
Since at the distribution level the feeder is protected by a single relay, the Breaker
Failure Protection function is usually started by a built-in protection function in the
distribution feeder protection relay.

A simplified logic diagram of the (BFP) Breaker Failure Protection function is


shown on ( Figure 0-22, page -97 ).

Load

Ia
Ib
Ic

TBF

Prot Trip
Ext BF Start

BF Trip
52

IOC

BF Trip

Figure 0-22: Simplified Breaker Failure Protection logic diagram

Fault Locations
Faults are simulated at one location along the model distribution feeder:
1. Close-in single-phase-to-ground fault

The fault location is shown on ( Figure 0-23, page -98 )

97

OMICRON DLogicPro

Substation A

IA

Load
r

IB

IC

Relay

Figure 0-23: Fault location for the testing of the Breaker Failure Protection logic

Test Cases
The Breaker Failure Protection is tested for the following fault conditions:
1. For close-in fault: - the relay should trip and should not initiate adjacent breaker
trip.
2. For close-in fault with Breaker Failure: - the relay should trip and should also
initiate adjacent breaker trip.
3. For Overvoltage with Breaker Failure: - the relay should trip and should also
initiate adjacent breaker trip.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through its analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Breaker Failure Protection logic test is shown on (
Figure 0-24, page -99 ).
The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input monitoring the breaker status is connected to (-)
DC.
The Trip output of the relay and the Breaker Failure Trip output are wired to two of
the sense inputs of the CMC and are used to change from fault to post-fault state,
as well as to measure the operating time and evaluate the operation of the Breaker
Failure Protection logic during the test.

98

Breaker Failure Protection

IA
CMC

Analog
Outputs

Digital
Outputs

Digital
Inputs

IA

IB

IB

IC

IC

IN

RELAY

Analog
Inputs

IN

VA
VB
VC
VN

VA
VB
VC
VN

Out 1

52a

+ DC

- DC

In 1

Trip

In 5

BFP

Digital
Inputs

Relay
Outputs

Figure 0-24: Hardware wiring diagram for testing of the Breaker Failure Protection logic

Automatic Test Sequence

The automatic test sequences will have several different steps shown with
animation in the DLogicPro software.

Test Object Settings


The expected basic settings of the multifunctional distribution feeder relay under
test associated with the Breaker Failure Protection logic are given in the common
section at the beginning of this document.

The only settings that have to be changed for this group of test cases is the
enabling of the Breaker Failure Protection logic and the associated with it relay
settings based on the recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input.
One relay output should be programmed to provide Trip, while a second output
should give the indication for detected Breaker Failure Protection trip.

99

OMICRON DLogicPro

The expected Breaker Failure Protection time delay setting is 150 ms.

100

Switch-On-To-Fault

SWITCH-ON-TO-FAULT
Objective

The objective is to perform dynamic test to evaluate the Switch-Onto-Fault (SOTF)


scheme of a distribution feeder relay, as a function of the fault location, type of
fault, and breaker status conditions.
The Test Object is a multifunctional distribution feeder relay with SOTF scheme
available and enabled

SOTF Logic Description


(SOTF - Switch-On-To-Fault)
Switch-On-To-Fault Logic in distribution feeder relays is required under different
fault conditions while closing the breaker with a permanent fault on the protected
feeder. The fault can be a result of natural events or human errors (a very typical
one is when the grounding switches have been left closed after the line or breaker
maintenance has been completed).
For close in faults, the voltage in the faulted phase will be close to zero that will
make more difficult the operation of the relay directional elements. At the same
time it will expose many industrial and commercial users to unacceptable voltage
levels. This requires instantaneous tripping under any switch-onto-fault condition.
This problem is solved by the Switch-On-To-Fault Logic. It is provided in order to
ensure high-speed fault clearing immediately following line energization. It is
enabled for a short period of time after the breaker closing. The breaker has to be
open for a relay specific or user defined time before the SOTF logic is turned on.
This is detected typically by monitoring of the breaker auxiliary contacts.
The Switch-On-To-Fault Logic in distribution feeder relays enables the
instantaneous operation of overcurrent elements that normally will operate with a
set time delay.
After the Switch-on-to-Fault timer times out following a breaker closure on a
healthy line, the overcurrent elements will return to their time delayed mode of
operation.
The above requirements are taken into consideration in the design of the module
for testing of the Feeder Blocking Scheme logic in modern distribution feeder
protection relays.

A simplified diagram of the Switch-On-To-Fault is shown on ( Figure 0-25,


page -102 ).

101

OMICRON DLogicPro

Substation A

Load

0
0
0

Manual Close
tpu
tdo

Trip

Breaker Open

TOC Start

Figure 0-25: Simplified diagram of the Switch-On-To-Fault logic.

Fault Locations
Faults are simulated at 2 locations along the model distribution line:
1. Close-in fault
2. Remote fault

The fault locations are shown on Figure ( Figure 0-26, page -102 ).

Substation A

Load

IA

IB

IC

Relay

Figure 0-26: Fault locations for the testing of the Switch-On-To-Fault logic.

102

Switch-On-To-Fault

Test Cases
The Switch-Onto-Fault (SOTF) scheme is tested for the following fault conditions:
1. For Close-in ground fault: - the relay should trip without time delay
2. For Close-in phase fault: - the relay should trip without time delay
3. For Remote fault: - the relay should trip without time delay

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the SOTF logic test is shown on ( Figure 0-27,
page -104 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A).
The currents and voltages during the pre-fault, fault and post-fault stages of the
simulation are also provided by the CMC. However, the voltages are not required
for the testing of the scheme, since it is based on the operation of overcurrent
elements only. That is why they are shown in gray on the wiring diagram.
The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the correct operation of the SOTF Scheme logic during the test.

103

OMICRON DLogicPro

IA
CM C

Analog
O utp uts

IA

IB

IB

IC

IC

IN

Digital
Inputs

O ut 1

Analog
Inputs

IN
VA
VB
VC
VN

VA
VB
VC
VN
Digital
O utp uts

RELA Y

+ DC

- DC

In 1

52a

Digital
Inputs

Trip

Relay
O utputs

Figure 0-27: Hardware wiring diagram for testing of the Switch-Onto-Fault logic

Automatic Test Sequence

The automatic test sequences will have several steps shown with animation in the
DLogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the SOTF logic are given in the common section at the beginning of this document.

The only setting that has to be changed for this group of test cases is the enabling
of the SOTF logic.
A relay input has to be programmed as a normally open (52a) breaker status
monitoring input.
One relay output should be programmed to provide Trip signal monitored by the
CMC for the evaluation of the relay operation.

104

Voltage transformer Supervision

VOLTAGE TRANSFORMER SUPERVISION


Objective

The objective is to perform dynamic test to evaluate theVoltage Transformer


Supervision feature of a distribution feeder relay, as a function of the system
conditions, presence of a fault, and VT or voltage circuit failure.
The Test Object is a multifunctional distribution feeder relay with Voltage
Transformer Supervision option available and enabled.
Breaker Status signals are simulated by the CMC.

VTS Logic Description


(VTS - Voltage Transformer Supervision)
Modern microprocessor based distribution feeder relays may be designed as
devices with different voltage based functions, such as under-, overvoltage
protection. Such relays also include directional overcurrent protection, with the
directional decision based on the angle between the fault current and a voltage
based polarizing quantity.
The circuits between the voltage transformers in the field and the relays are
usually protected by fuses or miniature circuit breakers. In case of a fault on these
circuits the fault will be cleared by these protective devices, resulting in the loss of
voltage in the faulted phase of the voltage circuit.
The los of voltage in one or more phases will result in misoperation of the voltage
based protection elements. This is undesirable and requires taking some
measures in order to avoid it.
Any modern microprocessor based distribution feeder relay includes some form of
logic that will detect such condition and prevent the relay operation. These
schemes can have different names in different products, but the functionality is
very similar. In some relays this is the Fuse-Failure scheme, while in others it may
be a Voltage Transformer Supervision scheme. Or it may be called a
Loss-of-Potential scheme. However, regardless of the name, in all cases the logic
is based on the detection of a change in voltage while there is no change in
current. This scheme has performed successfully throughout the years, and that is
why now it is starting to show-up in distribution protection relays that have voltage
inputs.
Modern microprocessor based relays measure typically phase currents and
voltages and based on these measurements calculate the sequence components
used by different protection or non-protection functions. When a single or two
phase voltage failure occurs, this will result in voltage unbalance that can be
detected based on the calculated negative or zero sequence voltages.

105

OMICRON DLogicPro

The detection of unbalance voltage however should not affect the performance of
the relay under fault conditions. That is why the Voltage Transformer Supervision
logic includes another element that monitors the availability of unbalanced current
conditions. Under normal load conditions, the current unbalance will be a function
of the loading of each of the distribution feeder phases.
Detection of Voltage Transformer Supervision should immediately block all voltage
dependent elements, such as the directional functions. At the same time pure
overcurrent elements should be available to provide some form of backup
protection in the case that a fault occurs before the problem with the voltage
circuits or transformers is detected and fixed.
The above requirements are taken into consideration in the design of the module
for testing of the Voltage Transformer Supervision logic in modern distribution
feeder protection relays.

Simplified logic for the Voltage Transformer Supervision scheme is shown in (


Figure 0-28, page -106 ).

IA

Load

IB

IC

I0 or I2

V0 or V2
IOC

Direction

Trip

Figure 0-28: Simplified logic diagram for Voltage Transformer Supervision scheme

Fault Locations
Faults are simulated at one remote location along the distribution feeder:
A single phase VT failure is simulated at the substation.
A fault is simulated on the feeder.

106

Voltage transformer Supervision

The fault location is shown on ( Figure 0-29, page -107 ).

IA

Load

IB

IC

Relay

Figure 0-29: Fault location for the testing of the Voltage Transformer supervision

Test Cases
The Voltage Transformer Supervision logic scheme is tested for the following fault
conditions:
1. For single phase voltage circuit failure: - the relay should not trip and should
give VT Fail alarm.
2. For single phase fault: - the relay should trip and should not give VT Fail alarm.
3. For single phase VT failure with fault: - the relay should give VT Fail alarm and
then should trip after the fault.

107

OMICRON DLogicPro

Hardware Requirements
IA
CM C

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Inputs

Out 1

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN

+ DC

- DC

52a

In 1

Trip

In 6

VTS

Digital
Inputs

Relay
Outputs

Figure 0-30: Hardware wiring for testing of the Voltage Transformer Supervision logic

The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Voltage Transformer Supervision logic test is
shown on ( Figure 0-30, page -108 )
The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of each relay input is connected to (-) DC.
The Trip output of the relay and the VT Fail output are wired to inputs of the CMC
and are used to change from fault to post-fault state, as well as to measure the
operating time and evaluate the operation of the Voltage Transformer Supervision
logic during the test.

108

Voltage transformer Supervision

Automatic Test Sequence


The automatic test sequences will have several different steps shown with
animation in the DLogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Voltage Transformer Supervision logic are given in the common section at the
beginning of this document.

The only setting that has to be changed for this group of test cases is the enabling
of the Voltage Transformer Supervision logic and the associated with it relay
settings based on the recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input.
One relay output should be programmed to provide Trip while a second output
should give the indication for Voltage Transformer Supervision logic operation

109

OMICRON DLogicPro

CURRENT TRANSFORMER SUPERVISION


Objective

The objective is to perform dynamic tests to evaluate the Current-Transformer


Supervision scheme of a directional distribution feeder relay, as a function of the
Current Transformer or other CT circuit failure or fault condition, or combination of
the two.
The Test Object is a multifunctional directional feeder relay with a Current
Transformer Supervision scheme.

CTS Logic Description


Substation A

Load

IA

IB

IC

I0 or I2

V0 or V2
Trip
Trip

Sequence OC
Phase OC

(CTS - Current-Transformer Supervision)


The current circuits of a distribution feeder protection relay may fail due to gradual
degradation of the current transformers themselves or damage of the wiring
between the current transformers in the field and the relay. In some cases this may
lead to incorrect measurement of the primary load or fault currents and incorrect
operation of the protective relay. A dangerous raise in voltage will result from an
interruption of the current circuit. All this requires detection and alarm from the
relay when such problems occur in the substation.
Some modern microprocessor based distribution feeder relay includes some form
of logic that will detect such CT circuit condition and prevent the affected relay
functions from incorrect operation. These schemes may be called a
Current-Transformer-Supervision scheme. The logic follows similar principles to

110

Current Transformer Supervision

the Voltage-Transformer-Supervision logic, but with reversed signals, i.e. it is


based on the detection of an unbalanced change in current while there is no
change in voltage. It is obvious that such logic requires the availability of both
current and voltage signals, i.e. it will be available typically in feeder protection
relays with directional elements that require voltage signals for the polarizing
quantity. Relays with current inputs only will not have such a logic scheme.
Modern microprocessor based relays measure typically phase currents and
voltages and based on these measurements calculate the sequence components
used by different protection or non-protection functions. When a single or two
phase current failure occurs, this will result in current unbalance that can be
detected based on the calculated negative or zero sequence currents.
The detection of unbalance currents however should not affect the performance of
the relay under fault conditions. That is why the Current-Transformer-Supervision
logic includes another element that monitors the availability of unbalanced voltage
conditions. Under normal load conditions, the current unbalance will be a function
of the loading of the distribution feeder. Considering the fact that many distribution
loads are single-phase loads, it is obvious that there will be some unbalance in the
loading of the individual phases. The setting of the element detecting unbalanced
current conditions should be set above this possible level in order to ensure the
correct logic operation.
Operation of the Current-Transformer-Supervision logic should block sequence
current dependent elements, such as sensitive negative or zero sequence
overcurrent functions. At the same time pure phase high set overcurrent elements
should be available to provide some form of backup protection in the case that a
fault occurs before the problem with the current circuits or transformers is detected
and fixed.
The above requirements are taken into consideration in the design of the module
for testing of the Current-Transformer-Supervision logic in modern distribution
feeder protection relays.

Simplified diagram of the Current-Transformer-Supervision logic is shown in:


( Figure 0-31, page -112 ).

111

OMICRON DLogicPro

Substation A

Load

IA

IB

IC

I0 or I2

V0 or V2
Trip

Sequence OC

Trip

Phase OC

Figure 0-31: Simplified Current-Transformer Supervision logic diagram

Fault Locations
Faults are simulated at one remote location along the distribution feeder:
1. A single phase CT failure is simulated at the substation.
2. A fault is simulated on the feeder.

The fault location is shown on ( Figure 0-32, page -112 )

Substation A

IA

L oad
r

IB

IC

Relay
Figure 0-32: Fault location for the testing of the Current-Transformer Supervision logic

112

Current Transformer Supervision

Test Cases
The Current Transformer Supervision scheme is tested for the following fault
conditions
1. For single phase CT failure: - the relay should not trip and should give CT Fail
alarm.
2. For single phase fault: - the relay should trip and should not give CT Fail alarm.
3. For single phase failure with fault: - the relay should give CT Fail alarm and
then should trip after the fault.

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Current-Transformer Supervision logic test is


shown on ( Figure 0-33, page -114 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A), and the currents and voltages during the pre-fault, fault and
post-fault stages of the simulation.

113

OMICRON DLogicPro

IA
CM C

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Inputs

Out 1

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN

+ DC

- DC

52a

In 1

Trip

In 7

CTS

Digital
Inputs

Relay
Outputs

Figure 0-33: Hardware wiring diagram for testing of the Current-TransformerSupervision logic

The potential free relay output of the CMC has one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay input. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay and the CT Fail output are wired to inputs of the CMC
and are used to change from fault to post-fault state, as well as to measure the
operating time and evaluate the operation of the Current-Transformer Supervision
logic during the test.

Automatic Test Sequence

The automatic test sequences will have several different steps shown with
animation in the DLogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Current-Transformer Supervision logic are given in the common section at the
beginning of this document.

114

Current Transformer Supervision

The only setting that has to be changed for this group of test cases is the enabling
of the Current-Transformer Supervision logic and the associated with it relay
settings based on the recommendations in the relay service manual.
One relay input has to be programmed as normally open (52a) breaker status
monitoring input.
One relay output should be programmed to provide Trip, while a second output
should give the indication for detected Current-Transformer Supervision operation

115

OMICRON DLogicPro

FUSE SAVING
Objective

The objective is to perform dynamic test to evaluate the Fuse Saving scheme of a
distribution feeder relay, as a function of the fault condition, reclosing cycle or
combination of the two.
The Test Object is a multifunctional distribution feeder relay with Fuse Saving
scheme.

Fuse Logic Description


(Fuse - Fuse Saving Logic)
Distribution feeders are used to supply power to multiple customers through
distribution transformers, typically protected by fuses. The reason is that this is an
inexpensive way of protecting the transformers, and since short circuit faults do
not occur very often, it is widely implemented.
The problem with fuse protection is that it does not allow automatic restoration of
the power supply and also requires a crew to be sent to the location and replace
the fuse, which can lead to a significantly long supply interruption.
Considering the fact that most short circuit faults have a temporary nature,
attempting to clear the fault before the fuse burns has become a standard practice
in many utilities.
This is achieved by applying a Fuse Saving Scheme. The idea is to use a low set
instantaneous overcurrent element to trip the breaker in the substation
immediately after the fault occurs. This obviously means that there is no
coordination of the instantaneous overcurrent element with the downstream fuses.
The breaker is tripped before the fuse protecting the faulted section of the feeder
(or a distribution transformer) will start to melt.
After the reclosing the low set instantaneous element is disabled and a high set
instantaneous, as well as a time-overcurrent element that both coordinate with the
downstream protective devices are used.
This method has some advantages and disadvantages that have to be considered
before making a decision to apply the Fuse Saving Scheme:
The advantage is that in case of a temporary fault the fuse is not going to melt, i.e.
it will not require a replacement and will result in a short interruption of the load
during the dead interval of the reclosing sequence. This can be very important,
especially in cases where the fuse is at a remote location, and under difficult
meteorological conditions, when it will take a long time for the crew to get to the
location and replace the fuse.
The disadvantage is that all the customers supplied from the feeder will be
affected by the interruption during the reclosing cycle. That is why the decision to

116

Fuse Saving

apply the Fuse Saving Scheme should be made based on the type of load
connected to the feeder.
The above requirements are taken into consideration in the design of the module
for testing of the Fuse Saving logic in modern distribution feeder protection relays.

A simplified diagram of Fuse Saving logic is shown in ( Figure 0-34, page -117 ).

Substation A

Load

IA

IB

IC

Gnd TOC
Ph TOC

Trip
Trip

Gnd IOC
Ph IOC

Trip

Load

AR in Progress
Figure 0-34: Simplified Fuse saving logic diagram

Fault Locations
Faults are simulated at one location along the model distribution circuit:
Fault behind the fuse

117

OMICRON DLogicPro

Substation

Loa

IA

IB

IC

Relay

Loa
Figure 0-35: Fault locations for the testing of the Fuse Saving logic

The fault locatios is shown on ( Figure 0-35, page -118 )

Test Cases
The Fuse Saving logic scheme is tested for the following fault conditions:
1. For SLG fault with Successful Reclosing: - the relay should trip without delay
after the initial fault.
2. For SLG fault with Unsuccessful Reclosing: - the relay should not-trip after the
reclosing (coordinates with fuse).
3. For 3LG fault with Successful Reclosing: - the relay should trip without delay
after the initial fault.
4. For 3LG fault with Unsuccessful Reclosing: - the relay should not-trip after the
reclosing (coordinates with fuse).

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

118

A typical wiring diagram for the Fuse Saving logic test is shown on ( Figure 0-36,
page -119 ).

Fuse Saving

The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A), the status of the breaker and the reclosing.
The currents and voltages during the pre-fault, fault and post-fault stages of the
simulation are also provided by the CMC. However, the voltages are not required
for the testing of the scheme, since it is based on the operation of overcurrent
elements only. That is why they are shown in gray on the wiring diagram.
The potential free relay outputs of the CMC have one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay inputs. The
second terminal of the relay input is connected to (-) DC.
The Trip output of the relay is wired to a Trip sense input of the CMC and is used to
change from fault to post-fault state, as well as to measure the operating time and
evaluate the operation of the Fuse Saving Scheme logic during the test.

IA
CMC

Analog
Outputs

IA

IB

IB

IC

IC

IN

Out 1
Out 2
Out 3
Out 4

Digital
Inputs

In 1

Analog
Inputs

IN

VA
VB
VC
VN
Digital
Outputs

RELAY

VA
VB
VC
VN
+ DC

- DC

52a

+ DC

- DC

BlckAR

+ DC

- DC

ResetAR

+ DC

- DC

BrkOK

Trip

Digital
Inputs

Relay
Outputs

Figure 0-36: Hardware wiring diagram for testing of the Fuse Saving logic

119

OMICRON DLogicPro

Automatic Test Sequence

The automatic test sequences will have several steps shown with animation in the
D-LogicPro software.

Test Object Settings


The expected basic settings of the multifunctional relay under test associated with
the Fuse Saving logic are given in the common section at the beginning of this
document.

The only setting that has to be changed for this group of test cases is the enabling
of the Reclosing and the Fuse Saving logic and the associated with it relay settings
based on the recommendations in the relay service manual.
A relay input has to be programmed as normally open (52a) breaker status
monitoring input. A second input should be configured to monitor the health of the
breaker. A third input should monitor the availability of Block Reclosing signal and
a fourth input to Reset Reclosing after the end of each test.
One relay output should be programmed to provide Trip signal to the breaker.

120

The default simulated reclosing dead time is 0.3 sec.

Block Reclosing

BLOCK RECLOSING
Objective

The objective is to perform dynamic test to evaluate the Block Reclosing function
of a distribution feeder relay, as a function of the type of fault, and the breaker
status.
The Test Object is a multifunctional distribution feeder relay with built-in Block
Reclosing available and enabled.

BR Logic Description
(BR - Block Reclosing)
Most faults on overhead distribution feeders are caused by lightning, clashing
conductors and other transient phenomena. Considering the importance of the
reduction in the duration of outages, utilities are applying automatic reclosing of
the breakers of faulted distribution feeders. The success rate of auto reclosing is in
the range of 80-90%. After the initial trip, the relay recloses the circuit breaker after
a set time delay in order to allow the de-ionization of the air in the fault location.
The remaining percentage of faults is permanent in nature and requires immediate
tripping of the line breakers and blocking of the reclosing function. There are
different criteria or events that can be used to determine the need to block
reclosing:
If the fault detected by the relay is multiphase with high currents, there is higher
probability that it is a permanent fault. At the same time exposing the electric
power system to such conditions repeatedly during the reclosing sequence can be
dangerous for the stability of the system.
If the relay clears a fault with one of it's backup time delayed ground overcurrent
elements - there is a possibility that there is a downed conductor that requires
block of reclosing.
If the breaker controlled by the distribution feeder protection relay is not capable of
reclosing because of low pressure, or something else, obviously the reclosing
should be blocked. This condition is typically detected through a relay input
assigned to detect the Breaker Healthy status.
There might be other requirements to block reclosing. That is why all distribution
feeder relays with autoreclosing feature available will have an input dedicated to
Block Reclosing signals from external devices.
The above requirements are taken into consideration in the design of the module
for testing of the Block Reclosing scheme logic in modern distribution feeder
protection relays.

Simplified logic for the Block Reclosing scheme is shown in ( Figure 0-37,
page -122 ).

121

OMICRON DLogicPro

Substation A

Load

Ia
Ib
Ic
Trip
Breaker
Healthy
Reclosing

IOC

LockOut

SOTF
Block Reclosing
Figure 0-37: Simplified Block Reclosing logic diagram

Fault Locations
Faults are simulated at two location on the substation bus:
1. Close-in fault
2. Feeder fault

Substation A

Ia
Ib
Ic

Relay

Figure 0-38: Fault locations for the testing of Block Reclosing logic

122

Load

Block Reclosing

The three fault location is shown on ( Figure 0-38, page -122 )

Test Cases
The Block Reclosing function is tested for the following fault conditions:
1. For close-in high current fault: - the relay should trip and should indicate
Reclose Lockout.
2. For breaker not healthy condition: - the relay should not trip and should
indicate Reclose Lockout
3. For Switch-Onto-Fault (3 Phase): - the relay should trip and should indicate
Reclose Lockout
4. For Block Reclosing input energized: - the relay should not trip and should
indicate Reclose Lockout

Hardware Requirements
The CMC test device is programmed to simulate the substation and power system
environment through the analog and binary outputs. At the same time the binary
inputs are used to monitor the operation of the test object.

A typical wiring diagram for the Block Reclosing logic test is shown on ( Figure
0-39, page -124 ).
The CMC simulates the status of the normally open auxiliary contact for the
breaker (52-A), the status of the breaker and the reclosing.
The currents and voltages during the pre-fault, fault and post-fault stages of the
simulation are also provided by the CMC. However, the voltages are not required
for the testing of the scheme, since it is based on the operation of overcurrent
elements only. That is why they are shown in gray on the wiring diagram.
The potential free relay outputs of the CMC have one terminal connected to (+) DC
and the second terminal to the (+) DC terminal of the associated relay inputs. The
second terminal of the relay input is connected to (-) DC.
The Trip and Reclose Lockout outputs of the relay are wired to sense inputs of the
CMC and are used to change from fault to post-fault state, as well as to measure
the operating time and evaluate the operation of the Block Reclosing Scheme logic
during the test.

123

OMICRON DLogicPro

IA
CM C

Analog
Outputs

IA

IB

IB

IC

IC

IN

Digital
Outputs

Out 2
Out 3
Out 4

Digital
Inputs

Analog
Inputs

IN

VA
VB
VC
VN
Out 1

RELAY

VA
VB
VC
VN
+ DC

- DC

52aA

+ DC

- DC

BlckAR

+ DC

- DC

+ DC

- DC

Digital
Inputs

ResetAR
BrkOK
Relay
Outputs

In 1

Trip

In 4

ReclLockout

Figure 0-39: Hardware wiring for testing of the Block Reclosing logic

Automatic Test Sequence

The automatic test sequences will have several steps shown with animation in the
DLogicPro software.

Test Object Settings

The expected basic settings are given in the common section at the beginning of
this document. The only setting that has to be changed for this group of test cases
is the enabling of Reclosing and Block Reclosing logic and the associated relay
settings based on the recommendations in the relay service manual.
A relay input has to be programmed as normally open (52a) breaker status
monitoring input. A second input should be configured to monitor the health of the
breaker. A third input should monitor the availability of Block Reclosing signal and
a fourth input to Reset Reclosing after the end of each test.
One relay output is needed to provide the Trip signal to the breaker and a second
output should indicate Reclose Lockout. The default dead time is 0.3 sec.

124

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Support
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greatest possible benefits. If you need any support, we are here to assist you!

24/7 Technical Support Get Support


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Make use of our 24/7 international technical support hotline: +43 59495 4444.
Additionally, you can find our Service Center or Sales Partner closest to you at
www.omicron.at or www.omicronusa.com.

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Browse through the knowledge library and find application notes, conference
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125

Support

126

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