Analog and Digital Interfacing

BJ Furman
Spring, 1999

DAC & ADC

Digital-to-Analog Conversion (DAC)

Converts a binary word from computer to a scaled

analog voltage
Used for controlling systems that require an analog
input.
DC servo motor
Resistive heater

Analog-to-Digital Conversion (ADC)

Converts a continuous analog voltage into discrete

binary values
Used to translate continuous physical phenomena into a
language the computer understands.

Digital to Analog Converter (DAC)

Essentially, DACs are op-amps with

programmable gains.

Most use an R/2R ladder network connected to an

op-amp
See Figure 7.11 in the text.
Voltage resolution is determined by the number of bits:
8, 10, 12, 14, 16, 18, 20?

Resolution = Vref / 2N , where N is the number of bits

New Micros DAC uses two AD588, 8 bit DACs and has
a voltage range of 0 to 2.55 V

Is also a multiplying DAC, which means it has an external voltage

reference
Allows time-varying (AC) reference to be used or precise fixed voltage
reference to be used.

R-2R Ladder DAC

Vref

2R
MSB

b
2R

c
2R

2R

d
2R

LSB
bit 1

bit 2

bit 3

bit 4

Vout

switches

C Code Example of DAC Output

ex. output 0.05 V on DAC channel 1

#define DAC *(unsigned char *)(0x8010)
main()
{DAC=0x05;}

DAC Specifications
N

Resolution
Error sources

Offset error

6
8
10
12
14
16
18

2^-N
mV @Vr=10 V %FS
ppm
0.015625
156.25
1.5625
15625
0.0039063
39.0625 0.390625 3906.25
0.0009766
9.765625 0.097656 976.5625
0.0002441
2.44140625 0.024414 244.1406
6.104E-05 0.610351563 0.006104 61.03516
1.526E-05 0.152587891 0.001526 15.25879
3.815E-06 0.038146973 0.000381 3.814697

Apply 0 and adjust external trim pot so that output is zero

Gain error
Apply 2^N-1, and adjust gain trim pot to give full-scale
output

Linearity error. Typically, 1/2 LSB or better

Youre stuck with it from the mfg.

Temperature drift

Settling time

5 to 30 ppm/C
1 to 10 microseconds

Analog to Digital Conversion (ADC)

ADC

various ways to convert analog to digital numbers

flash
use op-amp comparators and resistor ladder
fast 4 - 1000 ns, relatively expensive, real-time devices
dual-slope
uses an integrator, comparator, clock and binary
counter

integrator voltage proportional to input voltage and counter size; inversely

proportional to clock freq. and RC time constant of integrator
reference voltage then applied, counter counts until integrator voltage
reaches zero

very slow, but very accurate, immune to noise

ADC Types, cont.

ADC, cont.

successive approximation
like weighing something using a balance scale and a set of
binary weights.
starting with MSB, internal DAC outputs a voltage,
compares to analog input
if smaller, logic 1 is retained
if larger, logic 0 retained for MSB
process is repeated down to the LSB

required steps to complete an ADC cycle

send start of conversion command
wait for end-of-conversion status bit to change
read the conversion result

ADC example using the lab board

Acquire an analog voltage and send it back out

a DAC port

#define ADCTL *(unsigned char *)(0x1030)

/* address for AD control/status register */
#define ADR1 *(unsigned char *)(0x1031)
/* address for result register */
#define DAC *(unsigned char *)(0x8010)
/* address for DAC channel 1 */
main()
{ int ad_result;
while(1)
{ ADCTL=0x10;
/* writing to ADCTL register triggers conversion process */
while ((ADCTL & 0x80) = = 0) { }; /* look for bit 7 of ADCTL to go to 1 to
signal end of conversion */
ad_result=ADR1; /* ADR1 has result of conversion */
DAC=ad_result; /* send results back out DAC port */
}
}

Limits on Sampling

How high a frequency can you reliably sample

with an ADC?

It depends on how fast your ADC is, i.e., its Tc

The fundamental limit is defined by one of two things:

Nyquist sampling theory

fsampling > 2f of highest frequency component (10x or higher is

preferred)
picture
if we sample slower, we get aliasing, a bogus result

Solution: low pass filter all frequencies above 1/2 s. Also

called anti-aliasing filters (40 dB -> about 1% at f=fs/2)

Limits on Sampling, cont.

Fundamental limits, cont.

The signal changing by more than the resolution

within the sampling time.
The conversion result depends on the conversion time
(aperture time)
consider a sine wave: V= Tc(dVosint/dt)max
V /Vo = Tc(cost)max
Tc < V / Vo(2f)
ex: suppose 8 bit ADC, Tc =64 microseconds, 100 Hz
signal, is ADC adequate?
V / Vo =1/2^8 = 0.003906
Tc < 0.003906/(2100)=6.2E-6 sec

Speed of Operation

DACs are fast

op-amps with digitally programmable gains

25 ns to 100 microseconds
several $s to $100
ex: AD7248, 12 bit, 5 microsecond, $10

ADCs are slow

successive approximation ADCs use DACs to

perform conversion, hence n settling times for a n bit
ADC.
1 to 50 microseconds typical
$10 to $400
8 to 12 bits