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    CSN-221: COMPUTER ARCHITECTURE AND MICROPROCESSORS Computer Arithmetic (Lecture - 7) Longest delay path (critical path) runs from Cin to sum31 Suppose delay of full-adder is 100ps critical path delay = 3,200ps Clock rate cannot be higher than 1 / (3,200x1012) Hz = 312MHz Speeding Up the adder: 16-bit ripple carry adder This is a carry-select ADD

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    CSN-221: COMPUTER ARCHITECTURE AND MICROPROCESSORS Computer Arithmetic (Lecture - 7) Longest delay path (critical path) runs from Cin to sum31 Suppose delay of full-adder is 100ps critical path delay = 3,200ps Clock rate cannot be higher than 1 / (3,200x1012) Hz = 312MHz Speeding Up the adder: 16-bit ripple carry adder This is a carry-select ADD

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    20 views26 pages

    CSN221 Lec 7 PDF

    Uploaded by

    Paru Garg
    CSN-221: COMPUTER ARCHITECTURE AND MICROPROCESSORS Computer Arithmetic (Lecture - 7) Longest delay path (critical path) runs from Cin to sum31 Suppose delay of full-adder is 100ps critical path delay = 3,200ps Clock rate cannot be higher than 1 / (3,200x1012) Hz = 312MHz Speeding Up the adder: 16-bit ripple carry adder This is a carry-select ADD

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    of 26

    CSN221:COMPUTERARCHITECTURE

    ANDMICROPROCESSORS
    Computer Arithmetic
    (Lecture - 7)

    Dr.Sudip Roy
    CourseWebsite:http://faculty.iitr.ac.in/~sudiproy.fcs/csn221_2015.html
    PiazzaSite:https://piazza.com/iitr.ac.in/fall2015/csn221

    32bitRippleCarryAdder:
    c0
    a0
    b0

    sum0

    FA0
    a1
    b1

    sum1

    FA1
    a2
    b2

    sum2

    FA2

    sum31
    a31
    b31

    FA31

    Longestdelaypath(criticalpath)runsfromCin tosum31
    Supposedelayoffulladderis100ps
    Criticalpathdelay=3,200ps
    Clockratecannotbehigherthan1/(3,2001012)Hz=312MHz

    Dr.SudipRoy

    SpeedingUptheAdder:

    b0-b15
    cin
    a16-a31
    b16-b31
    0
    a16-a31
    b16-b31
    1
    Dr.SudipRoy

    16-bit
    ripple
    carry
    adder
    16-bit
    ripple
    carry
    adder
    16-bit
    ripple
    carry
    adder

    sum0-sum15

    Multiplexer

    a0-a15

    sum16-sum31

    This is a carry-select adder


    3

    NbitAdderDesignOptions:
    Type of adder

    Time complexity
    (delay)

    Space complexity
    (size)

    Ripple-carry

    O(N)

    O(N)

    Carry-lookahead

    O(log2N)

    O(N log2N)

    Carry-skip

    O(N)

    O(N)

    Carry-select

    O(N)

    O(N)

    Dr.SudipRoy

    Multiplexor(MUX):
    MUXselectsoneofmanyinputs
    2x1MUX:
    MUX(A,B,S)=(A*S)+(B*~S)

    4x1MUX

    Dr.SudipRoy

    1bitALU(MultiOperationALU):
    ArithmeticLogicUnit(ALU)isahardwarethatperformsoperations
    Onlyoneoperationatatime
    ConsiderAND,OR,NOT,andADDoperationsareimplemented

    Dr.SudipRoy

    A1bitALU(withsubtraction):
    Includeintegersubtractionoperation

    Dr.SudipRoy

    HardwareforAdditionandSubtractionTogether:
    Includeintegersubtractionoperation

    Instructions:
    ADDRA,RB
    SUBRA,RB

    Dr.SudipRoy

    32bitALU(MultiOperationALU):
    1bitALUwiththreeoperations:ADD,OR,AND

    Dr.SudipRoy

    32bitAdder/Subtractor:

    Dr.SudipRoy

    10

    32bitALU(MultiOperationALU):
    ConsiderAND,OR,NOR,andFullAdderoperationsareimplemented
    operation
    ALU0

    operation
    ci
    ai
    bi

    a1
    b1

    result1

    ALU1
    a2
    b2

    FAi

    NOR

    OR

    AND
    Dr.SudipRoy

    result0

    mux

    c0
    a0
    b0

    result2

    ALU2

    resulti
    a31
    b31

    ALU31 result31

    11

    Designing32bitALU:
    Twofunctionalities

    Dr.SudipRoy

    12

    Designing32bitALU:
    Threefunctionalities

    Dr.SudipRoy

    13

    Designing32bitALU:

    Dr.SudipRoy

    Fourfunctionalities

    14

    DetectingOverflow:
    Nooverflowwhenaddingapositiveandanegativenumber
    Nooverflowwhensignsarethesameforsubtraction
    Overflowoccurswhenthevalueaffectsthesign:

    overflowwhenaddingtwopositivesyieldsanegative

    or,addingtwonegativesgivesapositive

    or,subtractanegativefromapositiveandgetanegative

    or,subtractapositivefromanegativeandgetapositive

    ConsidertheoperationsA+B,andA B

    CanoverflowoccurifBis0?

    CanoverflowoccurifAis0?

    Dr.SudipRoy

    15

    DetectingOverflow:
    Overflowoccurswhenthevalueaffectsthesign:
    addingtwopositivesyieldsanegative
    or,addingtwonegativesgivesapositive

    Dr.SudipRoy

    16

    Designing32bitALU:Overflowdetection

    Other 1-bit ALUs, i.e.


    non-most significant
    bit ALUs, are not
    affected.
    Dr.SudipRoy

    17

    Designing32bitALU:Fourfunctionsandoverflow

    Dr.SudipRoy

    18

    A1bitALU(withSLTandOverflowdetector):
    Needtosupportthesetonlessthaninstruction(slt)

    remember:slt isanarithmeticinstruction

    usesubtraction:(ab)<0impliesa<b

    Dr.SudipRoy

    19

    Designing32bitALU:Overflow&SLT
    Modifylast1BitALU
    SLTsetif(a<b) a b<0
    Checksignbitaftersubtraction
    Checkoverflowinlast1BitALU
    NeedtotakeoverflowintoaccountforSLT

    Dr.SudipRoy

    20

    Designing32bitALU:Fourfunctions,SLT&overflow

    Dr.SudipRoy

    21

    Final32bitALU:

    Dr.SudipRoy

    22

    Final32bitALU(CombinationofArithmetic&LogicCircuits):

    Dr.SudipRoy

    23

    A32bitALU(withZerodetector):
    Needtosupporttestforequality

    usesubtraction:(ab)=0impliesa=b
    Note:zeroisa1
    whentheresultis
    zero!

    Dr.SudipRoy

    24

    32bitALU(MultiOperationALU):
    ConsiderAND,OR,NOR,ADD,Subtract,SLToperationsareimplemented

    Dr.SudipRoy

    25

    Functioningof32bitALU:

    Dr.SudipRoy

    26

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