Basic Principle of Boost

The boost is a popular non-isolated power stage topology, sometimes called a step-up
power stage. Power supply designers choose the boost power stage because the
required output is always higher than the input voltage. The input current for a boost
power stage is continuous, or non-pulsating, because the output diode conducts only
during a portion of the switching cycle. The output capacitor supplies the entire load
current for the rest of the switching cycle.
Figure 1 shows a simplified schematic of the boost power stage. Inductor L and
capacitor C make up the effective output filter. The capacitor equivalent series
resistance (ESR), RC, and the inductor dc resistance, RL, are included in the analysis.
Resistor R represents the load seen by the power supply output.

Figure 1. Boost Power Stage Schematic

A power stage can operate in continuous or discontinuous inductor current mode. In
continuous inductor current mode, current flows continuously in the inductor during
the entire switching cycle in steady-state operation. In discontinuous inductor current
mode, inductor current is zero for a portion of the switching cycle. It starts at zero,
reaches peak value, and return to zero during each switching cycle. It is desirable for a
power stage to stay in only one mode over its expected operating conditions because
the power stage frequency response changes significantly between the two modes of
operation.

Boost Steady-State Continuous Conduction Mode (CCM)

In continuous conduction mode, the boost power stage assumes two states per
switching cycle. In the on state, Q1 is on and D1 is off. In the off state, Q1 is off and
D1 is on. A simple linear circuit can represent each of the two states where the
switches in the circuit are replaced by their equivalent circuit during each state. Figure
2 shows the linear circuit diagram for each of the two states.

Figure 2. Boost Power Stage States

The duration of the on state is DTs=TON, where D is the duty cycle set by the
control circuit, expressed as a ratio of the switch on time to the time of one complete
switching cycle, Ts . The duration of the off state is TOFF.

Figure 3. CCM Boost Power Stage Waveforms

Refer to Figures 1 and 2. The inductor-current increase can be calculated by using a
version of the familiar relationship:
diL
V
I L = L T
dt
L
The inductor current increase during the on state is given by:
VL = L

I L ( + ) =

Vi (VQ + I L RL )

TON
L
The quantity IL(+) is the inductor ripple current. During this period, all of the output
load current is supplied by output capacitor C.

The inductor current decrease during the off state is given by:
I L ( ) =

(VO + Vd + I L RL ) Vi
TOFF
L

The quantity IL(-) is also the inductor ripple current.

In steady-state conditions, the current increase, IL(+), during the on time and the
current decrease, IL(-), during the off time are equal. Therefore, these two equations
can be equated and solved for VO to obtain the continuous conduction mode(CCM)
boost voltage conversion relationship:
VO = (Vi I L RL ) (1 +

TON
T
) Vd VQ ( ON )
TOFF
TOFF

And,
D=

TON
T
= ON
TON + TOFF
TS

(1 D ) =

TOFF
TS

The steady-state equation for VO is:

VO =

Vi I L RL
D
Vd VQ
1 D
1 D

*Notice that in simplifying the above, TON+TOFF is assumed to be equal to Ts. This is true only for
CCM mode.

The above voltage conversation relationship for VO illustrates that VO can be

adjusted by adjusting the duty cycle, D, and is always greater than the input because D
is a number between 0 and 1. A common simplification is to assume VQ, Vd, and
RL are small enough to ignore. The above equation simplifies considerably to :

VO =

Vi
1 D

I O = (1 D ) I i

A simplified, qualitative way to visualize the circuit operation is to consider the

inductor as an energy storage element. When Q1 is on, energy is added to the inductor.
When Q1 is off, the inductor and the input voltage source deliver energy to the output
capacitor and load. The output voltage is controlled by setting the on time of Q1. For
example, by increasing the on time of Q1, the amount of energy delivered to the
inductor is increased. More energy is then delivered to the output during the off time
of Q1 resulting in an increase in the output voltage.

To relate the inductor current to the output current, refer to Figure 2 and 3. Note that
the inductor delivers current to the output only during the off state of the power stage.
This current averaged over a complete switching cycle is equal to the output current
because the average current in the output capacitor must be equal to zero.
The relationship between the average inductor current and the output current for the
CCM mode is given by:
I L ( Avg )

TOFF
I
= I L ( Avg ) (1 D ) = I O I L ( Avg ) = O
TS
1 D

Boost Steady-State Discontinuous Conduction Mode (DCM)

Figure 4 shows the inductor current condition where the power stage is at the
boundary between continuous and discontinuous mode. This is where the inductor
current just falls to zero and the next switching cycle begins immediately after the
current reaches zero. From the charge and discharge of output capacitor, the output
current is given by:
I O (TON + TOFF ) =

2 IO
I PK
TOFF I PK =
2
1 D

Figure 4. Boundary Between Continuous and Discontinuous Mode

Further reduction in output load current puts the power stage into discontinuous
current conduction mode(DCM). The discontinuous mode power stage input-tooutput relationship is quite different from the continuous mode.

Figure 5. Discontinuous Current Mode

The duration of the on state is TON=DTS, where D is the duty cycle set by the
control circuit. The duration of the off state is TOFF=D2TS. The idle time is the
remainder of the switching cycle and is given as TS-TON-TOFF= D3TS. These
times are shown with the waveforms in Figure 6.
The inductor current increase during the on state is given by:
Vi
V
TON = i D TS = I PK
L
L
The ripple current magnitude, IL(+), is also the peak inductor current, Ipk, because
in discontinuous mode. The current starts at zero each cycle.
The inductor current decrease during the off state is given by:
I L ( + ) =

VO Vi
V Vi
TOFF = O
D 2 TS
L
L
As in the continuous conduction mode case, the current increase, IL(+), during the
on time and the current decrease during the off time, IL(-), are equal. So,
I L ( ) =

VO = Vi

TON + TOFF
D + D2
= Vi
TOFF
D2

Figure 6. Discontinuous Mode Boost Power Stage Waveforms

Now calculate the output current. It is the average over the complete switching cycle
of the inductor current during the D2 interval.
IO =

VO
1
1
= ( I PK D 2 TS )
R Ts
2

VO
1 1 Vi

=
( D TS ) D 2 TS
R TS 2
L

V D D 2 TS
= i
2L

IO =

Now solve two equations, IO and VO, the discontinuous conduction mode boost
voltage conversion relationship is given by:
1+ 1+
VO = Vi

4 D2
K

D = K M ( M 1)

2
Where K is defined as:
K=

2L
R TS

M =

VO
Vi

Critical Inductance
The previous analyses for the boost power stage have been for continuous and
discontinuous conduction modes of steady-state operation. The conduction mode of a
power stage is a function of input voltage, output voltage, output current, and the
value of the inductor. A boost power stage can be designed to operate in continuous
mode for load currents above a certain level usually 5 to 10% of full load. Usually, the
input voltage range, output voltage, and load current are defined by the power stage
specification. This leaves the inductor value as the design parameter to maintain
continuous conduction mode.
The minimum value of inductor to maintain continuous conduction mode can be
determined by the following procedure.
First, define IOB as the minimum output current to maintain continuous conduction
mode, normally referred to as the critical current. This value is shown in Figure 4. In
boundary between CCM and DCM,
D 2 = (1 D )
Vi = VO (1 D )

I OB =

Vi D D 2 TS VO D (1 D ) 2 TS
=
2L
2L

Lmin

VO D (1 D ) 2 TS
2 I OB

The worst case condition for the boost power stage is at an input voltage equal to onehalf of the output voltage because this gives the maximum IL
Lmin

VO TS
16 I OB

Output Capacitor
In switching power supply power stages, the function of output capacitor is to store
energy. The output capacitance for a boost power stage is generally selected to limit
output voltage ripple to the level required by the specification. The series impedance
of the capacitor and the power stage output current determine the output voltage ripple.
The three elements of the capacitor that contribute to its impedance (and output
voltage ripple) are equivalent series resistance (ESR), equivalent series inductance
(ESL), and capacitance (C). The voltage variation due to the inductor current flow in
the output capacitor is approximately:

For CCM Mode:

VO =

2
I PK
L
2 C (VO + Vd VIN )

For DCM Mode

2L
I O (max) 1
R Ts

C
f s V o

I O max Dmax
f S VO

The above equation is based on the assumption that all inductor ripple current flows
through the capacitor and the ESR is zero. Now, assuming that the capacitor is very
large, the ESR needed to Limit the ripple to VOmax is:
For CCM Mode:
VO max

ESR
(

I O (max)
1 D Max

I O
)
2

VO max
I PK

For DCM Mode:

ESR

VO max VO max
=
I O
I PK

*The output filter capacitor should be rated at least 10~20 times the calculated
capacitance and 30 to 50 percent lower than the calculated ESR.

The RMS value of the ripple current flowing in the output capacitance(CCM) is given
by:
I CRMS = I O

D
1 D

10

Synchronous Rectifier
Synchronous rectification allows for high efficiency by reducing the losses associated
with the Schottky rectifiers.

The Schottky rectifier D1 conducts during the time that MOSFET Q2 is on, which
improves efficiency by pre-venting the synchronous-rectifier MOSFET Q2 loss body
diode from conducting.

11

Boost DC/DC Converter Small Signal Model (Transfer Function):

VO ( s ) = Vref ( s )
T ( s) =

GVg ( s )
Z ( s)
1 T
(
) + V g ( s )(
) iload ( s )( OUT )
H 1+ T
1+ T
1+ T

H ( s )GC ( s )GVd ( s )
= loop
VM

12

gain

For CCM Mode:

GVd ( s ) =

GVg ( s ) =

Vg

(1 D )2

1
(1 D )2

1 +

1+

s
s
1

wZ 1
wZ 2
2
s
s
+
w0Q w0

1 + s + s

w0Q w0

s
s
+
1 +
w1Q1 w1

Z OUT ( s ) = Req
2
1 + s + s

w0Q w0

Q=

w0

w0 =

RL
1
+
L C ( R + RC )

wZ 1 =

1
RC C

wZ 2

RL
D
Req =
+
R
2
(1 D ) 1 D C

w1Q1 =

1
LC

RL + (1 D ) 2 R (1 D )

R
LC

2
(
1 D ) R RL
=

w1 =

1 D
LC

(1 D ) 2 R
L

Req
RC

1
L
+ RC C
(1 D ) 2 Req

* Two Pole fLC , One Zero fESR for GVd(s) and One Right-Half-Plane zero

13

z From a practical view, at RHP zero frequency, the loop gain starts increasing at a
20dB/decade rate but the loop phase decreases by 45 degrees (in a normal, LHP
zero, the loop phase will increase by +45 degrees). This imposes the restriction
that the gain be rolled off to 0dB before encountering the RHP zero.
z The output inductor, capacitor and the capacitors ESR must be selected so that
the double pole occurs first and then the output capacitor zero and then the RHP
zero. This assures that the loop gain crosses 0dB at a slope that is first order
(20dB/decade) and that the instability inherently associated with the RHP zero is
circumvented by crossing 0dB before the RHP zero frequency occurs.

Compensate rule:
1. Decrease the double pole influence. f Z ( compensator )

1 1
~ ) fS
10 6

2. Crossover frequency fC f C < f ESR

fC (

3. Decrease the RHP zero influence f C <<

1
f Z ( RHP )
6

For DCM Mode:

VO
M 1 1

GV d ( s ) = 2
s
D 2 M 1
1 +
wP

M=

VO
Vg

wP =

2 M 1
( M 1) RC

14

3
f LC
4

Compensator 1:

GC =

VC
=
VO

(1 + SR2 C1 )[1 + S ( R1 + R3 )C 3 ]
RCC
SR1 (C1 + C 2 )(1 + S 2 1 2 )(1 + SR3 C 3 )
C1 + C 2

Compensator 2:

GC =

VC (1 + SR2 C1 )[1 + S ( R1 + R3 )C 3 ]
=
VO
SR1C1 (1 + SR3 C 3 )

15

Compensator 3:

GC =

VC (1 + SR2 C1 )
=
VO
SR1C1

Compensator 4:

GC =

VC
=
VO

(1 + SR2 C1 )
RCC
SR1 (C1 + C 2 )(1 + S 2 1 2 )
C1 + C 2

16

Compensator 5:

GC =

VC
1 + SR2 C 2
R4
)(
)
= (Gm
VO
R1 + R4
SC 2

Compensator 6:

GC =

VC
R4
1 + SR2 C 2
1
= (Gm
)(
)
VO
R1 + R4 SC1C 2 R 2 + C1 + C 2 S

17

Compensator 7:

GC =

VC
1 + SR4 C1
R2
= (Gv
)(
)
VO
R1 + R2 S ( R3 + R4 )C1 + 1

Compensator 8:

VC
1 + S [R4 (C1 + C 2) + R5 C 2 ] + S 2 R4 R5 C1C 2
R2
GC =
= (Gv
)(
)
VO
R1 + R2 1 + S [( R3 + R4 )(C1 + C 2 ) + R5 C 2 ] + S 2 ( R3 + R4 ) R5 C1C 2

18

Lmin

VO D (1 D ) 2 TS
Vi

=
TON
2 I OB
2 I OB VO

Application Example of Boost Circuit 1

19

VIN=2.0, Vo=3.3V,Io=300mA, fosc=500kHz

t ON =

V V IN
1
( O
)
fosc
VO

1. Inductor L1:
The condition of L because of a continuous current in the range of the use voltage
2

VIN
tON
2 I OVO
2.0 2
1
3.3 2.0

1.59uH
3
2 0.3 3.3 500 10
3.3

Select L=10H, Load current value which becomes continous current condition.

IO

VIN (max)

2 LVO

tON

2.0 2
1
3.3 2.0

0.0478 A
6
3
2 10 10 3.3 500 10
3.3

The peak value of the inductor IL

VIN (min)
VO
3.3
2.0
1
3.3 2.0
IO +
tON
0.3 +

IL
6
3
VIN (min)
2L
2.0
2 10 10
500 10
3.3
0.495 + 0.0788 0.574 A
2. N-MOSFET Drain Current: Peak value
The peak value of the drain current of N-MOSFET should be in the rated current
value of N-MOSFET. The peak current of N-MOSFET is assumed to be ID, ID is
obtained by the following formula.
ID

VO
VIN (min)

IO +

VIN (min)
2L

tON

3.3
2.0
1
3.3 2.0
0.3 +

6
3
2.0
2 10 10
500 10
3.3

0.495 + 0.0788 0.574 A

PD ( Q1)

I
1
I
= O R DS ( ON ) D + Vo ( O ) 2 (t r + t f ) f s + QGate VGS f s
2
1 D
1 D

Where

tr and tf are the MOSFET turn-on and turn-off switching times

QGate is the MOSFET gate-to-source capacitance

20

3.Diode D1:
The peak value of diode current IFSM
I FSM

VO
V IN (min)

IO +

V IN (min)
2L

t ON

3.3
2.0
1
3.3 2.0
0.3 +

6
3
2.0
3.3
2 10 10
500 10

0.495 + 0.0788 0.574 A

The Average Current IF
I F I O 0.2 A
The repetition peak reverse voltage of the diode VRRM
VRRM VO 3.3V

4. Output capacitor
If the desired output ripple voltage is 50mV, then the capacitor needed is:
C

0.574 2 10
= 19.38F
2 0.05 (3.3 + 0.4 2.0)

Now, assuming that the capacitor is very large, the ESR needed to Limit the ripple to
50mV is:
ESR

VO max VO max
0.05
=
=
= 87.1m
I O
I PK
0.574

21

Boost Converter GVd(s) Bode Plot

fZ1=31.83KHz
fZ2(RHP)=62.54KHz
fP1,2=3.09KHz

20
10
G ain dB

0
-10
-20
-30
-40
-1
10

10

10

10
10
Frequency (H z)

10

10

10

Phase deg

-50

-100

-150

-200
-1
10

10

10

10
10
Frequency (H z)

22

10

10

10

Compensator GVc(s)Vm(s) Bode Plot

30
20
G ain dB

10
0
-10
-20
-30
-1
10

10

10

10
10
Frequency (H z)

10

10

10

Phase deg

50

-50

-100
-1
10

10

10

10
10
Frequency (H z)

23

10

10

10

Loop Gain T(s) Bode Plot

fC=5.19KHz
GM=39.35dB

60

G ain dB

40

PM=52.42

20
0
-20
-40
-1
10

10

10

10
10
Frequency (H z)

10

10

10

50

Phase deg

0
-50
-100
-150
-200
-1
10

10

10

10
10
Frequency (H z)

24

10

10

10

T(s)/1+T(s)Step Response
1.2

Am plitude

0.8

0.6

0.4

0.2

-0.2
0

0.01

0.02

0.03

0.04
0.05
Tim e(sec)

25

0.06

0.07

0.08

0.09

Application Example of Boost Circuit 2

26

VIN=1.8~3.3V, Vo=15V,Io=20mA, fosc=500kHz

t ON =

V V IN
1
( O
)
fosc
VO

1. Inductor L1:
The condition of L because of a continuous current in the range of the use voltage
L

V IN (max)

2 I O VO

t ON

3.32
1
15 3.3

28.3uH
3
2 0.02 15 500 10
15

Select L1=10H, Load current value which becomes continous current condition.

IO

V IN (max)

2 LVO

t ON

3.3 2
1
15 3.3

0.056628 A
6
3
15
2 10 10 15 500 10

The power stage is operated on DCM Mode.

4 D2
1+ 1+
K
VO = Vi
2
K=

D=

2L
R TS

M=

D = K M ( M 1)
VO
VI

2 10 10 6
15
15

(
1) = 90.27%
15
1
1.8 1.8

0.02 500 10 3

If it operated on CCM mode, the Duty is :

D=

VO Vi 15 1.8
=
= 88%
VO
15

It is absurd for the Duty Cycle operated at CCM mode and DCM mode. It also can
not achieve the desired output voltage with chip maximum duty cycle. It need to
change the inductance.
27

Select L1=3.3H,
2 3.3 10 6
15
15

(
1) = 51.85%
15
1
1.8 1.8

0.02 500 10 3

D=

The peak value of the inductor IL

V IN
1.8
1
t ON

0.5185 0.566 A
6
L
3.3 10
500 10 3

IL

2. N-MOSFET Drain Current: Peak value

The peak value of the drain current of N-MOSFET should be in the rated current
value of N-MOSFET. The peak current of N-MOSFET is assumed to be ID, ID is
obtained by the following formula.
ID

V IN
1.8
1
t ON

0.5185 0.566 A
6
L
3.3 10
500 10 3
2

I
1
I
PD ( Q1) = O R DS ( ON ) D + Vo ( O )(t r + t f ) f s + QGate VGS f s
2
1 D
1 D
Where

tr and tf are the MOSFET turn-on and turn-off switching times

QGate is the MOSFET gate-to-source capacitance

3.Diode D1:
The peak value of diode current IFSM
I FMS

V IN
1.8
1
t ON

0.5185 0.566 A
6
L
3.3 10
500 10 3

The Average Current IF

I F I O 0.02 A
The repetition peak reverse voltage of the diode VRRM
V RRM VO 15V

28

4. Output capacitor
If the desired output ripple voltage is 50mV, then the capacitor needed is:
2 3.3 10 6
)
15
1

0.02 500 10 3
= 0.7469 F
500 10 3 0.05

0.02 (1
C

Now, assuming that the capacitor is very large, the ESR needed to Limit the ripple to
50mV is:
ESR =

VO max VO max
0.05
=
=
= 88.3m
I O
I PK
0.566

29

Application Example of Boost Circuit 3

30

VIN=3.0~3.3V, Vo=9V,Io=200mA, fosc=640kHz

tON =

V VIN
1
( O
)
fosc
VO

1. Inductor L1:
The condition of L because of a continuous current in the range of the use voltage
L

VIN (max .)

2 I OVO

tON

3.32
1
9 3.3

3.30uH
3
2 0.2 9.0 640 10
9

Select L=10H, Load current value which becomes continous current condition.

IO

VIN (max)
2 LVO

tON

3.32
1
9 3.3

0.066 A
6
3
2 10 10 9 640 10
9

The peak value of the inductor IL

VIN (min)
VO
9
3.0
1
9 3.0
IL
IO +
tON
0.2 +

6
3
VIN (min)
2L
3.0
2 10 10
640 10
9
0.6 + 0.156 0.756 A
2. N-MOSFET Drain Current: Peak value
The peak value of the drain current of N-MOSFET should be in the rated current
value of N-MOSFET. The peak current of N-MOSFET is assumed to be ID, ID is
obtained by the following formula.
ID

VO
VIN (min)

IO +

VIN (min)
2L

tON

9
3.0
1
9 3.0
0.2 +

6
3
3.0
2 10 10
640 10
9

0.6 + 0.156 0.756 A

2

I
1
I
PD ( Q1) = O R DS ( ON ) + Vo ( O ) 2 (t r + t f ) f s + QGate VGS f s
2
1 D
1 D
Where

tr and tf are the MOSFET turn-on and turn-off switching times

QGate is the MOSFET gate-to-source capacitance

31

3.Diode D1:
The peak value of diode current IFSM
I FSM

VO
VIN (min)

IO +

VIN (min)
2L

tON

9
3.0
1
9 3.0
0.2 +

6
3
3.0
2 10 10
640 10
9

0.6 + 0.156 0.756 A

The Average Current IF
I F I O 0.2 A
The repetition peak reverse voltage of the diode VRRM
V RRM VO 9.0V

32

33

34

4. Soft-Start and Short circuit time

I SCP =

V
C
T

TS = T =

Ts:
I SCP = 1A

0.8
0.1 = 80mS
1

5. Output voltage is obtained by applying the internal reference voltage 0.5V to the
below equation:
R1 + R 2
R2
Set R2=2K, R1 becomes 34K
VO = 0.5

6. In practical use, the user should red the RT and CT values from the characteristic
curve in the data sheet or should determine an approximate target value by using the
equation.
f =

1
( Hz )
2.1 CT RT

The setting oscillating frequency is 640KHz, then

CT=220pF
RT=3K
35

7. AT1380 has a feature to adjust output source current by inserting a resistor between
the BR/CTL pin and GND. For example, the following shows the case to set source
current to 30mA.
(a) Obtain IBR at IOUT=50mA from BR/CTL pin current vs. Output source
current curve. IBR -0.5mA at IOUT=30mA
(b) Obtain VBR at IBR -0.5mA from BR/CTL pin current vs. BR/CTL pin
voltage curve.
VBR 200mV at IBR -0.5mA
(c) RB= VBR / IBR =200/0.5=400
*AO3400 Spec.

ID=5.8A(max.)

Ciss=823pF

V
= IS
t

823 1012
I OUT I S

36

3.3
= 28mA= I S
100 109

37

8. If the desired output ripple voltage is 50mV, then the capacitor needed is:
0.756 2 10
C=
= 9.36F
2 0.05 (9 + 0.4 3.3)
Now, assuming that the capacitor is very large, the ESR needed to Limit the ripple to
50mV is:
ESR =

VO max VO max
0.05
=
=
= 66.1m
I O
I PK
0.756

*The output filter capacitor should be rated at least two to ten times the
calculated capacitance and 30 to 50 percent lower than the calculated ESR.

9. The error amplifier is fixed gain amplifier of 40dB. The CP capacitor is connected
with the FB-pin, LPF is composed, and the phase of the loop characteristic of the
switching regulator makes amends. Usually the capacitor CP is 0.1F.
*CCM boost converters have a dc gain, a complex pole pair, and a right-half-plane zero, making
feedback loop stabilization difficult. DCM boost converter frequency response is well behaved,
being comprised of a dc gain and single pole.

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CH1:OUT CH2:AO3400(Drain) CH4:IL

Fig1. Iout=70mA waveform

Fig2. Iout=30mA waveform

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Fig3. Iout=100mA waveform

Fig4. Iout=200mA waveform

40

References
1. Application Report Understanding Boost Power Stages in Switchmode Power
Supplies, TI Literature Number SLVA061, 1999.
2. R. W. Erickson, Fundamentals of Power Electronics, New York: Chapman and
Hall, 1997.

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