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This Book
Electronic Devices
and Integrated
Circuits
Table of Contents
Index
Copyright
Dedication
Preface
Acknowledgements
Ch. 1. Physics of
Semiconductors
Ch. 2. Physical Phenomenon
in Homojunction
Ch. 3. Diode as Circuit
Element
Ch. 4. Junction Diode
Rectifier
Solution:
15.12. Filters
15.13. Simulated
Inductance Approach
15.14. DVCVS/DVCCS
15.15. BiFET and BiMOS
Circuits
15.16. Analog Computer
15.17. SOLVED
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PROBLEMS
Ch. 16. Regulated Power
Supplies
Ch. 17. Integrated Circuit
Timers
At node v() of A2
Solution:
From Fig. 15.102
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4. Obtain the voltage vo for the circuit of Fig. 15.103. (AMI 1992).
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Solution:
Writing node equations as
This illustrates that using only few kilo ohm resistances in the form of
T-network provides very large feedback resistance resulting into very large
gain.
5. Obtain the voltage gain vo/vi for Fig. 15.104(a).
Solution:
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Solution:
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Solution:
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8. Prove that the voltage gain and input resistance with feedback in Fig.
and
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.
9. Show that if Ri = , Ro = 0 and A1 and A2 < 0 in Fig. 15.107, then vo =
Solution:
The output of first op-amp is expressed as (v1 vf ) A1 = Vo1
The output of the second op-amp is
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10. For the dc level shifter circuit shown in Fig. 15.108(a), determine the level
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Solution:
12. Draw the output wave shapes of the voltage follower using op-amp with 1
V/ms slew rate with the square wave input shown in Fig. 15.109(a).
Solution:
It is seen from the wave shapes of vo that remarkable distortion occurs for
slew rate at high frequency. Fig. 15.109(b) is100 Hz signal that does not
produce appreciable distortion. A 10 kHz signal produces appreciable
distortion as shown in Fig. 15.109(c). A 1 MHz signal becomes sawtooth
wave as in Fig. 15.109(c).
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13. A square wave input of 8 V peak to peak magnitude and frequency 2 MHz is
14. The 741 op-amp is used as an inverting amplifier with its gain = 50. What
would be the maximum input signal magnitude applied to it if its voltage gain
is flat upto 100 kHz?
Solution:
15. A peak to peak input signal of 500 mV has to produce a peak to peak
undistorted output voltage of 3 V with a rise time of 4 ms. Can 741 be used
for such application?
Solution:
Rise time = 3 V (90% 10%) = 3 V (0.90 0.10) = 2.4 V
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1), where V is the forward voltage and is the ideality factor = 1 (Ge) and 2
(Si). Express Vo as a function of Vi. What is the value of input voltage to
result in output voltage Vo = 0, if R = 100 K, IS = 1 A and
= 26 mV.
17. In the circuit of Fig. 15.112 the output voltage Vo is initially zero. The switch
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(b)
(c)
18. Show that the circuit in Fig. 15.113 simulates an inductance across its input
terminals.
Solution:
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Solution:
When input is changing from 12 V to +12 V, the capacitor gets charged to
the maximum voltage exponentially with the time constant = 12 K 0.1
106 = 1.2 ms. In order to find out the time taken by the capacitor to reach
final value = 12 V, we have to see the following expression
19. Draw the waveform of vo(t) as function of vi. Specifying the output voltage
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is
inductive.
Solution:
21. How much is the output voltage in the circuit of Fig. 15.116.
Solution:
Writing node equation at the inverting input terminal of the op-amp results
as
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22. Obtain the value of resistor R for the condition that both inputs V and V+
23. Derive a relationship between the input and output voltages for the circuit
shown in Fig. 15.118. Also obtain the output waveform for a symmetrical
square wave input voltage of amplitude Vp and frequency f.
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Solution:
If the input voltage is square wave, the output voltage is a triangular wave of
magnitude VP and frequency f.
24. Find out the value of two resistors used in a non-inverting op-amp to result
25. Obtain the transfer function between input and output voltages of Fig.
15.119. What will be the value of the capacitor required to yield a phaseshift
of 270 at a frequency of 1 kHz with R = 10 K?
Solution:
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The plots of magnitude and phase shift are shown in Fig. 15.120.
26. Obtain the transfer function between input and output voltages of Fig.
15.121.
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Solution:
27. What value of the resistance RB will provide balance of the bridge yielding Vo
Solution:
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28. Sketch the waveform of the output voltage for the circuit of Fig. 15.124.
What portion of the current io coming out from the operational amplifier flow
as the load current iL?
Solution:
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Solution:
, assume an
Solution:
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31. Obtain the voltage transfer function between output and input voltages of
Fig. 15.127. When switch is open, the opamp does not draw any current and
hence I2 = 0.
Solution:
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32. Obtain voltage gain under the control of voltage applied at the gate of the
JFET in Fig. 15.128. When control signal = 0, the JFET offers minimum drain
resistance and hence non-inverting input terminal is pulled to approximately
ground. Thus,
Solution:
When the control signal is high, it reduces the channel width and provides
very large resistance to provide open circuit, thus V1 = V2 = Vi.
33. Find the condition of input voltage for making the LED ON in Fig. 15.129.
Solution:
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34. What will be the value of input voltage Vi such that the LED in Fig. 15.130
starts glowing.
LED will glow if Vi > 5 V.
35. An op-amp with a slew rate of 1.5 V/ms has been used as an inverting
amplifier with gain of 10. What is the maximum input signal if the frequency
of input signal is 1 kHz?
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38. The switch was closed initially for 0.5 minutes and then opened. What will be
the input voltage if the output in Fig. 15.133 is initially 0 and 5.4 V after
the switch is opened.
input resistor of equal values as in Fig. 15.134. What will be the output, if
inputs to inverting and non-inverting terminals are 1.5sin t and 1.5 cos t.
Solution:
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41. What is the relationship between resistors R and R1 and R2 in Fig. 15.136.
Solution:
42. The offset voltage to the circuit of Fig. 15.137 is 1 mV. How much output
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F and
44. Calculate the ratio of ON duration to OFF duration of the output waveform of
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46. Obtain the output voltage of the amplifier shown in Fig. 15.141
47. The output voltage of Schmitt trigger drawn in Fig. 15.142 is limited to 10 V
and 5 V connecting suitably chosen Zener diodes across the output. What
are the upper trip and lower trip voltages of the circuit?
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48. Obtain the output voltage for input voltage vi = sint applied to the circuit in
Fig. 15.143.
Solution:
For vi > 0 V, diode is reverse biased, no loop closes. vo = vi
For vi < 0 V, diode is forward biased, loop closes. vo = vi
49. Obtain the output voltage of Fig. 15.144. What is the name of this circuit?
Solution:
For Vi > 0, D1 is forward biased and D2 is reverse biased, Vo = 0.
. The
For Vi < 0, D1 is reverse biased and D2 is forward biased,
circuit is a half wave rectifier and conducts for negative half cycle only.
in Fig. 15.145.
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in Fig. 15.146.
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The circuit of Fig. 15.148 can now be analyzed for its input impedance as
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= negative conductance.
54. Find out the output voltage vo for the circuit in Fig. 15.149.
55. Obtain the output voltage of an op-amp summer shown in Fig. 15.150.
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