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WCH CH340G Datasheet

WCH CH340 Series USB Interface Integrated Circuit

CH340G USB to UART Interface

Datasheet
WCH Version 1E
DreamCity Version 1.0

Disclaimer from DreamCity Innovations

This is a third-party translation of WCHs CH340 Series chipsets Chinese datasheet, with
information regarding CH340G chip extracted. The two other chips sharing the same
datasheet, CH340R and C340T, have official English version.

1. Overview
CH340 is a series of USB bus adapters, that provides serial, parallel or IrDA interfaces over
the USB bus (note: CH340G supports serial interface only). The CH340G integrate circuit
provides common MODEM signals to allow adding a UART to a computer, or converting
existing UART devices to USB interface.

2. Features
Full-speed USB interface, compatible with USB 2.0 interface.
Operates with a minimum amount of external components: a crystal and a minimum of four
capacitors.

Provides a virtual serial port for upgrading existing serial port devices or adding serial ports
to a PC.

Supports all existing applications using serial ports without the need of changing existing
code.

Hardware full-duplex serial interface with internal FIFO. Baud rate range from 50bps to
2Mbps.

Supports common flow control signals RTS, DTR, DCD, RI, DSR and CTS.
Supports RS232, RS422 and RS485 with external level shifting components.
Uses CH341 driver.
Supports 5V and 3.3V operation.
RoHS-compliant narrow body SO-16 package.

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WCH CH340G Datasheet

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WCH CH340G Datasheet

Table of Contents
CH340G USB to UART Interface Datasheet
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1. Overview

2. Features

Table of Contents

3. Specifications

3.1. Absolute Maximum Ratings

3.2. DC characteristics

3.3. AC characteristics

4. Pinout

5. Application Notes

5.1. Example: USB RS232 adapter

5.2. Example: Optically isolated USB to UART adapter

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WCH CH340G Datasheet

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WCH CH340G Datasheet

3. Specifications
3.1. Absolute Maximum Ratings
Operating the chip at or beyond those ratings will cause the chip to malfunction, even
irreversibly damage the chip.
Symbol

Name

Minimum Maximum Unit

TA

Operating temperature

-40

85

TS

Storage temperature

-40

125

VCC

Supply rail voltage, reference to GND pin

-0.5

6.5

VIO

IO pin voltage, reference to GND pin

-0.5

VCC+0.5

3.2. DC characteristics
Symbol
VCC

Name
Supply rail voltage

ICC
ISLP

Minimum Typical Maximum Unit

5V operation

4.5

5.5

3.3V operation

3.3

3.3

3.8

12

30

5V operation

150

200

3.3V operation

50

80

Operating current
Sleeping current

V
mA
A

VIL

Low input voltage

-0.5

0.7

VIH

High input voltage

2.0

VCC+0.5

VOL

Low output voltage

0.5

VOH

High output voltage

VCC-0.5

IUP

Internal pull-up strength

150

300

IDN

Internal pull-down strength

-50

-150

-300

VR

Brown-out detector threshold voltage

2.3

2.6

2.9

3.3. AC characteristics
Symbol

Name

FCLK

Clock frequency (at pin XI)

TPR

Power-on reset time

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Minimum Typical Maximum Unit

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11.98

12.00

12.02

MHz

20

50

ms

WCH CH340G Datasheet

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WCH CH340G Datasheet

4. Pinout
Pin # Name Direction Comment
1

GND

Power

Ground reference of the chip. Connect to the ground pin of USB bus.

TXD

Output

UART Data Transmit output.

RXD

Input

UART Data Receive input.

V3

Power

Internal 3.3V reference for USB physical layer. Decouple with a 4.7-20nF
capacitor when in 5V operation, or tie to VCC when in 3.3V operation.

UD+

Analog

USB D+ signal.

UD-

Analog

USB D- signal.

XI

Input

Input of the crystal oscillator. Connect to the crystal resonator and load
capacitors.

XO

Output

Output of the crystal oscillator. Connect to the crystal resonator and load
capacitors.

CTS#

Input

UART flow control signal Clear to Send.

10

DSR#

Input

UART flow control signal Data Set Ready.

11

RI#

Input

UART flow control signal Ring In.

12

DCD#

Input

UART flow control signal Data Carrier Detect.

13

DTR#

Output

UART flow control signal Data Terminal Ready.

14

RTS#

Output

UART flow control signal Request to Send.

15

R232

Input

Auxiliary RS232 enable. Active high, internal pull down.

16

VCC

Power

Supply rail for the chip.

5. Application Notes
CH340 chip have built in USB bus pull-up resistors and on-chip signal termination, UD+ and
UD- pins should be connected to the USB bus lines directly.
CH340 have built in power on reset circuitry.
During operation CH340 requires a 12MHz clock signal present at XI pin. Generally this clock
signal is provided by connecting a 12MHz crystal resonator and load capacitors between XI
and XO pins, and the built-in crystal resonator will provide the required clock signal. When
using an external oscillator feed the clock signal into XI pin, and leave XO pin unconnected.
CH340 supports 5V and 3.3V operation. When using 5V operation, supply 5V to VCC pin, and
decouple the internal 3.3V reference with a capacitor of 4.7-20nF from V3 pin to ground.
When using 3.3V operation, tie V3 pin to VCC pin and supply 3.3V power.
CH340 supports USB device suspension to reduce energy consumption. When NOS# signal
is active this feature is disabled. (Note: CH340G does not have this pin.)
Supported hardware flow control signals: CTS#, DSR#, RI#, DCD#, DTR# and RTS#. All flow
control pins are software controlled.
Auxiliary pins: IR#, R232, CKO and ACT#. (Note: only R232 is present on CH340G) When
R232 signal is asserted the RXD signal is inverted. R232 is latched during Power-On Reset.

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WCH CH340G Datasheet

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CH340 have built-in FIFO buffer, and supports simplex, half- and full-duplex asynchronous
communication. The UART interface supports 1 start bit, 5-8 data bits, 1 or 2 stop bits, and
odd, even, space or mark parity bits. CH340 supports common baud rates: 50, 75,
100, 110, 134.5, 150, 300, 600, 900, 1200, 1800, 2400, 3600, 4800, 9600, 14400, 19200,
28800, 33600, 38400, 56000, 57600, 76800, 115200, 128000, 153600, 230400, 460800,
921600, 1500000, 2000000 baud. Transmitter baud rate error is less than 0.3%, receiver baud
rate error tolerance is at most 2%.
The emulated COM port is fully functional. Compatible with most applications using the serial
port, without the need of changing existing code.
CH340 can be used to upgrade existing peripherals using serial ports into USB devices, or
adding serial ports to a PC. With external level shifting hardware, interfaces including RS232,
RS422 and RS485 can be provided.
By adding infrared adapters, CH340 can be used to implement USB to SIR adapter, allowing a
PC to communicate with IrDA peripheral.

USB

1
2
3
4

C1

C2

10

10n

+5V

+3V3

+3V3
DD+

16
1
4

GND

X1

MF-SMDF050

U$1

+5V

5.1. Example: USB RS232 adapter

Q1
12M
C4

C3

5
6

D+
22p D-

22p

PN61729-S

7
8

IC2
VCC
GND
V3

TXD
RXD
RTS#
DTR#
DCD#
RI#
DSR#
CTS#

XI
XO

D+
D-

R232

2
3

TXD
RXD

14
13
12
11
10
9

RTS
DTR
DCD
RI
DSR
CTS

15

GND

100n

C5

IC1
12
14
15

C6

100n

16

DTR
RTS

7
6
20
21

RXD
CTS
DCD
RI
DSR

8
5
26
22
19

TXD

24

C1+
C1V+
C2+
V-

GND

IC1P

GND10

10

11VCC

C9

+5V

GND

C7

C8

100n

100n

13
17

C2T1IN
T2IN
T3IN
T4IN
R1OUT
R2OUT
R3OUT
R4OUT
R5OUT
EN

GND
T1OUT
T2OUT
T3OUT
T4OUT
R1IN
R2IN
R3IN
R4IN
R5IN
SHDN

2
3
1
28

H_DTR
H_RTS

9
4
27
23
18

H_RXD
H_CTS
H_DCD
H_RI
H_DSR

H_TXD
X2
H_DCD
H_RX
H_TX
H_DTR

1
2
3
4
5

6
7
8
9

H_DSR
H_RTS
H_CTS
H_RI

25

GND

MAX213ECWI

The schematic above implements a USB to RS232 adapter based on CH340G and external
level adapter MAX213. When implementing this regulator-less 5V board, place capacitor C2
close to the V3 pin.

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WCH CH340G Datasheet

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WCH CH340G Datasheet

USB

C1

1
2
3
4

+5V

C2

DD+

10n

GND

X1

MF-SMDF050

U$1

+5V

+3V3

5.2. Example: Optically isolated USB to UART adapter

10
C3

VCC
GND
V3

7
8

Q1
12M
C4

XI
XO

5
6

D+
22p D-

22p

PN61729-S

IC2

16
1
4

D+
D-

TXD
RXD
RTS#
DTR#
DCD#
RI#
DSR#
CTS#
R232

2
3

TXD
RXD

14
13
12
11
10
9

RTS
DTR
DCD
RI
DSR
CTS

15

R5

RXD

R8
510

DTR

VDD

PC817
OK3
4

R3

PC817
OK4
1

C5
10

IC1G$2 IC3G$2

IC3G$1

510
R4

GND
CTS
VCC
TXO
RXI
DTR

JP1

VCC

GNDIO

74LVC1G06DBV

10k

GND

VCC

R7
10k

R2

PC817
OK2

IC1G$1

510

VDD

R1

GND

510

TXD

GNDIO

74LVC1G06DBV

10k
C6

R6

OK1
4

GND

DNP

10k

CTS

VDD

+5V

GND

PC817
GNDIO

GND

This adapter provides optically isolated inputs and outputs with 4 PC817 optoisolators.
Respect the isolation border when laying out the board, and if possible, cut slots under the
optoisolators. The two 74LVC1G06 is optional, but helpful when the input pins cannot source
too many current.

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WCH CH340G Datasheet