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DATA SHEET

MOS FIELD EFFECT TRANSISTOR

2SK3455
SWITCHING
N-CHANNEL POWER MOS FET

DESCRIPTION

ORDERING INFORMATION

The 2SK3455 is N-channel DMOS FET device that

PART NUMBER

PACKAGE

2SK3455

Isolated TO-220

features a low gate charge and excellent switching


characteristics, designed for high voltage applications
such as switching power supply, AC adapter.

FEATURES
Low gate charge
QG = 30 nC TYP. (VDD = 400 V, VGS = 10 V, ID = 12 A)
Gate voltage rating 30 V
Low on-state resistance
RDS(on) = 0.60 MAX. (VGS = 10 V, ID = 6.0 A)
Avalanche capability ratings
Isolated TO-220 package

ABSOLUTE MAXIMUM RATINGS (TA = 25C)


Drain to Source Voltage (VGS = 0 V)

VDSS

500

Gate to Source Voltage (VDS = 0 V)

VGSS

30

Drain Current (DC) (TC = 25C)

ID(DC)

12

ID(pulse)

36

Total Power Dissipation (TA = 25C)

PT1

2.0

Total Power Dissipation (TC = 25C)

PT2

50

Channel Temperature

Tch

150

Storage Temperature

Tstg

55 to +150

Drain Current (Pulse)

Note1

Single Avalanche Current

Note2

IAS

12

Single Avalanche Energy

Note2

EAS

103

mJ

Notes 1. PW 10 s, Duty Cycle 1%


2. Starting Tch = 25C, VDD = 150 V, RG = 25 , VGS = 20 0 V
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D14757EJ1V0DS00 (1st edition)
Date Published May 2002 NS CP(K)
Printed in Japan

2000

2SK3455
ELECTRICAL CHARACTERISTICS (TA = 25C)
CHARACTERISTICS

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

Zero Gate Voltage Drain Current

IDSS

VDS = 500 V, VGS = 0 V

100

Gate Leakage Current

IGSS

VGS = 30 V, VDS = 0 V

100

nA

VGS(off)

VDS = 10 V, ID = 1 mA

2.5

3.5

| yfs |

VDS = 10 V, ID = 6.0 A

2.0

RDS(on)

VGS = 10 V, ID = 6.0 A

0.50

Gate Cut-off Voltage


Forward Transfer Admittance
Drain to Source On-state Resistance

0.60

Input Capacitance

Ciss

VDS = 10 V

1620

pF

Output Capacitance

Coss

VGS = 0 V

250

pF

Reverse Transfer Capacitance

Crss

f = 1 MHz

10

pF

Turn-on Delay Time

td(on)

VDD = 150 V, ID = 6.0 A

24

ns

tr

VGS = 10 V

18

ns

td(off)

RG = 10

50

ns

15

ns

Rise Time
Turn-off Delay Time
Fall Time

tf

Total Gate Charge

QG

VDD = 400 V

30

nC

Gate to Source Charge

QGS

VGS = 10 V

nC

Gate to Drain Charge

QGD

ID = 12 A

11

nC

VF(S-D)

IF = 12 A, VGS = 0 V

1.0

Reverse Recovery Time

trr

IF = 12 A, VGS = 0 V

1.5

Reverse Recovery Charge

Qrr

di/dt = 50 A/ s

11

Body Diode Forward Voltage

TEST CIRCUIT 1 AVALANCHE CAPABILITY


D.U.T.
RG = 25
PG.
VGS = 20 0 V

TEST CIRCUIT 2 SWITCHING TIME


D.U.T.

50

VGS
RL

Wave Form

RG

PG.

VDD

VGS
0

VGS

10%

90%

VDD
ID

90%
90%

BVDSS
IAS

ID

VGS
0

ID

VDS

ID

VDD

Starting Tch

= 1 s
Duty Cycle 1%

TEST CIRCUIT 3 GATE CHARGE


D.U.T.
IG = 2 mA
PG.

50

10%

10%

Wave Form

RL
VDD

Data Sheet D14757EJ1V0DS

td(on)

tr
ton

td(off)

tf
toff

2SK3455
TYPICAL CHARACTERISTICS (TA = 25C)
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE

FORWARD TRANSFER CHARACTERISTICS

35

100

Pulsed

VGS = 20 V
10

ID - Drain Current - A

ID - Drain Current - A

30

10 V

25
20
15
10

TA = 150C
125C
75C
25C
25C
50C

0.1

0.01

5
0
0

10

20

30

0.001

40

VDS = 10 V
Pulsed
0

VDS - Drain to Source Voltage - V

2.0

1.0

50

150

100

100

|yfs| - Forward Transfer Admittance - S

VGS(off) - Gate to Source Cut-off Voltage - V

VDS = 10 V
ID = 1 mA

3.0

0
50

VDS = 10 V
Pulsed

TA = 50C
25C
25C
75C
125C
150C

10

0.1

0.01
0.1

DRAIN TO SOURCE ON-STATE RESISTANCE vs.


GATE TO SOURCE VOLTAGE
Pulsed

1.2
1.0
0.8

ID = 12 A
6.0 A
2.4 A

0.6
0.4
0.2
0

10

10

100

ID - Drain Current - A

15

20

RDS(on) - Drain to Source On-state Resistance -

RDS(on) - Drain to Source On-State Resistance -

Tch - Channel Temperature - C

1.4

15

FORWARD TRANSFER ADMITTANCE vs.


DRAIN CURRENT

GATE TO SOURCE CUT-OFF VOLTAGE vs.


CHANNEL TEMPERATURE
4.0

10

VGS - Gate to Source Voltage - V

DRAIN TO SOURCE ON-STATE


RESISTANCE vs. DRAIN CURRENT
1.5
Pulsed

VGS = 10 V

1.2

20 V

0.9

0.6

0.3

0
0.1

10

100

ID - Drain Current - A

VGS - Gate to Source Voltage - V

Data Sheet D14757EJ1V0DS

DRAIN TO SOURCE ON-STATE RESISTANCE vs.


CHANNEL TEMPERATURE

SOURCE TO DRAIN DIODE


FORWARD VOLTAGE

1.6

100

ISD - Diode Forward Current - A

1.4
1.2
ID = 6.0 A

1.0

12 A

0.8
0.6
0.4
0.2
0
50

VGS = 10 V
Pulsed
100
150

50

0V

0.1

Pulsed
1.0

1.5

VSD - Source to Drain Voltage - V

CAPACITANCE vs. DRAIN TO


SOURCE VOLTAGE

SWITCHING CHARACTERISTICS

1000

td(on), tr, td(off), tf - Switching Time - ns

1000

Ciss

100
Coss
10

1
VGS = 0 V
f = 1 MHz

0.1
0.1

Crss
1

10

100

td(off)
td(on)

10
tr
1
VDD = 150 V
VGS = 10 V
RG = 10
0.1
0.1

1000

10

100

ID - Drain Current - A

REVERSE RECOVERY TIME vs.


DRAIN CURRENT

DYNAMIC INPUT/OUTPUT CHARACTERISTICS


600

di/dt = 50 A/ s
VGS = 0 V

1000

100

10

1
0.1

tf

100

VDS - Drain to Source Voltage - V

10000

10

100

12
VDD = 400 V
250 V
125 V

10

400

VGS

6
200

4
2

VDS
0

ID = 12 A
0

ID - Drain Current - A

0.5

Tch - Channel Temperature - C

VDS - Drain to Source Voltage - V

Ciss, Coss, Crss - Capacitance - pF

VGS = 10 V
1

0.01

10000

trr - Reverse Recovery Time - ns

10

10

15

20

25

QG - Gate Charge - nC

Data Sheet D14757EJ1V0DS

30

0
35

VGS - Gate to Source Voltage - V

RDS(on) - Drain to Source On-state Resistance -

2SK3455

2SK3455

TOTAL POWER DISSIPATION vs.


CASE TEMPERATURE

DERATING FACTOR OF FORWARD BIAS


SAFE OPERATING AREA

100
90
80
70
60
50
40
30
20
10
0

PT - Total Power Dissipation - W

dT - Percentage of Rated Power - %

70

20

40

60

80

100 120 140 160

60
50
40
30
20
10
0

20

TC - Case Temperature - C

40

60

80

100

120

140

160

TC - Case Temperature - C

FORWARD BIAS SAFE OPERATING AREA


100

10
0

ID(DC)

10
n)
(o
DS

d
ite
Lim

10

m
s

3 ms
10 ms
30 ms
100 ms
Power Dissipation Limited

TC = 25C
Single Pulse

0.1
1

10

100

1000

VDS - Drain to Source Voltage - V

TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH


1000

rth(t) - Transient Thermal Resistance - C/W

ID - Drain Current - A

ID(pulse) P
W

100

Rth(ch-A) = 62.5C/W

10
Rth(ch-C) = 2.5C/W
1
0.1
0.01
0.001
10

Single Pulse

100

1m

10 m
100 m
1
PW - Pulse Width - s
Data Sheet D14757EJ1V0DS

10

100

1000

2SK3455
SINGLE AVALANCHE CURRENT vs.
INDUCTIVE LOAD

SINGLE AVALANCHE ENERGY


DERATING FACTOR
120

IAS = 12 A

EAS

10

=1

03

Energy Derating Factor - %

IAS - Single Avalanche Current - A

100

mJ

1
VDD = 150 V
VGS = 20 0 V
RG = 25
0.1 Starting Tch = 25C
0.01
0.1

10

100
80
60
40
20
0
25

50

75

100

125

150

Starting Tch - Starting Channel Temperature - C

L - Inductive Load - mH

VDD = 150 V
RG = 25
VGS = 20 0 V
IAS 12 A

Data Sheet D14757EJ1V0DS

2SK3455
PACKAGE DRAWING (Unit: mm)

Isolated TO-220 (MP-45F)

1.3 0.2
1.5 0.2
2.54 TYP.

2.54 TYP.

2.7 0.2

13.5 MIN.

4 0.2

0.7 0.1

4.5 0.2

12.0 0.2

3.2 0.2

3 0.1

15.0 0.3

10.0 0.3

EQUIVALENT CIRCUIT
Drain

2.5 0.1
0.65 0.1

Body
Diode

Gate

1.Gate
2.Drain
3.Source

Source

1 2 3

Remark Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as
possible, and quickly dissipate it once, when it has occurred.

Data Sheet D14757EJ1V0DS

2SK3455

The information in this document is current as of May, 2002. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data
books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products
and/or types are available in every country. Please check with an NEC sales representative for
availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without prior
written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document.
NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of
third parties by or arising from the use of NEC semiconductor products listed in this document or any other
liability arising from the use of such products. No license, express, implied or otherwise, is granted under any
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Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of customer's equipment shall be done under the full
responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third
parties arising from the use of these circuits, software and information.
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agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize
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M8E 00. 4

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