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A Dual-Frequency
Ultralow-Power
Efficient 0.5-g
Rectenna
Robert Scheeler, Sean Korhummel,
and Zoya Popovic

he second annual Student Wireless Energy

Harvesting (WEH) Design Competition was
held during the 2013 IEEE Microwave The
ory and Techniques Society (MTTS) Inter
national Microwave Symposium (IMS2013)
in Seattle, Washington, United States. This year, the
competition parameters were modified from those of
last year [1], and a new figure of merit (FoM) was es
tablished. The overall goal of the competition was to
demonstrate low-mass hardware that can efficiently
receive and rectify extremely low-incident power den
sities at two frequencies, with a fixed dc load. As the
radio-frequency (RF) environment gets more saturated
with spurious power, designs from this competition
will become a feasible way to energize ultralow-pow
ered or low-duty-cycle hard-to-reach sensors. Concepts
such as Internet-of-Things, in which small ubiquitous

devices and sensors will log data and send it to the

cloud, could benefit from wireless energy harvesters.
These sensors will not have convenient ways to stay
powered unless power harvesting circuits are used for
the sensor hardware.
The requirements for the energy harvester pre
sented in this article are as follows:
incident power density: 1 W/cm2 at 2.45 GHz
and 915 MHz
power transmission: separately at each of the two
frequencies with linear vertical polarization and
known position of source
total mass of prototype: less than 15 g, including
connection for dc output, but not including any
type of stand
minimum harvested power at each frequency: 1-W
dc power delivered to a 2.2-kX load.

Robert Scheeler (robert.scheeler@colorado.edu), Sean Korhummel (sean.regaliakorhummel@colorado.edu),

and Zoya Popovic (zoya.popovic@colorado.edu) are with the University of Colorado, Boulder.
Digital Object Identifier 10.1109/MMM.2013.2288836
Date of publication: 21 January 2014

January/February 2014

1527-3342/14/$31.002014IEEE

109

If the entire power reception device

is codesigned such that the antenna
impedance is matched directly to the
nonlinear rectifying circuit, losses
from the matching network can be
reduced significantly, increasing
overall efficiency.
The FoM is defined as the total dc output power
P DC normalized to 10 W, divided by the square of the
largest dimension D of the WEH device normalized
to 100 cm2:
R PDC ^ nW h V
S
W
10 nW W
FoM = 10 log SS 2
,
D ^cm 2 h W
S
W
100 cm 2
T
X
where the total output dc power is weighted at each
frequency as follows:
PDC = 0.17PDC at 915 MHz + 0.83PDC at 2.45 GHz .
It can be seen by inspection of the FoM expression
that the higher frequency is weighted more heavily. In
addition, when considering the size of the structure,
the design should be optimized for 2.45 GHz opera
tion as the antenna will be smaller. But the minimal
received dc power at 915 MHz still needs to be ensured,
although the electrical size of the antenna is reduced.
The design of a wireless energy harvester requires
designing an antenna integrated with a nonlinear rec
tifying circuit. Dual-frequency rectenna designs have
been presented in the literature for ISM and GSM fre
quencies [2], [3]. Many examples of rectenna designflows follow the same path, e.g., [4][6]: 1) design a
rectification circuit, 2) design an antenna, 3) implement
a matching network to couple as much of the received
power as possible to the rectifier, and 4) design a dc
collection circuit (RF block) that delivers the rectified
power to the dc load.
If the entire power reception device is codesigned
such that the antenna impedance is matched directly to
the nonlinear rectifying circuit, losses from the match
ing network can be reduced significantly, increasing
overall efficiency. When designing low-power har
vesting circuits, such as in the case of this competition,
minimizing the number of components in the design
becomes a worthwhile endeavor.
With the above constraints in mind, the rectenna
prototype shown in Figure 1 is designed to have the
following features:
Direct matching of antenna impedance to the
rectifier impedance eliminates the loss incurred
by using a separate matching network. This tech

110

nique has been shown to achieve high RF to dc

conversion efficiencies at low incident power den
sities in previous work [7].
Only two lumped components are used: the
diode and a capacitor, resulting in minimal loss.
The rectenna is fabricated on a flexible Rogers
Ultralam substrate [8] to eliminate one linear
dimension and obtain low mass and conformal
shape.
The design methodology will be presented by
first discussing the rectifying element, in this case,
a Schottky diode, to determine the optimal imped
ance for the antenna. Due to the nonlinear diode
impedance, some assumptions about the input power
are required at this stage of the design. The optimal
impedance that needs to be presented to the rectifica
tion element is determined at a given power level and
frequency, and then used as a design requirement for
the antenna impedance and gain.

Diode Impedance Analysis

and Antenna Considerations
The choice of the rectifying element is paramount
when designing a WEH circuit. The rectifying element
parameters determine the frequency range at which
rectification is efficient. The main parameters are
the diode nonlinear capacitance C d ^Vd h, the reverse
breakdown voltage Vb, and the forward turn-on volt
age V f , which in turn determines the dynamic range
of the RF power the device is capable of rectifying.
The resistance R s of the diode not only limits the effi
ciency of the rectifier directly due to power dissipa
tion but it also influences the range of impedances
the antenna/matching network will need to present
to best match the diode. The exact impedance will
vary due to the nonlinear resistance, R d ^Vd h, which
is dependent on the incident power level and the fre
quency of operation. The diode selected for this proto
type is a Skyworks GaAs Schottky SMS7630-079 with
R S = 20 , C d =0.14 pF, and V f = 0. 16 V.
To analyze the rectifier circuit, the power delivered
to the diode must be determined, and therefore the gain
of the antenna must be known. The source of the har
vested energy in this case is given as a linearly polar
ized wave incident from a single direction. Therefore, a
Yagi-Uda antenna was implemented with the rectifier
integrated at the feed-point of the driven element. The
Yagi-Uda antenna provides relatively high gain for a
given area and can be printed on a thin flexible sub
strate, thus positively affecting two of the quantities
that maximize the FoM given above. A three-element
(single director and reflector) antenna is chosen as the
directivity is approximately D 0 = 8 dBi [9] and -3 dBi
at 2.45 GHz and 915 MHz, respectively. The gain at
915 MHz is determined by simulation in Ansys HFSS
after the Yagi-Uda antenna design was optimized to
match the diode at 2.45 GHz. The power received by

January/February 2014

At the 2013 Student WEH Design

Competition, the dc power harvested
at 915 MHz and 2.45 GHz were
measured to be 11.6 W and 65.6 W,
resulting in FoM = 10.02 dB.
a Yagi-Uda antenna array is designed to be resonant at
the design frequency and matched to 50 X. Given the
source-pull data, it is clear that an inductive reactance
is needed to match the diode at 2.45 GHz. The induc
tive reactance is achieved by using a well-known induc
tive feed method from the design of RF identification
(RFID) tags [11]. The three-element Yagi antenna with
Figure 1. The prototype dual-frequency Yagi rectenna
an inductive feed consists of a reflector, a driver, and
implemented on a flexible substrate.
a director element with lengths of 0.5, 0.43, and 0.4 m,
respectively, and widths of 4 mm. The distance of the
the antenna was estimated by first determining the
reflector from the driven element is 0.25 m and the dis
maximum effective area from the directivity
tance
of the director element from the driven element
2
is 0.12 m. These dimensions were varied to achieve a
A eff = m D 0 .
4r
match directly at the diode rectifier terminals where the
source-pull reference plane is defined.
Then, the power density is multiplied by the maxi
A dc collection network is designed to isolate the
mum effective area, resulting in an estimate of the
dc load from the antenna, i.e., in the same manner as
input power of -11 dBm and -13.5 dBm for 2.45GHz
a bias circuit. The dc collection line uses two series
and 915 MHz, respectively. Using these power lev
quarter-wave shorted coplanar stripline (CPS) lines,
els, source-pull simulations are performed using
as seen in Figure 2(a). A capacitor that is an RF short
AWR Microwave Offices harmonic balance nonlin
ensures RF-dc isolation, and the dc load does not affect
ear simulator to determine the optimum impedance
the RF match. The desired performance of the shorted
that needs to be presented to the diode to provide
quarter-wave CPS lines is to look like open circuits at
the highest dc voltage across the given 2.2-kX load.
the diode feed point as seen in Figure 2(b) but, how
A nonlinear spice model for the Schottky diode, pro
ever, still provide a path to deliver power to the dc
vided by Skyworks Inc. [10], is used in the simula
load ^R DCh .
tions and the results of the source-pull simulations
are shown in Table 1. Both the 915 MHz and 2.45 GHz
The three-element Yagi-Uda antenna achieves
frequencies are considered, and the RF power is deter
greater than 6-dBi gain when matched at 2.45 GHz, and
mined by an estimation of the effective area times the
the gain is reduced to -3 dBi at 915 MHz. The reduced
power density of 1 W/cm2. For both frequencies an
gain at 915 MHz is to be expected as the physical size
is the same but the electrical size is much smaller; as a
RF-dc conversion efficiency of greater than 40% is pos
result it is not as directive and efficient. Though low,
sible with an output power of greater than 18 W.
this is still sufficient to provide -13.5 dBm of power to
the
antenna feed point at 915 MHz, which will turn on
Dual Frequency Impedance Match of Antenna
the
diode, provided the antenna is matched. The next
Once the impedances that should be presented to the
step is to match the antenna at 915 MHz to the diode.
diode rectifier at the two frequencies for optimal rectifi
Upon further inspection of the bias line, it can be seen
cation are known, a Yagi-Udi antenna is designed to be
that at 915 MHz, the shorted CPS line is now electri
matched to the values of impedances corresponding the
cally short (<m/4) and inductive, with a reactance given
optimal reflection coefficients from Table 1. Generally,
by Z in = jZ 0 tan bl. Figure 2(c) shows the
equivalent rectenna circuit at 915 MHz.
The value of the bypass capacitor C S is not
Table 1. Optimum reflection coefficient determined
critical
at 2.45 GHz since it only needs to
from source-pull simulations using AWR Microwave Office.
provide an RF short, assuming the package
dc Output
RF-dc
inductance of the diode is not appreciable.
Efficiency
Frequency Source-Pull C Input Power Power
At 915 MHz, however, the capacitance can
be used to tune the inductive reactance
915 MHz
.94 + 9
-13.5 dBm
-17.4 dBm 40.7%
of the shorted stubs, which is in parallel
2.45 GHz
.94 + 24
-11 dBm
-13.5 dBm 56.2%
with the diode. Varying the capacitance

January/February 2014

111

To analyze the rectifier circuit, the

power delivered to the diode must be
determined, and therefore the gain of
the antenna must be known.
Short

Yagi
m/4 at 2.45 GHz

+
CS

Rdc

Vdc
-

(a)
Yagi

Schematic View
at 2.45 GHz
+
D1

CS

Rdc

Vdc
-

(b)

j1.0
j2.0

Yagi
Yag
gi

Schematic View
at 915 MHz

2.45-GHz Contours
+

D1

CS

Rdc

0.5

Figure 2. (a) A schematic of the rectenna, including the dc

collection network, (b) an equivalent circuit at 2.45 GHz
shows that the dc load is isolated from the antenna, and (c) an
equivalent circuit at 915 MHz shows the inductive shorted
CPS lines can be combined with an appropriate value of the
capacitor C s to match the diode to the antenna at 915 MHz.

-17
-18

915-MHz Contours

(c)

-16
j5.0

915 MHz
2.45 GHz

Vdc
-

112

-15
Pdc (dBm)

D1

will enable an impedance match at 915 MHz without

affecting the 2.45 GHz match as the quarter-wave CPS
lines will still look like open circuits.
The antenna complex input impedance is simu
lated using the three-dimensional planar method-ofmoments solver Axiem, available in AWR Microwave
Office. The simulated full-wave performance is then
combined with measured capacitor data and an ideal
2.2 kX dc load to determine the input impedance seen
at the feed point of the antenna. The simulated results
in Figure 3 show the input impedance at 915 MHz and
2.45 GHz as the capacitor value is varied 127 pF. The
source pull contours of constant dc power (Pdc) for the
diode are shown at both 915 MHz and 2.45 GHz to
demonstrate how much power is delivered to a 2.2-kX
load for various source impedances where the colors
represent dc power levels as shown in the legend.
The capacitor is modeled using measured data pro
vided by American Technical Ceramics (ATC) for
600L 0402 package capacitors. Note that the 2.45 GHz
input impedance does not change for capacitor values
between 1 and 27 pF. On the other hand, the capacitor
value can be used to design the input impedance for
an improved match to the diode at 915 MHz.
Without the capacitor C S, the input impedance at
915 MHz is capacitive as shown in Figure 4 by the
diamond symbol on the dashed line. This is due to
the small electrical size of the antenna. If a rela
tively small value of capacitance is used for C S, the
antenna capacitance is still dominant in the paral
lel impedance. As the value of the C S increases, it
becomes closer to an RF short, thus allowing the
inductance of the shorted stubs to dominate the

-19
-20

Figure 3. The simulated antenna input impedance versus

shunt capacitor value C S , which varies from 1 to 27 pF is
shown in the black solid line for the 915-MHz frequency
and can be used to match the diode impedance at that
frequency, as shown by the source-pull contours for optimal
dc power delivered to a 2.2-kX dc load. The 2.45-GHz
antenna impedance, shown with the cross symbol, is not
sensitive to the shunt capacitor value and provides a good
match at 2.45 GHz as seen by the source-pull contours.

January/February 2014

parallel impedance of the antenna with the stubs.

The circular symbols on the solid impedance curve
show that the antenna impedance at 915 MHz and
2.45 GHz is well matched to the diode impedance.
The impedance at 915 MHz moves to a considerably
better match when the appropriate capacitor value
is chosen.

Measured Rectenna Results

The antenna gain pattern is simulated using the
full-wave finite element method (FEM) solver Ansys
HFSS. The copolarized gain pattern at 915 MHz
is shown in Figure 5(a) for both the elevation and
azimuth planes. At 915 MHz, the Yagi-Uda antenna
array has a dipole-like pattern with a maximum gain
of -3.03 dBi. At 2.45GHz, the antenna is more direc
tive, achieving a maximum gain of 7.59 dBi as seen
in Figure 5(b). Using the definition of effective area
and the gains calculated from Ansys HFSS, the power
received at 915 MHz and 2.45 GHz is expected to be
-13.7 and -11.6 dBm, respectively.
The final rectenna design is manufactured on
Rogers Ultralam 3850 (1 mil thick, f r = 2.9 ) for low
mass. The component used for CS was an ATC 600-L
18pF capacitor. The final weight after metal etch
ing is approximately 0.5 g, which was well below
the specified limit of 15 g. Figure 6 shows the final
dual-frequency rectenna, including the dc collection
and matching networks and all relevant dimensions.
Using the simulated gains and reflection coefficients
of the antenna, the dc power can be estimated by using
the nonlinear model for the Skyworks SMS7630-079
diode. In a harmonic-balance simulation, an ideal
source tuner is used to present the simulated imped
ance of the antenna, and the power incident on the
antenna and supplied by the transmitter is deter

To analyze the rectifier circuit, the

power delivered to the diode must be
determined, and therefore the gain of
the antenna must be known.
mined from the gain. The expected dc power deliv
ered to the 2.2-kX load at 915 MHz and 2.45 GHz is
15 W and 35.5 W, respectively. Therefore, the esti
mated FoM for this rectenna with the largest dimen
sion being 7.5 cm is calculated to be FoM = 7.6 dB.

i, z
0
30

2.45-GHz
Match

-30

z=0
60

-60
-5 dB
-10 dB

90

-90

120

-120

150

-150
180
(a)
i, z
0

30

60
Zin w CS
Zin

i = 90

i = 90

-30

-60

z = 0

-10 dB
-20 dB

90

-15

-90

2.45-GHz Contours

-17
915-MHz Contours

Pdc (dBm)

-16
-120

-18

915-MHz -19
Match
-20

Figure 4. The simulated antenna input impedance versus

frequency from 500 MHz to 2.6 GHz for the antenna with
(solid blue line) and without (dashed red line) the shunt
capacitor C S . The impedance is compared to the diode
source pull contours for optimal dc power delivered to a
2.2-kX dc load at both frequencies.

January/February 2014

120
-150

150
180
(b)

Figure 5. The simulated copolarized gain patterns in the

elevation (blue, z =0) and azimuth (red, i =90) planes
at (a) 915 MHz and (b) 2.45 GHz. The gain patterns are
normalized to the maximum gain which at 915 MHz was
-3.03 dBi and at 2.45 GHz was 7.59 dBi. The simulations
are performed using HFSS.

113

At the 2013 student WEH design

competition, the dc power harvested
at 915 MHz and 2.45 GHz were
measured to be 11.6 W and 65.6 W,
resulting in FoM = 10.02 dB.

W1

Sa

Sb

References

L2
S1

S2

L3

L1

La

Lc

Lb

W2

Figure 6. The manufactured prototype rectenna. The relevant

dimensions are given in mm as L a = 61.5, L b = 53.03,
L c = 49.3, S a = 30.16, S b = 14.3, W 1 = 4, W 2 = 1,
L 1 = 7.265, L 2 = 4, L 3 = 3, S 1 = 0.5, and S 2 = 0.4.

Table 2. Measured and simulated performance

of the rectenna.
Expected Expected Measured Measured
Frequency dc Power FoM
dc Power FoM
915 MHz

15 W

2.45 GHz

35.5 W

7.6 dB

11.6 W
65.6 W

10.02 dB

At the 2013 student WEH design competition, the dc

power harvested at 915 MHz and 2.45 GHz were mea
sured to be 11.6 W and 65.6 W, resulting in FoM =
10.02 dB. The increase from the estimated FoM is most
likely due to more power being incident on the antenna

114

than was radiated by the dedicated transmitters and

was likely provided by outside sources such as Wi-Fi hot
spots and any other wireless devices. Although we spe
cifically designed the antenna to operate at 915MHz and
2.45 GHz, it is very likely that a reasonable match to the
diode impedance exists at other frequencies where there
are some ambient sources, and these would contribute to
the total rectified power, resulting in an increase relative
to the nominal available power level. The final measured
results for the prototype are summarized in Table 2.
Power circuits utilized in these competitions have the
capability to extend operation of low-powered devices,
perhaps indefinitely.

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January/February 2014